ADVANCED DESIGN TECHNIQUES FOR RF POWER AMPLIFIERS
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ADVANCED DESIGN TECHNIQUES FOR RF POWER AMPLIFIERS
ANALOG CIRCUITS AND SIGNAL PROCESSING SERIES Consulting Editor: Mohammed Ismail. Ohio State University Related Titles: CMOS CASCADE SIGMA-DELTA MODULATORS FOR SENSORS AND TELECOM del Río, R., Medeiro, F., Pérez-Verdú, B., de la Rosa, J.M., Rodríguez-Vázquez, A. ISBN 1-4020-4775-4 Titles in former series International Series in Engineering and Computer Science: SIGMA DELTA A/D CONVERSION FOR SIGNAL CONDITIONING Philips, K., van Roermund, A.H.M. Vol. 874, ISBN 1-4020-4679-0 CALIBRATION TECHNIQUES IN NYQUIST A/D CONVERTERS van der Ploeg, H., Nauta, B. Vol. 873, ISBN 1-4020-4634-0 ADAPTIVE TECHNIQUES FOR MIXED SIGNAL SYSTEM ON CHIP Fayed, A., Ismail, M. Vol. 872, ISBN 0-387-32154-3 WIDE-BANDWIDTH HIGH-DYNAMIC RANGE D/A CONVERTERS Doris, Konstantinos, van Roermund, Arthur, Leenaerts, Domine Vol. 871 ISBN: 0-387-30415-0 METHODOLOGY FOR THE DIGITAL CALIBRATION OF ANALOG CIRCUITS AND SYSTEMS: WITH CASE STUDIES Pastre, Marc, Kayal, Maher Vol. 870, ISBN: 1-4020-4252-3 HIGH-SPEED PHOTODIODES IN STANDARD CMOS TECHNOLOGY Radovanovic, Sasa, Annema, Anne-Johan, Nauta, Bram Vol. 869, ISBN: 0-387-28591-1 LOW-POWER LOW-VOLTAGE SIGMA-DELTA MODULATORS IN NANOMETER CMOS Yao, Libin, Steyaert, Michiel, Sansen, Willy Vol. 868, ISBN: 1-4020-4139-X DESIGN OF VERY HIGH-FREQUENCY MULTIRATE SWITCHED-CAPACITOR CIRCUITS U, Seng Pan, Martins, Rui Paulo, Epifânio da Franca, José Vol. 867, ISBN: 0-387-26121-4 DYNAMIC CHARACTERISATION OF ANALOGUE-TO-DIGITAL CONVERTERS Dallet, Dominique; Machado da Silva, José (Eds.) Vol. 860, ISBN: 0-387-25902-3 ANALOG DESIGN ESSENTIALS Sansen, Willy Vol. 859, ISBN: 0-387-25746-2 DESIGN OF WIRELESS AUTONOMOUS DATALOGGER IC'S Claes and Sansen Vol. 854, ISBN: 1-4020-3208-0 MATCHING PROPERTIES OF DEEP SUB-MICRON MOS TRANSISTORS Croon, Sansen, Maes Vol. 851, ISBN: 0-387-24314-3 LNA-ESD CO-DESIGN FOR FULLY INTEGRATED CMOS WIRELESS RECEIVERS Leroux and Steyaert Vol. 843, ISBN: 1-4020-3190-4 SYSTEMATIC MODELING AND ANALYSIS OF TELECOM FRONTENDS AND THEIR BUILDING BLOCKS Vanassche, Gielen, Sansen Vol. 842, ISBN: 1-4020-3173-4
ADVANCED DESIGN TECHNIQUES FOR RF POWER AMPLIFIERS by
Anna Rudiakova Donetsk National University, Ukraine and
Vladimir Krizhanovski Donetsk National University, Ukraine
A C.I.P. Catalogue record for this book is available from the Library of Congress.
ISBN-10 ISBN-13 ISBN-10 ISBN-13
1-4020-4638-3 (HB) 978-1-4020-4638-4 (HB) 1-4020-4639-1 (e-book) 978-1-4020-4639-1 (e-book)
Published by Springer, P.O. Box 17, 3300 AA Dordrecht, The Netherlands. www.springer.com
Printed on acid-free paper
All Rights Reserved © 2006 Springer No part of this work may be reproduced, stored in a retrieval system, or transmitted in any form or by any means, electronic, mechanical, photocopying, microfilming, recording or otherwise, without written permission from the Publisher, with the exception of any material supplied specifically for the purpose of being entered and executed on a computer system, for exclusive use by the purchaser of the work. Printed in the Netherlands.
Contents
Contributing Authors
vii
Preface
ix
Chapter 1 Introduction to the RF Power Amplifiers Design
1
Chapter 2 Theoretical Analysis of BJT Class-F Power Amplifier
31
Chapter 3 BJT Class-F power Amplifier Design
63
Chapter 4 PBG Structure as Amplifier Output Network
69
Chapter 5 BJT Fifth-Harmonic Peaking Class F Power Amplifier
81
Appendix
87
References
131
Index
135
v
Contributing Authors
Anna Rudiakova Donetsk National University, Donetsk, Ukraine Vladimir Krizhanovski Donetsk National University, Donetsk, Ukraine
vii
Preface
Power amplifier is the main power consumption block in any advanced wireless communications system. When the DC power is limited, it is crucial to design power amplifiers with high power-added efficiency. The output power and efficiency depends on the active device, bias conditions according to the operating class, matching networks, and so on. One of the methods to improve the output power and efficiency is to terminate the harmonics at the output. Among the harmonics, the first five are especially in want of tuning, because their magnitudes are relatively larger than the others’. In the last seven years the authors have made a lot of efforts in the field of development of high-efficiency polyharmonic power amplifiers, and the original results are highly enhanced both by the modelling and the related design methodologies. Thus, the main idea of this book will be to provide the reader with a deep analysis of modeling and design strategies of BJT high-efficiency polyharmonic power amplifiers, as well as to organize in a coherent manner all the authors’ results in the field of polyharmonic power amplifiers. Hence, the book allows the reader not only to understand the operating principle and the features of bipolar transistor power amplifiers, but also to design high-efficiency amplifiers at the frequencies close to transition. The book can be used as a guide by researchers and practicing engineers dealing with this subject and as a text book to graduate and postgraduate students who want to extend their knowledge and study all aspects of the analysis and design of high-efficiency polyharmonic power amplifiers. Although the material is presented in a formal and theoretical manner, much emphasis is made on a design perspective. To further link the book’s
ix
x
Preface
theoretical aspects with practical issues, simulation and experimental examples are included. The book is organized into five chapters. Chapter 1 is introductory and it contains analytical review of current state of high-efficiency power amplifiers design problem. The strength and weakness of existing approaches are highlighted, unsolved issues pointed out. Chapter 2 of the book is devoted to theoretical analysis of BJT class-F power amplifier near transition frequency and is divided into three sections. In section 1, we propose the simplified transistor model accounting the charge storage issues that will be needed in the sequel. Section 2 describes the analytical derivation of collector current harmonic content depending on the operating frequency and the biasing conditions, while section 3 presents the Class F realization conditions according to the analysis. Chapter 3 deals with verification and demonstration of the results achieved in Chapter 2. Section 1 covers the simulation of BJT class-F power amplifier near the transition frequency using the accurate transistor model. Furthermore, section 2 contains experimental results of the fabricated prototype. Chapter 4 is devoted to the use of photonic band-gap structures (PBG) as the output networks of high-efficiency polyharmonic power amplifiers. The novel type of PBG is proposed providing improved characteristics in the both stop and pass bands. Finally, Chapter 5 presents the BJT fifth-harmonic peaking class F power amplifier design using proposed in Chapter 4 structure. In addition, we provide our own comprehensive nonlinear power amplifiers’ simulation tutorial in Appendix.
Anna Rudiakova, Vladimir Krizhanovski
Chapter 1 INTRODUCTION TO THE RF POWER AMPLIFIERS DESIGN
1.
BASIC TERMS AND DEFINITIONS
The general equivalent circuit of power amplifier is shown in Fig. 1-1. It consists of active device (AD), input and output networks and supply and bias circuits1,2. Electrical operation mode of power amplifier can be characterized by the following fundamental parameters: the first harmonic output power P1 , the dc supply power PDC , the efficiency regarding the first harmonic η = P1 PDC (so-called electronic efficiency), the power gain K P , the passband or amplitude-frequency characteristic, and the nonlinear distortions values. The power-added efficiency (PAE) is also important characteristic accounting the driving signal power.
iC
Input matching network
Active Device (AD) AD Bias network
v CE
DC supply network
Output matching network
Figure 1-1. General equivalent circuit of power amplifier.
1
2
Chapter 1
The driving signal source and supply voltage source parameters substantially influence the power amplifier operation. These external parameters are the following: - nominal power Pin , frequency f and intrinsic impedance Z i of the driving signal source; - voltage EC of supply voltage source, and the load impedance Z L at the transistor output terminals. The dependencies of the amplifier parameters on the external parameters present the sets of characteristics as follows: - load: dependencies of P1 , PDC , η , K P on the load impedance Z L ; - amplitude: dependencies of P1 , PDC , η , K P on the input power Pin ; - modulation: dependencies of P1 , PDC , η , K P on the supply voltage EC ; - frequency: dependencies of P1 , PDC , η , K P on the driving signal frequency. The approximate views of the load, amplitude, modulation, and frequency characteristics’ sets are shown in Figs. 1-2 - 1-5, respectively. The f1 < f 2 < f3 is assumed for all of the figures. P1
f1 f2 f3
ZL Figure 1-2. Load characteristics’ set.
P1
f1 f2 f3
Pin Figure 1-3. Amplitude characteristics’ set.
Introduction to the RF Power Amplifiers Design
3
P1 Pin
EC Figure 1-4. Modulation characteristics’ set.
P1
Pin
f Figure 1-5. Frequency characteristics’ set.
There are other characteristics’ sets besides the above mentioned: for example, the bias characteristics, etc. However, the above four sets are of special importance. The nonlinear power amplifier can operate in one of the following modes: undersaturated, critical, overloaded, switching. The latter two belong to the saturated one. The amplifier’s operating mode can be determined by the dynamic load line, which represents the operating point coordinates at the current-voltage curves’ plane. The mode is undersaturated, if the dynamic load line stays within the active and cut-off regions as shown in Fig. 1-6. However, when it moves to the saturation region, the operating mode becomes overloaded. The critical mode is the boundary between the undersaturated and overloaded ones. In this case, the operating point is just touching the saturation line. The switching mode assumes the transistor as an ideal switch that can be either in the saturation region, or in cut-off. This mode can be considered as an extreme case of overloaded one.
4
Chapter 1 saturation line
iC
1 3
iB
2
vCCE Figure 1-6. Dynamic load lines for the undersaturated (1), critical (2), and overloaded (3) operating modes.
The power amplifiers are divided into several classes within two major groups depending on the input signal amplitude, bias and supply conditions, and the properties of the input and output matching networks: 1) the sinewave output operation, and 2) the polyharmonic operation. The detailed description of these classes is given in the further paragraphs.
2.
SINE-WAVE OUTPUT OPERATION: CLASSES A, AB, B, C
There are two cases for the sine-wave output operation power amplifiers as shown in Fig. 1-7: 1) the small signal class A - linear mode, and 2) the large signal modes with cut-off. The magnitude of RF signal is much smaller than its dc component for the linear mode (see Fig. 1-7 (a)). Typical application of such amplifiers is the input low-power stages of RF transmitters. Maximal theoretically reachable efficiency is equal 50% for this case. The large-signal operation modes (see Fig. 1-7 (b)) give the advantage of higher efficiency. Here, the collector current is zero during the cut-off interval, so the instant parasitic power dissipation becomes zero for this region leading to the efficiency increasing. The large signal operation modes are divided into different classes according to the conduction angle as follows: class AB with 90° < θ < 180° , class B with θ = 90° , and class C with θ < 90° . The analytical expression for the large-signal operation collector current iC is following:
Introduction to the RF Power Amplifiers Design iC
5 iC
iC
ICm v BE
v BE
(a)
θ
ω0 t
(b)
Figure 1-7. Small signal class A operation - linear mode (a), and large signal nonlinear modes with cut-off (b).
iC = I Cm
cos ω t − cos θ , for − θ < ω t < θ 1 − cosθ iC = 0, for θ < ω t < 2π − θ
½ ° ¾, °¿
(1-1)
where I Cm is the maximal collector current value, θ is the conduction angle, which is equal to the half of nonzero current interval, and varies from 0° to 180°. The dependencies of the Fourier coefficients α 0 and α1 of the collector current dc component I C 0 = I Cmα 0 and fundamental frequency component I C1 = I Cmα1 on θ are the following:
α0 =
sin θ − θ cosθ θ − sin θ cosθ , α1 = π (1 − cosθ ) π (1 − cosθ )
(1-2)
In case of higher harmonics, the appropriate Fourier coefficients should be determined as:
αn =
2 sin nθ cos θ − n cos nθ sin θ , π n(n 2 − 1)(1 − cos θ )
n≥2
The α 0 - α 3 coefficients are shown in Fig. 1-8. Assuming the ideal matching and harmonic output voltage, the collector efficiency can be written as:
Chapter 1
6 αn 0.5 1
0
0.4
0.3 2 0.2 3 0.1
0.0
0
45
90
Figure 1-8. The dependencies of the Fourier coefficients α
η=
θ
135
0
-α
3
on θ .
1 I C1VC1 1 α1 P1 , = = ξ PDC 2 I C 0 EC 2 α 0
(1-3)
where the ξ = VC1 EC is the transistor utilization factor, ξ ≤ 1 . As it is follows from Eqs. (1-2) and (1-3), the efficiency increases when the conduction angle decreases. Furthermore, the efficiency approaches 100% for the θ → 0 and ξ = 1 . As the collector current becomes almost zero during the cut-off interval, the dissipated power is smaller for the decreased conduction angle. However, the fundamental component power goes down dramatically for a low θ . That is why the class B or class C with θ greater than 60° are usually used. It allows obtaining η = 70 .. 80% and acceptable output power level3-7.
3.
POLYHARMONIC OPERATION: CLASS F
The polyharmonic operation is characterized by the complex output voltage waveform8, which contains the series of harmonics. In general case, the output voltage includes infinite number of harmonics: ∞
vC = EC − ¦ VCn cos(nω t + ϕ n ) , n =1
However, only few first harmonics are considered practically.
Introduction to the RF Power Amplifiers Design
7
The simplest particular case of polyharmonic operation is so-called biharmonic9. Here, an output voltage contains the second or the third harmonic besides of dc and fundamental components. The advantages of higher harmonic tuning were shown by Tyler in 195810 and Snider in 196711. The short-circuit mode for the even harmonics and the open-circuit mode for the odd harmonics were realized at the transistor output. For the first time, F.H. Raab12 proposed the term “class-F ” for such tuning. It is worthy to note that in this case output current contains the only even harmonics, while output voltage contains the only odd harmonics, or vice versa. In other words, either current, or voltage, but not both simultaneously, has non-zero value for a given higher harmonic, so the power dissipation is omitted. The output network of class-F power amplifier is usually presented as the multiresonator harmonic filter. The equivalent circuit of third harmonic peaking network is shown in Fig. 1-9. This network and its varieties were considered in details by Trask13.
Z in = RL for ω 0 Z in = ∞ for 3ω 0 Z in = 0 for others
Cb
3ω 0
iC Active device (AD)
+
AD
v CE C
−
ω0
RL
Figure 1-9. Equivalent circuit of third-harmonic peaking class F amplifier output network.
8
Chapter 1
3.1
The maximally flat output current and voltage waveforms
The ideal current and voltage waveforms are shown in Fig. 1-10. They correspond to the account of infinite number of harmonics. However, tuning of output network for such case is almost impossible practically. So, usually the only few first harmonics are under consideration, as much energy efficient. In order to choose between the circuit complexity and efficiency increasing, one have to have an idea about influence of number of harmonics taken into account on the power amplifier characteristics. Such analysis was conducted by F.H. Raab14. He supposed, that output voltage contains the only odd higher harmonics, while output current contains the only even higher harmonics: vC = EC + VC1 sin ω0t + VC 3 sin 3ω0t + VC 5 sin 5ω0t + ... iC = I C 0 − I C1 sin ω0t − I C 2 cos 2ω0t − I C 4 cos 4ω0t + ... ,
The following relations were defined for voltage:
γV =
VC1 , EC
δV =
VC max , EC
(1-4)
δI =
iC max . IC 0
(1-5)
and for current
γI =
I C1 , IC 0
Here vC max and iC max are maximal values of voltage and current pulses, respectively. The several assumptions were made: the output network is lossless and the only fundamental frequency component can reach the load; the active device is ideal current source or ideal switch. Raab called such the approximations of ideal current and voltage waveforms as “maximally flat”. The parameters m and n define the numbers of even and odd harmonics taken into consideration, respectively. The parameters δV , δ I , γ V , γ I , and relations of higher harmonics to the dc component for the maximally flat waveforms are presented in Tables 1-1 and 1-2.
Introduction to the RF Power Amplifiers Design
9
iC
0
ω 0t
vCE
0
ω0t
Figure 1-10. The ideal waveforms of output current and voltage for a class F power amplifier.
The collector efficiency of power amplifier with the maximally flat waveforms of current and voltage can be written using Eqs. (1-4) and (1-5) as follows:
η=
γV γ I
(1-6)
2
The efficiency values for the different combinations of m and n are summarized in Table 1-3. As one can see from the table, the increasing of number of voltage or current harmonics leads to the efficiency growing. Table 1-1. The voltage maximally flat waveform parameters14 δV VC 3 ȿC n γ V = VC1 ȿC 1 2 1 – 3 2 9/8 = 1.125 1/8 = 0.125 5 2 75/64 = 1.172 25/128 = 0.195 ∞ 2 4/π = 1.273 4/(3 π ) = 0.424
– – 3/128 = 0.023 4/(5 π ) = 0.255
Table 1-2. The current maximally flat waveform parameters14 δI IC2 IC 0 m γ I = I C1 I C 0 1 2 1 – 2 8/3 = 2.667 4/3 = 1.333 1/3 = 0.333 4 128/45 = 2.844 64/45 = 1.422 16/45 = 0.356 ∞ π = 3.142 π /2 = 1.571 2/3 = 0.667
– – 1/45 = 0.022 2/15 = 0.133
VC 5 ȿC
IC 4 IC 0
Chapter 1
10 Table 1-3. Maximally flat waveform power amplifier efficiency14 η ( n = 1) η ( n = 3) η ( n = 5) m 1 1/2 = 0.500, 9/16 = 0.563 75/128 = 0.586 class A 2 2/3 = 0.667 3/4 = 0.750 25/32 = 0.781 4 32/45 = 0.711 4/5 = 0.800 5/6 = 0.833
∞
π /4 = 0.785, class B
9π /32 = 0.884
75π /256 = 0.920
η(n= ∞) 2/π = 0.637 8/(3 π ) = 0.849 128/(45 π ) = 0.905 1, class F
Herewith, the faster growing is appropriate to the simultaneous increasing of both current and voltage numbers of harmonics. However, the above analysis did not pay any attention to the harmonic generation mechanism. In addition, it was supposed that the fundamental component and the higher harmonics are in the proper phase relation. As will be shown in the Chapters 2 and 3, this assumption can lead to the poor efficiency.
3.2
Phase relations between the first and higher harmonics
The first and the third harmonics of transistor output voltage should be out-of-phased in order to obtain its flat waveform15,16. In this case, the third harmonic decreases the peak value of voltage impulse and leads to its flattening while is taken in the proper magnitude relation to the fundamental component as shown in Fig. 1-11 (a). These effects allow to increase the output power capability, to decrease the power dissipation losses in the transistor, and therefore lead to the higher efficiency. In case of incorrect phase tuning, one can obtain converse situation: the peak voltage value and the dissipation in transistor power increasing followed by efficiency decreasing (see Fig. 1-11 (b)). The conditions of formation the out-of-phase the first and the third harmonics were considered by Colantonio et al15,16. Usually, the transistor of single-stage class-F power amplifier operates in the critical or slightly overloaded mode. So, the transistor output voltage is completely defined by the transistor output current and the input impedance of the output network. Therefore, for each of harmonics one can write: VCn = I Cn Z Ln .
The input impedance Z Ln was assumed pure resistive, and the truncated sine-wave approximation for the collector current similar to (1.1) was used under the Colantonio’s et al analysis15,16.
Introduction to the RF Power Amplifiers Design
11
Figure 1-11. The phase relations between the first and the third harmonics: out-of-phase (a) and in-phase (b).
The first and the third harmonics are out-of-phase for above conditions if their Fourier coefficient α n are opposite. As one can see from the Fig. 1-8, it is possible for the conduction angles θ > 90°. 3.2.1
Optimum input impedance
In case of third-harmonic peaking class-F power amplifier, the transistor output voltage consists of the first, the third harmonics, and the dccomponent as follows:
12
Chapter 1 vC = EC − VC1 cos ω0t − VC 3 cos 3ω0t · § 1 = EC − VC1 ¨¨ cos ω0t + cos 3ω0t ¸¸ ε3 ¹ ©
(1-7)
where
ε3 =
VC1 Rω 0 I C1 = ⋅ . VC 3 R3ω 0 I C 3
(1-8)
The ε 3 is defined by the relation of the first harmonic complex amplitude to the third harmonic one15,16. It has to be negative in order to realize voltage impulse flattening (See Fig. 1-8). The first harmonic magnitude is greater than half of the signal swing for the signal with out-of-phase the first and the third harmonics. It allows increasing the output power without overload. The growing of the first harmonic magnitude can be expressed as: VC1,F = γ (ε 3 )VC1,sin ,
(1-9)
where the γ (ε 3 ) is the class-F first harmonic growing coefficient defined by the relation of the first harmonic magnitude to the magnitude of overall voltage swing as follows:
γ (ε 3 ) =
VC1 1 = . v(θ m ) − E C cos θ m + (1 ε 3 ) cos 3θ m
Here, the θ m is the point of minimal or maximal value of the voltage impulse vC , which can be determined from (1-7). In order to find θ m , the derivative of vC on ω 0 t = θ should be equated to zero. Then, the obtained equation should be solved. The derivative of vC can be written as follows: vC' = −VC1 (− sin θ − 3 ε 3 sin 3θ ) .
(1-10)
The points of possible maximums of vC within the 0 ≤ θ ≤ π region can be found by equating of Eq. (1-10) to zero:
θ m1 = 0 ,
(1-11)
Introduction to the RF Power Amplifiers Design 1.5
γ 1 (ε 3 )
13
γ 2 (ε 3)
ε 3,MF
1
0.5
0 −30
−25
−20
−15
−10
−5
0
Figure 1-12. The γ 1 (ε 3 ) and γ 2 (ε 3 ) functions.
§ 3 − ε3 ¨ 2 3 ©
θ m 2 = arccos¨
· ¸. ¸ ¹
(1-12)
The following expressions for the γ 1 (ε 3 ) and γ 2 (ε 3 ) functions are correspond to the θ m1 and θ m 2 , respectively:
γ 1 (ε 3 ) =
γ 2 (ε 3 ) =
cos θ m1
ε 1 = 3 , + (1 ε 3 ) cos 3θ m1 1 + ε 3
(1-13)
cos θ m 2
3 3ε 3 1 =− + (1 ε 3 ) cos 3θ m 2 (3 − ε ) 3 2
(1-14)
3
The γ 1 (ε 3 ) and γ 2 (ε 3 ) functions are shown in Fig. 1-12. The point of contingence of γ 1 (ε 3 ) and γ 2 (ε 3 ) functions is appropriate to the maximally flat waveform of voltage vC . The absciss ε 3, MF of contingence point can be determined by equating the right parts of Eqs. (1-13) and (1-14):
Chapter 1
14
ε 3, MF 3 3ε 3, MF =− , 1 + ε 3, MF (3 − ε )3 2 3, MF
ε 3,MF = −9 .
(1-15)
The waveform of voltage vC , that is appropriate to ε 3, MF , is shown in Fig. 1-13. The following function value γ (ε 3, MF ) is appropriate to the absciss ε 3, MF = −9 :
γ (ε 3, MF ) =
ε 3, MF 3 3ε 3, MF 9 =− = = 1.125 . 3 1 + ε 3, MF (3 − ε ) 2 8
(1-16)
3, MF
For the − 9 < ε 3 < 0 region, the maximal value of vC within the 0 ≤ θ ≤ π interval can be reached for θ m = θ m 2 point. Thereat, function γ (ε 3 ) is the same as γ 2 (ε 3 ) :
γ (ε 3 ) = γ 2 (ε 3 ) = −
3 3ε 3
(3 − ε 3 ) 3 2
, ɞɥɹ − 9 < ε 3 < 0 .
(1-17)
The waveform of voltage vC , that is appropriate to ε 3 = −3 , is shown in Fig. 1-14. For the ε 3 ≤ −9 region, the maximal value of vC within the 0 ≤ θ ≤ π interval can be reached for θ m = θ m1 point. Thereat, function γ (ε 3 ) is the same as γ 1 (ε 3 ) :
γ (ε 3 ) = γ 1 (ε 3 ) =
ε3 , ɞɥɹ ε 3 ≤ −9 . 1+ ε3
(1-18)
The waveform of voltage vC , that is appropriate to ε 3 = −15 , is shown in Fig. 1-15. For ε 3 → −∞ , γ (ε 3 ) is aspire to unity as follows:
ε3 = 1. ε 3 → −∞ 1 + ε 3
lim γ (ε 3 ) = lim γ 1 (ε 3 ) = lim
ε 3 → −∞
ε 3 →−∞
(1-19)
Introduction to the RF Power Amplifiers Design 1
15
vC (V)
0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 −1
−0.8
− 0.6
−0.4
−0.2
0
0.2
0.4
0.6
0.8
1
ω 0t Figure 1-13. Maximally flat waveform of voltage impulse vC , that is appropriate to ε 3 , MF .
1
vC (V)
0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 −1
−0.8
−0.6
−0.4
−0.2
0
0.2
0.4
0.6
0.8
ω 0t Figure 1-14. The waveform of voltage vC , that is appropriate to ε 3
= −3 .
1
16
Chapter 1
1
vC (V)
0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0
−1
−0.8
−0.6
−0.4
−0.2
0
0.2
0.4
0.6
0.8
1
ω 0t
Figure 1-15. The waveform of voltage vC , that is appropriate to ε 3
= −15 .
1.4 γ ( ε ) 3 1.2
ε 3, max
1 0.8 0.6 0.4 0.2 0 −30
−25
−20
−15
ε3
−10
−5
Figure 1-16. Function γ ( ε 3 ) for negative ε 3 values.
0
Introduction to the RF Power Amplifiers Design
17
In this case, the third harmonic magnitude is aspire to zero, and the voltage impulse waveform is the harmonic function. Therefore, the function γ ( ε 3 ) can be defined by the following set for negative ε 3 values according to the Eqs. (1-17) and (1-18): 3 3ε 3 , for − 9 < ε 3 < 0 °− 3 ° (3 − ε 3 ) 2 γ (ε 3 ) = ® ° ε3 for ε 3 ≤ −9 °1 + ε , 3 ¯
(1-20)
Function γ (ε 3 ) for negative ε 3 values is shown in Fig. 1-16. As can be seen from Fig. 1-16, the function γ (ε 3 ) reaches the maximal value within the − 9 < ε 3 < 0 interval. The absciss ε 3,max of maximum point can be found by equating the derivative of γ ( ε 3 ) to zero. Then, the obtained equation should be solved. The derivative of γ (ε 3 ) at the − 9 < ε 3 < 0 region can be written as follows: § 3 3ε 3 γ ′(ε 3 ) = ¨ − 3 ¨ ( © 3 − ε3) 2
'
· 9 3ε 3 ¸ =− 3 3 . − 3 ¸ (3 − ε 3 ) 2 2(3 − ε 3 )5 2 ¹
(1-21)
The following value can be obtained by equating of Eq. (1-21) to zero: −
3 3
(3 − ε 3,max )3 2
−
9 3ε 3, max 2(3 − ε 3,max )
5
=0, 2
ε 3,max = −6 .
(1-22)
The waveform of voltage vC , that is appropriate to ε 3, max , is shown in Fig. 1-17. The following function value γ (ε 3, max ) is appropriate to the absciss ε 3,max = −6 :
γ (ε 3,max ) = −
3 3ε 3, max
(3 − ε 3,max ) 2 3
=
2 3
≈ 1.1547 .
(1-23)
18
Chapter 1 1
vC (V)
0.8
0.6
0.4
0.2
0 −1
−0.5
0
0.5
1
ω 0t Figure 1-17. The waveform of voltage v C , that is appropriate to ε 3 , max .
The first harmonic of transistor output current impulse is assumed the same for various tunings of the third harmonic in case of given input signal. Therefore, the input impedance of output network should vary in order to increase the first harmonic of transistor output voltage as follows: Rω 0 , F = γ (ε 3 )Rω 0 , sin ,
where the Rω0 ,sin is the input impedance of sine-wave operation power amplifier output network. The choice of ε 3 defines the optimum load for the third harmonic: R3ω 0 ,F =
Rω 0 ,F I C1 . ε 3 IC 3
(1-24)
Equation (1-24) is substantially distinct from the classical class-F condition of odd harmonics open-circuit mode. It can be explained by the fact that in practice the finite number of higher harmonics is usually taken into account.
19
Introduction to the RF Power Amplifiers Design
4.
POWER AMPLIFIERS’ MATCHING NETWORKS
4.1
The main purposes of power amplifiers’ matching networks
The electrical networks play the various roles in the transistor power amplifiers. These are: driving signal source matching with the transistor input; load matching with the transistor output; cross-product suppression in the output signal spectrum; formation of given impedance for higher harmonics at the transistor output; dividing and combining signals from the several sources. 4.1.1
Driving signal source matching with the transistor input
Suppose that the transistor input current and voltage first harmonic magnitudes are known as well as the phase shift between them. Then the equivalent impedance can be considered instead of the transistor. Its value should be selected in such a way, that the input current, voltage and their phase shift remain the same. This impedance is the input impedance of the transistor. An input impedance of power RF transistors is a nonlinearly varying complex value, which depends on an input power level and frequency, bias conditions, parameters of the transistor itself, etc. Usually, it differs significantly from the optimum value, which allows the maximum power transfer from the driving source to the transistor. It is useful to have an amplifier input impedance equal to the standard 50Ohm, or 75Ohm. However, a typical input impedance value of a power RF transistor is just a few ohms. Therefore, the low-resistance transistor input impedance should be matched to the higher value in order to provide better power transfer. The general look at the matching problem is the following. The two-port network is used between the driving source and the load. Here, the load Z L means the transistor input impedance. In case of voltage driving source Ei with intrinsic impedance Z i shown in Fig. 1-18(a) is used, the Z parameters of two-port are most convenient. The matching conditions can be written as: Z in = Z i* , and Z out = Z L* ,
(1-25)
where asterisk means the complex conjugate; Z in is an input impedance of two-port calculated at the terminals 1 and 2; Z out is an output impedance of two-port calculated at the terminals 3 and 4. The Z in and Z out are expressed through the Z parameters as follows:
20
Chapter 1 Z in = Z11 −
Z12 Z 21 Z Z , and Z out = Z 22 − 12 21 . Z 22 + Z L Z11 + Z i
Alternatively, in case of current driving source I i with intrinsic admittance Yi shown in Fig. 1-18(b) is used, the Y parameters of two-port are useful. It gives the following matching conditions: Yin = Yi* , and Yout = YL* ,
(1-26)
where YL is a transistor input admittance; Yin is an input admittance of two-port at the terminals 1 and 2; Yout is an output admittance of two-port at the terminals 3 and 4. The Yin and Yout can be written as follows: Yin = Y11 −
Y12Y21 Y Y , and Yout = Y22 − 12 21 . Y22 + YL Y11 + Yi
In case of a lossless reversible reactive two-port, the Z and Y parameters can be represented as follows: Z11 = jx11 ;
Z12 = Z 21 = jx12 ;
Zi Ei
Z 22 = jx22 ;
1
Ziin
3 Matching two-port
2
Z out
ZL
4 (a)
Yi Ii
1
Yiin
3 Matching two-port
Yout
YL
4
2 (b)
Figure 1-18. General matching problem for the driving voltage (a) and current (b) sources.
Introduction to the RF Power Amplifiers Design Y11 = jb11 ;
Y12 = Y21 = jb12 ;
21
Y22 = jb22 ;
where the x11 , x12 , and x22 are the two-port reactive self-impedances; the b11 , b12 , and b22 are the two-port reactive self-admittances. Using these expressions, the two-port input and output impedance and admittance can be rewritten as: Z in = jx11 +
2 2 x12 x12 , and Z out = jx22 + ; jx22 + Z L jx11 + Z i
(1-27)
Yin = jb11 +
b122 b122 , and Yout = jb22 + . jb22 + YL jb11 + Yi
(1-28)
The only one condition from Eq. (1-25) or from Eq. (1-26) is required for the matching by using the reactive reverse two-port, i.e.: Z in = Z i* , or Yin = Yi*
(1-29)
Matching by lossless two-port allows to provide the maximum power transfer. For this case, the power that reaches the load is the following: Pmax =
Ei2 I i2 , or Pmax = , 8 Re( Z i ) 8 Re(Yi )
where Re( Z i ) and Re(Yi ) are the real components of intrinsic impedance and admittance, respectively. The ideal matching is possible at the single frequency only. The simple three-elements T -shape or Π -shape circuits can be used. The wideband matching is a substantially difficult issue due to the theoretical limitations. The greater bandwidth gives the inferior matching. Therefore, the ladder-type filters should be used in order to increase the matching efficiency. 4.1.2
Load matching with the transistor output
The transistor output can be represented as the equivalent current source I C1 with known first harmonic dynamic load line. It is assumed that the current source parameters are independent of the load value.
Chapter 1
22
The condition on obtaining the maximum power in the load can be found by testing the P1 = U1I1 2 dependence on maxima and minima. This condition is the following: U1 dU = − 1 , or RL1 = Rid 1 , I1 dI1
(1-30)
where Rid 1 = dU1 / dI1 is intrinsic differential resistance of the current source I C1 . Therefore, in order to match the transistor output and load for the given frequency and operating mode, the lossless reactive two-port can be used as described in paragraph 4.1.1. In this case, Z i should be selected equal to the RL1 , while Z L means the actual load value, that can be standard 50Ohm or 75Ohm. 4.1.3
Cross-product suppression in the output signal spectrum
The nonlinear behavior of transistor power amplifier is the cause of cross-product components in the output signal spectrum. These components are the harmonics and sub-harmonics of valid signal, and intermodulation distortions. Matching conditions and cross-product suppression conditions can give the contradictory requirements on output electrical network. In this case, two different networks should be synthesized: one is for matching, and the other is for cross-product suppression. 4.1.4
Formation of given impedance for higher harmonics at the transistor output
The amplifier output network should provide the appropriate input impedance for the higher harmonics in order to obtain certain current and voltage waveforms. For class-F amplifier example, the output network provides short-circuit and open-circuit behaviors for even and odd harmonics, respectively. 4.1.5
Dividing and combining signals from several sources
For some applications, the generated power needs to be divided or combined. If a single amplifier cannot provide the required power level, several amplifiers can be used in the work on the single load. This can be realized with specially tuned electrical circuits.
Introduction to the RF Power Amplifiers Design
4.2
23
Narrow-band power amplifiers’ matching circuits
As it was mentioned above, the simple reactive three-elements Π -shape or T-shape electric circuits can be used for matching at the certain frequency. The equations for Z and Y parameters of the Π-shape circuit shown in Fig. 1-19 are the following: z11 = jx11 =
j (b2 + b3 ) jb ; z12 = jx12 = 3 ; ∆y ∆y
z21 = jx21 =
jb3 j (b1 + b3 ) ; z22 = jx22 = ; ∆y ∆y
∆ y = y1 y2 + y2 y3 + y1 y3 = −(b1b2 + b2b3 + b1b3 ) ;
y11 = jb11 = j (b1 + b3 ) ; y12 = jb12 = − jb3 ; y21 = jb21 = − jb3 ; y22 = jb22 = j (b2 + b3 ) .
y3 = jb3 y1 = jb1
y2 = jb 2
Figure 1-19.
Π -shape circuit.
24
Chapter 1
z2 = jx 2
z1 = jx1 z3 = jx3
Figure 1-20.
T -shape circuit.
The T -shape circuit is shown in Fig. 1-20. Its Z and Y parameters can be written as: z11 = jx11 = j ( x1 + x3 ) ; z12 = jx12 = jx3 ; z21 = jx21 = jx3 ; z22 = jx22 = j ( x2 + x3 ) ;
y11 = jb11 =
j ( x2 + x3 ) jx ; y12 = jb12 = − 3 ; ∆z ∆z
y21 = jb21 = −
jx3 j ( x1 + x3 ) ; y22 = jb22 = ; ∆z ∆z
∆ z = Z 1 Z 2 + Z 2 Z 3 + Z 1 Z 3 = −( x1 x 2 + x 2 x3 + x1 x 3 )
The parameters of the selected electrical matching network can be found by using the known values of the load impedance Z L = RL + jxL or admittance YL = g L + jbL , and the input impedance Z in or admittance Yin . Usually, the input impedance or admittance is the real number: Z in = Rin , or Yin = g in = 1 Rin .
Introduction to the RF Power Amplifiers Design
25
Therefore, two pairs of equations can be obtained from the Eqs. (1-27) and (1-28) by their dividing into real and imaginary parts. The first pair is for Z parameters: 2 Rin RL + x11 ( x22 + xL ) − x12 = 0,
(1-31)
RL x11 − Rin ( x22 + xL ) = 0 ,
(1-32)
and the other is for Y parameters: gin g L + b11 (b22 + bL ) − b122 = 0 ,
(1-33)
g Lb11 − g in (b22 + bɧ ) = 0 .
(1-34)
By substituting the x -parameters’ expressions into Eqs. (1-31) and (1-32), the following equations can be obtained for the T-shape circuit: Rin RL + ( x1 + x3 )( x2 + x3 + xL ) − x32 = 0 ,
(1-35)
RL ( x1 + x3 ) − xin ( x2 + x3 + xL ) = 0 .
(1-36)
Here, x is positive for inductance, and is negative for capacitance. In case of Π -shape circuit, substituting the b -parameters’ expressions into Eqs. (1-33) and (1-34) gives the following: gin g L + (b1 + b3 )(b2 + b3 + bL ) − b32 = 0 ,
(1-37)
g L (b1 + b3 ) − g in (b2 + b3 + bL ) = 0 ,
(1-38)
where b is positive for capacitance, and is negative for inductance. There are three known and three unknown values for the each set of Eqs. (1-35), (1-36), and (1-37), (1-38). The known values are Rin , RL , xL or gin , g L , bL , while the unknown values are x1 , x2 , x3 or b1 , b2 , b3 . One of x values or one of b values should be given in order to calculate the matching network parameters. The remained parameters can be found from the Eqs. (1-35), (1-36) or (1-37), (1-38).
26
Chapter 1
4.2.1
Input network example
Usually, the input matching network should provide transformation of standard 50 Ohm or 75 Ohm impedance to the much lower transistor input impedance. Example of input network is shown in Fig. 1-21. The series equivalent circuit can be used for the transistor input impedance. The reactive part of impedance should be accounted in the X L value. The R1 is the required driving source impedance, R2 is the real part of transistor input impedance. Changing the inductance L value compensates the influence of the reactive component of transistor input impedance. The expressions for the network elements’ impedances are the following: Q 2 > R1 R2 − 1 , R1 R2 > 1 ,
(1-39)
X L = QR2 ,
(1-40)
X 1 = R1
X2 =
(
)
R2 1 + Q2 −1 , R1
§ R1 ¨Q + R1 R2 − 1 ¨©
(
)
· R2 1 + Q 2 − 1 ¸¸ , R1 ¹
X1
R1
(1-41)
XL
X2
R2
Figure 1-21. Example of input matching network.
(1-42)
Introduction to the RF Power Amplifiers Design
27
where q is the quality factor, and should be given. The certain inductance or capacitance should be calculated for the given frequency f 0 as L = X /( 2π f 0 ) , C = 1 /(2π f 0 X ) , respectively. 4.2.2
Output network example
The example of output matching network is shown in Fig. 1-22. The transistor output capacitance is accounted in the X1 reactance. The elements’ impedances can be calculated as follow: Q 2 > R1 R2 − 1 ,
(1-43)
X 1 = R1 Q ,
(1-44)
X2 =
XL =
R2
(
)
R2 1 + Q2 − 1 R1
R1 1+ Q 2
,
(
(1-45)
)
· R2 1 + Q 2 − 1 ¸¸ . R1 ¹
§ ¨Q + ¨ ©
(1-46)
XL
R
1
X1
Figure 1-22. Example of output matching network.
X2
R2
28
Chapter 1
4.2.3
Class-F amplifier output network example
The typical class-F output network provides the short-circuit behavior for the second harmonic and acts as open-circuit for the third harmonic at the transistor output. The example of such network13 is shown in Fig. 1-23. The circuit is tuned in such a way, that the first harmonic is resonant for the L1-C1 contour; the third harmonic is resonant for the L2-C2 contour; while the second harmonic is resonant for the series contour of inductive L2-C2 and capacitive L1-C1. The circuit elements can be calculated as follows:
αF
C1 =
L1 =
ω0 ⋅ RL ⋅ (1 − α ) 2
1
ω0 ⋅ C1
L2 =
C2 =
2
ω 0 − π ⋅ BW , ω0
, αF =
,
(1-48)
160 ⋅ L1 ⋅ RL2
[
81 ⋅ (3 ⋅ RL ) + (2ω0 ⋅ L1) 2
1 9ω0 L 2 2
(1-47)
2
]
,
(1-49)
,
(1-50)
L2 C3
C2
C1
L1
Figure 1-23. Example of class-F amplifier output network.
RL
Introduction to the RF Power Amplifiers Design C3 = 8 ⋅ C 2 ,
29 (1-51)
where BW is a frequency bandwidth parameter that can be about the 40% from the operating frequency.
5.
SUMMARY
In this Chapter, the classification of power amplifiers by the transistor output voltage waveform is presented. The cosinusoidal approximation of collector current is described with the Fourier coefficients’ α n dependence on the conduction angle. The polyharmonic class-F power amplifiers are considered in details. The optimum relations between the harmonic magnitudes of transistor output current and voltage are described. The drawback of the current design method not considering the transistor lag at the relatively high frequencies is pointed out.
Chapter 2 THEORETICAL ANALYSIS OF BJT CLASS-F POWER AMPLIFIER
The concept of class-F power amplifier is based on the realization of open-circuit and short-circuit conditions for the higher harmonics at the transistor output17. The third harmonic peaking class-F is the widespread case of such power amplifiers18-23. The input impedance of output network represents the zero resistance for the second harmonic frequency and infinite value for the third harmonic frequency ideally. The transistor output current and voltage impulses become half-wave truncated cosinusoidal and square-wave waveforms, respectively. This leads to the collector efficiency increasing due to the dissipated in transistor power decreasing. However, the above mentioned short-circuit and open-circuit requirements are not sufficient for generation of such waveforms. The phase relations between the harmonics of transistor output current should be taken into account. This problem was considered in details by Colantonio et al.15,16. The pure resistive load at the first harmonic frequency was assumed and truncated cosinusoid approximation was used for transistor output current waveform. It was shown15,16 that the first and the third harmonics of transistor output current are out-of-phased for the conduction angles above 180° . In this case, the first and the third harmonic Fourier coefficients have the opposite signs. The effect of stretching of collector current impulse appears with the increased frequency becoming the transition one. This leads to the appreciable changes of harmonics’ magnitudes and phases. Such stretching of transistor output current impulse was not taken into account in the Colantonio et al. analysis15,16. Therefore, it is interesting and useful to consider.
31
32
Chapter 2
1.
TRANSISTOR MODEL
The bipolar transistor behavior can be described satisfactorily by the charge control model within the substantial operating frequency band24. It allows to account the relations between the collector iC and base iB currents and the excess charge q of minority carriers in the base region and the charges accumulated in the nonlinear barrier emitter C e′ and collector C c′ barrier capacitances. The collector barrier capacitance C c′ is divided into two parts: the capacitance C ca′ of active part of collector junction and the capacitance C cp′ of passive part of collector junction. The C ca′ capacitance represents the part of displacement current flowing between the collector and emitter junction with voltage v j across it. The C cp′ capacitance represents the part of displacement current flowing between the collector and base terminal. The relations for the coupling between the currents, base charges and voltages are the following24: iC =
iB =
q
τT
q
τβ
+ C 'ca
+
d (vCE − v j ) dt
+ C 'cp
d (vCE − vBE ) dt
d (vCE − v j ) dv j dq d (vCE − vBE ) − C 'ca − C 'cp + C 'e dt dt dt dt
(2-1)
(2-2)
where τ T is the average base carrier transit time; τ β is the time constant with the value close to the average base minority carrier lifetime. The minority carriers concentration gradient in the base region close to collector junction assumes to be proportional to the q 24. Moreover, it is supposed that q is varying simultaneously with the excess minority carriers concentration in the base region close to the emitter junction. Latter is the exponential function of v j , so the q can be expressed as follows: q = qinv [exp(v j / ϕT ) − 1]
(2-3)
where qinv = I B 0τ β ; I B 0 is the inverse base thermal current; ϕT = kT / e ; k is the Boltzmann constant; T is the absolute temperature of emitter junction; e is the electron charge. The junction voltage v j and the vBE voltage are coupled by the following equation:
Theoretical Analysis of BJT Class-F Power Amplifier d (v BE − vCE ) º ª v j = v BE − «i B − C 'ɫp » r 'b dt ¬ ¼
33 (2-4)
The τ T value is defined through the transition frequency ωT of common-emitter current transmission coefficient:
τ T = 1 / ωT while τ β is expressed through the τ T and dc current transmission coefficient β DC :
τ β = β DCτ T The set of Eqs. (2-1) - (2-4) allows to define the iC and iB currents for the given transistor input and output voltages for the active or cut-off operating modes. The equations for the static characteristics are obtained from the Eqs. (2-1) - (2-4) for the low operating frequencies case, where the displacement currents can be neglected54. After defining the iC = I C , iB = I B , vBE = VBE , the equations can be presented in the following form: I B = q / Tβ = I B 0 [exp(v j / ϕT ) − 1]
(2-5)
I C = β DC I B
(2-6)
VBE = v j + I B r 'b
The nonlinear dependence Eq. (2-3) can be approximated by the piecewise linear one24 in order to simplify the power amplifier operating analysis: q = C d (v j − ȿ ' )
v j >E '
,
(2-7)
where the Cd is the average diffusion capacitance of the effective part of the transistor active region. The differential capacitance C 'd = dq / dv j that can be found from Eq. (2-3) is proportional to the base stored charge: C 'd = q / ϕT for the q >> qinv . The Cd should be selected as Cd = C d max / 2 = qmax / 2ϕT
34
Chapter 2
for the piecewise linear approximation Eq. (2-7)24. The E ' is the cut-off voltage that is boundary between the active and the cut-off modes. The representation of the base recombination current component dependence (2.5) on the v j is as follow: I B = (1 / rβ )(v j − E ' )
v j >E '
(2-8)
where rβ = τ β / Cɞ
is the average resistance of parallel equivalent circuit of the base-to-emitter junction in the active region for the given C d . As can be seen from the Eqs. (2-6) and (2-8), the dependence of I C (v j ) should be approximated as follow24: I C = S j (v j − E ' )
v j >E '
(2-9)
where S j = β DC / rβ
is the transconductance of the collector current on the base-to-emitter junction. The piecewise linear dependencies of I B (VBE ) , and I C (V BE ) for the low frequencies can be obtained by substitution of Eq. (2-8) into (2-5) as follows24: I B = S b (VBE − E ' ) V
I C = S (V BE − E ' ) V
BE > E '
BE > E '
where S b = 1 /(r 'b + rβ ) ; S = β DC S b = [rβ /(r 'b + rβ )]S j .
The dependencies of nonlinear barrier capacitances C'ɫa , C'cp , C'e on the voltages across them can be neglected in order to further simplification
Theoretical Analysis of BJT Class-F Power Amplifier
35
of the analysis24. The values of capacitances are assumed as the constants C ca , C cp , C e , and averaged by the operating voltage diapason. Besides, the each of capacitances is usually small comparing with the diffusion one C d . Approximated charge control model can be represented by the equivalent circuit as shown in Fig. 2-124. The switch Ʉ is closed for the v j > E ' , and is open for the v j < E ' . The model like this is also known as the Giacoletto model25. The bipolar junction transistor lag for the voltage source driving can be accounted in the model as follows. Let assume the cosinusoidal transistor input voltage: VBE = E BIAS + Vin cos τ
The dependence of v j on the τ = ω 0 t have to be found in order to obtain the currents iɋ (τ ) , and i B (τ ) according to the equivalent circuit shown in Fig. 2-1. The time constants of input circuit for the open-state transistor and close-state transistor are written as24:
τS =
r 'b rβ r 'b + rβ
(C d + C e )
τ e = rb ɋ e
Ccp Cca
rb
K
+ vBE
-
Ce Cd
rβ
+
iC
+
vj
v CE
-
-
Figure 2-1. Equivalent circuit of BJT model.
36
Chapter 2
The cut-off or close angle is defined as follows: cos θ = −
E BIAS − E ' Vin
The θ is the low-frequency close angle, as it identifies the collector current cut-off for the ω 0 → 0 24. The input circuit current transmission coefficient for the v j > E ' , and ω 0 → 0 is the following: kj =
rβ r 'b + rβ
.
Therefore, the differential equations for the v j (τ ) of the open and the closed transistor states can be written as: § dv j · ¸ + v j − E ' = k jVin (cosτ − cos θ ), v j > E ' ¸ © dτ ¹ § dv j · ¸ + v j − E ' = Vin (cosτ − cosθ ), v j < E ' ω 0τ e ¨¨ ¸ © dτ ¹
ω 0τ S ¨¨
(2-10)
The assumption of τ e = 0 is valid for the C e << ɋ d . In this case, the junction voltage v j (τ ) is equal to the input voltage in the cut-off region, and the transistor becomes open state at the τ = −θ . The solution of Eq. (2-10) for the open transistor with the initial condition v j (−θ ) = E ' is the following:
º ° ª cos(τ + ϕ S ) − cos θ » v j − E ' = k jVin ® « 2 »¼ °¯ «¬ 1 + (ω 0τ S ) ª cos(−θ + ϕ ) º § τ +θ S −« − cos θ » exp ¨ − «¬ 1 + (ω 0τ S ) 2 »¼ © ω 0τ S
· ½° ¸¾ , ¹ ¿°
(2.11)
where
ϕ S = − arctan ω0τ S is the phase shift between the first harmonic of collector current and the input voltage.
Theoretical Analysis of BJT Class-F Power Amplifier
37
The currents iC (τ ) , and iB (τ ) can be found from the Eq. (2-11) for the Cca = ɋcp = 0 by taking into account the Eqs. (2-1), (2-2), and (2-9) as follows: iC (τ ) = S j [v j (τ ) − E ' ]
(2-12)
v j >E '
iB (τ ) = {[v j (τ ) − E ' ] + ω0ɋ d (dv j (τ ) / dτ )}
v j >E '
The harmonic analysis of the iC (τ ) is the subject of the next Section.
2.
HARMONIC CONTENTS OF COLLECTOR CURRENT
The equivalent circuit of the BJT model24 used for the spectral analysis is shown in Fig. 2-1. Several assumptions were made: BJT operates within the active and cut-off modes, without saturation; currents through Cca and Ccp capacitances are much smaller than current of voltage controlled current source iC , so they were neglected. Therefore, the differential equation that describes the iC according to the Eqs. (2-10) and (2-12) is as follows:
ω0τ S
diC + iC = SVBE (cos ω0t − cos θ ) , d (ω0t )
(2-13)
Solution of equation (2-13) with iC (− θ ) = 0 start condition gives the collector current on the interval from − θ to θ1 . The θ1 is the transistor close angle. It can be defined from the transcendental equation as follows: −
§θ +θ · cosθ ¸¸ = 0 . + cos(θ1 + ϕ S ) − tg ϕ S sin(θ − ϕ S ) exp¨¨ 1 cos ϕ S © tg ϕ S ¹
(2-14)
The set of dependencies of θ1 on θ obtained from Eq. (2-14) is shown in Fig. 2-2 with ω0τ S as parameter.
38
Chapter 2 ω 0τ S = 10
θ1 (degrees) 225
ω 0τ S = 3 ω 0τ S = 1 ω 0τ S = 0.5 ω 0τ S → 0
180
135
90
45
0
0
45
90
135
180
θ (degrees) Figure 2-2. Set of dependencies of θ1 on θ with ω 0 τ S as parameter.
Thus, for known values θ1 , θ , and ω0τ S , the Fourier coefficients of collector current harmonics can be obtained, taking into account that iC is equal to zero beyond the interval ( − θ ; θ1 )26. In order to find the dc component, both parts of Eq. (2.12) should be multiplied on 1 (2π ) and integrated on ω0 t within the − π to π . However, the actual integration interval is from − θ to θ1 due to zero current on intervals from − π to − θ , and θ1 to π as follow:
ω 0τ s θ diC 1 θ d (ω 0t ) + iC d (ω 0t ) ³ − θ 2π 2π ³− θ d (ω 0t ) 1
1
SV θ1 = BE ³ (cos ω 0t − cos θ )d (ω 0t ). 2π −θ
(2-15)
The first addend of the left part of Eq. (2-15) is equal to zero because of iC (−θ ) = iC (θ1 ) = 0 . The second addend presents the dc component of collector current: a0 =
1 θ1 iC d (ω 0t ) . 2π ³−θ
Theoretical Analysis of BJT Class-F Power Amplifier
39
Therefore, the following can be obtained from Eq. (2-15): a0 =
SVBE (sin θ1 + sin θ − (θ1 + θ ) cos θ ) . 2π
The first harmonic cosinusoidal and sinusoidal Fourier components are the following, respectively: a1 =
1
³ i cos(ω0t )d (ω0t ) , π −θ C
θ1
b1 =
1
θ1
³ i sin(ω0t )d (ω0t ) . π −θ C
In order to find them, both parts of Eq. (2-13) should be sequentially multiplied on cos(ω0t ) π , and sin(ω0t ) π , and integrated on ω0 t from − θ to θ1 . As a result, a set of two algebraic equations can be achieved: SV − ω τ a + b = − BE B1 °° 0 S 1 1 2π , ® SV °ω τ b + a = BE A 1 °¯ 0 S 1 1 2π
where A1 = θ1 + cos θ1 sin θ1 + θ − cos θ sin θ − 2 cos θ sin θ1 , B1 = (cosθ − cosθ1 ) . 2
From Eq. (2-16) the following can be obtained: a1 =
SVBE ω0τ S B1 + A1 , ⋅ 2π (ω0τ S ) 2 + 1
b1 =
SVBE ω0τ S A1 − B1 , ⋅ 2π (ω0τ S ) 2 + 1
(2-16)
40
Chapter 2 I1 =
2
2
A1 + B1 , (ω0τ S )2 + 1
SVBE 2π
§ ω0τ S A1 − B1 · ¸¸ . © ω0τ S B1 + A1 ¹
ϕ I1 = arctg¨¨
The third harmonic cosinusoidal and sinusoidal Fourier components can be written as follows, correspondingly: a3 =
1
³ i cos(3ω0t )d (ω0t ) , π −θ C
θ1
b3 =
1
θ1
³ i sin(3ω0t )d (ω0t ) . π −θ C
In order to find a3 and b3 , both parts of Eq. (2-13) should be sequentially multiplied on sin(3ω0t ) π , and cos(3ω0t ) π , and integrated on ω0t from − θ to θ1 . Then, the set of two algebraic equations can be obtained as follows: SVBE °°− 3ω0τ S a3 + b3 = 6π B3 , ® °3ω τ b + a = SVBE A 3 3 °¯ 0 S 3 3π
(2-17)
where
(
)
A3 = sin θ1 cos 2 θ1 (3 cosθ1 − 4 cosθ ) + cosθ sin 3 θ + sin θ1 , B3 = 3cos2 θ1 − 6 cos 4 θ1 + 3cos 2θ
−2 cos 4 θ + 2 cos θ cos θ1 ( 4 cos 2θ 1 − 3)
.
Therefore, the third harmonic Fourier coefficients can be found as follows:
Theoretical Analysis of BJT Class-F Power Amplifier a3 =
SVBE 2 A3 − 3ω0τ S B3 , ⋅ 6π (3ω0τ S ) 2 + 1
b3 =
SVBE 6ω0τ S A3 + B3 , ⋅ 6π (3ω0τ S ) 2 + 1
I3 =
SVBE 6π
41
4 A3 + B3 , (3ω0τ S )2 + 1 2
2
§ 6ω0τ S A3 + B3 · ¸¸ . © 2 A3 − 3ω0τ S B3 ¹
ϕ I3 = arctg¨¨
3.
CLASS F REALIZATION CONDITIONS
The Fourier coefficients of collector-emitter voltage vCE are defined by appropriate Fourier coefficients of collector current iC and input impedance of output network. The first and the third harmonic vCE components can be written as follows, respectively: U 1 = I 1 Z1 , U 3 = I 3 Z 3 ,
(2-18)
The output network should provide the matching with load at the fundamental frequency. Its input impedance Z1 is represented by resistance R1 . As the phase of Z1 is zero, the phase of U 1 is equal to the phase of I1 :
ϕU1 = ϕ I1
(2-19)
The phase of the third harmonic of collector-emitter voltage is as follows:
ϕU 3 = ϕ I 3 + ϕ Z 3
(2-20)
In order to achieve the proper waveform of collector voltage, it is necessary, that maximum of the fundamental frequency component and minimum of the third harmonic should be conterminous. This requirement is
42
Chapter 2
reduced to the simple out-of-phase requirement15,16, if the phase of the first harmonic of collector voltage is equal to zero. But for non-zero phase of the first harmonic, this requirement has to be corrected. The first and the third harmonics can be represented as follows, respectively: v1 (t ) = V1 ⋅ cos(ω0t − ϕV1 ) ,
v3 (t ) = V3 ⋅ cos(3ω0t − ϕV ) . 3
The derivatives of these harmonics are the following: v1 ' (t ) = −V1 ⋅ ω0 sin(ω0t − ϕV1 ) ,
(2-21)
v3 ' (t ) = −V3 ⋅ 3ω0 sin(3ω0t − ϕV3 ) .
(2-22)
The phase angle for which v1 (t ) is in maximum should be determined. The obvious result ϕV1 can be achieved by equating the Eq. (2-21) to zero and solving:
ω0t = ϕV1 .
(2-23)
Equating the Eq. (2-22) to zero, substituting the Eq. (2-23), and solving give the phase angle of third harmonic ϕV3 for which v3 (ϕV1 ω0 ) is the minimum:
ϕV3 = 3ϕV1 + π
(2-24)
Equation (2-24) defines the phase of the third harmonic, which is required for obtain target class-F collector voltage waveform. It reduces to out-of-phase requirement in case of ϕV1 = 0 . Using (2-19), ϕV3 can be written as follows:
ϕV3 = 3ϕ I1 + π .
(2-25)
The phase shift from − π 2 to π 2 can only be obtained by passive network. This gives the phase of input impedance of output network at the third harmonic within this region. Therefore, the phase of collector current
Theoretical Analysis of BJT Class-F Power Amplifier
43
third harmonic should match the following condition, according Eqs. (2-20) and (2-21):
to
3ϕ I1 + π 2 ≤ ϕ I 3 ≤ 3ϕ I1 + 3π 2
(2.26)
The dependence of “allowed” conduction angles on ω0τ S is shown in Fig. 2-3. The out-of-phase first and third harmonics can be obtained for these angles by adjustment the output network. One can see, that the “allowed” region is displaced to smaller conduction angles with frequency increasing. Therefore, the class-F operation with conduction angles below 90° becomes possible for quite high frequencies ( ω0 ≥ 0.5 f S , where f S = 1 (2πτ S ) ). However, the output power is decreased with decreasing the conduction angle that should be noted in design. The set of dependencies of first harmonic collector current magnitude on conduction angle is shown in Fig. 2-4 for different values of ω0τ S . The magnitude is decreased noticeably with frequency growing for the same conduction angles. Therefore, an output power capability is decreased as well. The relation between the third and the first harmonics of class-F amplifier transistor output voltage should be the following27: V3 V1 = 1 6 . ω0τS
10
8
6
4
θ max line θ min line
2
0
40
60
80
100
120
140
160
180
θ (degrees) Figure 2-3. The dependence of “allowed” conduction angles on ω 0 τ S .
44
Chapter 2 I C1 SV BE
ω 0τ S → 0 1,0
ω 0τ S = 0.5 0,8
ω 0τ S = 1 0,6
0,4
ω 0τ S = 3 0,2
ω 0τ S = 10 0,0
0
45
90
135
180
θ (degrees) Figure 2-4. Set of dependencies of first harmonic collector current magnitude on conduction angle.
It gives the maximum efficiency and output power. Therefore, the required input impedance of output network at the third harmonic frequency can be found using the Eqs. (2-18) - (2-20) as follows: Z3 =
I1R1 , 6I 3
ϕ Z 3 = 3ϕ I1 + π − ϕ I 3 .
4.
(2.27)
(2.28)
FIFTH-HARMONIC PEAKING ANALYSIS: VOLTAGE WAVEFORM PARAMETERS
In case of fifth-harmonic peaking class-F power amplifier, the transistor output voltage consists of the first, the third, and the fifth harmonics, and the dc-component as follows:
Theoretical Analysis of BJT Class-F Power Amplifier
45
vC = E C − VC1 cos ω 0t − VC3 cos3ω 0 t − VC3 cos 5ω 0 t § · 1 1 = EC − VC1 ¨ cos ω0t + cos 3ω 0t + cos 5ω 0t ¸ ε3 ε5 © ¹
(2-29)
where
ε3 =
VC1 Rω 0 I C1 = ⋅ , VC 3 R3ω 0 I C 3
(2-30)
ε5 =
VC1 Rω0 I C1 = ⋅ . VC 5 R5ω0 I C 5
(2-31)
The value of ε 3 should be negative, and the value of ε 5 should be positive. In this case, the voltage waveform can be close to maximally flat14, or maximum output power27. The first harmonic magnitude is greater than half of the signal swing for the signal with out-of-phase the first and the third harmonics. It allows increasing the output power without overload. The growing of the first harmonic magnitude can be expressed as: VC1, F = γ (ε 3 , ε 5 )VC1,sin ,
(2-32)
where the γ (ε 3 , ε 5 ) is the class-F first harmonic growing coefficient defined by the relation of the first harmonic magnitude to the magnitude of overall voltage swing as follows:
γ (ε 3 , ε 5 ) =
VC1 1 = . v(θ m ) − E C cos θ m + 1 ε 3 cos 3θ m + 1 ε 5 cos 5θ m
Here, the θ m is the point of minimal or maximal value of the voltage impulse vC , which can be determined from (2-29). In order to find θ m , the derivative of vC on ω 0 t = θ should be equated to zero. Then, the obtained equation should be solved. The derivative of vC can be written as follows: vC' = −VC1 (− sin θ − 3 ε 3 sin 3θ − 5 ε 5 sin 5θ ) .
(2-33)
46
Chapter 2
By equating the right part of Eq. (2-33) to zero as follows: − VC1 (− sin θ − 3 ε 3 sin 3θ − 5 ε 5 sin 5θ ) = 0 ,
(2-34)
the points of possible extremums of vC within the 0 ≤ θ ≤ π region can be found:
θ m1 = 0 ,
(2-35)
125ε 32 − 30ε 3ε 5 − 20ε 32 ε 5 + 9ε 52 3 3ε 5 . − + 8 40ε 3 40ε 3
θ m 2 = arccos
(2-36)
The following expressions for the γ 1 (ε 3 , ε 5 ) and γ 2 (ε 3 , ε 5 ) functions are correspond to the θ m1 and θ m 2 , respectively:
γ 1 (ε3 , ε5 ) =
1 cos θ m1 + 1 ε 3 cos 3θ m1 + 1 ε 5 cos 5θ m1
(2-37)
ε 3ε 5 , = ε 3 + ε 5 + ε 3ε 5
γ 2 (ε3 , ε5 ) =
1 cosθ m 2 + 1 ε 3 cos 3θ m 2 + 1 ε 5 cos 5θ m 2
=
(15ε ×
50 10ε 32ε 5 3
− 3ε 5 + Aε
)ε
(2-38) 3
1 25ε − 30ε 3ε 5 + 20ε ε − 3ε 5 + ( ε 5 − 5ε 3 ) Aε 2 3
2 3 5
,
where Aε = 125ε 32 − 10ε 3ε 5 (3 + 2ε 3 ) + 9ε 52 .
(2-39)
As it were a priory supposed, value of ε 3 is negative, and value of ε 5 is positive. Therefore, the function γ 2 (ε 3 , ε 5 ) is real for the nonnegative values of Aε only. The solution of the following equation: Aε = 0
Theoretical Analysis of BJT Class-F Power Amplifier
Figure 2-5. Curve ε 3 , 5 , ∃ ( ε 5 ) , that restricts the range of definition of function γ 2( ε
47
3
, ε 5 ).
gives the following expression for the curve, that restricts the range of definition of function γ 2 (ε 3 , ε 5 ) :
ε 3,5,∃ (ε 5 ) = −
(
3 5ε 5 + 2 5ε 5 ε 5 − 5 5(4ε 5 − 25)
)
(2-40)
The function ε 3,5,∃ (ε 5 ) is shown in Fig. 2-5. The range of definition of function γ 2 (ε 3 , ε 5 ) is highlighted as well. There is only one solution of Eq. (2-34) for the points (ε 3 , ε 5 ) , which are beyond the range of definition of function γ 2 (ε 3 , ε 5 ) . This solution is defined by Eq. (2-35). The functions γ 1 (ε 3 , ε 5 ) and γ 2 (ε 3 , ε 5 ) are shown in Figs. (2-6) and (2-7), respectively. The functions γ 1 (ε 3 , ε 5 ) and γ 2 (ε 3 , ε 5 ) are equal to one another along two curves. These curves of contingence ε 3,5, MF (ε 5 ) and ε 3,5,max (ε 5 ) can be found by equating the right parts of (2-37) and (2-38). Then, obtained equation should be solved for ε 3 . The equating of (2-37) and (2-38) gives the following:
48
Chapter 2
Figure 2-6. Function γ 1 ( ε 3 , ε 5 ) .
Figure 2-7. Function γ 2 ( ε 3 , ε 5 ) .
Theoretical Analysis of BJT Class-F Power Amplifier
49
ε 3ε 5 ε 3 + ε 5 + ε 3ε 5 =
(15ε ×
50 10ε 32ε 5 3
− 3ε 5 + Aε
)ε
(2-41) 3
1 25ε − 30ε 3ε 5 + 20ε ε − 3ε 5 + ( ε 5 − 5ε 3 ) Aε 2 3
2 3 5
.
The following expressions for the curves ε 3,5, MF (ε 5 ) and ε 3,5,max (ε 5 ) can be found by solving the Eq. (2-41):
ε 3,5, MF (ε 5 ) = −
9ε 5 , ε 5 + 25
ε 3,5,max ( ε 5 ) = −
Aε 2 + Aε 3 Aε 12 − 4 Aε 10 2
(2-42)
Aε 1 1 − 2 Aε 2 − Aε 3 − , 2 4 Aε 2 + Aε 3
where Aε 1 = −
Aε 2 =
Aε312 Aε310
Aε212
4 Aε210
3
Aε 3 =
+
4 Aε 11 Aε 12
−
2 Aε 11 , 3 Aε 10
Aε210
2 Aε 6
2 Aε 10 3 Aε 4
+
3 3
−
8 Aε 7 , Aε 10
Aε 4
3 2 Aε 10
,
Aε 4 = 2 Aε311 + Aε 8 − 9 Aε 7 Aε 11 A12 + 27 Aε 10 Aε27 +
+ 27 Aε212 Aε 5 − 72 Aε 5 Aε 10 Aε 11 ,
(2-43)
50
Chapter 2 Aε 5 = ε 52 + ε 53 ,
Aε 6 = 625 + 2000ε 5 + 2130ε 52 + 1064ε 53 + 256ε 54 ,
Aε 7 = −6ε 5 − 5ε 52 ,
Aε 8 = Aε 9 ,
Aε 9 = 3375000000ε 52 + 24300000000ε 53 + 78306750000ε 54 + 147776400000ε 55 + 179460724500ε 56 + 145015498800ε 57 + 77734274481ε 58 + 26570467584ε 59 + 5239406592ε 510 + 452984832ε 511,
Aε 10 = 16ε 5 + 25 ,
Aε 11 = 25 + 13ε 5 − 8ε 52 , Aε 12 = 75 + 52ε 5 .
The functions ε 3,5, MF (ε 5 ) and ε 3,5,max (ε 5 ) , which are defined by Eqs. (2-42) and (2-43), respectively, are shown in Fig. 2-8. The function ε 3,5,∃ (ε 5 ) , which is defined by Eq. (2-30), is depicted as well. As can be seen from Fig. 2-8, the curves ε 3,5, MF (ε 5 ) , ε 3,5,max (ε 5 ) , and ε 3,5,∃ (ε 5 ) are devide the range of definition of function γ (ε 3 , ε 5 ) into the five regions 1 - 5. There is own type of the waveform of voltage vC for each of these regions. The waveform of voltage vC , that is appropriate to ε 3 = −3 and ε 5 = 20 from the region 1, is shown in Fig. 2-9. As can be seen from Fig. 2-9, the waveform of voltage vC has two lobes. This waveform looks like third-harmonic peaking one, that was considered in details in the Chapter 1.
Theoretical Analysis of BJT Class-F Power Amplifier
51
Figure 2-8. Functions ε 3 , 5 , MF (ε 5 ) , ε 3 , 5 , ma x ( ε 5 ) , and ε 3 , 5 , ∃ ( ε 5) .
1
vC (V)
0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0
0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
2
ω0t Figure 2-9. The waveform of voltage v C , that is appropriate to ε 3 = − 3 and ε 5 = 20 from the region 1.
52
Chapter 2
The function γ (ε 3 , ε 5 ) is the same as function γ 2 (ε 3 , ε 5 ) within the region 1:
γ (ε3 , ε5 ) = γ 2 (ε3 , ε5 ) = ×
(15ε
50 10ε 32ε 5 3
− 3ε 5 + Aε
)ε
(2-44)
3
1
, for region 1.
25ε 32 − 30ε 3ε 5 + 20ε 32ε 5 − 3ε 5 + (ε 5 − 5ε 3 ) Aε
The waveform of voltage vC , that is appropriate to ε 3 = −3.5 and ε 5 = 10 from the region 2, is shown in Fig. 2-10. As can be seen from Fig. 2-10, the waveform of voltage vC has two simmetrical side lobes and one central. Besides, the central lobe is less in size than side lobes. The function γ (ε 3 , ε 5 ) is the same as function γ 2 (ε 3 , ε 5 ) within the region 2 as well:
γ (ε3 , ε5 ) = γ 2 (ε3 , ε5 ) = ×
(15ε
50 10ε 32ε 5 3
− 3ε 5 + Aε
)ε
1 25ε 32 − 30ε 3ε 5 + 20ε 32ε 5 − 3ε 5 + (ε 5 − 5ε 3 ) Aε
3
(2-45)
, for region 2.
The waveform of voltage vC , that is appropriate to ε 3 = −5 and ε 5 = 10 from the region 3, is shown in Fig. 2-11. As can be seen from Fig. 2-11, the waveform of voltage vC has two simmetrical side lobes and one central as well. However, the central lobe is greater in size than side lobes. The function γ (ε 3 , ε 5 ) is the same as function γ 1 (ε 3 , ε 5 ) within the region 3:
γ (ε3 , ε5 ) = γ 1 (ε3 , ε5 ) =
ε 3ε 5 , for region 3. ε 3 + ε 5 + ε 3ε 5
(2-46)
The waveform of voltage vC , that is appropriate to ε 3 = −10 and ε 5 = 25 from the region 4, is shown in Fig. 2-12. In this case, the waveform has the only central lobe, and the function γ (ε 3 , ε 5 ) is the same as γ 1 (ε 3 , ε 5 ) :
γ (ε 3 , ε 5 ) = γ 1 (ε 3 , ε 5 ) =
ε 3ε 5 , for region 4. ε 3 + ε 5 + ε 3ε 5
(2-47)
Theoretical Analysis of BJT Class-F Power Amplifier 1
53
vC (V)
0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
2
ω0t Figure 2-10. The waveform of voltage vC , that is appropriate to ε 3 = − 3 .5 and ε 5 = 10 from the region 2.
1
vC (V)
0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
2
ω0t Figure 2-11. The waveform of voltage vC , that is appropriate to ε 3 = − 5 and ε 5 = 10 from the region 3.
54
Chapter 2 1
vC (V)
0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
2
ω0 t Figure 2-12. The waveform of voltage vC , that is appropriate to ε 3 = − 10 and ε 5 = 25 from the region 4.
The waveform of voltage vC , that is appropriate to ε 3 = −7.5 and ε 5 = 100 from the region 5, is shown in Fig. 2-13. The waveform of voltage vC has two side lobes and one central. However, the lobes are close to one another, and are of almost similar values. The function γ (ε 3 , ε 5 ) is the same as function γ 1 (ε 3 , ε 5 ) within the region 5:
γ (ε3 , ε5 ) = γ 1 (ε3 , ε5 ) =
ε 3ε 5 , for region 5. ε 3 + ε 5 + ε 3ε 5
(2-48)
The absciss ε 5, MF of contingence point of ε 3,5, MF (ε 5 ) and ε 3,5,max (ε 5 ) curves can be determined by equating the right parts of Eqs. (2-30), (2-32), and (2-33). In order to simplify the analysis, Eqs. (2-30) and (2-32) were selected as follows:
−
(
3 5ε 5, MF +2 5ε 5, MF ε 5,MF −5 5 ( 4ε 5,MF − 25 )
ε 5, MF = 50 .
) =−
9ε 5,MF
ε 5,MF +25
,
(2-49)
Theoretical Analysis of BJT Class-F Power Amplifier 1
55
vC (V)
0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
2
ω0t Figure 2-13. The waveform of voltage vC , that is appropriate to ε 3 = − 7 . 5 and ε 5 = 100 from the region 5.
Figure 2-14. Function γ ( ε3 , ε 5 ).
56
Chapter 2
The following ordinate is appropriate to the absciss ε 5, MF :
ε 3,5, MF (ε 5, MF ) = ε 3,5,∃ (ε 5, MF ) = ε 3,5,max (ε 5, MF ) = −6 .
(2-50)
Therefore, the function γ (ε 3 , ε 5 ) for ε 3 < 0 and ε 5 > 0 values can be defined by the following set according to the Eqs. (2-44) − (2-48), taking into account Eqs. (2-49) and (2-50): 50 10ε 32 ε 5 ° ° 15ε 3 − 3ε 5 + Aε ε 3 ° 1 ° °× 25ε 2 − 30ε ε + 20ε 2 ε − 3ε + (ε − 5ε ) A , ε 3 3 5 3 5 5 5 3 ° °for ε 5 <= ε 5, MF and ε 3 >= ε 3,5,max (ε 5 ), ° ° 50 10ε 32 ε 5 ° ° 15ε 3 − 3ε 5 + Aε ε 3 °° 1 γ (ε 3 , ε 5 ) = ® × , ° 25ε 2 − 30ε ε + 20ε 2 ε − 3ε + (ε − 5ε ) A 3 3 5 3 5 5 5 3 ε ° °for ε 5 > ε 5, MF and ε 3 >= ε 3,5, MF (ε 5 ), ° ε 3ε 5 ° , °ε + ε + ε ε 3 5 3 5 ° °for ε 5 <= ε 5, MF and ε 3 < ε 3,5,max (ε 5 ), ° ε 3ε 5 ° , ° ε 3 + ε 5 + ε 3ε 5 ° °¯for ε 5 > ε 5, MF and ε 3 < ε 3,5, MF (ε 5 ).
(
)
(
)
(2-51)
Function γ (ε 3 , ε 5 ) is shown in Fig. 2-14. The combination of functions γ 1 (ε 3 , ε 5 ) and γ 2 (ε 3 , ε 5 ) is made along the curve ε 3,5,γ , that is shown in Fig. 2-15. The combination curve ε 3,5,γ is the same as ε 3,5,max (ε 5 ) at the left hand from the ε 5, MF point. It is suggested to call the ε 3,5,max (ε 5 ) as Maximum Power Line. The waveform of voltage vC , that is appropriate to Maximum Power Line with ε 3 ≈ −4.8308 , and ε 5 = 25 is shown in Fig. 2-16. The combination curve ε 3,5,γ is the same as ε 3,5, MF (ε 5 ) at the right hand from the ε 5, MF point. It is suggested to call the ε 3,5, MF (ε 5 ) as Flatness Line. The waveform of voltage vC , that is appropriate to Flatness Line with ε 3 = −6.75 , and ε 5 = 75 is shown in Fig. 2-17.
Theoretical Analysis of BJT Class-F Power Amplifier ε3
57
0 −2
Maximum Power Line
−4 −6
Flatness Line
−8
Maximally Flat Waveform Point
−10 −12 −14 −16 −18 −20
0
50
100
150
200
250
300
ε5 Figure 2-15. Curve
1
ε 3,5,γ
.
vC (V)
0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
2
ω0t Figure 2-16. The waveform of voltage vC , that is appropriate to Maximum Power Line with ε 3 ≈ − 4 . 8308 , and ε 5 = 25 .
58
Chapter 2 1
vC (V)
0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0
0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
2
ω0t Figure 2-17. The waveform of voltage v C , that is appropriate to Flatness Line with ε 3 = − 6 . 75 , and ε 5 = 75 .
1
vC (V)
0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0
0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
2
ω0t Figure 2-18. The maximally flat waveform of voltage ε 3 = − 6 , and ε 5 = ε 5, MF = 50 .
vC , that is appropriate to
Theoretical Analysis of BJT Class-F Power Amplifier
Figure 2-19. The contour plot of the function
59
γ (ε 3 , ε 5 ) .
The point of contingence, that is defined by Eqs. (2-48) and (2-50), is appropriate to the maximally flat waveform of voltage vC . This is in agreement with Raab’s analysis14. The maximally flat waveform of voltage vC , that is appropriate to ε 3 = −6 , and ε 5 = ε 5, MF = 50 , is shown in Fig. 2-18. As it was mentioned by Raab27, the maximally flat waveform is not best of all in order to provide the maximum output power at the first harmonic frequency. In other words, the value of function γ (ε 3 , ε 5 ) is not maximal at the point of maximally flat waveform. The contour plot of the function γ (ε 3 , ε 5 ) is shown in Fig. 2-19. It can be seen from Fig. 2-19, the maximal value of the function γ (ε 3 , ε 5 ) can be reached at the Maximum Power Line ε 3,5,max (ε 5 ) . Really, the functions γ 1 (ε 3 , ε 5 ) and γ 2 (ε 3 , ε 5 ) have not local extremums. Therefore, they reach their maximal values at the boundary of region. The functions γ 1 (ε 3 , ε 5 ) and γ 2 (ε 3 , ε 5 ) are of the same values along the Maximum Power Line ε 3,5,max (ε 5 ) . So, it is sufficient to find the conditional extremum of only one of them. In order to simplify the analysis, the function γ 1 (ε 3 , ε 5 ) was selected. The derivative of function γ 1 (ε 3 , ε 5 ) along the Maximum Power Line ε 3,5,max (ε 5 ) can be written as follows:
60
Chapter 2
dγ 1 ( ε 3,5,max ( ε 5 ) , ε 5 ) dε5
=
=
· ε 3,5,max ( ε 5 ) ⋅ ε 5 d § ¨¨ ¸ d ε 5 © ε 3,5,max ( ε 5 ) + ε 5 + ε 3,5,max ( ε 5 ) ⋅ ε 5 ¸¹
(ε
d ε 3,5,max ( ε 5 ) 2 2 ⋅ ε 5 + ε 3,5,max (ε5 ) dε5
3,5,max ( ε 5 ) + ε 5 + ε 3,5,max ( ε 5 ) ⋅ ε 5 )
2
(2-52)
.
In view of substantial crockness, the conclusive expression for the derivative dγ 1 (ε 3,5,max (ε 5 ), ε 5 ) dε 5 is not provided. However, the derivative dγ 1 (ε 3,5,max (ε 5 ), ε 5 ) dε 5 at the 0 < ε 5 < 50 region is shown in Fig. 2-20. The derivative dγ 1 (ε 3,5,max (ε 5 ), ε 5 ) dε 5 reaches its zero value at the ε 5,max ≈ 16.48528 point. dγ 1 (ε 3,5,max (ε 5 ), ε 5 ) dε 5
Figure 2-20. The derivative dγ 1 ( ε 3 , 5 , ma x ( ε 5 ) , ε 5 ) dε5 at the 0 < ε 5 < 50 region.
Theoretical Analysis of BJT Class-F Power Amplifier 1
61
vC (V)
0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
2
ω0t Figure 2-21. The waveform of voltage vC , that is appropriate to maximum output power point ε 3 = ε 3 , 5 , max ( ε 5 , max ) = − 4 . 30602 , and ε 5 = ε 5 , max = 16 .48528.
The ordinate ε 3,5,max (ε 5,max ) = −4.30602 is appropriate to the absciss ε 5,max . This is in agreement with Raab’s analysis27. The corresponding maximum value of function γ (ε 3 , ε 5 ) is the following:
γ (ε 3,5,max , ε 5,max ) = 1.207107
(2-53)
The waveform of voltage vC , that is appropriate to maximum output power point ε 3 = ε 3,5, max (ε 5,max ) = −4.30602 , and ε 5 = ε 5,max = 16.48528 , is shown in Fig. 2-21.
5.
SUMMARY
The analysis of collector current spectrum changes with frequency growing is conducted using the approximated charge storage model. The following result are achieved: - The effect of collector current stretching at the higher frequencies leads to the additional phase shift between the collector-emitter voltage harmonics. It needs to be compensated for in order to achieve high efficiency. - The general condition defining the boundaries of possible class-F realization for the different transistors is formulated by Eq. (2-26).
62
Chapter 2
- The third harmonic input impedance of output network that compensates for the additional phase shift is given by Eqs. (2-27), and (2-28). Therefore, the obtained results allow accounting the transistor lag and getting the optimal efficiency and output power characteristics at relatively high frequencies.
Chapter 3 BJT CLASS-F POWER AMPLIFIER DESIGN
This Chapter provides the simulation and experimental verification of quite low-frequency prototype of polyharmonic power amplifier operated at 1MHz. However, this frequency is one-third of transition frequency, which is 3MHz for used BJT. These allow to neglect the influence of package parasitic parameters on output current and voltage waveforms in order to better illustrate proposed theoretical results.
1.
SIMULATION
The polyharmonic power amplifier equivalent circuit is shown in Fig. 3-1. The Ansoft Serenade SV 8.5 simulator was used28. The output network has a well-known “Third-Harmonic Peaking” construction13. There were parasitic resistances added to the parallel contours and in order to model the finite quality factors. Two cases were simulated, using similar output network shown in Fig. 3-1, but different values of network components. The first case respects to classic class-F tuning summarized by C. Trask13. The second case realize the proposed in the Chapter 2 tuning, that takes into account BJT lag. The collector current and collector-emitter voltage waveforms for the first case are shown in Fig. 3-2. The voltage has strong asymmetrical form. The collector efficiency is 59.5%, transistor output power is 1.72W, and dc supply power is 2.89W. The waveforms of collector current and collector-emitter voltage for the second case are shown in Fig. 3-3.
63
64
Chapter 3
Figure 3-1. Polyharmonic power amplifier equivalent circuit.
vCE (V)
iC (mA) iC
300
vCE
60
250
50
200
40
150
30
100
20
50
10
0 0,0
0,5
1,0
ω 0t
1,5
0 2,0
Figure 3-2. Waveforms of collector current and voltage in case of classic tuning.
65
BJT Class-F Power Amplifier Design
vCE (V)
iC (mA) iC
300
vCE
60
250
50
200
40
150
30
100
20
50
10
0 0,0
0,5
1,0
ω0t
1,5
0 2,0
Figure 3-3. Waveforms of collector current and voltage with tuning described in Chapter 2.
The voltage has almost symmetrical flat form. The collector efficiency is 75.4%, transistor output power is 2.15W, and dc supply power is 2.85W. The customary class-C amplifier was simulated in order to compare performances with the above cases and demonstrate the advantages of the second case. The bias, supply and driving power conditions were the same, while class-C output network was realized by shortening the C3-L3-R3 contour. The collector current and collector-emitter voltage of simulated class-C amplifier are shown in Fig. 3-4. The collector efficiency is 65%, transistor output power is 1.88W, dc supply power is 2.89W. Therefore, classic class-F tuning of output network leads even to decrease in efficiency comparing with customary class-C amplifier for almost the same input power, bias and supply. This unexpectedness is caused by the stretching effect of collector current impulse at the operating frequency comparable with transition frequency of BJT. The stretched impulse has changed spectral content. Particularly, the phase shift other than just out-of-phase exists between the fundamental component and the third harmonic. In order to obtain better efficiency, this phase shift needs to be compensated for by proper tuning of output network.
66
Chapter 3 vCE (V)
iC (mA) iC
300
vCE
60
250
50
200
40
150
30
100
20
50
10
0 0,0
0,5
1,0
1,5
0 2,0
ω0t Figure 3-4. Waveforms of collector current and voltage of class-C power amplifier.
2.
EXPERIMENTAL RESULTS
The prototype of class-F power amplifier was implemented on the basis of the medium power KT815 transistor, which transition frequency is 3MHz. The above mentioned output network (see Fig. 3-1) with the proposed tuning taking into account BJT lag was used. The equivalent circuit of prototype is shown in Fig. 3-5. The G3-112 oscillator produced the necessary input power at the operating frequency 1 MHz. The 53 Ohm resistor in the BJT base terminal circuit limits the input current and prevents thermal runaway effect. The TEC-18 stable voltage source sets the bias voltage. Inductances Ld and Ldk act as RF-Chokes. The Ri1 and Ri2 resistors are used in order to get the oscillograms of base and collector currents, respectively. The Re resistor is thermostabilizing. The measured collector efficiency and output power dependencies on base-emitter RMS voltage for –0.45 V bias are presented in Table 3-1. The negative bias was used in order to set proper cut-off angle, acceptable for class-F operation near transition frequency (see Fig. 2-3). As was expected, the efficiency dependence has flat maximum at the input voltage value for which first and third harmonics are out-of-phase, since the stretching effect is taken into account in tuning of output network.
67
BJT Class-F Power Amplifier Design Ri3
Supply source TEC-18
1Ohm
Ldk
ɋb
100000uH
L3 Ri2
Cr C3
1Ohm
Rg Oscillator G3-112
4700pF 3900pF
Ri1 KT815 1Ohm
53Ohm
Ld
C1
100uH
L1
7100pF
Re
RL 220Ohm
0.5Ohm
Supply source TEC-18
Figure 3-5. Equivalent circuit of class-F amplifier prototype. Table 3-1. Measured efficiency and output power of amplifier prototype Base-emitter RMS voltage (V) Efficiency (%) Output power (W) 1.5 62.9 1.75 1.55 64.3 1.81 1.6 63.7 1.87 1.65 63.2 1.93 1.7 63.3 1.97 1.75 62.8 1.99 1.8 62.3 2.0
The oscillograms of collector-emitter voltage and load voltage are shown in Fig. 3-8. The collector-emitter voltage has almost symmetrical form close to target for the third harmonic peaking class-F amplifier.
Figure 3-6. The collector-emitter and load voltages’ waveforms.
68
3.
Chapter 3
SUMMARY
The two variants of polyharmonic class-F power amplifiers and customary class-C amplifier are simulated in order to illustrate the theoretical results of Chapter 2. The classic tuning case of class-F amplifier does not provide the amplifier efficiency increase at the frequencies comparable with transition one. On the contrary, it leads to the poorer performance compared with appropriate class-C amplifier. The experimental investigation of third-harmonic peaking class-F power amplifier confirms the simulation results.
Chapter 4 PBG STRUCTURE AS AMPLIFIER OUTPUT NETWORK
1.
DESIGN CONCEPT
Producing the short circuit at even and the open circuit at the odd harmonics to the active device output (class F operation) can substantially increase efficiency of power amplifier29,30. With such a harmonic tuning, the voltage across active device output and current through it do not contain harmonics of the same order simultaneously. Practically, it is very difficult to control impedances for infinite number of harmonics, so usually the socalled Third-harmonic Peaking tuning is used. In this case the input impedance of output network is controlled up to the third harmonic. Increase in the number of higher harmonics taken into account leads to noticeable efficiency increase. Recently, photonic band-gap (PBG) and defected ground microstrip structures have been proposed as a novel way to accomplish the filtering providing a broad rejection band. Such structures can be successfully used as the output networks of high-efficiency power amplifiers. As it was suggested31, terminology “photonic band-gap” should be avoided and more appropriate one should be used: electromagnetic stop-band (ESB). The new proposed terminology seems to be more common for microwaves, so it is used for novel structures. The two main types of PBG microstrip structures were considered in the publications32-43: with holes in a ground plane, and with holes in a dielectric substrate. The shapes of holes vary from simple round and rectangular32-34 to the different special forms35-42. 69
70
Chapter 4
While utilizing as the filters, such structures provide wider and dipper stop band than the original microstrip ones. The above properties can be explained by the photonic band-gaps43 due to the periodical shape locations. The known Bragg equation can be used for the structure period definition43: 2d sin θ = kλ , d = k
λ 2
,
(4-1)
where d is the period of structure, k is the integer number, λ is the wavelength in the media, θ = 90° is the grazing angle. Equation 4-1 presents the equality between the longitudinal period of structure and the integer number of half-wavelength. Using Eq. 4-1, the period of structure with the photonic band-gap close to certain central frequency can be calculated. However, the stop-band width and deepness as well as pass-band characteristics depend not only on the structure period, but also on the hole shape and size, and number of holes. The idea of using the PBG-structures as the output networks of power amplifiers was presented by Radisic et al.32,33. The proposed structure32,33 is shown in Fig. 4-1. The structure was formed by the lattice of round holes in the ground plane of microstrip line. It was noted, that the optimal output network characteristics could be obtained for the relation of a hole radius to structure period from 0.15 to 0.25. Smaller relation gives reduced perturbation, but also reduced stop-band dip, while greater relation produces unsatisfactory big ripples in the pass band33. Karmakar et al.34 present another variant of round-hole PBG microstrip structure (Fig. 4-2). In this case, the radius of holes varies longitudinally proportionally to the binomial or Chebyshev coefficients.
Figure 4-1. PBG structure32,33 .
71
PBG Structure as Amplifier Output Network
34
Figure 4-2. PBG structure with longitudinally varying round holes .
34
Figure 4-3. PBG structure with longitudinally varying ring holes .
35-37
Figure 4-4. Compact PBG structure
.
As it was shown34, such choice of holes’ sizes provides the lower ripples’ values in the pass-band, as well as wider stop-band; and further characteristics’ improvement could be achieved by implementing the ring shape of holes (Fig. 4-3). The next issue under consideration was the size of PBG structures. Yang et al.35-37 proposed compact variant with ground plane consisted of metal pads connected by narrow lines as shown in Fig. 4-4. Thus, this structure presents distributed LC-network properties and has much smaller size compared with the above ones (Figs. 4-1 - 4-3). The so-called Defected Ground Structure (DGS) proposed by Ahn et al.38 is shown in Fig. 4-5. In distinction from ESB variant, that is theoretically infinite, DGS has the limited number of sections a priory. This assumption can be used to obtain a simple equivalent circuit of DGS.
72
Chapter 4
38
Figure 4-5. Defected Ground Structure .
Figure 4-6. Series combination of several PBG sections41 .
42
Figure 4-7. Parallel combination of several PBG sections .
The DGSs as it is shown in Fig. 4-5 were utilized by Lim et al.39,40 for reducing the size of high-efficiency power amplifiers. The attempts to further extension of stop-band were made by Rumsey et al.41 (Fig. 4-6) and Kim et al.42 (Fig. 4-7). Their structures are combined by several PBG-sections with different periods. The variant 41 presented in Fig. 4-6 reflects the series combination, while the Fig. 4-7 shows the parallel case 42. Providing almost the same stop-band properties, the second structure has obvious advantage of smaller overall size. Except a few publications35-37, no special attention was given to the passband characteristic. However, it plays a significant role in a power amplifier design. In order to achieve high amplifier efficiency, an output network should provide acceptable matching at the fundamental frequency. Therefore, insertion loss in the pass-band should be as small as possible.
73
PBG Structure as Amplifier Output Network T Ti
h
ai a
bi
b Figure 4-8. Proposed double-period ESB structure.
The ESB structure shown in Fig. 4-844 was designed taking into account the pass-band requirements. The main idea is that it has several divisible periods. The simplest variant of the proposed approach (Fig. 4-8) consists of two periods, one of which is twice as much as the other. So the shape of holes in the ground plane looks like Π . The holes sizes are chosen so that the structure has one period on one side of the strip: T = a+b
(4-2)
and twice lower period on the other side: Ti =
T = ai + bi . 2
(4-3)
Thus, for given T and b, other sizes can be calculated as: a = ai = T − b ,
bi =
b − ai T =b− . 2 2
(4-4)
(4-5)
74
Chapter 4
2.
DOUBLE-PERIOD FIFTH-HARMONIC PEAKING ESB NETWORK.
Simulated scattering parameters of the proposed three-section doubleperiod ESB are shown in Fig. 4-9. It can be seen, that three-stage structure presents the matching at the fundamental frequency (~850 MHz) and rejects the higher harmonics up to five. Therefore, Fifth-Harmonic Peaking21 for power amplifier can be realized. In order to show the benefits of double-period configuration, several simulations were conducted for different holes’ shapes and sizes (Figs. 4-10 - 4-12). |S11|
|S21|
1,0
0,8
0,6
0,4
0,2
0,0
0
1
2
3
4
5
6
f (GHz) Figure 4-9. Scattering parameters of considered structure.
Figure 4-10. Square-shape structure.
7
PBG Structure as Amplifier Output Network
75
Figure 4-11. Rectangular-shape structure.
Figure 4-12. Double-period structure.
The simulation results are shown in figures 4-13 - 4-15. For all figures, solid line means double-period configuration with Π -shaped holes, while dashed and dash-and-dot ones mean rectangular holes single-period configurations with the periods Ti and T, respectively. The Fig. 4-13 relates to the h = 16 mm, and Fig. 4-14 and 4-15 – to the h = 18 mm and h = 20 mm, correspondingly. The figures show, that using Π -shaped holes instead of simple rectangular ones let achieve better characteristics both for pass band and for rejection band. In the pass band, insertion loss of double-period structure is almost the same as insertion loss of the single-period structure with lower period Ti. It is known, that number of ripples in the pass band is one unit less than number of sections in the finite periodic structure. Therefore, for six-sections structure there are five ripples in the pass band. The amplitude of ripples usually decreases with the increase of their number, i.e. with increase of sections in a structure. Nevertheless, simple increasing of sections’ number leads to simultaneous increase of the size and height of overall construction. However, as it can be seen in Figs. 4-13 - 4-15, using the proposed doubleperiod structure allows to obtain low amplitude of ripples in the pass band without the number of sections increased. In the rejection band, the characteristics of the double-period structure become similar to ones of the single-period structure with period T, and even better.
76
Chapter 4 Double-period
Square-shaped
Rectangular-shaped
|S21| 1.0
0.8
0.6
0.4
0.2
0.0
0
1
2
3
4
5
6
7
f (GHz) Figure 4-13. Insertion loss of ESB structures with h = 16 mm.
Double-period
Square-shaped
Rectangular-shaped
|S21| 1.0
0.8
0.6
0.4
0.2
0.0
0
1
2
3
4
5
6
f (GHz) Figure 4-14. Insertion loss of ESB structures with h = 18 mm.
7
77
PBG Structure as Amplifier Output Network Double-period
Square-shaped
Rectangular-shaped
|S21| 1.0
0.8
0.6
0.4
0.2
0.0
0
1
2
3
4
5
6
7
f (GHz) Figure 4-15. Insertion loss of ESB structures with h = 20 mm.
3.
EXPERIMENTAL VERIFICATION RESULTS
In order to verify simulation results, three different ESB structures (Figs. 4-16 - 4-18) were fabricated and measured.
Figure 4-16. Fabricated square-shape ESB structure.
78
Chapter 4
Figure 4-17. Fabricated rectangular-shape ESB structure.
Figure 4-18. Fabricated double-period ESB structure.
Insertion losses of these structures are shown in Figs. 4.19, 4.20. Insertion Loss level (dB)
Double-period holes Square holes Rectangular holes
0,0
− 0,5 − 1,0 − 1,5 − 2,0 − 2,5 − 3,0
400
600
800 1000 1200 1400 1600 1800 2000 2200 2400
Frequency (MHz)
Figure 4-19. Insertion Loss in the pass-band.
79
PBG Structure as Amplifier Output Network Insertion Loss level (dB) 5
Double-period holes Square holes Rectangular holes
0 −5 − 10 − 15 − 20 − 25 − 30 − 35 − 40
2
3
4
5
6
7
8
9
Frequency (GHz)
Figure 4-20. Insertion Loss in the rejection band.
One can note, as were predicted by simulations, that the stop-band of the double-period structure is defined by bigger period, while ripples in the pass band are almost the same as for the structure with lower period. Therefore, the proposed structure has the improved characteristics both in stop band and in pass-band, and can be successfully utilized as output network of highefficiency power amplifier.
4.
SUMMARY
The current methods of microwave power amplifiers output networks design utilizing the photonic band-gap structures are considered. Application of such networks is useful and promising due its unique stop-band properties and fabrication simplicity. The simulation and experimental investigation results of novel twoperiods microstrip PBG-structure are presented. The three-section structure prototype has the satisfactory characteristics in the pass-band (see Fig. 4-19), and wide and deep stop-band (see Fig. 4-20).
Chapter 5 BJT FIFTH-HARMONIC PEAKING CLASS F POWER AMPLIFIER
1.
ESB STRUCTURE AS AMPLIFIER OUPUT NETWORK
The fifth-harmonic peaking class-F power amplifier operated at 1GHz was designed using the presented in Chapter 4 double-period microstrip ESB structure. The three-section ESB was used as the output network. Equivalent circuit of the amplifier concerned is shown in Fig. 5-1. VCC
Figure 5-1. The equivalent circuit of fifth harmonic peaking class-F power amplifier.
81
82
Chapter 5
Table 5-1. BFP-490 model parameters* Parameter Value Parameter bf 114.96 nc br 21.04 ne cbc 2.2fF nf cbe 150.0fF nr cce 500.0fF ptf cjc 6.1521fF rb cje 1.227fF rbm eg 1.11 rc2 ikf 0.76939 re1 ikr 0.09033 tf irb 0.17683mA tnom is 0.451fA tr isc 3.7479fA va ise 1.591fA vb itf 3.2793mA vjc lb 1.15nH vje lc 0.59nH vtf le 0.19nH xcjc mjc 0.34153 xtb mje 0.36885 xtf name BFP490 xti * Other parameter fields should be remained blank.
Value 1.339 1.9962 1.1472 1.3531 0.0 2.1262 1.0754 0.10737 0.32476 3.9147ps 300 1.115ns 24.665 16.035 0.9832 0.93266 0.27348 0.3 0.0 0.61664 0.0
The BJT BFP490 model parameters45 are given in Table 5-1. The microstrip double-period structure was represented as the two-port with known S-parameters for simulation using Serenade SV8.5 package. The shorted section of original microstrip line was used for tuning of output network’s input impedance.
2.
SIMULATION RESULTS
The magnitude of output network’s input impedance with shorted section versus frequency is shown in Fig. 5-2. Its value at the fundamental frequency is equal to the critical resistance that allows the maximum power ability without saturation. The input impedance magnitudes for the third and the fifth harmonics are substantially higher than the fundamental frequency value (see Fig. 5-2). These are the mandatory conditions to underline third and five harmonics in the output voltage, and to achieve target flat signals’ waveforms. The simulated collector current’s and collector-emitter voltage’s waveforms are shown in Fig. 5-3. As can be seen, collector-emitter voltage has smoothed bottom leading to dissipated power decreasing and efficiency increasing.
83
BJT Fifth-Harmonic Peaking Class F Power Amplifier Z in (Ohm) 300 250 200 150 100 50 0 0
1
2
3
4
5
f (GHz)
Figure 5-2. The magnitude of output network input impedance.
The collector efficiency was as high as 78.6% along with PAE equal 78.2%. The achieved result is 4.7% less than maximally possible 83.3% for the case of fifth-harmonic peaking14. It can be explained by non-zero minimum collector-emitter voltage, that needs to avoid saturation. The 83.3% value was obtained for zero minimum voltage case. The amplitude characteristics of amplifier’s efficiency and output power are shown in Fig. 5-4. The efficiency is above the 70% for the driving signal power greater then 2mW. The output power is the monotonically increasing function, while efficiency has a flat maximum at the 3.75mW driving power point. The amplifier output power and efficiency versus frequency are shown in Fig. 5-5. The collector efficiency is above 60% within more than 300 MHz frequency band. The output power varies from 180mW to 280mW at the 960MHz and exceeds the 240mW value within 200MHz frequency band.
84
Chapter 5
vCE (V)
iC (mA) iC
vCE
12
200
10 150 8 6
100
4 50 2 0
0 0
1
2
ω0t
Figure 5-3. Collector current and collector-emitter voltage waveforms.
η
Pout (mW)
(%)
η
80
300
Pout
250 70 60
200
50
150
40
100
30 50 20 0 0,5
1,0
1,5
2,0
2,5
3,0
3,5
4,0
4,5
Pin (mW) Figure 5-4. Amplitude characteristics of amplifier's output power and efficiency.
85
BJT Fifth-Harmonic Peaking Class F Power Amplifier
η
(%) 80
Pout (mW)
η
Pout
300 280
75
260
70
240
65
220 200
60
180 55 160 50 0,8
0,9
1,0
1,1
f (GHz)
Figure 5-5. Frequency characteristics of amplifier’s output power and efficiency.
3.
SUMMARY
The results presented show the advantages of use of the double-period structures as output networks of polyharmonic power amplifiers. Due to the acceptable characteristics both in the pass band and in the rejection band, the ESB network allows to achieve high efficiency within wide frequency band.
Appendix
1.
INTRODUCTION TO ANSOFT SERENADE SV.
1.1
Project creation
The modelling of various devices in the Serenade SV 8.5 package is realized by the projects. The project is the set of files that contain the whole information regarding the device circuitry, analysis, and results representation. The files of the project may be of the following extensions: .ssp - project file; .sch - file with the graphical representation of the modeling device circuit (schematic file); .sym - file with the graphical representation of some element of the circuit (symbol file); .ckt - file with the text representation of the modeling device circuit (netlist file); .srp - file with the analysis results that contains representation of the simulated graphs and tables (report file); .sNp - file that contains the S -parameters of the N-port circuit (for example, .s2p is file extension for two-port circuit). The files within the project are interconnected, and contain the information about the project directory path. So, in order to copy or move the project to another location, or make another thing related to the files’ names and path, the appropriate Serenade built-in function should be used:
87
88
Appendix
Copy Project, Rename Project, Archive Project, Rename Schematic, etc. These functions are accessible under the Project menu item. The new project creation starts from the File/New… menu click. The Project field has to be selected from the appeared list. Then, the information about the project needs to be entered in the following window shown in Fig. A-1. The explanations of the New Project window fields are given in the Table A-1.
Figure A-1. New project creation.
Table A-1. Explanation of the New Project window fields Field Explanation Project Name The project name Top Level Schematic The project main circuit name, which is equal to the project name by default Simulator The modelling program within the Serenade SV package Project Location The full directory path to the project files Search Paths The additional paths for the file search engine
89
Appendix
Figure A-2. Serenade desktop.
After filling in the fields, the Create button should be clicked. As a result, the project window, schematic editor window, and toolbars will appear in the Serenade desktop as shown in Fig. A-2.
1.2
Schematic drawing
Either the toolbars’ icons or the Parts menu items can be used for the schematic creation. The cursor view becomes the selected component symbol within the schematic editor window for both cases as represented in Fig. A-3 for the capacitance example. The property window will appear after the mouse left-button clicking in the desired place of the element location.
Figure A-3. Cursor view.
90
Appendix
Figure A-4. Property window.
The example of capacitance property window is shown in Fig. A-4. It contains the Property, Value, and Visible columns and the Attributes section. These items are explained in the Table A-2. The required properties are labelled as *req* in the Value column. The default unit measures and possible suffixes for the some elements’ values are summarized in the Table A-3. The whole list of unit measures can be found in the Serenade help file refrence.pdf. Spaces should be avoided between the numeric part and the suffix of the value. For example, the 10pF is a correct entry, while 10 pF is incorrect. The typical suffixes are the following: femto is 10–15, pico is 10–12, nano is 10–9, micro is 10–6, milli is 10–3, kilo is 103, mega is 106, giga is 109. Double-clicking the left mouse button in the element symbol at any time after the initial definition can change the element properties. The element right-click menu is shown in Fig. A-5. It is useful for the rotation, or flip, etc. After the circuit elements are placed, they need to be connected according to the circuit topology. The wire drawing mode can be selected by clicking in the toolbar icon. Table A-2. Explanation of property window items Item Explanation Property column The property name Value column The property value Visible column It defines, whether the property name and value will be displayed in the schematic Attributes section It defines the format of element properties displaying
91
Appendix Table A-3. Properties’ unit measures Property Default unit measure Frequency Hz (Hertz)
Resistance
Oh (Ohm)
Capacitance
F (Farad)
Inductance
H (Henry)
Voltage
V (Volt)
Current
Ampere
Possible suffixes kHz (Kilohertz) MHz (Megahertz) GHz (Gigahertz) kOh (Kilo-Ohm) MOh (Mega-Ohm) mF (Millifarad) uF (Microfarad) nF (Nanofarad) pF (Picofarad) fF (Femtofarad) mH (Millihenry) uH (Microhenry) nH (Nanohenry) pH (Picohenry) mV (Millivolt) uV (Microvolt) mA (Milliampere) uA (Microampere) nA (Nanoampere) pA (Picoampere) fA (Femtoampere)
Figure A-5. Schematic editor right-click menu.
Another variants to reach the wire drawing are the Draw/ Wire/Draw Wire menu item, or the Draw Wire right-click menu item. In order to connect two elements, the wire has to be drawn between their connectors, which look like small squares. The first element connector should be
92
Appendix
clicked, and then the spot turn should be clicked as shown in Fig. A-6(a), and then the second element connector should be clicked and right-clicked as shown in Fig. A-6(b). toolbar icons can be used for the Zoom all, Zoom out, and The Zoom in functions, respectively, in order to change the current schematic zoom. Before the circuit simulation, the input and output have to be indicated by toolbar icon or the the Microwave Port elements. Either the Parts/Schematic Connectors/Microwave Port menu item can be used. The Microwave Port property window is shown in Fig. A-7.
Figure A-6. Wire drawing mode illustration.
93
Appendix
Figure A-7. Microwave port property window.
Figure A-8. Linear Frequency property window.
The label property defines the port name, while the term property sets the impedance termination. The ports’ sequential numbers are defined by the alphanumeric order of their names. It is an important issue, because just sequential numbers are used in the simulation. Therefore, the better choice of port names is the simple sequence like P1, P2, and so on.
1.3
Linear circuit analysis
The Linear Frequency block has to be placed in the schematic in order to make the linear analysis. This block can be reached from the Parts/Control Blocks/Linear Frequency menu item. The Linear Frequency property window is shown in Fig. A-8. The required property is the Freq, which defines the analysis frequency. The entry Step 1Ghz 5Ghz 200Mhz means that analysis is conducted from the 1Ghz
94
Appendix
to 5Ghz with the 200Mhz frequency step. The other properties’ descriptions can be found in the Serenade help file refrence.pdf. After the frequency block is defined, the schematic analysis can be toolbar icon, or the Analysis/Analysis menu item performed. Either the can be used. If the schematic is correct the analysis progress window shown in Fig. A-9 appears. In case there are some errors, they will be reported in the Error Log window.
Figure A-9. Analysis progress window.
Figure A-10. Report editor window.
95
Appendix
When analysis is completed, the results can be displayed. This can be done using the report editor window shown in Fig. A-10. It is accessible from the Reports/Report Editor… menu item. The items of report editor window are explained in the Table A-4. Some responses are explained in the Table A-5. Others can be found in the Serenade help file refrence.pdf. The selected functions that can be applied to the applicable responses are given in the Table A-6. Table A-4. Report editor items Item Explanation Domain field The domain in which the results should be displayed Output Type field Type of result representation (graph, table, etc.) Report Title field Title of report to be displayed in the graph Terminations… button This calls the ports’ impedance terminations window Response column The results to be displayed Axis column The axis on which the results will be put Circuit list The list of schematics for which the analysis was conducted Function list The set of functions that can be applied to the response Response list The list of applicable responses Filter… button This allows to filter the applicable responses Blank button Add the blank row to the table with results Add buton Add the selected response to the table with results Display button Display the results from the table Delete button Delete selected result from the table Delete All button Delete all results from the table Replace button Change the selected result on the another from the applicable responses Append button Append the selected response to the selected result in the table Close button Close the report editor window Table A-5. Selected responses explanation Response Explanation Sij Scattering parameters of the n-port circuit, i and j are the port numbers ZIN Input impedance of two-port circuit, ZIN = Z11 − Z12 ⋅ Z 21 /( Z 22 + Z L ) , where Z L is load impedance Table A-6. Selected functions explanation Function None Mag() Ang() Re() Im()
Explanation Left without changes Magnitude phase Real part Imaginary part
96
Appendix
The Response column allows using the expressions formed by the applicable responses, functions and operators “+”, “-“, “*”, “/”.
1.4
Nonlinear circuit analysis
The nonlinear analysis requires nonlinear frequency control block. The Nonlinear Frequency (Single Tone) can be added from the Parts/Control Blocks/Nonlinear Frequency (Single Tone) menu item. Its property window is shown in Fig. A-11. The two fields Freq and nHarm are required. The nHarm defines the number of fundamental frequency harmonics that should be taken into account in the harmonic balance analysis. Usually, the active device requires the dc supply and bias voltage sources. They can be added by either the Parts/Sources/DC Voltage Bias toolbar icon. The DC Voltage Bias Source Source menu item, or property window is shown in Fig. A-12. Required fields are the V and NAME, which define the voltage value and the reference name in the schematic, respectively. The property R sets the internal resistance of voltage source.
Figure A-11. Nonlinear Frequency (Single Tone) property window.
Figure A-12. DC Voltage Bias Source property window.
97
Appendix
Figure A-13. Sinusoidal RF Source property window.
The active device driving can be applied using the sinusoidal RF source. It can be accessed by either Parts/Sources/Sinusoidal RF Source menu toolbar icon. The Sinusoidal RF Source property window is item, or shown in Fig. A-13. The required fields are the Freq, Amp, and option. The Freq defines the operating harmonic. For example, the Freq value should be equal H1 for the fundamental frequency defined in the nonlinear frequency block. The Amp property sets the signal magnitude, while the option can switch between three possible cases. These cases include E, P, and J that mean the voltage source, or power source, or current source, respectively. The Phase property defines the initial signal phase in degrees. The analysis can be started using either the Analysis/Analysis… menu item, or toolbar icon, as for linear case. The nonlinear analysis window is shown in Fig. A-14. The power amplifier analysis requires the Regular option checked in the radio buttons group. The Analyze button should be clicked in order to perform the analysis, and Close button should be clicked after the analysis completing. The basic rules for report editor are the same, as for the linear analysis, though some new responses and domains are added in the lists. The most useful responses for power amplifier simulation are explained in Table A-7. The whole list of responses can be found in the Serenade help file refrence.pdf. In case the analysis was conducted for the some frequency range, the report editor contains the Sweep list shown in Fig. A-15. Either the set of single frequencies or the whole range ALL can be selected in order to display results.
98
Appendix
Table A-7. Nonlinear analysis responses Domain field Response list Explanation Time, Ii The current through the port with sequential number Spectral i; for example, the current through the port 2 is I2 Ix(z) The current through the x terminal of element z; for example, the collector current of BFP490 transistor is Ic(BFP490) Vi The voltage between the port with sequential number i and ground; for example, the voltage across the port 2 is V2 Vxy(z) The voltage across the x and y terminals of element z; for example, the collector-emitter voltage of BFP490 transistor is Vce(BFP490) POi The output power in the port with sequential number i; for example, the output power in the port 2 is PO2 POxy(z) The power at the x and y terminals of element z; for example, the collector-emitter power of BFP490 transistor is POce(BFP490) Network Function, Ii The m-th harmonic of current through the port with Sweep sequential number i; for example, the first harmonic of current through the port 2 is I2 Ix(z) The m-th harmonic of current through the x terminal of element z; for example, the first harmonic of collector current of BFP490 transistor is Ic(BFP490) Vi The m-th harmonic of voltage between the port with sequential number i and ground; for example, the first harmonic of voltage across the port 2 is V2 Vxy(z) The m-th harmonic of voltage across the x and y terminals of element z; for example, the first harmonic of collector-emitter voltage of BFP490 transistor is Vce(BFP490) POi The m-th harmonic of output power in the port with sequential number i; for example, the first harmonic of output power in the port 2 is PO2 POxy(z) The m-th harmonic of power at the x and y terminals of element z; for example, the first harmonic of collector-emitter power of BFP490 transistor is POce(BFP490) EFi The efficiency of the port with sequential number i related to the m-th harmonic; for example, the port 2 first harmonic efficiency is EF2 PAij The power added efficiency between the n-th harmonic of port with sequential number j and m-th harmonic of port with sequential number i; for example, the power added efficiency between the first harmonics of ports 1 and 2 is PA21
99
Appendix
Figure A-14. Nonlinear circuit analysis window.
Figure A-15. The Sweep list of report editor window.
100
Appendix
2.
AMPLIFIERS’ MATCHING NETWORKS
2.1
Exercises
Background: the subsections 4.1 and 4.2 of Chapter 1, and 1.1 - 1.3 of the Appendix. Exercise 1: the following circuits should be calculated and simulated by the Serenade linear analysis: 1) input network (see paragraph 4.2.1 of Chapter 1); 2) output network (see paragraph 4.2.2 of Chapter 1); 3) class-F amplifier network (see paragraph 4.2.3 of Chapter 1). Initial values: the resistance values and operating frequency are given in Table A-8. Other parameters are similar for all variants, and are the following: Q is 10; load resistance is 50Ohm; resistance R2 for the input network is 3Ohm. The frequency band is from 100Mhz to 3 f 0 +100Mhz with the 10Mhz step. Table A-8. Exercises variants R1 for input Variant number network (Ohm) 0 51 1 50 2 49 3 48 4 47 5 46 6 45 7 44 8 43 9 42 10 41 11 40 12 39 13 38 14 37 15 36 16 35 17 34 18 33 19 32 20 31 21 30 22 29
R1 for output network (Ohm) 25 30 35 40 45 50 55 60 65 70 75 80 85 90 95 100 105 110 115 120 125 130 135
f 0 (MHz) 890 900 910 920 930 940 950 960 970 980 990 1000 1010 1020 1030 1040 1050 1060 1070 1080 1090 1100 1110
101
Appendix
Report: for each networks, report should contain magnitudes and phases of the following: - return loss S11 ; - insertion loss S21 ; - input impedance Z IN .
2.2
Example
Variant 0 (see Table A-8): R1 for input network is 51 Ohm, R1 fo output network is 25 Ohm, f 0 is 890 MHz. Other initial values, similar for all variants: Q is 10; load resistance is 50Ohm; resistance R2 for the input network is 3Ohm. The frequency band is from 100Mhz to 3 f 0 +100(Mhz) with the 10Mhz step. Exercise 1, input network: A. Verifying the conditions given by Eq. (1-39): Q2 >
R1 51 − 1 10 2 > − 1 100 > 16 - true , R2 3
R1 51 >1 > 1 - true . R2 3
B. Calculating the circuit parameters: - from Eq. (1-40): X L = QR2 = 10 ⋅ 3 = 30 (Ohm),
L=
XL 30 = = 5.36477 ⋅ 10 −9 (Hn); 6 2πf 0 2 ⋅ 3.1415 ⋅ 890 ⋅ 10
- from Eq. (1-41): X 1 = R1
(
)
(
)
R2 3 1 + Q 2 − 1 = 51 1 + 10 2 − 1 = 113.36 (Ohm), R1 51
102
Appendix C1 =
1 1 = = 1.5775 ⋅ 10 −12 (F); 6 2πf 0 X 1 2 ⋅ 3.1415 ⋅ 890 ⋅ 10 ⋅ 113.36
- from Eq. (1-42): X2 =
=
C2 =
§ ¨Q + ¨ R1 −1© R2 R1
(
)
(
)
· R2 1 + Q2 − 1¸ ¸ R1 ¹
· 51 §¨ 3 10 + 1 + 10 2 − 1 ¸ = 38.96 (Ohm), ¸ ¨ 51 51 ¹ −1© 3
1 2πf 0 X 2
=
1 = 4.58998 ⋅ 10 −12 (F). 6 2 ⋅ 3.1415 ⋅ 890 ⋅ 10 ⋅ 38.96
C. Creating the schematic (see Fig. 1-21) in the Serenade Schematic Editor. The created schematic is shown in Fig. A-16. The R1 and R2 resistances are represented by P1 and P2 port terminations, respectively. D. Performing Linear Analysis:
Figure A-16. Serenade schematic for input network.
103
Appendix
- Frequency band calculation: start frequency is 100Mhz, stop frequency is 3 f 0 + 100( Mhz ) = 3 ⋅ 890 + 100( Mhz ) = 2770( Mhz ) , frequency step is 10Mhz. - Linear Frequency control block properties are shown in Fig. A-17. - Linear analysis process is shown in Fig. A-18.
Figure A-17. Linear Frequency control block property window.
Figure A-18. Linear analysis process.
104
Appendix
E. Displaying the results: - return loss S11 is shown in Fig. A-19; - insertion loss S21 is shown in Fig. A-20;
Figure A-19. Return loss
Figure A-20. Insertion loss
S11 .
S21 .
105
Appendix
Figure A-21. Input impedance
Z IN .
- input impedance Z IN is shown in Fig. A-21. Exercise 1, output network: A. Verifying the conditions given by Eq. (1-43): Q2 >
R1 25 1 − 1 10 2 > − 1 100 > − - true . 50 R2 2
B. Calculating the circuit parameters: - from Eq. (1-44): X1 =
R1 25 = = 2.5 (Ohm), Q 10
C1 =
1 1 = = 7.153 ⋅ 10 −11 (F); 6 2πf 0 X 1 2 ⋅ 3.1415 ⋅ 890 ⋅ 10 ⋅ 2.5
- from Eq. (1-45):
106
Appendix X2 =
C2 =
R2
(
)
R2 1+ Q2 −1 R1
1 2πf 0 X 2
=
=
50
(
)
50 1 + 10 2 − 1 25
= 3.5267 (Ohm),
1 = 5.0706 ⋅ 10 −11 (F); 6 2 ⋅ 3.1415 ⋅ 890 ⋅ 10 ⋅ 3.5267
- from Eq. (1-46):
(
)
§ · ¨ Q + R2 1 + Q 2 − 1 ¸ ¸ R1 1 + Q ¨© ¹ · 25 §¨ 50 = 10 + 1 + 10 2 − 1 ¸ = 5.9845 (Ohm), 2 ¨ ¸ 25 1 + 10 © ¹
XL =
R1
2
(
L=
)
XL 5.9845 = = 1.0701 ⋅ 10 −9 (Hn); 6 2πf 0 2 ⋅ 3.1415 ⋅ 890 ⋅ 10
C. Creating the schematic (see Fig. 1-22) in the Serenade Schematic Editor.
Figure A-22. Serenade schematic for output network.
107
Appendix
Figure A-23. Return loss
Figure A-24. Insertion loss
S11 .
S21 .
108
Appendix
Figure A-25. Input impedance
Z IN .
The created schematic is shown in Fig. A-22. The R1 and R2 resistances are represented by P1 and P2 port terminations, respectively. D. Performing Linear Analysis: similar way as for input network. E. Displaying the results: - return loss S11 is shown in Fig. A-23; - insertion loss S21 is shown in Fig. A-24; - input impedance Z IN is shown in Fig. A-25. Exercise 1, class-F amplifier network: - from Eq. (1-47): BW = 0.4 ⋅ f 0 = 0.4 ⋅ 890 ⋅ 10 6 = 356 ⋅ 10 6 (Hz),
αF = =
2π f 0 − π ⋅ BW 2π f 0 2 ⋅ 3.1415 ⋅ 890 ⋅10 6 − 3.1415 ⋅ 356 ⋅10 6 = 0.8, 2 ⋅ 3.1415 ⋅ 890 ⋅106
109
Appendix
αF
C1 =
2π f 0 ⋅ R2 ⋅ (1 − α F2 ) 0.8 = 7.9478 ⋅10 −12 (F); 6 2 2 ⋅ 3.1415 ⋅ 890 ⋅10 ⋅ 50 ⋅ (1 − 0.8 )
=
- from Eq. (1-48): L1 = =
1 (2πf 0 ) 2 ⋅ C1 1 = 4.0236 ⋅ 10 −9 (Hn); (2 ⋅ 3.1415 ⋅ 890 ⋅ 10 6 ) 2 ⋅ 7.9478 ⋅ 10 −12
- from Eq. (1-49):
160 ⋅ L1⋅ R2 2
L2 =
2 2 81⋅ ª( 3 ⋅ R2 ) + ( 2 ⋅ 2π f 0 ⋅ L1) º ¬ ¼ 160 ⋅ 4.0236 ⋅10−9 ⋅ 502 = 2 2 81 ⋅ ª«( 3 ⋅ 50 ) + ( 2 ⋅ 2 ⋅ 3.1415 ⋅ 890 ⋅106 ⋅ 4.0236 ⋅10−9 ) º ¬ ¼ −10 = 8.1017 ⋅10 ( Hn);
- from Eq. (1-50):
C2 = =
1 9 ( 2π f 0 ) L 2 2
1 9 ⋅ ( 2 ⋅ 3.1415 ⋅ 890 ⋅10
)
6 2
⋅ 8.1017 ⋅10
−10
= 4.3857 ⋅10−12 (F);
- from Eq. (1-51): C 3 = 8 ⋅ C 2 = 8 ⋅ 4.3857 ⋅ 10 −12 = 3.5085 ⋅ 10 −11 (F).
B. Creating the schematic (see Fig. 1-23) in the Serenade Schematic Editor.
110
Appendix
Figure A-26. Serenade schematic for the class-F amplifier network.
Figure A-27. Return loss
S11 .
111
Appendix
Figure A-28. Insertion loss
S21 .
Figure A-29. Input impedance
Z IN .
112
Appendix
The created schematic is shown in Fig. A-26. The R1 and R2 resistances are represented by P1 and P2 port terminations, respectively. C. Performing Linear Analysis: similar way as for input network. D. Displaying the results: - return loss S11 is shown in Fig. A-27; - insertion loss S21 is shown in Fig. A-28; - input impedance Z IN is shown in Fig. A-29.
3.
CLASS-C AMPLIFIER
3.1
Exercises
Background: sections 1, 2, 4.2.2 of Chapter 1, section 1 of the Appendix. Exercise 1: The equivalent circuit of class-C power amplifier concerned is shown in Fig. A-30. The amplifier load characteristics should be obtained using Serenade nonlinear analysis. The input impedance of the output network should vary from 25Ohm to 75Ohm with 5Ohm step size. This calls for the C1 , C2 , and L1 changes (see paragraph 4.2.2 of Chapter 1) at the each step. The influence of blocking capacitor Cb should be neglected for the elements’ values calculations. Initial values: The operating frequency values are given in Table A-9. The BFP490 model parameters are summarized in Table 5-1. The transistor is used without package elements in order to increase simplicity. The input and output port termination impedances are 50Ohm. Other circuit parameters are the following: Cin = 1.9 pF, Lin = 0.1nH , Lch1 = Lch 2 = 1uH , Cb = 50 pF, Ebias = 0.65V , VCC = 5V . The driving power is Pin = 0.002W . Report: The report should contain the load characteristics of the following amplifier parameters: - collector current dc component (Ic(BFP490)); - collector current first harmonic magnitude (Ic(BFP490)); - first harmonic power at the transistor output (POce(BFP490)); - collector efficiency (EF2). Exercise 2: According to the results of Exercise 1, the C1 , C2 , and L1 values appropriate to the maximal first harmonic transistor output power should be selected. For these values, the collector current and voltage waveforms should be simulated by Serenade nonlinear analysis. Report: the report should contain the following graphs: - collector current waveform (Ic(BFP490)) - collector-emitter voltage waveform (Vce(BFP490)).
113
Appendix Table A-9. Exercises variants Variant Number 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22
f 0 (MHz) 989 990 991 992 993 994 995 996 997 998 999 1000 1001 1002 1003 1004 1005 1006 1007 1008 1009 1010 1011
VCC
Lch2 ɋin
L1
ɋb
Lin ɋ1
Pin
ɋ2
Lch1
Ebias
Figure A-30. Equivalent circuit of class-C power amplifier.
114
Appendix
Exercise 3: The frequency characteristic of amplifier collector efficiency should be obtained using the Serenade nonlinear analysis. The frequency band should be taken as ± 20% from the operating frequency. Report: The report should contain the graph with the frequency characteristic of collector efficiency (EF2).
3.2
Example
Variant 0: The operating frequency is 989MHz (see Table A-9). Other initial values, similar for all variants: the input and output port termination impedances are 50Ohm, Cin = 1.9 pF, Lin = 0.1nH , Lch1 = Lch 2 = 1uH , Cb = 50 pF, Ebias = 0.65V , VCC = 5V, the driving power is Pin = 0.002W . Exercise 1: A. Output network elements’ calculation: - using Eqs. (1-30) - (1-32), the output network elements’ values can be obtained for given input impedances. The following MatLab code can be helpful: %*********************************************** format short g; Q = 10; R2 = 50; f0 = input('frequency (MHz):\n'); f0 = f0 * 1e6; R1_start = input('start input impedance value (Ohm):\n'); R1_stop = input('stop input impedance value (Ohm):\n'); R1_step = input('step input impedance value (Ohm):\n'); R1 = R1_start : R1_step : R1_stop; X1 = R1 / Q; C1 = 1 ./ (2 * pi * f0 * X1); X2 = R2 ./ sqrt((R2 ./ R1) * (1 + Q^2) - 1); C2 = 1 ./ (2 * pi * f0 * X2); XL = R1 / (1 + Q^2) .* (Q + sqrt((R2 ./ R1) * (1 + Q^2) - 1)); L = XL / (2 * pi * f0);
115
Appendix R1_C1_C2_L = [R1', C1', C2', L'] %************************************************
- calculated values of C1 , C2 , and L1 are summarized in Table A-10. B. Performing Nonlinear Analysis: - Nonlinear Frequency control block properties are shown in Fig. A-31. - Sinusoidal RF Source properties are shown in Fig. A-32. - Nonlinear analysis process is shown in Fig. A-33. C. Displaying the results: - The Report Editor window is shown in Fig. A-34.
Table -10. [Please provide a caption for this table] Input impedance (Ohm) C1 (pF) 25 64.37 30 53.642 35 45.979 40 40.231 45 35.761 50 32.185 55 29.259 60 26.821 65 24.758 70 22.989 75 21.457
C2 (pF) 45.63 41.634 38.526 36.02 33.943 32.185 30.672 29.351 28.186 27.147 26.213
L1 (nH) 0.963 1.0963 1.2252 1.3506 1.4731 1.5933 1.7115 1.8278 1.9426 2.0561 2.1683
Figure A-31. Nonlinear Frequency control block property window.
116
Appendix
Figure A-32. Sinusoidal RF Source property window.
Figure A-33. Nonlinear analysis process.
- The collector current dc component (Ic(BFP490)), collector current first harmonic magnitude (Ic(BFP490)), first harmonic power at the transistor output (POce(BFP490)), and collector efficiency (EF2) absolute values are summarized in Table A-11.
117
Appendix
Figure A-34. The Report Editor window.
Table A-11. Simulated load characteristics Input impedance Ic(BFP490) Ic(BFP490) (Ohm) (mA) (mA) 25 59.39 92.71 30 58.97 91.127 35 58.14 89.18 40 56.9 86.4 45 54.57 82.87 50 51.7 78.68 55 49.359 74.5 60 47.448 70.43 65 45.67 66.57 70 44.132 63.18 75 42.75 60.21
POce(BFP490) (mW) 107.55 124.68 139.33 149.45 154.662 154.92 152.81 148.94 144.19 139.88 136.08
EF2 (%) 36.159 42.216 47.845 52.436 56.579 59.827 61.812 62.67 63.03 63.28 63.55
118
Appendix 100 90 80 70 60 50 40 20
30
40
50
60
70
80
Figure A-35. Load dependencies of collector current dc component and first harmonic magnitude.
160 150 140 130 120 110 100 20
30
40
50
60
70
80
Figure A-36. Load dependency of first harmonic power at the transistor output.
119
Appendix 65
60
55
50
45
40
35 25
30
35
40
45
50
55
60
65
70
Figure A-37. Load dependency of collector efficiency.
Figure A-38. The Report Editor window.
75
120
Appendix
Figure A-39. Simulated collector current waveform.
Figure A-40. Simulated collector-emitter voltage waveform.
121
Appendix
- Load dependencies of collector current dc component and first harmonic magnitude are shown in Fig. A-35. - Load dependency of first harmonic power at the transistor output is shown in Fig. A-36. - Load dependency of collector efficiency is shown in Fig. A-37. Exercise 2: A. According to the Tables A-10, A-11 and Fig. A-36, the C1 = 32.185pF , C 2 = 32.185pF , and L1 = 1.5933nH values appropriate to the 50 Ohm input impedance of output network (maximal first harmonic transistor output power) are selected. B. Displaying the results: - The Report Editor window is shown in Fig. A-38. - Simulated collector current waveform is shown in Fig. A-39. - Simulated collector-emitter voltage waveform is shown in Fig. A-40. Exercise 3: A. Frequency band calculation: start frequency is f 0 − 0.2 ⋅ f 0 = 989 − 0.2 ⋅ 989 = 791.2 (MHz) ≈ 791 (MHz) , stop frequency is f 0 + 0.2 ⋅ f 0 = 989 + 0.2 ⋅ 989 = 1186.8 (MHz) ≈ 1187 (MHz) , frequency step is 1Mhz. B. Performing Nonlinear Analysis: - Nonlinear Frequency control block properties are shown in Fig. A-41. C. Displaying the results: - Report editor window is shown in Fig. A-42. - Frequency dependence of collector efficiency is shown in Fig. A-43.
Figure A-41. Nonlinear Frequency control block property window.
122
Appendix
Figure A-42. Report editor window.
Figure A-43. Frequency dependence of collector efficiency.
123
Appendix
4.
CLASS-F AMPLIFIER
4.1
Exercises
Background: subsections 2 and 4.2.3 of Chapter 1, section 1 of the Appendix. Exercise 1: The class-F amplifier output network concerned is shown in Fig. A-44. This circuit should provide the 65Ohm input impedance for the first harmonic, and 5Ohm and 260Ohm ones for the second and the third harmonics, respectively. The Serenade Linear Optimization block (OPT) should be used as shown in Fig. A-45. It can be reached by the Parts/Control Blocks/Linear Optimization Info. The Frange1, Frange2, and Frange3 properties should be set to the frequencies’ values of the first, second, and third harmonics, correspondingly. The Goals1, Goals2, and Goals3 should contain the following strings, respectively: MZIN = 65, MZIN = 5, and MZIN = 260.
Figure A-44. Class-F amplifier output network concerned.
124
Appendix
Figure A-45. Serenade Linear Optimization block.
Figure A-46. Property window of circuit element allowed for optimization.
The circuit elements allowed for optimization should contain the question marks at the beginning and at the end of the value as shown in Fig. A-46. The Serenade linear analysis, and then the linear optimization should be conducted in order to achieve optimized values of the circuit elements. Initial values: The operating frequency should be taken from the Table A-9. Initial values of circuit elements should be calculated using
125
Appendix
expressions described in the paragraph 4.2.3 of Chapter 1. The input and output port termination impedances are 65Ohm. Report: The report should contain optimized values of the network elements. Exercise 2: The equivalent circuit of class-F power amplifier is shown in Fig. A-47. The influence of conduction angle on the collector-emitter voltage waveform should be observed. Therefore, the bias voltage Ebias should be changed from 0.55V to 0.75V with the about 0.01V step size. The collector-emitter voltage waveform should be achieved by Serenade nonlinear analysis for each step of Ebias varying. Initial values: Operating frequency and BFP490 model parameters should be taken from the Tables A-9 and 5-1, respectively. Values of the output network elements should be the optimized ones from Exercise 1 report. The input port termination impedance is 50Ohm, while the output is 65Ohm. Other circuit parameters are the following: Cin = 1.9 pF , Lin = 0.1nH , Lch1 = Lch 2 = 1uH , Cb = 50 pF , VCC = 5V . The driving power is Pin = 0.002W . Report: The report should contain the graphs with the collector-emitter voltage waveforms.
VCC
Lch2 ɋin
Pin
ɋb
Lin
Lch1
Ebias
Figure A-47. Equivalent circuit of class-F power amplifier.
126
4.2
Appendix
Example
Variant 0: The operating frequency is 989MHz (see Table A-9). Calculated initial values of circuit elements are the following (see paragraph 4.2.3 of Chapter 1, and paragraph 2.2 of Appendix): C1 = 5.5017 pF , L1 = 4.7071nH , L2 = 0.9478nH , C 2 = 3.0359pF , C 3 = 24.287pF . The input and output port termination impedances are 65Ohm. Exercise 1: A. Schematic window for the class-F circuit is shown in Fig. A-48. B. Performing the Optimization as shown in Fig. A-49. C. Displaying the results: - Optimized parameters of class-F network are the following: C1 = 6.2912pF , L1 = 4.068nH , L2 = 1.0402nH , C1 = 2.5686pF . - Frequency dependence of input impedance is shown in Fig. A-50.
Figure A-48. Schematic window for the class-F circuit.
127
Appendix
Figure A-49. Linear Optimization window.
Exercise 2: Simulated collector-emitter voltage waveforms for the 0.55V and 0.75V bias are shown in Figs. A-51, A-52, respectively.
128
Appendix
Figure A-50. Frequency dependence of input impedance.
Figure A-51. Simulated collector-emitter voltage waveform for the 0.55V bias.
Appendix
Figure A-52. Simulated collector-emitter voltage waveform for the 0.75V bias.
129
References
1. 2. 3. 4. 5. 6. 7. 8. 9.
10. 11.
12. 13. 14. 15.
16.
M. Albulet, RF Power Amplifiers (Noble Publishing, 2001). A. Grebennikov, RF and Microwave Power Amplifier Design (McGraw-Hill, 2004). M.R. Osborne, Design of tuned transistor power amplifiers, Electron. Eng. (8), 436-443 (1968). R.G. Harrison, A nonlinear theory of class C transistor amplifiers and frequency multipliers, IEEE J. Solid-State Circuits 2(9), 93-102 (1967). J.A.G. Slatter, An approach to the design of transistor tuned power amplifiers, IEEE Trans. Circuit Theory 12(6), 206-211 (1965). R.H. Johnston, A R. Boothroyd, High-frequency transistor frequency multipliers and power amplifiers, IEEE J. Solid-State Circuits 7(2), 81-89 (1972). R.D. Peden, Charge-driven HF transistor-tuned power amplifier, IEEE Solid-State Circuit 5(4), 55-63 (1970). A.N. Rudiakova, V.G. Krizhanovski, The theory of power amplifiers with a polyharmonic operating, MIKON-2000, Poland, Wroclaw, vol. 1, pp. 105-108 (2000). N.O. Sokal, RF power amplifiers, classes A through S-how they operate, and when to use each, Professional Program Proceedings Electronics Industries Forum of New England, pp. 179-252 (1997). V.J. Tyler, A new high efficiency high power amplifier, Marconi Rev., vol. 21, pp. 96109 (1958). D. Snider, A Theoretical analysis and experimental confirmation of the optimally loaded and overdriven RF power amplifier, IEEE Trans. Electron Devices 14(12), 851-857 (1967). H. Krauss, C. Bostian, F. Raab, Solid-State Radio Engineering (New York: Wiley, 1980). C. Trask, Class-F amplifier loading network: a unified design approach, IEEE Microwave Symposium Digest.. vol. 1, pp. 351-354 (1999). F.H. Raab, Class F Power Amplifiers with maximally Flat Waveform, IEEE Trans. On Microwave Theory and Techniques 45(11), 2007-2013 (1997). P. Colantonio, F. Giannini, G. Leuzzi, and E. Limiti, Very high efficiency microwave amplifier. The harmonic manipulation approach, MIKON-2000, Poland, Wroclaw, vol. 3, pp. 33-46 (2000). P. Colantonio, F. Giannini, G. Leuzzi, and E. Limiti, On the Class-F Power Amplifier Design, Int. Journal on RF and Microwave CAE, pp. 129-149 (1999).
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Index
amplitude characteristics 2
input matching network 26
bi-harmonic operation 7 Bragg equation 70
junction voltage 32 large signal mode 4 load characteristics 2 load matching 21
charge control model 32 class AB 4 class B 4 class C 4 class F 7 class-F output network 28 collector efficiency 31 conduction angle 6 critical mode 3 cut-off 4 cut-off voltage 34
matching conditions 19 maximally flat waveforms 8 modulation characteristics 2 narrow-band networks 23 output matching network 27 output power 1 overloaded mode 3
dc supply power 1 defected ground structures 69 differential resistance 22 diffusion capacitance 33 dividing and combining 22 double-period ESB 74 driving signal source 2 dynamic load line 3
pass-band characteristic 72 phase relations 31 photonic band-gap 69 piecewise linear approximation 33 polyharmonic operation 4 possible class-F realization 61 power gain 1 quality factor 27
efficiency 1 electromagnetic stop-band 69
rectangular-shape holes 75 signal source matching 19 sine-wave operation 4 small signal mode 4 spectral analysis 37
fifth-harmonic peaking 74 frequency characteristics 2 half-wave truncated cosinusoid 31
135
Index
136 square-shape holes 74 square-wave 31 stretching effect 65 switching mode 3
transistor lag 35 transistor utilization factor 6 two-port network 19 undersaturated mode 3
third harmonic peaking 31 transistor input impedance 19
wideband matching 21