Electrochemical Processing in Ulsi Fabrication & Semiconductor Metal Deposition II: Proceedings of the International Symposium (Proceedings (Electrochemical Society), V. 99-9.)

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ELECTROCHEMICAL PROCESSING IN ULSI FABRICATION AND SEMICONDUCTOR/METAL DEPOSITION II Proceedings of the InternationalSymposium Editors P. C. Andricacos [BM T. J. Watson Research Center Yorktown Heights, New York, USA P. C. Searson Fhe Johns Hopkins University Department of Materials Science and Engineering Baltimore, Maryland, USA Z. Reidsema-Simpson M4otorola 6ustin, Texas, USA

P. Allongue Laboratoire de Physique des Liquides et Electrochimie University P. & M. Curie Paris, France J. L. Stickney University of Georgia Department of Chemistry Athens, Georgia, USA G. M. Oleszek University of Colorado Department of Electrical and Computer Engineering Colorado Springs, Colorado, USA

'F. ELECTRONICS AND DIELECTRIC SCIENCE AND TECHNOLOGY DIVISIONS

Proceedings Volume 99-9

}

THE ELECTROCHEMICAL SOCIETY, INC., 65 South Main St., Pennington, NJ 08534-2839, USA

Copyright 1999 by The Electrochemical Society, Inc. All rights reserved. This book has been registered with Copyright Clearance Center, Inc. For further information, please contact the Copyright Clearance Center, Salem, Massachusetts. Published by: The Electrochemical Society, Inc. 65 South Main Street Pennington, New Jersey 08534-2839, USA Telephone 609.737.1902 Fax 609.737.2743 e-mail: [email protected] Web: http://www.electrochem.org

Library of Congress Catalogue Number: 99-69039 ISBN 1-56677-231-1 Printed in the United States of America

PREFACE

The Symposium on Electrochenical Processing In ULSI Fabrication II was held on May 3 - 6, 1999 in Seattle, Washington in the context of the 195th Meeting of the Electrochemical Society. It was the second of a series of symposia held annually during Spring meetings of the Society. The goal of this symposium was to capture from the beginning the explosive growth that electrochemical processing is experiencing as a result of the immense opportunities that semiconductor fabrication offers, as witnessed by the recent emergence of electroplating as the process of choice for copper deposition in on-chip interconnections. Another goal of the Symposium was to bring together practitioners from all aspects of electrochemical processes from the most fundamental to the most applied. Both goals are being accomplished as evidenced by the papers being published in this volume as well as the proceedings volume of the 1998 symposium. We are grateful to the participants for making the Symposium a success. November 1999 Symposium Organizers: Panos C. Andricacos Peter C. Searson Cindy Reidsema - Simpson PhilippeAllongue John L. Stickney GeraldM. Oleszek

TABLE OF CONTENTS

PREFACE ...........................................................................................................................

iii 1

Copper Interconnect Technology in Semiconductor Manufacturing ............................. Daniel C. Edelstein, P.C. Andricacos,B. Agarwala, C. Carnell, D. Chung, E. Cooney III, W. Cote, P.Locke, S. Luce, C. Megivern, R. Wachnik, and E. Walton Extendibility of Electrochemical Deposition for High Aspect Ratio Copper Interconnects ........................................................................................................ Sergey Lopatin

9

Experimental and Numerical Study of Leveling of Submicron Features by O rganic Additives ....................................................................................................... James J. Kelly and Alan C. West

16

A Novel Electrolyte Composition for Copper Plating In Wafer Metallization ................. Uziel Landau, John D'Urso,Andrew Lipin, Yezdi Dordi,Atif Malik, Michelle Chen, and PeterHey

25

STM Studies of Halide Adsorption on Cu(100), Cu(110), and Cu(111) ........................ 41 T.P. Moffat A Model of Superfilling in Damascene Electroplating .................................................... H. Deligianni,J.O. Dukovic, P.C.Andricacos, and E.G. Walton

52

A Mass Transfer Model for the Pulse Plating of Copper Into High Aspect Ratio Sub-0.25Izm Trenches ............................................................................................ Desikan Varadarajan,Charles Y.Lee, David J. Duquette,and William N. Gill

61

Numerical Simulations of Fluid Flow and Mass Transfer within an Electrochemical Copper Deposition Chamber ............................................................. P.R. McHugh, G.J. Wilson, and L Chen

71

Model of Wafer Thickness Uniformity In an Electroplating Tool .................................. 83 H. Deligianni,J.O. Dukovic, E.G. Walton, R.J. Contolini, J. Reid, and E. Patton Bath Component Control and Bath Aging Study for a Cu Plating System Using an Inert Anode ..................................................................................................... Mei Zhu, Yi-Fon Lee, Demetrius Papapanayiotou,and Chiu H. Ting

V

96

The Effects of Process Parameters on the Stability of Electrodeposited Copper Film s ................................................................................................................................. Brett C. Baker, David Pena, Matthew Herrick, Rina Chowdhury, Eddie Acosta, Cindy R. Simpson, and Greg Hamilton

103

Dopants in Electroplated Copper ..................................................................................... P.C. Andricacos, C. Parks, C. Cabral,R. Wachnik, R. Tsai, S. Malhotra, P. Locke, J. Fluegel, J. Horkans, K. Kwietniak, C. Uzoh, K.P. Rodbell, L. Gignac, E. Walton, D. Chung, R. Gefjken

111

ECD Seed Layer for Inlaid Copper Metallization ........................................................... L. Chen and T. Ritzdorf

122

Thermodynamics of Faceting on the Submicron Scale in Copper Electroplating .......... 134 Q. Wu and D. Barkey Deposition of Copper on TIN From Pyrophosphate Solution ......................................... John G. Long, Aleksandar Radisic, PeterM. Hoffmann, and PeterC. Searson

149

Electrochemical Study of Copper Deposition on Silicon Surfaces in HF Solutions ....... 156 L Teerlinck, W.P. Gomes, K. Strubbe, P.W. Mertens, and M.M. Heyns Charge Exchange Processes During Metal Deposition on Silicon From Fluoride Solutions ............................................................................................................. P. Gorostiza, R. Diaz, F. Sanz, J.R. Morante, and P. Allongue Evaluation of Effects of Heat Treatment Electroless Deposited Copper ........................ Kai Yu Liu, Wang Ling Goh, and Man Siu Tse

160

168

Cu Electroplating on n-Si(111): Properties and Structure of n-Si/Cu Junctions ......................................................................................................... T. Zambelli, F. Pillier,and P. Allongue

177

The Use of Copper Based Backmetal Schemes As a Low Stress and Low Thermal Resistance Alternative for Use In Thin Substrate Power Devices ................................... T. Grebs, R.S. Ridley, Sr., J. Spindler, J. Cumbo, and J. Lauffer

185

Possibility of Direct Electrochemical Copper Deposition Without Seedlayer ................ 194 H.P. Fung and C.C. Wan Modulated Reverse Electric Field Copper Metallization for High Density Interconnect and Very Large Scale Integration Applications ......................................... 201 J.J.Sun, E.J. Taylor, K.D. Leedy, G.D. Via, M.J. O'Keefe, M.E. Inman, and C.D. Zhou

Vi

Electrochemical Codeposition and Electrical Characterization of a Copper - Zinc Alloy M etallization ................................................................................... Ahila Krishnamoorthy,David J. Duquette, and Shyam P. Murarka Electrodeposition of Cu, Co, and NI on (100) n - SI ....................................................... A.A. Pasa,M.L. Munford, M.A. Fiori,E.M. Boldo, F.C. Bizetto, R.G. Delatorre, 0. Zanchi, L.F.O. Martins,M.L. Sartorelli,L.S. de Oliveira,L. Seligman, and W. Schwarzacher X - Ray Photoelectron Spectroscopic Characterization of a Cu / p - GaAs Interface ............................................................................................................................ E.M.M. Suttter,J. Vigneron, and A. Etcheberry Copper CMP Characterization by Atomic Force Profilometry ...................................... Larry M. Ge, Dean J. Dawson, and Tim Cunningham

212

221

231

238

Anodic Properties and Sulfidation of GaAs (100) and InP (100) Semiconductors ........ 242 R.F. Elbahnasawyand J.G. Mclnerney A Study on Electrochemical Metrologies for Evaluating the Removal Selectivity of Al CM P ....................................................................................................... Shao-Yu Chiu, Jyh-Wei Hsu, I-Chung Tung, Han-C Shih, Ming-Shiann Feng, Ming-Shih Tsai, and Bau-Tong Dai

256

Nucleation and Growth of Epitaxial CdSe Electrodeposited on InP and GaAs Single Crystals ........................................................................................................ L. Beaunier,H. Cachet, M. Froment,and G. Maurin

263

Formation of I1-VI and III-V Compound Semiconductors by Electrochem ical ALE ........................................................................................................ Travis L. Wade, Billy H. Flowers, Jr., Uwe Happek, and John L. Stickney

272

Electrochemical Synthesis of Thermoelectric Materials by Electrochemical Atomic Layer Epitaxy: A Preliminary Investigation ...................................................... Curtis Shannon, Anthony Gichuhi, PeterA. Barnes, and Michael J. Bozack

282

CDs and ZnS Deposition on Ag(111) by Electrochemical Atomic Layer Epitaxy .......... 294 M. Innocenti, G. Pezzatini, F. Forni,and M.L. Foresti CuIn,.Ga.Se2 - Based Photovoltaic Cells from Electrodeposited and Electroless Deposited Precursors ........................................................................................................ R.N. Bhattacharya, W. Batchelor,J. Keane, J. Alleman, A. Mason, and R.N. Noufi

vii

309

Electrochemical Deposition of Gold on N-Type Silicon .................................................. Gerko Oskam and PeterC. Searson

318

Co-Deposition of Au-Sn Eutectic Solder Using Pulsed Current Electroplating ............. 329 J. Doesburgand D.G. Ivey Zincation Treatments for Electroless Nickel Under-Bump Metallurgy in Flip-Chip Packaging ......................................................................................................... Tze-Man Ko, Wei-Chin Ng, and William T. Chen

340

Microfabrication of Microdevices by Electroless Deposition ........................................... T.N. Khoperia

352

Notch- and Foot-Free Dual Polysilicon Gate Etch ........................................................... Seung-joon Kim, Hong-seub Kim, Kwan-ju Koh, Kae-hoon Lee, and Jung-wook Shin

361

Interracial Structure of Si/SiO 2 Studied by Anodic Currents in HF Solution ................ 366 Naomi Mizuta, Hirokazu Fukidome, and Michio Matsumura Effect of Dissolved Oxygen on Surface Morphology of Si(111) Immersed in NH 4F and NH 4OH Solutions ............................................................................................ Hirokazu Fukidome and Michio Matsumura

373

Porosity and Surface Enrichment by Tellurium of Anodized p-Cdo.sZno.osTe ............... B.H. Erni,J. Vigneron, C. Mathieu, C. Debiemme-Chouvy, and A. Etcheberry

379

Passivation Process of Hgo. 79Cdo.2,Te by Oxidation in Basic Media ................................. Frank Lefivre, Dominique Lorans, C. Debiemme-Chouvy, A. Etcheberry, Dominique Ballutaud,and Robert Triboulet

385

viii

FACTS ABOUT THE ELECTROCHEMICAL SOCIETY, INC. The Electrochemical Society, Inc., is an international, nonprofit, scientific, educational organization founded for the advancement of the theory and practice of electrochemistry, electrothermics, electronics, and allied subjects. The Society was founded in Philadelphia in 1902 and incorporated in 1930. There are currently over 7,000 scientists and engineers from more than 70 countries who hold individual membership; the Society is also supported by more than 100 corporations through Contributing Memberships. The Technical activities of the Society are carried on by Divisions and Groups. Local Sections of the Society have been organized in a number of cities and regions. Major international meetings of the Society are held in the Spring and Fall of each year. At these meetings, the Divisions and Groups hold general sessions and sponsor symposia on specialized subjects. The Society has an active publications program which includes the following: Journal of The Electrochemical Society - The Journal is a monthly publication containing technical papers covering basic research and technology of interest in the areas of concern to the Society. Papers submitted for publication are subjected to careful evaluation and review by authorities in the field before acceptance, and high standards are maintained for the technical content of the Journal. Electrochemical and Solid-State Letters - Letters is the Society's rapid-publication, electronic journal. Papers are published as available at http://www3.electrochem.org/letters.html. This peer-reviewed journal covers the leading edge in research and development in all fields of interest to ECS. It is a joint publication of the ECS and the IEEE Electron Devices Society. Interface - Interface is a quarterly publication containing news, reviews, advertisements, and articles on technical matters of interest to Society Members in a lively, casual format. Also featured in each issue are special pages dedicated to serving the interests of the Society and allowing better communication among Divisions, Groups, and Local Sections. Meeting Abstracts (formerly Extended Abstracts) - Meeting Abstracts of the technical papers presented at the Spring and Fall Meetings of the Society are published in serialized softbound volumes. Proceedings Series - Papers presented in symposia at Society and Topical Meetings are published as serialized Proceedings Volumes. These provide up-to-date views of specialized topics and frequently offer comprehensive treatment of rapidly developing areas. Monograph Volumes - The Society sponsors the publication of hardbound Monograph Volumes, which provide authoritative accounts of specific topics in electrochemistry, solid-state science, and related disciplines. For more information on these and other Society activities, visit the ECS Web site:

http://www.electrochem.org

ix

Copper Interconnect Technology in Semiconductor Manufacturing Daniel C. Edelstein', P.C. Andricacos IBM T. J. Watson Research Center, Yorktown Heights, New York, USA

B. Agarwala, C. Carnell, D. Chung, E. Cooney ILL, W.Cote, P. Locke, S. Luce, C. Megivern, R. Wachnik, and E. Walton IBM Microelectronics,Hopewell Junction, New York and Essex Junction, Vermont, USA

ABSTRACT CMOS integrated circuit technology with Cu interconnections first reached the point of "qualified for manufacturing" at the end of 2Q98, and subsequently "qualified for shipping" (from a high-volume line) several months later. By the date of this conference, hundreds of thousands of 6-level "copper-chip" microprocessor modules were shipped, and a new generation high-end Server was announced with Cu-interconnected microprocessors' (up to 14 in parallel) and support chips. This technology has remained on track for a full range of logic chips, from PC 2 to high-end server CPUsi, from ASICs to Foundry offerings, and the next generation CMOS parts including embedded DRAM3 , and those on SO1 substrates4 ,. To manufacture chips with Cu interconnects, we are enabled by bringing in several electrochemical and chemical processes, including Cu electrodeposition and chemical-mechanical polishing, coupled with the dual-Damascene patterning scheme. At the same time, it is notable that only one new type of tool, an automated wafer Cu electroplater, was required to make the transition from Al- to Cu-based interconnect manufacturing. Cu interconnect demonstrations have been shown in the literature for years, but behind the scenes, significant process development has been required to successfully bring such a revolutionary technology to product yield levels, and at the same time maintain performance, reliability, and quality standards. Here we show data that illustrate the successful implementation of this new technology in manufacturing. INTRODUCTION In August 1997, IBM announced 6 its schedule for what would be the first implementation of Cu interconnect technology on IC chips, in this case for logic products in its 0.22 gim CMOS generation. Early demonstration hardware began shipping by the end of 1997, and the manufacturing qualification checkpoint was successfully reached on schedule at end of 2Q98, in the Advanced Semiconductor Technology Center in New York. By this time, the technology had been transferred to the IBM Microelectronics manufacturing line in Vermont, which achieved Its ship qualification as scheduled, at the end of 3Q98. Since then, a number of parts have been ramped up in volume, qualified, and shipped to external and internal customers. At every level of this development and qualification, significant defect learning and process enhancement has occurred, as part of the requisite course for an altogether new technology at the state of the art groundrules. Some of this learning is germane to the new Cu processes, but a significant part is related instead to the lithography, patterning, and their control at the aggressive dimensions for this CMOS generation. These problems are worked out specifically for dual-Damascene pattern formation. Throughout, the robust nature of the electrochemical processes employed has aided in this success. tFurther author information -

E-mail: [email protected]; Phone: (914) 945-3051; Fax: (914) 945-4015

Electrochemical Society Proceedings Volume 99-9

THE TRANSITION TO COPPER The transition in manufacturing from AI-RIE/W-Damascene to Cu dual-Damascene BEOL can be considered evolutionary in tooling, and revolutionary in processes. Only one new type of tool, an automated wafer Cu electroplating system, was required to meet manufacturing needs for Cu interconnects. Other tooling changes could instead be described as: no change or upgrades (e.g. metal and ILD deposition, RIE, and lithography platforms); obsolescence (e.g. reducing or eliminating capacity for metal-RIE, CVD-W, and dep-etch SiO 2); or shift in capacity (e.g. redeploying oxide- and W-CMP tools for Cu-CMP, etc.). On the other hand, nearly all process recipes had to be redeveloped to yield Cu-Damascene interconnects in SiO 2 dielectric with Si3N4 caps. Some recipes were the same or simply changed, such as certain lithography and RIE levels, and the transition from gapfill to planar interlevel dielectric deposition. Others were evolutionary, but required significant optimization, such as PVD liner and seed deposition, and dual-Damascene patterning. Still other recipes were new and unique to Cu, such as electroplating, certain cleaning processes, and the migration from Wand Si0 2-CMP to Cu-CMP. These evolutionary and new processes required significant yield learning, understanding of new types of defects and failure modes (while eliminating old ones), and their impacts on reliability. In some cases, the impacts of potential defects were coupled to subsequent or even preceding integration steps, and so fully functional chips and stresses were important in solving the problems that arose. Moreover, the detailed understanding and optimization of the reliability of these chips often relied on the knowledge of fundamental materials, electrochemical, and physics issues; this knowledge had been accumulated over many years, and continues growing to this day in the Research and Microelectronics Divisions. Finally, the appropriate protocols had to be developed and implemented to insure that Cu contamination cocerns were alleviated, Details of this have not been discussed, but it can be stated that both Cu and prior-generation Al-based technologies are simultaneously manufactured in the same production lines. The reliance on years of investment, experience, and innovation in Cu at IBM, the multiple cycles through the full integration, testing, and qualification under stress, and the adjunct contributions and support of Cu-related research, have all been crucial in leading to the as-scheduled qualification and shipping of the first Cu chips. The potential yield and reliability of Cu-Damascene interconnects has often been assumed and espoused, but reaching this potential is not trivial; it cannot come without significant online experience and integration cycles. It is the case, though, that this potential can be realized, as we demonstrate in the following sections. The growing contributions and alignment of the industry, including cooperation on integration work at Sematech7 , various suppliers 8 , and directed university research 9, are expected to help speed the progress of the semiconductor industry at large towards Cu manufacturing. ELECTROPLATED COPPER The most prominent new process introduced for Cu interconnects is Cu electroplating in high aspect ratio submicron Damascene features, and uniformly on 200 mmnwafers. Copper electroplating for Damascene on-chip interconnects was already in use by IBM since before the first publication of multilevel Cu/polyimide interconnects'0 , though this fill method was not divulged until later, as part of a Sematech contract". This work made it clear that electroplating offered significant reliability improvements and cost of ownership reductions relative to some of the main contenders such as CVD and PVD, which had been investigated for fill and abandoned earlier at IBM, along with several other techniques including electroless, ECR, dep-etch, and reflow. In addition, significant industry activity was spurred for developing plating processes and tools, following this work. The first public acknowledgment of IBM's use of electroplating was much later'2 , when the full CMOS technology was announced. By that time, joint work with a supplier was already underway

2

Electrochemical Society Proceedings Volume 99-9

to develop a new wafer electroplating tool3, and tool offerings already existed or were under development at other companies. At present, there are several commercially available electroplating tools, all of which are capable of filling deep-submicron interconnects on 200 mm

wafers, and to various degrees,

achieving

uniform deposits and controlling the respective baths used. Earlier, there had been general skepticism that such a process could be made to work reliably and at high volumes and acceptably low defect levels for semiconductor manufacturing, but our experience was otherwise; a suitably optimized electroplating process was seen to have a very wide window, high repeatability, low cost, tool simplicity, and low maintenance. As time has progressed, Cu plating has exhibited its robustness over years of development and now manufacturing. Most telling was that as yield or reliability problems arose and were solved, none were found to be rooted in our Cu electroplating process. A

good Cu

electroplating

process

10G

26

20 "

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Fig. 1. Holefill evolution for electroplated Cu with superfilling additive bath13.

i t

,

,.

turn

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IM/

_

also

contributes to improved yield and reliability of the resulting Damascene Cu interconnects. Two such contributions are mentioned here. The first comes from the striking "superfilling" behavior of a plating bath with inhibitor additives (fig. l"). Superfilling leads to void-free, seam-free Damascene deposits (assuming a continuous seedlayer exists), thereby eliminating certain fast diffusion paths for Cu electromigration, which would otherwise be present for sub-conformal or conformal deposition (fig. 214). As outlined in ref. 14, this behavior results from the diffusion-limited supply of plating inhibitors to the hole bottoms and bottom sidewalls relative to the top surfaces, leaving the holes open for filling. This holefill evolution has been modeled successfully for a variety of hole shapes and plating conditions (fig. 3, ref's. 14, 15). The

w,,-*

d.Wtf,,

Fig. 2. Holefill evolution vs. degree of conformality in deposition process"4 .

superfilling phenomenon increases for increasing aspect ratios and decreasing dimensions, adding Fig. 3. Correlation of holefill profile to to the extendibility of this fill process. A simulations using superfilling model1 4. notable example is the successful filling (and electrical confirmation) of 0.10 gim 4.5:1 Cu Damascene interconnects'". A second phenomenon which contributes to good Cu reliability is the low-temperature self-annealing behavior of additive-based electroplated Cu' 7 6•' . This behavior was known in the past to the electroplating industry, but has only recently been studied extensively by the semiconductor community9 20. As studied in ref. 21, a uniformly large grain size distribution maximizes the proportion of "bamboo-like" interconnects out to larger linewidths, thereby eliminating grain boundaries as fast diffusion paths for electromigration in these interconnects. As the bulk Cu self-diffusivity is so low, Cu electromigration is then relegated to surfaces and interfaces2". Solving these then becomes critical for overall reliability performance. It remains fascinating that Cu electroplating, a room-temperature process with

Electrochemical Society Proceedings Volume 99-9

3

a deposition rate of fractions to 1 AIm per minute, can lead to essentially single-grain (highly twinned) deposits over large areas, with grain sizes that can substantially exceed the film thicknesses. Recently, a model has been presented22 which addresses, the room-temperature resistivity and stress relaxations, and abnormal grain growth of the plated Cu. Expressions for Zener pinning, Ostwald ripening, Mayadas-Schatzkes grain boundary scattering, and Chaudhari grain boundary volume are invoked, and predict the range of measured results. The electroplated Cu fill is thus seen to perform well in features; but to be manufacturable, the full-wafer process itself must also have very good performance. Figures 4 - 8 show Cu plating data from wafer marathons and CMOS production, using our developed tool and plating process. Figure 413 shows a resistivity map of a 2 jim deposit on a thin seedlayer, showing 1.0% (Ia) uniformity. Thinner films tend to be less uniform, but still well within acceptable limits. Figure 513 shows 1.72% average nonuniformity over a 5,000 wafer test for 1.3 jim plating thickness. The process is quite repeatable from wafer to wafer, as indicated by the data in fig. 613, which shows a 0.65% (la) repeatability in mean plated Cu thickness for a 17,000 wafer marathon. From the mean sheet resistance and the post-measured thickness, a post-anneal Cu resistivity of 1.79 gi(-cm is confirmed. This value is the same as is derived from our integrated Cu interconnect resistances"2 , and does not rise with subsequent thermal cycles. Thus the principal advantage of Cu, its low resistivity, is preserved by the wafer electroplating process. The previous thickness data was obtained from blanket-film depositions, but a high repeatability in actual microprocessor production is also seen, as in fig. 7. Here the lot-lot reproducibility of Cu mean thickness over months of production is shown to be well within the process specification limits. As Damascene patterns can influence the thickness measurements (which are based on sheet resistance), these data imply a very repeatable process. It is also important to maintain the bath chemistry in a production environment. 1.00% (10) Fg 4o Wtpoo0 301fIor map

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4

n thickness uniformity

for 5,000 wafer run'13.

Lot If

Fig. 7. Wafer - wafer mean thickness repeatability for production microprocessor lots.

Electrochemical Society Proceedings VoIlume 99-9

Figure 8 shows statistical process control (SPC) data from months of production, showing a bath component concentration to be within the process limits. Other bath parameters are also successfully monitored and controlled, with similar results in the manufacturing data.

.........................

S..

YIELDS AND DEFECTS The plating process has thus been shown in some detail to exhibit good qualities of a manufacturable process, but full integration data is required to confirm this. Here qualification data is shown that parallels 2 earlier published data" but now at full manuThe data show excellent facturing levels. results for multilevel Cu interconnects; this relies not only on a robust plating process, but on all the integration elements connecting together successfully to yield chips. Figure 9 shows single-via and via-chain (2 unlanded vias + line segment per link) resistance data, taken over several months of production. The significant advantage of Cu for low via contact resistance and tight distributtons is indicated, with <0.3 (0/via, and <0.6 Mlink indicated over many lots. As shown 2 earlier" , Cu vias have < l/2X resistance relative to the best AI(Cu)/W data at similar dimensions; good via resistances contribute significantly to the yield and performance of Cu multilevel interconnects. This success

. . . . . . . . . . . . . . . . . . .

.

......................

Time

Fig. 8. SPC data for bath component concentration collected during 5+ months of production. *r............

j

........................ ".

.

..

,,

.. a

M , ,a

a

.

-

-

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----------

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° TM Sa 4 a a#.,, " a l°* "* ,,o Fig. 9. Production via resistance data for single vias (upper graph) and dual-via links. sensitivity

6

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depends not only on a defect-free plating process, but also on robust patterning, liners, seedlayers, and cleaning processes. With all these elements established, the very low Cu contact resistance Is realized routinely.

.

improvement 4

a

-

- --

2

Overall interconnect yields (e.g. opens and

shorts) depend not only on good vias, but are

T

- Monthly

also mediated by defects in the patterning and Damascene processes; these processes must all Fig. 10. Defect levels after MI and M3 CMP + be optimized for multilevel interconnects with test, on production microprocessor lots. a wide variety of patterns, densities, and vertical overlays. The switch to an entire Damascene-based interconnect technology, with elimination of the (extra) ILD planarization step between levels for AI(Cu)/W, can change the relative importance of different defect contributors, but ultimately can lead to superior results at the ever-decreasing dimensions. As in fig. 10, post-inline test (after CMP) defect densities at MI and M3, are brought down to typical levels for random FM-related defects, as in the more mature technologies. This defect reduction continues to improve, beyond the levels associated with previous technologies, as is necessary to yield chips with increasing circuit density and decreasing critical dimensions. (As is typical for Damascene, these defects do not necessarily lead to yield loss). These levels are obtained after significant

Electrochemical Society Proceedings Volume 99-9

5

development and improvement of the patterning, CMP, and cleaning processes as the technology is

I

pushed up the product yield curves.

E

design rev. ai

c

The deciding measure of process yield is the chip yield d at wafer final test. Figure II shows the A production yield ramp of a large, high- I performance 6-level microprocessor in a new 1_ _VV design. The typical ups and downs associated c are with new problems (and their remedies) indicated, as well as successful ramping to well Lot # beyond the target level for this stage of production. This represents one of several very complex Fig. 11. Yield ramp for a large, high performance, 6-level microprocessor. and high-performance CMOS logic chips with Cu interconnects that have successfully yielded in a production environment. Current emphasis is in the planned continuation to increase yields, broaden the number of products, and increase volume in new markets such as ASICs and Foundry offerings, as well as IBM's internal Logic needs for its range of systems. At the same time, subsequent CMOS Logic generations are proceeding through their qualification processes on schedule, all with Cu interconnects.

,

RELIABILITY Throughout the migration from development to manufacturing and shipping chips, it is essential to monitor and confirm that product reliability is maintained at or above the specified levels. These levels are usually determined by the most stringent requirements of the "mission-critical" high-end server (Enterprise) systems, although certain factors may be reevaluated for differing product requirements associated with portable and desktop systems.

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With the advent of Cu in the manufacturing

tog

lines, it is also important to confirm no Cu contamination of devices is taking place. Gate oxide integrity is shown in fig. 12 for lots 23 from a line qualification , with hot-carrier

Fig. 12. Gate oxide integrity for ship qualification hardware.

lifetimes that meet or exceed the technology

specifications, and indicate no Cu contamination. These data mirror the positive results obtained at the development/early manufacturing line. Electromigration data from this qualification is shown in fig. 13 for upper-level dual-Damascene lines and vias; data is shown for two process alternatives, both of which were found to exceed specifications. The stress was 295"C and 2.5 MA/cm 2, with a 20% resistance rise fail criterion. The stress was terminated at -1000 hrs. (before sufficient failures had occurred), with projected tso times of -300 and -1000 hrs., respectively for the two processes. Such data indicate robustness not only of the manufacturing Cu plating process, but of the entire integration process as well.

6

i I

.. . . .

'

I

.

I

I

I

i

If

f

i

T

i

Tl*t*peltr(hr,.)

Fig. 13. Electromigration stress (terminated at 1000 hrs.) for production hardware.

Electrochemical Society Proceedings Volume 99-9

Fully-assembled chip modules were evaluated during and after full functional stress and burn-in, as a necessary part of the product qualification23 . Data were acquired for early-production 6-level Cu microprocessors carried through high-voltage, high-temperature functional stresses, and multiple blocks of thermal cycles, analogous to the SRAM module stress data reported earlier"2 . Two large populations of modules showed comparable data for the two manufacturing lines producing Cu chips. The failure rates in both cases were within the specification limits, and no problems endemic to Cu were found. CONCLUSION It is shown that a CMOS integrated circuit technology with full Cu interconnects can be brought into a manufacturing environment, to yield complex multilevel logic chips. The one completely new process, wafer Cu electroplating, is robust and well-controlled at high volume production. The remaining processes and tools are either the same or evolutionary, though entire re-optimization is required for multilevel Cu dual-Damascene fabrication. With this optimization, proper yields at manufacturing volumes are obtained, with no compromise in reliability, quality, or performance. Yield, though difficult initially (as for any such revolutionary change), is brought to manufacturing levels with random defect densities typical of a mature technology at these critical dimensions. A significant number of learning cycles were required to reach this point, especially for the first time. This learning investment may be reduced for subsequent entries into Cu technology, give the focus, involvement, and rapid progress of the rest of the industry, including direct Cu integration work by the tooling suppliers and Sematech. At IBM, Cu interconnect technology remains on schedule for expansion of the range of chip products, and qualification of subsequent CMOS generations. Copper interconnect technology is an exciting area for the electrochemical community in particular, as it invites the pursuit of new applications for electrochemical processes and related understanding, in the fabrication of advanced IC chips. ACKNOWLEDGMENTS The authors gratefully acknowledge the essential contributions from a great number of our colleagues, too numerous to mention, in the Research and Microelectronics Divisions, who share credit for the successful innovation and implementation of Cu interconnect technology. REFERENCES 1) T. McPherson, et al., Proc. IEEE Int. Sol.-State Circuits Conf. (to be published, 2000). 2)

N. Rohrer et al., Proc. IEEE Int. Sol.-State Circuits Conf., 240 (1998).

3)

S. Crowder, et al., Tech. Dig. IEEE Int. Electron Dev. Mtg., 1017 (1998).

4) A. Ajmera, et al., Tech. Dig. IEEE Int. Electron Dev. Mtg., (1998). 5) E. Leobandung, et al., Tech. Dig. IEEE Int. Electron Dev. Mtg. (to be published, 1999). 6)

L. Gwennap, Microprocessor Report, 11, 14 (1997).

7)

J. Dahm and K. Monnig, Proc. Advanced Metallization Conf., 3 (1998).

8)

Alain S. Harrus, John Kelly, and Ronald A. Powell, Proc. SPIE Conf. Multilevel Interconn. Tech. II, 3508, 25 (1998).

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7

9)

for example, "Advanced Interconnects and Contacts", D.C. Edelstein, T. Kikkawa, M.C. Ozturk, K.-N. Tu, and E.J.Weitzman, ed's., Mat. Res. Soc. 564, (1999).

10) B. Luther et al., Proc. VLSI Multilevel Intercon. Conf., 15 (1993). 11) J. Hummel, Sematech contract report (1996). 12) D. Edelstein et al., Tech. Digest IEEE Intern. Electron Devices Mtg., 773 (1997). 13) Novellus Systems, Inc., Sabre Electroplating System, presented at IEEE Int. Int. Intercon. Tech. Conf., Burlingame, CA (1998); P. Locke, et al., Semicon West, (1998); and C. Matsumoto and M. Alleyne, EE Times, July 13 issue, p. 6 (1998). 14) P. Andricacos, C. Uzoh, J.O. Dukovic, J. Horkans, and H. Deligianni, IBM J. Res. Dev. 42, 567 (1998); and Proc. Adv. Metalliz. Conf., 29 (1998). 15) H. Deligianni, J.O. Dukovic, P.C. Andricacos, and E.G. Walton. Abstr. 195th Mtg. Electrochem. Soc., 267 (1999). 16) C.-K. Hu, K.Y. Lee, C. Uzoh, K. Chan, S. Rossnagel, L. Gignac, P. Roper, and J.M.E. Harper, Mat. Res. Soc. 514, 287 (1998). 17) T. Ritzdorf, L. Graham, S. Jin, C. Mu, and D. Fraser, Proc. IEEE Int. Intercon. Tech. Conf., 166 (1998). 18) C. Cabral, Jr., et al., Proc. Adv. Metalliz. Conf., 81 (1998). 19) C. Lingk, et al., Proc. Adv. Metalliz. Conf. 89 (1998). 20) for example, "Advanced Metallization Conference in 1998", G.S. Sandhu, H. Koerner, M. Murakami, Y. Yasuda, N. Kobayashi, ed's., Mat. Res. Soc., Warrendale, (1998). 21) C.-K. Hu, R. Rosenberg, H.S. Rathore, D.B. Nguyen, and B. Agarwala, Proc. IEEE Int. Intercon. Tech. Conf., 267 (1999). 22) J.M.E. Harper, C. Cabral, Jr., P.C. Andricacos, L. Gignac, I.C. Noyan, K.P. Rodbell, and C.-K. Hu, J. Apple. Phys. 86, 2516 (1999). 23) IBM CMOS Quality Report (to be published).

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EXTENDABILITY OF ELECTROCHEMICAL DEPOSITION FOR HIGH ASPECT RATIO COPPER INTERCONNECTS Sergey Lopatin AMD, Sunnyvale, CA 94008-3453

Abstract-Copper electroplating processes with pulse reverse (PR) conditions were employed for filling high aspect ratio, slightly tapered vias of different nominal diameters (0.2-1 gtm) in a constant dielectric thickness of 2.5 pim. These experiments have verified predictions of a nonuniform time-averaged current distribution in high aspect ratio vias. An enhanced deposition at the lower sidewalls and at the bottom of the high aspect ratio vias was found to fill vias of (4.5-10):1 aspect ratios. Copper electroplating (EP) with modified pulses also was effective for filling 0.13 gm wide high aspect ratio (8:1) trenches.

INTRODUCTION Copper has been identified as an interconnect material for high performance microprocessor structures because of its low electrical resistivity (1.67 gOhm.cm) and high activation energies for lattice electromigration (2.3 eV) and grain-boundary self-diffusion (1.1 eV). Due to the difficulty of etching Cu for sub-0.18 pm lines formation, a dual damascene approach was adapted for the Cu interconnect fabrication in dielectric layers. It included Cu electrolytic plating on a thin seed layer to fill trenches-vias with <111> texture film and chemical-mechanical polishing (CMP) to remove Cu from the dielectric surface, resulting in a fully planarized Cu/dielectric structure. Electroplating is a preferred technique for copper interconnect formation in integrated circuits due to its high trench filling capability and relatively low cost. Electromigration failures in Cu interconnect are dependent on surface conditions because (unlike Al alloy) the surface and interfacial diffusion of Cu has a lower activation energy than grain boundary diffusion. For a damascene process with full Cu encapsulation by barrier materials, electromigration can be reduced by restriction of diffusion pathways along the surface. In order to achieve such reduction, the copper electroplating process must provide a completely filled structure in which voids and entrapments of electrolyte are absent. Voids and surface seams in damascene Cu EP lines-plugs should be also eliminated to maximize electrical conductivity of the lines. This can be achieved if the deposition rate along via and trench sidewalls is greater at the bottom and lower sidewalls while the trench-via top opening remains open. The use of a leveling agent and pulsed deposition appears to be ideal for the production of void-free Cu deposits [11 because the off-time and reverse current significantly improve the deposition rate distribution along the sidewalls [2]. The distribution of reaction rates on the trench-via sidewalls can be predicted from variations in the concentration of copper ions [2] and the action of the leveling agent [3] at the trench-via corners. For the same depth with high aspect ratios, the difficulty of filling worsens from a simple trench to a dual damascene trench-via to a single via: filling difficulty single trench

dual damascene trench-via

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single via

9

Since high aspect ratio sub-0.25 gtm via has an electronically conducting seed solid phase and Cu growth on via sidewalls at later times in the electroplating process, the passage of the current at the PR plating conditions through the vias' volume will be affected by way of double-layer charging as described in porous electrode theory [2, 4]. It is observed that variations of seed layer thickness on the via sidewall and via top opening as well as current density conditions of EP processing have large effects on the filling profile in single vias. This paper focuses on an experimental study of filling profiles in single, high aspect ratio vias using Cu EP process with PR conditions. Since the step coverage of the seed/barrier layer and Cu EP film for dual damascene structures should be less difficult than for single vias of the same aspect ratio, these step coverage results should be useful for dual damascene interconnect schemes. High aspect ratio plugs formed for single via filling are also beneficial in order to meet dual damascene stacked vias (trench size = via size) demands for sub-0.13 gtm ULSI technology. PULSE REVERSE ELECTROPLATING. DOUBLE-LAYER EFFECTS ON ELECTRODE REACTION RATE In pulse reverse electroplating, the Cu film deposition process involves the reduction reaction occurring at the electrode surface. This reduction reaction can be described as following: i, Cu "÷ +ne

-

Cu

(1)

id where Cun÷ is the copper ions being reduced, Cu° is the copper atoms being deposited, n is the ion valency (n=l,2), i, and id are the rates of reduction and dissolution processes respectively. The two opposite processes, reduction and dissolution, occur periodically. At these conditions the averaged reaction rate (2) i=ir - id The structure of the double layer and the specific surface adsorption can affect the reaction kinetics. In the absence of specific adsorption, copper ions' position of the closest approach to the electrode surface is the Outer Helmholtz Plane (OHP). The potential at the OHP, (p, is not equal to the potential in solution, qi, because of the potential drop through the diffuse layer and possibly because some ions are specifically adsorbed. These potential differences in the double layer, as known, can affect the electrode reaction kinetics [5]. When the metal electrode has a negative charge, qm < 0, 4p < 0, and cations will be attracted to the electrode surface. When the electrode has a positive charge, the opposite effect will hold, q'" > 0, (p > 0, and cations will be repelled. The potential difference driving the electrode reaction, the effective electrode potential, E, is 0"n - (p- qV, where 0"f is metal potential. The overall effect of double layer on kinetics is that the averaged reaction rate, i, is a function of potential, through variation of (p with E. It is a function of the electrolyte concentration since (p depends on concentration. When the metal electrode has a specific adsorption of different ions and organic molecules on the surface, the value of (p is perturbed from just the diffuse double layer consideration; the location

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Electrochemical Society Proceedings Volume 99-9

of the plane of closest approach for the copper ions and the potential at the pre-electrode state change and diffuse layer increases. Specific surface adsorption of non-Cu ions and organic species may also result in blocking of the electrode surface and decrease or increase the reaction rate, dependent on the q'. In pulse reverse electroplating, deposition/dissolution kinetics include three states for copper ions: copper ions are periodically attracted to the surface during Cu deposition time, repelled from the surface during dissolution time, and left in some unperturbed state during zero-current time. Deposition time, dissolution time and off time influence concentration field in the high aspect ratio trenches. Simulations showed formation of a beneficial concentration field, with the cupric-ion concentration highest at the trench bottom and, as a result, decreased void size at Cu electroplating in high aspect ratio trenches [2].

EXPERIMENT The test chip used has a periodic array of slightly tapered via openings containing 6 via patterns of different diameters in the range from 0.9 to 0.18 gim. The dielectric thickness was 2.5 gim. TaNbased barrier layer of 30 nm and Cu seed layers of 150 nm and 100 nim, measured on the field, were deposited by ion metal plasma (IMP) technology. IMP seed layer deposition used 10-100 mT Ar sputtering pressures to slow down the magnetron sputtered metal atoms, a coil for their ionization, and application of wafer bias to attract them vertically. IMP technology provided seed layer step coverage in high aspect ratio vias because of the directionality of incoming ions and utilization of ion bombardment to backsputter already deposited copper from the bottom of the via to the sidewalls. IMP Cu seed layer process may reach its step coverage limits for tapered vias with diameters around (0.13-0.18) ltm or (0.2-0.25) gim wide fully vertically walled structures. Verification of the electroplating performance beyond 0.18 jim was conducted using a periodic array of high aspect ratio vertical trenches of different widths in the range from 0.5 to 0.13 [tm. WN barrier layer of 25 nm and Cu seed layer of 30 nm were deposited by chemical vapor deposition (CVD) for base layer. A high conductivity acid-copper sulfate electrolyte containing organic additives was used for the electroplating experiments. At the conclusion of the Cu plating, the wafers were rinsed in de-ionized (DI) water and dried in a forced N2 flow. RESULTS There are two possibilities for achieving enhanced deposition in vias by electroplating. First is to reduce deposition rate at the wafer surface by using a relatively large amount of the leveling and inhibiting agents in electrolyte. This method, however, introduces impurities into the Cu lines and is inconsistent with the desire to reduce their resistance. Second, employed here, is to use the periodic forward and reverse currents to regulate deposition rate along via sidewalls with an appropriate amount of leveling at the via top. Figure 1 shows a focused ion beam (FIB) cross section of voidfree Cu plugs obtained by this polar pulse reverse Cu EP. Change in deposition rate along via sidewalls leads to decrease of cleft depth in the via tops and void-free filling of the vias. The dependencies of cleft depth on via aspect ratio, applied current density, seed layer thickness and wafer center-edge nonuniformity were observed by FIB etching, scanning electron microscopy (SEM) and transmission electron microscopy (TEM).

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11

Effect of aspect ratio An enhanced deposition at the via bottom and lower sidewalls was observed when via diameter was decreasing from 0.9 pgm to 0. 18 gpm at constant dielectric thickness of 2.5 pLm. Significant change of deposition rate along the via sidewall started at via diameters about (0.25-0.35) gin. The effective via diameters defined as the largest diameters at which enhanced filling at the bottom is observed. The average cleft depth in the top of vias was decreasing with increasing via aspect ratio from 3:1 to 12:1 and followed the 1/(J+exp(cA,)) function of the via aspect ratio, where a is a dimensionless constant. Effect of applied current density Cleft depth decreased when applied current density decreased from 20 mA/cm to 10 A/cm2. The decrease of applied current density also shifted the effective via diameter to larger dimensions, from approximately 0.25 pm to 0.45 ptm. The average cleft depth followed the 1/(1+exp (a'(A, - flJ))) function of the via aspect ratio and applied current density, where a' is a dimensionless constant, f is a constant with units of I/J, 1/mA/cm 2. Effect of seed thickness Cleft depth was decreased when seed layer thickness was decreased from 150 nm to 100 nm. This effect can be explained by faster closing of the via top during Cu EP on thick seed layer. Effect of wafer center-edge Cleft depth decreased from wafer center to the edge. The effect is related to seed thickness decreasing by about 8% toward the wafer edge. The PR conditions were also used for the purpose of decreasing or eliminating sidewall voids. High stresses in layers of the as-deposited Cu I thin seed / thin barrier sandwich structures can lead to void formations in EP Cu grain boundaries along the via sidewall when temperature induced stress change and grain growth occur. The average tensile stress in 1.0 prm thick EP Cu blanket films was decreased from 24 MPa to 18 MPa when the process was changed from direct current (DC) to unipolar forward pulse (FP) and further to 14 MPa with polar PR conditions. With PR, the limitation for filling high aspect ratio vias without voids was about (8-10):1 aspect ratio and related to sidewall voids usually due to asymmetric decrease of the seed layer thickness at the via sidewalls starting at the wafer edge.

SIMULATION AND DISCUSSION The success of via filling when using enhanced deposition at the via bottom and lower sidewalls, depends on the kinetics of decreasing cleft depth and inhibiting deposition at the via top opening. The cleft depth (C) was found dependent on a number of controlled parameters: seed thickness at top via comers, (a), via aspect ratio, (A,), applied cathodic current density, (J), electrolyte temperature, (7), and thickness of EP Cu, (b). Using the experimental results, the relationship between the average cleft depth and via aspect ratio with current density controlled reaction rate can be written in the following simplified model: I C H

ka

k4 b

k2(AýI+exp (

(3)

k 3 J) )

kT

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Where k is the Boltzmann coefficient; k, and k4 are dimensionless coefficients; k2 is a constant with units of energy, eV; and k3 is a constant with units of I/J, 1/mA/cm 2. The fillable via aspect ratio has a functional dependence on current density, J, and seed thickness at via top corners, a . Av = hid, where tapered via diameter d=(dvop+dby,,,o.)/2, dielectric thickness h = constant in our case and the via diameter that can be filled is decreasing with decreasing J and a , d - J a. The lower the current density and smaller the thickness of the seed layer at the top via comers, the smaller the diameter of the vias can be filled. An effective via diameter (d.) around (0.25-0.35) ptm exists, below which the effect of changing deposition rate along the via sidewall (or effect of enhanced deposition at via bottom and lower sidewalls) just becomes significant. This is the experimental verification that the effect of changing deposition rate along via sidewall is related to concentration gradients and becomes diffusion enhanced. Actual threshold via diameter (dt) is smaller, and concentration gradients become significant after the short time of deposition initiation and conformal deposition on via sidewall. Thus the effective diameter will be the sum of actual threshold via diameter and thickness of conformal Cu deposition (Ab) on the sidewall: d, = dt + 2Ab

(4)

These experimental results promote the study of an interface of the electrode material with the solution in narrow deep vias. Developments in the theory of flooded porous electrodes with regard to adsorption of ions and double-layer charging are primary in an understanding the pulsed electrodeposition effects along high aspect ratio via sidewalls. A patterned wafer surface serves as the flat surface electrode having a large number of pores (high aspect ratio vias) providing a specific additional interfacial areas at the sidewalls. As well as flat electrode surface, these specific interfacial areas are surfaces of double-layer adsorption for chloride ions, leveling organic molecules, copper-organic complexes, copper-chloride complexes, sulfate complexes and copper ions. All these reactants also are in the solution in close proximity to the surfaces along the porous electrodes (i.e. via sidewalls). The experimental results show that the electrode processes occur nonuniformly through the depth of high aspect ratio via. This suggests separation of electrode processes at the flat surface and in vias. In the case of pulse reverse electrodeposition, the averaged heterogeneous electrochemical reaction has an intrinsically slow rate at the wafer surface, but the compactness of porous electrodes can provide potential, (A control for the desired process. At certain deposition conditions, when via diameter decreases and becomes close to the effective diameter, there is a relatively large range of reaction rates along the via sidewall. Transient doublelayer charging and adsorption are of interest in the determination of the reaction rates in the internal area of vias as porous electrodes because diffusion parts (or diffuse layers) of the double electrical layer at via sidewalls become very close to each other with decreasing via diameter. These specific, via-geometry-related conditions lead to copper ion concentration and potential gradients (for example, gradient of the zero-potential plane) along via sidewalls and as a result to a range of averaged reaction rates. It can be assumed that coefficient k2 (k2 - 0.0256 eV) correlates both to the copper ion diffusion gradient and to the gradient of the zero-potential plane between top and bottom of the via: AC = C top - C bottom

(5)

,A(qO-=

(6)

(POtop - (PObottom

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13

where AC is a total copper ion gradient between top C t, and bottom C bottom of the via; Acp0 is a total zero-potential plane gradient on via sidewall between top POt,,op and bottom (POboto,, of the via.

The decrease of cleft depth in the via top is also limited by Cu deposition on the top corners and a leveling agent is useful for suppressing the Cu deposition rate at via top comers. During pulse reverse Cu EP, in the presence of chloride ions in the electrolyte, the additives are adsorbed on the via top comers, polarizing or de-polarizing the electrode surface and suppressing the averaged plating rate there. Because of the shorter distance for diffusion of additives to the via top comers, more additive is transported there suppressing the plating rate. Thinner Cu is deposited near the via opening where additives mass transport rate is high. Focused beam formed SEM cross section on Figure 2 shows that the enhanced Cu deposition at the via bottom and lower sidewalls with suppressed Cu deposition at the via top comers leads to void-free filling of the vertical trenches with dimensions of 0. 13 p.m width and 8:1 aspect ratio.

CONCLUSIONS In summary, an experimental verification that the changing deposition rate along sidewalls in high aspect ratio vias is related to copper ion concentration gradient and becomes diffusion enhanced was demonstrated for pulse reverse Cu EP. 1). An effective diameter around 0.25 g.m exists, below which the effect of changing deposition rate along the via sidewall just becomes significant. 2). The decrease of applied current density shifted the effective via diameter to more large dimensions, from approximately 0.25 pgm to 0.45 ptm. 3). The average cleft depth followed the 1/(1+exp (a'(A. - /J)) function of the via aspect ratio and applied current density. The application of periodic polarity reversal in Cu EP, with adequately formulated and dosed surface-active additives, allowed high via filling capability that was not limited by aspect ratio of 12:1 for 0.2 p.m nominal via diameter. The relationships between filling profile and via aspect ratio, applied current density, seed layer thickness, wafer center-edge position and EP Cu thickness were determined, compared and expressed in mathematical form for via aspect ratios between 2.5:1 and 12:1. The IMP seed layer deposition and pulse reverse Cu EP were effective in filling tapered vias of aspect ratio up to (8-10):l without sidewall voids. It is assumed that IMP Cu seed layer process will reach its step coverage limits for tapered vias with diameters around (0.13-0.2) pgm. Using CVD seed layer extends the electroplating filling beyond 0.13 p.m wide structures with high aspect ratios and vertical sidewalls.

REFERENCES 1. 2. 3. 4. 5.

V.M. Dubin, C.H. Ting, R. Cheung, R. Lee, and S. Chen in Conference Proceedings ULSI XIII, edited by R. Cheung, J. Klein, K. Tsubouchi, M. Murakami, and N. Kobayashi (MRS Proc., 1997), p. 405. A.C. West, C.C. Cheng, and B.C. Baker, J. Electrochem. Soc., 145, 9, p. 3070 (1998). E.K. Yung, L.T. Romankiw, R.C. Alkire, J. Electrochem. Soc., 136, 1, p. 206 (1989). J. Newman and W. Tiedemann, AIChE J., 21, 1, p. 25 (1975). A.J. Bard, L.R. Faulkner, Electrochemical Methods, 1980.

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Figure 1. Cross sectional view of Cu filled vias (diameter -0.25 Rtm, aspect ratio -(8-10): 1).

Figure 2. Cross sectional view of void-free Cu filling of the vertical trenches with dimensions of

0.13 gm width and 8:1 aspect ratio.

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15

EXPERIMENTAL AND NUMERICAL STUDY OF LEVELING OF SUBMICRON FEATURES BY ORGANIC ADDITIVES James J. Kelly and Alan C. West Dept. of Chemical Engineering, Columbia University New York, NY 10027 A leveling study on 200-nm features of a model plating-bath additive package is presented. The complex interactions among the additives are highlighted. Also discussed are simulation results of a theoretical model of leveling agents. The difficulty in developing a first-principles simulation tool that describes the action of leveling agents is emphasized. INTRODUCTION Leveling is important in achieving void-free deposits during copper metallization processes (1,2). Additive mixtures that level have been used successfully on larger scales for packaging applications (3). A mixed-additive system, consisting of chloride ions, polyethylene glycol (PEG), bis-(3-sulfopropyl)-disulfide (SPS), and Janus Green B (JGB), is in many ways representative of commercial systems that have been successfully employed. We discuss the effectiveness of this system, as well as subsets of the system, on a submicron scale. We also outline a theory that has been recently used to simulate the impact of leveling agents on shape change. The theory uses a single-component description, which is in stark contrast to practice. While the theory appears simplistic, the approach apparently captures some observations from experimental shape-change studies (1). In the present paper, no attempt to establish a connection between theory and experiment is made. To date, a protocol that uses fundamental experimental measurements for relating theory to multi-component additive packages (other than curve fits of theory to shapechange experiments) has yet to be described. EXPERIMENTAL To study the leveling of different systems, approximately 1 cm2 of patterned silicon having a copper seed layer served as a substrate for electrodeposition. The feature size investigated was approximately 0.20 ptm wide with an aspect ratio of 3. Copper was 2 deposited at 10 to 20 mA/cm and room temperature from a 0.24 M CuSO 4 and 1.8 M H 2 SO 4 quiescent electrolyte. The composition of the standard electrolyte was always 0.24 M CuSO 4 .5H 20, 1.8 M H 2 SO 4 , 300 mg/L 3350 molecular weight PEG, and 50 mg/L chloride ions (Fisher, Certified ACS). Two additives, bis-(3-sulfopropyl)-disulfide, referred to as SPS (Raschig GmbH, Germany), and Janus Green B, referred to as JGB (Aldrich), were added to this standard electrolyte. Unless otherwise noted, conditions for deposition were 10 mA/cm2 with I mg/L of SPS and JGB.

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After metal deposition, the fragment was cleaved for SEM observation. At least 100 trenches were investigated to ascertain the effectiveness of each additive system. Areas that were damaged during the cleaving process were avoided, and the 100 trenches examined were taken from multiple samples. Profilometer measurements on films produced with different additive mixtures were taken with a Tencor Alpha-step 200 immediately after they were produced to measure the average surface roughness. For each case, the results reported are the average of at least 4 profile scans from two different films prepared under the same conditions. The instrument scanned a horizontal distance of 2.0 mm, sampling every 5 ptm with a height resolution of I nm. Films for profilometry were grown to a nominal thickness of 10 pm at a current density of 10 mA/cm 2. Further details can be found in reference 4. RESULTS AND DISCUSSION Results of the SEM analysis are summarized in figure 1. The percentage of filled trenches varied from approximately 10 to 90, depending on the electrolyte composition. The improved results (relative to PEG and Cl alone) for the electrolyte with PEG, Cl-, and SPS were unexpected since this system performed more poorly on a 100-pim scale (5). Possibly, the average surface roughness of the deposited copper film is more important as the feature size decreases. The average surface roughness, as determined by profilometry, of a 10-micron-thick film deposited from an electrolyte with PEG and Clonly is about 500 inm, while for an electrolyte with PEG, Cl-, and SPS the average roughness is about 240 nm. On a 100-pim scale, this difference may be unimportant. The average surface roughness of a film produced from a bath with all four additives is 80 nm, perhaps contributing to this electrolyte's good leveling effectiveness. These data are consistent with previous leveling experiments on a 100-pm scale in that all four additives appear to provide the best leveling (5). The low percentage of filled features obtained with PEG, Cl-, and JGB (nominally the "leveling agent") is practically significant because it may imply that brighteners (e.g., SPS) are essential even though cosmetic appearance may be unimportant for ULSI copper interconnects. In addition to designing a proper combination of additives, conditions such as additive concentration and applied current density must be optimized to achieve feature filling. The impact of the operating conditions is shown in figure 1 for an electrolyte containing all four additives. For example, at a deposition rate of 15 mA cm , most features are filled; however, at 20 mA cm- , most features displayed voids. The improved filling performance of the electrolyte with 2 mg/L JGB could be explained by the increased inhibition of metal deposition near the trench openings expected with a higher bulk JGB concentration. At still higher JGB concentrations, one may expect leveling to subside as the concentration gradient of the leveling agent inside the trench diminishes. The results shown in Figure I suggest that the trench-filling performance of an electrolyte is strongly dependent on the relative concentrations of different additives, making process control important for wafer processing. The nature of the interactions between these additives that make all four necessary for effective leveling is still unclear.

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THEORY To describe the spatial variations in current density, we assume first-order kinetics in the cupric-ion-concentration c, with inhibition due to the blocking of surface sites by the leveling agent: -i'c,(1l- 0. The surface-coverage 0 of the leveling agent is assumed to follow a Langmuir relationship: 0=

[2]

C2

K+c

2

Furthermore, we assume that the rate of consumption of the leveling agent is given by r.,,o_ = kc0

[31

The consumption can be due, for example, to incorporation of the leveling agent into the deposit or to reduction, with products that subsequently desorb into the electrolyte. The constant kc is most likely a function of electrode potential and would thus vary with i,. As in a past paper (6), we assume that the aspect ratio is sufficiently large that concentration variations in the x-direction are small compared to those in the y-direction. A material balance on copper ions that accounts for the consumption of copper due to deposition on the sidewalls of a trench is: 0=D) D,

8(y)a---

+ 28(y)F

[4]

where 6(y) is the half-width of the trench or the via and is given by a material balance on deposited metal:

at

[5]

= 2pF

A material balance analogous to equation 5 can be derived for the leveling agent:

0 60= (y----aya_ý6(y) _y D,

(y) rc2 .....

[6]

Important dimensionless groups related to the leveling agent that emerge from the

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Electrochemical Society Proceedings Volume 99-9

analysis are ratio of bulk leveling-agent concentration to the adsorption constant L-' and K R =--k~h.

[7]

where h, is the initial feature height, D2 is the leveling agent diffusion coefficient, and k, is a consumption-rate constant of the leveling agent. The group in equation 7 can be viewed as providing an estimate of the penetration of the leveling agent into the feature. When RL, -+ oo, the concentration of leveling agent quickly falls to zero at a short

distance from the trench mouth, and when RLA-+ 0, the leveling agent concentration is constant and equal to the bulk value. A value of RLA slightly less than unity appears to provide the most ideal leveling situation to achieve void-free metallization (7). When RLAis too large or too small, void formation is predicted. A similar group to RLA emerges for the cupric ions. Its magnitude indicates that the cupric-ion concentration inside a feature is relatively uniform, indicating that conformal deposition should be achieved in the absence of leveling agents or imperfections in the seed layer. One possible interpretation of the prediction that as characteristic size decreases deposition becomes conformal is that smaller features are easier to fill. This conclusion is not consistent with industrial experience. Bearing in mind that a wafer contains many features, a predicted conformal deposition rate may not be acceptable due to a random spatial variationin deposition rate. Such variations may result from, among other things, a nonuniform seed layer. Below we discuss a possible method that accounts for such imperfections. We assume that a robust process requires a higher deposition rate at the bottom of the trench. Conformal deposition is not acceptable due to a non-zero standard deviation in the plating rate from that predicted by the deterministic model. The difference in plating rate from the top to bottom must overcome the standard deviation. This randomness may be related to a measured surface roughness of a blanket deposit, which likely depends on additive chemistry, the substrate, and the film thickness. We propose that the initial current distribution can be used to predict process robustness. When the cupric-ion concentration in the trench is uniform, deviations from a conformal deposit are due to spatial nonuniformities in the leveling-agent concentration. The variation in c2 before significant shape change can be used as an estimate of when leveling can be expected. Combining equations 2, 3, 6 and 7, the dimensionless concentration of leveling agent is given by: d

2

2

-2(R, h /L) .IC

2

Electrochemical Society Proceedings Volume 99-9

[8]

19

Figure 2 shows the spatial variation in the surface sites available for copper reduction for various values of RA, assuming c, / K = 9.09. To achieve preferential deposition at the bottom of the feature, one must maintain more free sites (larger I - 0) at the bottom of the trench. However, if coverage 0 --+ 0 at a position near the top of the trench (e.g., RLA > 5 ), the trench is likely to close near this intermediate position. We use a variable relating the current at the top and bottom of a trench: p =-100

tt

[9]

When feature widths are less than 250 nrm, spatial variations of the cupric-ion concentration inside features are negligible. Thus, the leveling agent dictates the current distribution. Figure 3 shows p as a function of R,, for three values of c, / K. To illustrate how figure 3 may be used, we work through an example. We assume for the leveling agent: c2, /K=l0 and R,, = 0.15 when L = 240 nm. SinceR" is proportional to L (holding aspect ratio constant), when L = 100 rnm, RL, = 0.0625 (cf, equation 7). These two points are labeled on the graph. The value of p necessary for a process to be robust may be a function of feature size. Here, it is assumed that robustness requires p > 2

, where a is the average

surface roughness of a blanket deposit of thickness L/2 and is taken in this example to be 40 nm. When L = 240 nm (R, = 0.15), p must be greater than 33 and when L = 100 nm, p must be greater 80. These considerations are the basis for the boundary between a robust and a non-robust process. In the present example, it is assumed that y is independent of film thickness. This assumption should be expected to break down, especially when L/2 < c. Thus, an experimentally determined boundary between a robust and non-robust process may not be linearly proportional to size. For the hypothetical situation considered here, one would conclude that it is not possible to maintain the same chemistry as feature size is reduced from 240 nm to 100 nm. At some intermediate generation in feature size, chemistry with an effectively larger RLA would be required. Possibly, this could be achieved by increasing the bulk concentration of leveling agent. Due to other constraints, one may need to modify the leveling agent to increase kc or decrease D2 . A decrease in D 2 could be achieved by choosing a species with a higher molecular weight but with the same active functional group. Modifying the chemistry to increase k. may also imply an increased replenishment rate of the additive, which could complicate process control.

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Electrochemical Society Proceedings Volume 99-9

DISCUSSION A major challenge that lies ahead is the establishment of an experimental protocol that can obtain the physico-chemical properties (e.g., D 2, k,, and K) required of a mathematical model that describes leveling agent. Such lines of inquiry will likely involve electroanalytical methods, such as electrochemical impedance spectroscopy or cyclic-voltammetric analysis, and may include in situ electrode-surface analyses to corroborate mechanistic hypotheses. Conceivably, a protocol that fits the model directly to shape-change experimental studies can be used. The disadvantage to the latter approach is that it will provide few fundamental insights into the governing phenomena. An approach that instead attempts to measure independently the physico-chemical properties may provide insights that will lead to improved process control and/or improved additive packages. Also, the theory outlined above is based on a single-additive description of leveling. Commercial baths typically use at least four components, and the leveling agent does not work in the absence of the other species. This effect is clearly seen in figure 1, where JGB is not effective unless SPS is present. The ability of a single-additive theory to describe such a complex chemistry has yet to be fully established. The use of a multicomponent additive theory, if necessary, would not introduce any major numerical difficulties, but would require a major experimental program to obtain a sufficient mechanistic understanding. SUMMARY A leveling study of submicron features is consistent with previous experiments on a 100-pm scale in that an electrolyte having all four additives yields the best results. Depending on both current density and JGB concentration, greater than 90% of observed features could be filled. When only two or three of the additives were used, substantially fewer features were filled. Simulations of copper electrodeposition in sub-micron features in the presence of a leveling agent indicate that the formation of void-free deposits requires tight control of the operating conditions. For very small features, primarily one dimensionless group (equation 7) dictates the leveling capability of a process. Results also indicate that as feature size is reduced, the deposition tends to become conformal unless the additive chemistry is modified. It is proposed that conformal deposit is not desirable because random variations in deposition rate will lead to void formation in a statistically significant number of features on a wafer. LIST OF SYMBOLS c

E-2 cý D

3 concentration, mol cm" dimensionless concentration of leveling agent (c2 / c2,) bulk concentration of cupric ions or leveling agent, mol cm-3 2 diffusion coefficient, cm s-I

Electrochemical Society Proceedings Volume 99-9

21

F i ip ho,

t x, y j 8 0 p

Faraday's constant, 96,487 C mol[' eq-1 current density, mA cm 2 current density at the mouth of the feature, mAcm 2 initial height of feature, cm 2 consumption-rate constant, mol cm- s-I 3 adsorption-isotherm constant, mol cminitial width of trench or via, cm difference in plating rate between top and bottom of feature consumption rate of leveling agent dimensionless groups, defined by equation 6 time, sec spatial dimensions, cm dimensionless spatial variable (y/ho) half-width of trench or via opening, cm leveling-agent surface coverage molar density of copper metal, mol cm-3

a

standard deviation in film thickness, cm

k, K L p rcons RLA

Subscripts I 2

cupric ion leveling agent

REFERENCES 1. P. C. Andricacos, C. Uzoh, J. 0. Dukovic, J. Horkans, L. Deligianni, IBM J. Res. Develop., 42, 567 (1998). 2. T. Taylor, T. Ritzdorf, F. Lindberg, B. Carpenter, and M. LeFebvre, Solid State Tech., 47 (November, 1998). 3. H. G. Cruetz, R. M. Stevenson, and E. A. Romanowski, U. S. Patent3,328,273. 4. J. J. Kelly and A. C. West, "Leveling of 200-nm Features by Organic Additives," Electrochem. Solid-State Let., submitted (1999). 5. J. J. Kelly, C. Tian, and A. C. West, "Leveling and Microstructural Effects of Additives for Copper Electrodeposition", J. Electrochem. Soc., submitted, 1998. 6. A. C. West, C.-C. Cheng, and B. C. Baker, J. Electrochem. Soc., 145, 3070 (1998). 7. A. C. West, "Theory of Filling of High-Aspect Ratio Trenches and Vias in Presence of Additives," J. Electrochem. Soc., submitted (1999).

22

Electrochemical Society Proceedings Volume 99-9

100 Z 80

2

standard conditions 2 mg/L JGB 2 15 mA/cm 20 mA/cm

2

60

40

20

0

PEG PEG, C1, PEG, CF, & CI & SPS & JGB

PEG, CF, SPS, & JGB

Figure 1. The percentage of filled trenches (with L = 200 nm, h,= 600 nm) as a function of electrolyte composition. For the bath containing PEG, chloride ions, SPS, and JGB, various operating conditions are shown.

Electrochemical Society Proceedings Volume 99-9

23

1.0 0.8

LA= 0.1

The spatial Figure 2. variation of leveling-agent surface

various

coverage

values

dimensionless

of

R

for

0.6

LA

=

5

L

the

parameter

The curves shown for RLA = 0.1 and I are most desirable to avoid void formation. RLA.

ho/L = 4

-

0.4

c 2 /K 0.2

9.09

RLA = 0.01 RLA = 0.001

0.0 0.0

Figure 3 The percent difference in initial plating rate between

ho/L

1.0

0.8

0,6

0.4

0.2

4

10

150 c 2 ./K

the bottom

and top of a trench in the limit of small features. Also shown is the boundary assum ed between a robust and nonrobust process.

10002"

20

-. ,5

Q,

Robust

50

Not Robust 0 0.00

,

1

0.05

0.15

0.10

0.20

_

0.25

Rol

24

Electrochemical Society Proceedings VoIlume 99-9

A NOVEL ELECTROLYTE COMPOSITION FOR COPPER PLATING IN WAFER METALLIZATION Uziel Landau Chem. Eng. Dept., Case Western Reserve University, Cleveland, OH 44106 John D'Urso and Andrew Lipin L-Chem, Inc, Shaker Heights, OH 44120 Yezdi Dordi, Atif Malik, Michelle Chen and Peter Hey Applied Materials, Inc., Santa Clara, CA 95054 A new copper-plating electrolyte specifically optimized for electroplating interconnects on silicon wafers is described. The copper sulfate based electrolyte differs from conventional copper plating solutions in two main respects: (i) it contains no (or low) sulfuric acid, and (ii) it is based on a high (>0.8 M) copper concentration. Eliminating the acid increases the electrolyte resistivity, thereby mitigating the harmful effects of a thin seed layer on the deposit distribution. The acid removal produces also a significant 'chemical enhancement' of the copper transport rates. Furthermore, reducing the sulfuric acid concentration enhances the copper solubility, enabling a high copper concentration process. This provides high quality copper deposition at high rates under moderate flow. The low-acidity electrolyte also offers significant environmental, safety and handling benefits. Copper electroplating from acidified copper sulfate is a classical technology, dating back to the early 1800's. Today, copper electrodeposition is a major plating processes with important applications in electronics (printed circuits, connectors), steel coating, and in electroforming. Three types of copper plating chemistries are commercially available: copper cyanide, copper pyrophosphate, and acidified copper sulfate. The latter is by far the most popular due to its stability, versatility, minimal environmental impact, and low-cost. Acid copper plating solutions consist of three main components: (i) copper sulfate, typically in the range of 0.2 - 0.6 M, which serves as the copper source, (ii) sufuric acid, typically 1-2 M, with main function of enhancing the electrolyte conductivity, and (iii) various plating additives, typically in the ppm range, that help control the deposit distribution and aid in imparting the desired deposit properties. A major appeal of the acid copper process has been its versatility: essentially one chemistry, with minor variations, may be used in a wide range of applications. Critical to this universal appeal is the ability of the acid copper process to uniforniy plate different, complex shaped parts in multiple cell configurations. This feature is characterized in terms of a high 'throwing power' or a high Wagner (Wa) number' 2 . Since the Wagner

Electrochemical Society Proceedings Volume 99-9

25

number is proportional to the conductivity, conventional sulfate based copper plating formulations specify the use of sulfuric acid as a 'supporting electrolyte' with the main purpose of providing high conductivity, and consequently, a high throwing power. Recently, copper plating has found an important new application in metallizing interconnects on semiconductor wafers 3. Here, a specially designed and dedicated tool is used to plate well-defined disk-shaped silicon wafers. A very uniform copper layer must be electrodeposited with excellent gap-fill properties onto a resistive seed layer through contacts along the circumference of the wafer. The new process poses numerous critical challenges: -

Copper is electroplated onto a thin (100-1 000A), quite resistive copper seed layer Current is fed from the wafer circumference (radial distance of 10 or 15 cm) Extreme deposit thickness uniformity requirements (<1-3%) with minimal (0-5 mm) edge exclusion Complete fill capabilities of sub-micron scale structures (dual damascene) with >1:10 aspect ratios, often with marginal seed layer. Extreme properties requirements for electromigration, conductivity, stress, grainsize, purity, reflectivity, etc. Long-term process stability and robustness Complete process monitoring and control Essentially defect-free performance (over extreme number of parts and features)

Requirements and characteristics of the wafer plating process are significantly different from conventional plating. Table 1 highlights major differences.

Table 1: Comparison between conventional and wafer plating Conventional Plating Process versatility (for different parts and

cell configurations) is important High 'throwing power' (Wagner number) is essential for uniform deposit distribution

Wafer Plating Dedicated and customized process and system

Customized cell design can provide uniform distribution (even in absence of high throwing power)

Supporting electrolyte (typically acid) provides Low conductivity desirable to mitigate the high conductivity (and high 'throwing power') effects of the resistive seed Mass transport - typically not an issue

Plating in vias is influenced by transport

Uniform side-wall coverage of cavities (e.g.

'bottom-up' fill desired

through-holes) is usually sought 'Low tech' is acceptable standard

Extreme 'high-tech' requirements

Moderately priced product

Very costly product

26

Electrochemical Society Proceedings Volume 99-9

As noted, copper electroplating of wafer interconnects poses significant challenges primarily due to the extreme requirements it mandates for uniformity, purity, and process control. On the other hand, it offers, because of its unique characteristics, special design opportunities that call for departure from classical acid copper process parameters. SCALING ANALYSIS OF CURRENT DISTRIBUTION IN WAFER ELECTROPLATING Deposit thickness distribution in wafer electroplating must be considered in terms of two separate scales. (1) Macroscopic distribution, on the wafer scale (cm) and (2) microscopic distribution, on the length scale of the features (microns). Because of the large variation (4-5 orders of magnitude) between the scales, these distributions are controlled by different mechanisms. Furthermore, the design objectives for the two scales are quite different. While it is important to obtain uniform deposit thickness on the wafer scale, a bottom-up fill is desired on the features scale, since uniform deposition leads to the formation a center seam. The Macroscopic (Wafer-Scale) Current Distribution. The parameters that control the macroscopic current distribution (in the absence of substrate resistance) can be represented in terms of the Wagner number, defined by the ratio of the activation resistance of the surface reaction, (Ra), to the electrolyte ohmic resistance, (Rn):

R

Wa = R'

I- ai

K:

[1 [P]

Here, ic is the conductivity; I is the characteristic length and arl/ai is the slope of the polarization line. A large Wagner number is indicative of a uniform macroscopic current distribution since it corresponds to a large activation resistance (which tends to level off the current) and a small ohmic resistance (which is geometry-dependent and usually causes non-uniformities). For the Tafel polarization regime (in which most copper plating is carried out), the Wa number can be expressed in terms of: Wa =

-ýR =-Kb

(for Tafel polarization)

[2]

b is the Tafel slope (= RT/aF) of the polarization curve, and i is the current density. For uniform distribution, a high Wagner number is desired, corresponding to high electrolyte conductivity, low current density, and a high slope of the polarization curve.

Electrochemical Society Proceedings Volume 99-9

27

Accordingly, the uniformity of the current distribution on the macroscopic scale is primarily controlled by: -

cell configuration electrolyte conductivity electrode kinetics (affected by the additives distribution and hence may be influenced by flow) average current density substrate (or seed layer) electrical resistivity

Appropriate cell design, including the application of current shields where required, may compensate for current density non-uniformities even the absence of a high Wa number. To increase the electrode polarization, leveling additives are often incorporated in the bath. Since the additives are present in minute amounts, their distribution across the wafer is typically influenced by the flow. The macroscopic current distribution may also be affected by the seed resistance due to the so called 'terminal effect' as discussed below. The Microscopic (Feature-Scale) Current Distribution In analyzing the current distribution on the feature scale, the characteristic distance, 1, is of the order of a micron, i.e. 5 orders of magnitude smaller than that of the macroscopic scale. As a consequence, the controlling mechanism for the current transport shifts from potential to mass transport control, as discussed earlier by Landau 4 . Relevant conclusions are summarized here. The current is driven by the concentration gradient,VC, and the electric field, Vsl, i = - nFDVC -cV(D

[3]

The relative importance of the two terms can be determined from the dimensionless mass transport to ohmic resistance ratio, dubbed here the Tobias Number, T: R*

K

RT

T=R *-- = nF[4] R*,, I nFi l-/L Clearly, T > 1, corresponds to mass transport dominance. As noted, mass transport gains importance when the limiting current, iL is approached, and, more interestingly, when the length scale, 1, shrinks. The length scale, lent, at which mass transport limitations become more significant than the ohmic resistance is given by: KoRT [5] (for mass transport control) lcu nFiT Applying typical conditions, we find that the critical length below which mass transfer becomes dominant is between 0.01 to 2.5 mm. Clearly, the current distribution within

28

Electrochemical Society Proceedings Volume 99-9

micron-scale features is influenced by mass transport with negligible electric field influence. It should be emphasized that the forgoing analysis compares only the relative importance of mass transport to electric migration. Kinetics resistance, which is not scale-dependent, will typically be the overall dominant resistive mechanism on small scales, prevailing over both the mass transport and the ohmic resistances. Accordingly, on the features scale, the deposition process will be primarily controlled by: - electrode kinetics (affected by the additives distribution) - mass transport (of both reactant and additives) - local (micro-scale) geometry -

local current density

It is no longer meaningful to characterize the microscopic current distribution in terms of the Wa number since the latter incorporates the ohmic resistance as the source for non-uniformity, whereas on the micro-scale the concentration field is more important. Instead, the leveling parameter, L, has been formulated 4 by replacing the ohmic resistance by mass transfer resistance (as the source for non-uniform flux) and comparing it to the kinetic resistance:

*

(W?1/0i

Ra L

-ii

Hit

[6]

=.

._

R* - (tqr /Ii)

ai

C

Since mass transfer (diffusion) resistance is typically geometry-dependent (just like the ohmic resistance), it promotes non-uniform distribution. The activation (kinetics) resistance, on the other hand, is geometry independent and tends to level the distribution. A large value for L (L > > 1) implies, therefore, kinetics resistance dominance with a uniform current distribution on the micro-scale. L may therefore be viewed as a micro-leveling parameter, in analogy with the Wagner number on the macroscopic scale. In order to promote smooth deposits and avoid roughness in plating, one must select processes with low transfer coefficient, a. This is often controlled by the use of appropriate additives that promote polarization. Eq. [36] indicate also that for obtaining smooth deposits, it is beneficial to operate at a low fraction of the limiting current, i/iL i.e. low current density and a high limiting current. Since the limiting current depends on the concentration and on the agitation rate, high reactant concentration and sufficient transport will promote smooth deposition.

Electrochemical Society Proceedings Volume 99-9

29

Controlling the Current Distribution on the Macroscopic and Microscopic Scales Since the current distribution on the macroscopic and microscopic scales is

dominated by different mechanisms, different means must be applied to control it. On -

the wafer (macro-) scale: Uniformity can be provided through hardware design, cell shape, shields, etc. Resistive substrate effects may be mitigated by using low conductivity electrolyte. Flow field for uniform additives and copper transport should be incorporated.

On the Micro (features) scale: -

High transport rate can be provided by high concentration and sufficient flow. 'Bottom up' fill can be achieved through proper selection of additive and control of their distribution: external surfaces and the via side walls should be passivated while the via bottom should remain additive-free, or preferentially adsorb catalytic additives that promote high deposition rate. RESISTIVE SUBSTRATE ('TERMINAL') EFFECT

The seed layer for the copper deposition is thin (typically 500-1000 A) and quite resistive. The current is fed from the circumference (10 to 15 cm radial distances) through relatively narrow contacts. As a consequence, the current tends to concentrate near the circumference as shown in Fig. 1. Obviously, as the deposition proceeds, the resistive substrate effect becomes less pronounced due to build-up of a conductive deposit. However, the initial build-up remains.

Curent density profile 590A Cu seed

,e

4----Contact

(0.34 CQ/cm)

,

Si IS

5-Water

- 50 mA/cm 2 33- 344 mA/cm 2 ,- OM/Anode xJ 0.5S skin

a 5 16 15 2025

35 40 4SS

CUOeslgn 0 sinulation

Fig. 1: Schematic of a wafer plating cell depicting the current feed contact ring (right), and a numerical simulation 5 of the initial current distribution (left), indicating about a 10:1 initial current density ratio between edge (344 mA/cm 2) to center (33 mA/cm 2) under the simulated conditions (acidified copper sulfate electrolyte).

30

Electrochemical Society Proceedings Volume 99-9

The effects of resistive substrates on the current distribution ('terminal effect') has been analyzed in the literature6 '7 . Analytical and numerical solutions have been presented for a number of configurations. The non-uniform distribution stems from the current minimizing its flow through the resistive seed layer, creating a 'short-cut' through the electrolyte and concentrating near the contact. Evidently, if the electrolyte resistance is high (in comparison to the seed resistance) this effect will be minimized. Fig. 2 presents a simplistic analysis based on an equivalent circuit model, illustrating (qualitatively) the effect of various parameters. A voltage balance can be made for parallel current paths (Fig. 2B) through the center of the cell (Ictr) and close to its circumference (ledge). Since the applied voltage, V, is identical for both routes:

V = IcenterReletrolyte+ l'de=

1+

Icenle,

seed lcenfr

lseedRseed

lIedgeRelectcolyte

[7]

Rsed

[8]

Reletro/yte

Obviously, the current near the edge will always be larger than that at the center due to the terminal effect, disregarding here all other sources for non-uniformity ( e.g. cell configuration and additives distribution). In order to minimize this variation, the seed resistivity, R5,d, must be minimized (requiring a thicker seed) and the electrolyte resistance should be maximized. This latter approach has been adapted here.

R

'edge

ine

®D

LiQ (A)

(B)

Fig 2: Schematic equivalent resistive network representation of the resistive substrate effect in wafer plating (A), and a reduced 'minimal' circuit (B).

Electrochemical Society Proceedings Volume 99-9

31

Rationale for a Low-Acidity Electrolyte In order to minimize the resistive substrate ('terminal') effect, which tends to promote thicker deposit near the contacts, the use of a low conductivity electrolyte is particularly beneficial 3. Since the proton mobility (introduced via the sulfuric acid) is about 7 times higher than that of copper or sulfate ions, the most effective means of reducing the conductivity is through lowering, or complete elimination, of the acid. Accordingly, the conductivity of a typical copper sulfate plating electrolyte formulated without sulfuric acid drops by about a factor of 10, from about 0.5 S/cm (in typical copper sulfate with -1-2 M sulfuric acid) to 0.05 S/cm (no acid). This is illustrated in Table 2:

Table 2: Estimated conductivity of acidified and non-acidified copper sulfate electrolyte. Acidified solution contains 1.8 M H2 SO 4 . Copper sulfate concentration is 0.25 M. Dilute solution theory with no interactions is assumed. Conductivity is estimated from: /C= ZAIziC,

Xj [cm 2 /2 eq.]

Species Cut+

54 80 350 50

S04

H+ HS0 4 Total with acid Total without acid

_

Zj [eq./mole]

Cj

2 2 1 1

[millimole/cm3 0.25 0.25 1.8 1.8 ____

....

M]

j [S/cm] [

0.027 0.04 0.63 0.09 0.7870.067-

The estimated conductivities are slightly higher than the actually measured values. The measured conductivity of the 0.25 M CuSO4 t1.8M t12SO 4 electrolyte is 0.55 S/cm, while the non acidified electrolyte measures 0.05 S/cm. The reason for the discrepancy is interaction (incomplete dissociation) of the ionic species that are assumed here to be completely dissociated. Nonetheless, the trends illustrated are valid.

As noted from Table 2, the major contribution (91%) to the conductivity is derived from the acid, and in particular (80%) from the proton due to its high mobility. Analysis and experimental data indicate that by removing the acid, the conductivity drops by about a factor of 10. Conductivity data of various copper sulfate electrolytes acidified to different degrees with sulfuric acid is presented in Fig. 3. As noted, the copper sulfate concentration affects the conductivity only slightly and the major contribution comes from the acid. Interestingly, for the same acid concentration, the lower copper sulfate

32

Electrochernical Society Proceedings Volume 99-9

concentrations correspond to a higher conductivity. This counter intuitive observation is due to the common ion effect. The sulfate ion that is introduced by increasing the copper sulfate concentration shifts the (H÷](HSO 4 -] equilibrium in the direction of decreased free protons. Since the protons have a much higher mobility than all other ions, decreasing their relative concentration reduces the overall conductivity. Conductivity data for acidified copper sulfate electrolytes was analyzed by Hsueh and Newman . Our data is consistently lower (by about 10%), but tracks the reported trend. 0.6 0.5

...

*

0.75 M Cua-

,0.4

"7, 0.3

S•

--

•l

0

•

--

.

.

.. . 1.OM Cu÷+

A

0"

0

0.5

1

1.5

2

2.5

3

S&dfwlc Acdd Corr. (M4 Fig. 3: Conductivity of acidified copper sulfate

Computer Simulations Illustrating the Effects of Process Parameters on the NonUniform Deposit Distribution Due to Resistive Substrate The effect of lowering the bath conductivity on the deposit thickness distribution across the wafer is demonstrated through computer simulations (Fig. 4). A commercially available software package (Cell-Designo)5 was used to simulate the deposit growth. Cell-Design employs a finite element based technique coupled with moving boundaries and a time stepping procedure to simulate the growth. In order to decouple the effects of the process parameters, we consider a perfect cylindrical cell configuration, hence all the non-uniformity in the deposit thickness is due to the resistive substrate effect. As noted, most of the thickness variation occurs at the beginning of the deposition process when the substrate resistance is highest. Clearly, the 'no-acid' electrolyte significantly improves the copper thickness uniformity which in turn leads to better process integration with subsequent CMP steps.

Electrochemical Society Proceedings Volume 99-9

33

[Electric Contact

£Electric Contact AFERSFIF)FI)WAVV

SEFIFI)

PLATED)

P1•LATED)ro,~ 10,)

C•oppler Profile

CoperFinal

Fina

1.8 M1 11.S()1 1I411'Nuis

II~r~fih'

nAi Avid

Cell-Design @ simulations

No acid 1.8 M Sulfuric acid Fig. 4: Computer simulation (Cell-Design©) of copper deposition on a resistive wafer. An axi-symetric cross-section through a 200 mm wafer is shown, with the wafer center on the left and the electrical contact on the right. Current density - 35 mA/cm 2 . Five growth steps, 20 sec. each, are simulated. The darker region is proportional to the deposit thickness (for clarity, the vertical axis has been magnified). Copper kinetics (no additives) are assumed: i0 = I mA/cm 2 ; (xc = 0.5; CLA = 1.5; T = 25°C. Initial seed thickness is I000A. Substrate resistivity is updated with deposit build-up. (Left): 0.24 M CuSO 4 + 1.8 M H 2SO 4 . Deposit thickness range: 1.08 - 1.52 ýt. (34% variation). (Right): 0.85 M CuSO 4 . Deposit thickness range: 1.28 - 1.41 ýt. (9.6% variation).

K

01.55 Q'vnii(1.8 NAcid)

21.3,.

I.z

.U

1.2 I

0

.

'is

RADIAL POBItlON EUM]

Fig. 5: Deposit thickness profile affected by the substrate resistance, as function of the electrolyte conductivity. Simulated by Cell-Designic. All parameters are identical to those of Fig. 4, except that here i-=20 mA/cm2 , and a shorter deposition time was applied (simulations were stopped when center thickness reached I pt).

34

Electrochemical Society Proceedings Vohl~me 99-9

Fig. 5 displays similar data to that shown in Fig. 4 (with lower current density and deposition time), however, only the final deposit profiles are shown, at a greater resolution. Fig. 6 compares the effects of both the initial seed layer thickness and the electrolyte conductivity. As noted, the low conductivity electrolyte mitigates quite effectively the seed layer effects. Whereas large thickness variations are noted for the simulated deposit profiles with the highly conductive electrolyte, the variations for the low conductivity electrolyte are relatively small. Also, relatively little difference is noted between the 500 A and the 1000 A seed.

.

K

A

10 cm 0.55

1500

h14"

C1.3

4,

LI

1,00E+01

1.20E,01

Thickness Ratio

SEED

-1.57

1000

0.55

1.42

500

0.5

.0

12

0OOOE-00 2.OOE.00 k00E.O0

09

6.OOE-00

RADIAL POSITION

8,OOE.00

[CM]

Cell-Design Q simulations

Fig. 6: Effect of initial seed layer thickness and the electrolyte conductivity on the deposit thickness distribution. i = 20 mAlcm2. 200 mmn wafer. Final deposit profile is shown.

Electrochemical Society Proceedings Volume 99-9

35

Fig 7 shows the effect of the current density on the deposit distribution under the influence of a resistive substrate. As expected the distribution is significantly more uniform at low current densities (e.g., 10 mA/cm 2). As the current increases, the non uniformity appears to converge and not much difference is noted between the simulations applying 40 and 60 mA/cm2 .

1.7

..

Current Density 4

1.6

-. ---•

40 mA/cm 2

-----

20 mA/cm 2

I15~ E14

60 mA/cm 2

1.3 1,2

........

'

1.1

0

2

4

6

8

10

10 mA/cm 2

12

RADIAL POSITION (cm]

Cell-Design C simulations

Fig. 7: Effect of the (average) current density on the deposit thickness distribution subject to the resistive substrate effect. Conductivity = 0.55 0 -'cmf' (1.8 M Sulfuric Acid). 200 mm wafer. 1000 A copper seed. Time-step growth simulations

Additional Benefits of the Low-Acid Electrolyte Eliminating or minimizing the acid has a second important beneficial effect. Since the sulfuric acid carries most of the current within the bulk electrolyte, its removal shifts the transport number of the copper ion from about zero to 0.5, thus effectively doubling the copper transport rate (Eq. 9, below). This 'chemically induced' transport enhancement is particularly important for providing adequate copper transport within the blind vias.

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Electrochemical Society Proceedings Volume 99-9

The maximal copper transport rate is given by its limiting (diffusion) current:

[9]

nFDC,

Here, CB is the bulk reactant (copper) concentration, and 8 c is the equivalent, Nernsttype, boundary layer thickness. The transport number for the copper, tc, is defined by: ACU, ZCjCcU 1

Y"~j ZjCj j

Kc, Y,

[10]

KC,, / KC

j

Introducing figures from Table 2, we find: t

cuacid =

KCu

tCNoid

0.027 -

0.787

-

0.03

KCU

K1

0.027

0.027 =0.4 0.067

Accordingly, by eliminating the acid (particularly, the high mobility proton), the transport number of copper increases from close to zero to about 0.4. This corresponds to an increase of the limiting current (Eq. 9) by a factor of about (1-0.03)/(1-0.4) = 1.6. It should be noted that these estimates are based on ideal dilute electrolyte theory. In reality, due to interaction between the ionic species, a somewhat lower (but still very significant) enhancement is observed. In conclusion, the benefits of the low-acid electrolyte are: (i)

Mitigating the effects of the resistive substrate

(ii)

Providing a 'chemical enhancement' to the copper transport rates

Additional, more obvious, benefits of the 'no-acid' electrolyte include: (iii)

The ability to significantly raise the copper concentration without precipitation

(iv)

'Greener', non-toxic, and non-corrosive chemistry

(v)

Lower erosion of the seed layer upon prolonged solution contact.

MASS TRANSPORT ENHANCEMENT A second critical requirement in interconnect metallization is the ability to fill small, nanometer-scale, features (i.e., cavities) rapidly and reliably. Unlike the current distribution on the macroscopic (wafer) scale which is typically controlled by the electric field (and therefore strongly affected by the conductivity), the current distribution on the

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micro- (or via-) scale is dominated by kinetics and mass transport4 . Since the plating additives are present in the electrolyte in minute quantities (PPM range), their transport to the electrode surface is always transport limited. Because flow is absent within the blind vias, the copper is transported there solely by diffusion. Copper depletion at the bottom of the vias due to transport limitations will adversely affect the deposit properties. Typically, if the current density approaches about 80% of the diffusion limiting current, the copper deposit becomes deficient (poor texture) 4 . Clearly it is desirable to enhance the copper transport rates, particularly within the vias. Since higher flow provides only partial transport enhancement (external to the vias), one would want to increase the limiting current (Eq. 9) by other means. As stated earlier, removal of the acid leads to a significant increase (approaching 0.5) in the transport number, t, and to a corresponding increase [proportional to the inverse of (I -t)] in the limiting current. Additional enhancement of copper transport can be realized by increasing its bulk concentration (CB). Copper concentration in conventional plating electrolytes is typically in the range of 0.1 - 0.5 M. Usually, this is sufficient, since transport to large features can be enhanced by flow. However, for plating micron-scale vias, additional enhancement is desirable. It is difficult to maintain a higher copper concentration in a highly acidic electrolyte due to the common ion effect: the presence of sulfate ions originating from the sulfuric acid limits the degree of copper dissociation and its solubility. Hsueh and Newman compiled copper solubility data8 showing that in 2M sulfuric acid, the maximal copper solubility is about 0.75 M. In 4 M sulfuric acid, the copper solubility drops to about 0.5 M. One way of supporting a larger copper solubility is switching to an acid that does not contain (or release) sulfate or bi-sulfate ions. Another method, that is used here, for sustaining a higher copper solubility, is removing or reducing the sulfuric acid concentration. Accordingly, by eliminating the sulfuric acid, a maximal copper solubility of close to 1.4 M can be reached, and a plating solution with a copper concentration in the range of 0.8 - 1.2 M can be maintained. By raising the copper concentration in the bath from its typical range of 0.1 0.5M to e.g., over 0.8 M, an enhanced plating rate (by a factor proportional to the copper concentration ratio) can be sustained under the same external flow, or, maintaining the plating rate, the external flow can be reduced.

CONCLUSIONS A copper-plating electrolyte, specifically optimized for copper metallization of interconnects on silicon wafers is described. The copper sulfate based electrolyte features no (or low) sulfuric acid and a high (>0.8 M) copper concentration. Elimination (or reduction) of the acid increases the electrolyte resistivity, thereby minimizing the

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deleterious effects of a thin seed layer on the deposit thickness uniformity. Eliminating the acid produces also a significant 'chemical enhancement' of the copper transport rates. This is particularly beneficial within the blind vias that are not accessible to external flow. Reducing the sulfuric acid concentration widens also the copper solubility range, enabling a process with higher copper concentration that can not be attained in the presence of sulfuric acid. The high copper concentration is desirable for sustaining a high quality deposition at high rates, particularly within the vias, using moderate flow. Lastly, the low-acidity electrolyte offers significant environmental, safety and handling benefits. LIST OF SYMBOLS b C D F i i0 iL I I L n R R R t T T Wa 0(a,aXc,

8, 71 K

X

Tafel slope, RT/rtF, 3 concentration, mole/cm3 diffusivity, cm 2/sec Faraday's constant, 96487 C/equiv current density, A/cm 2 exchange current density, A/cm2 limiting (diffusion) current, A/cm2 current, A characteristic length, cm micro-leveling parameter, (ratio of activation to mass-transfer resistance) number of electrons transferred in electrode reaction per mole reactant universal gas constant, 8.3143 J/mole-deg resistance, ohm 2 specific resistance, ohm cm transport number absolute temperature, deg K Tobias number (ratio of mass transport to ohmic resistance), dimensionless Wagner number, (ratio of activation to ohmic resistance), dimensionless transfer coefficients, anodic and cathodic, respectively, dimensionless equivalent mass transfer boundary layer thickness (Nernst-type), cm overpotential, V conductivity, S/cm 2 equivalent ionic conductivity, cm r1eq-I

Subscripts a activation (kinetics) avg average B bulk c mass transport crit critical 0 ohmic

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REFERENCES 1. H. E. Haring and W. Blum, Trans. Electrochem. Soc. 44, 313 (1923) 2. T. P. Hoar and J. H. Agar, Disc. Faraday Soc. 1,162 (1947) 3. P.C. Andricacos, C. Uzoh, J. 0. Dukovic, J. Horkans and H. Deligianni, IBM J of Res. and Dev. 42(5), pp. 567-574, September, 1998. 4. Uziel Landau, Proceedings of the D. N. Bennion Mem. Symp., R. E. White and J. Newman, Eds., The Electrochemical Society Proceedings Volume 94-9, 1994. 5. CELL-DESIGN®, Computer Aided Design and Simulation of Electrochemical Cells, L-Chem, Inc. 13909 Larchmere Blvd. Shaker Heights, OH 44120 6. C. W. Tobias and R. Wijsman, J. Electrochem. Soc. 100, 450 (1953). 7. 0. Lanzi and U. Landau, ibid., 137, 1139-1143 (1990). 8. L. Hsueh and J. Newman, UCRL Report 18597, 1968

ACKNOWLEDGMENT We are grateful to Mark Bubnick for his help in experimental aspects of this project.

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STM STUDIES OF HALIDE ADSORPTION ON Cu(100), Cu(1 10) AND Cu(l 11) T.P. Moffat Materials Science and Engineering Laboratory National Institute of Standards and Technology Gaithersburg, Md 20899 ABSTRACT The potential dependent adsorption of chloride and bromide on the three low index copper surfaces has been examined with voltammetry and STM. At saturation coverage, ordered halide adlayers are observed on all three surfaces; (ý2 x .2)R450 CI / Cu(100), (C2x 4/2)R450 Br / Cu(100), (3x2) Br / Cu(1 10), c(p x 4/3R300) CI / Cu(1 11). The adlayers lead to step faceting and in certain cases step bunching. The adlayer floats on the surface during metal deposition acting as template guiding step flow. At negative potentials various phase transitions occur coincident with the partial desorption of halide, which lead to significant changes in the mesocopic surface structure. Initial experiments indicate that modulation of the potential in the range of the order-disorder transition has a significant impact on the morphological evolution during copper deposition. The significance of halide adsorption on copper additive plating is briefly discussed. INTRODUCTION The surface chemistry of copper is topic of long standing scientific and technological interest. Currently, the subject is undergoing a renaissance due to advent of new structural and spectroscopic tools for in-situ analysis and the development of processes such as chemical-mechanical polishing and electrodeposition of copper for device metallization. Copper is also being used as a key structural element in ultrathin magnetic devices such as spin valves. Clearly, as the tolerances required for engineering structures on this length scale diminish, knowledge of the atomistic mechanisms relevant to the synthesis will be necessary. In this paper, some of the remarkable effects of halide adsorption on Cu(100), Cu(1 10) and Cu(1 11) will be described. EXPERIMENTAL Copper single crystals were cut from 2.5 cm diameter boule and aligned using Laue X-ray diffraction. The crystals were then progressively polished to a 0.1 gtm diamond finish followed by electropolishing in 85 vol percent (v/o) orthophosphoric acid at 1.6 V versus a large platinum wire mesh electrode. The voltammetric and STM experiments were performed in 0.01 mol/L HC1O 4 into which 0.001 mol/L KCI or KBr were added. A few experiments were also performed in 0.01 mol/L H2 SO 4 . The electrolytes were deaerated prior to use and all potentials are referenced to the saturated calomel electrode. STM experiments were performed using a Molecular Imaging scanning probe microscope. Tungsten tunneling probes were fabricated by etching in 1 mol/L KOH followed by coating with polyethylene in order to minimize faradaic background currents. The sample chamber and electrolytes were purged with argon before each experiment. A copper wire was used as a quasi reference electrode in the STM experiments. RESULTS AND DISCUSSION The voltammetric behavior of three low index Cu crystals in the presence of chloride is presented in Fig. 1. Copper dissolution occurs above -0.1 V while the onset of

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hydrogen evolution occurs below -0.7 V. Experiments performed in the absence of halide indicate that the redox waves shown in Fig. 1 must be associated with chloride adsorption. The irreversible nature, i.e. separation of the oxidation and reduction waves, of the adsorption process on Cu(l 11) is in strong contrast to the reversible response observed for Cu(100), while a degree of irreversibility is apparent on Cu(l 10). At potentials close to the equilibrium potential of the Cu/Cu÷ reaction a saturation coverage of chloride is anticipated due to the negative pzc values reported for all three surfaces as summarized in Table 1 [17]. A list of adlayer structures which have been reported in both UHV and electrolyte emersion and in-situ studies [8-24] is presented in Table 2 along with the charge that would accompany the halide adsorption process. Cu + Cl- -> CuClad + eCu(_.11): Slow scan rate voltammetry reveals that the desorption wave shown in Fig. 1 is actually the superposition of catalyzed proton or water reduction with chloride desorption. Integration of the adsorption wave yields - 0.122 mC/cm 2 which corresponds well to the formation of a compressed (x'/3 x x'",3)R30o or c(p x q3)R30° type adlayer structure listed in Table 2. As shown in Fig. 2, STM experiments are consistent with the c(p x "13)R30° assignment [20, 23]. Images of surface steps reveal substantial mobility and the absence of step bunching. Several analytical treatments are available for quantifying terrace width fluctuations in terms of the step and kink energy [25-28]. As shown in Fig. 3, the saturated adlayer forms by electrocompression as the potential is increased from -0.441 V to -0.298 V, in qualitative agreement with a recent emersion LEED study [23]. The adlayer structure is also observed to exert a significant influence on step dynamics and orientation. Under certain conditions, the adlayer tends to bias the steps toward the <211> direction with the strength of this interaction being correlated with the close packed direction of the compressed adlayer [ 16]. The irreversible voltammetric response observed for chloride adsorption on Cu(l 11) has also been observed for bromide and sulfate adsorption as shown in Fig. 4. This is a strong indication that the kinetic restraint associated with the adsorption in these systems is of a similar origin. In the case of sulfate solutions, STM studies reveal an ordered adlayer with a short-range order analogous to that observed on other (11) fcc surfaces [29-31 ]. In addition, a long range Moire pattern was observed which was ascribed to superposition of the incommensurate adsorbate superstructure with the underlying copper substrate which itself may be reconstructed [30-3 11. Significant mass transport of copper atoms which accompanies the formation of the ordered sulfate adlayer was interpreted in terms of sulfate/water adlayer driven reconstruction of Cu( 111) which results in the excess copper adatoms condensing as islands on top of the reconstructed layer [311]. In the case of chloride solutions limited evidence for such rearrangement is available. This may be due to either a change in the mechanism or an enhancement of surface mobility induced by adsorbed halide in combination with the high step density of the miscut surface, which results in the formation of a minimal density of islands. These observations are analogous to the respective effect of sulfate and iodide adsorption on morphological evolution during the lifting of the reconstruction of Au(100) electrodes [32]. Cu(_00): In comparison to Cu(111), it is clear from Fig. 1 that the desorption charge prior to the onset of hydrogen evolution amounts to far less than a monolayer equivalent charge. At potentials above - -0.300 V the surface is covered by a (42 x q12)R45O chloride adlayer as shown in Fig. 5, while at slightly more negative potentials an order-disorder transition occurs that is accompanied by the desorption of less than 0.006 mC/cm 2 (i.e. the first desorption wave in Fig. 7). The (/2 x q12)R45o adlayer leads to step faceting in the <100> direction. This corresponds to the close packed direction of the adlayer which stabilizes the

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underlying kink saturated metal steps. In previous work the adlayer has been shown to float on the surface during metal deposition thereby acting as template guiding step flow [17-22]. In contrast to halide-saturated Cu(I 11), significant step bunching is apparent on the Cu(100). Moving the potential towards more negative values leads to the orderdisorder transition which results in significant rearrangement of the surface as the kinksaturated metal steps are destabilized as shown in Fig. 6. [18-22]. The symmetric nature of the adsorption-desorption process persists up to sweep rates of 1V/s which reflects the rapid kinetics of the adsorption and ordering process. Integration of the voltammetry reveals incomplete desorption of chloride prior to the onset of proton reduction which is congruent with the more negative pzc of Cu(100) compared to Cu(l 11). Similar voltammetry is observed for bromide solutions although the order-disorder transition is displaced toward more negative potentials, -0.420 V, consistent with the relative strength of copper-halide interactions [33]. In contrast to Cu( 11t), no clear evidence of sulfate adsorption processes is evident from either voltmammetry or STM. In contrast, a reversible adsorption process centered at -0.2 V has been observed in perchloric acid solutions, as shown in Fig 7. Cu( t10): An adsorption process is apparent between -0.290 and -0.40 V (Fig. 1) which consumes 0.050 mC/cm 2 . As shown in Fig. 8 the peaks shift -0.061 V/decade with chloride concentration which reflects the Esin-Markov effect. At potentials below the -0.310 V STM reveals the (110) terraces to be elongated with steps faceted in the <100> direction, i.e. orthogonal to the close packed <110> of the metal lattice. As the potential is moved toward more positive potentials a faceting transition occurs where the chloride covered terraces undergo a reconstruction, as shown Fig. 9. In the case of bromide solutions two adsorption processes are apparent as shown in Fig. 10. Integrating the desorption wave at -0.6 V yields a charge of 0.030 mC/cm 2 while the smaller wave at -0.4 V corresponds to 0.002 mC/cm 2 . Imaging the surface at -0.x V revealed an ordered (3x2) adlayer corresponding to a saturation coverage of bromide. The wave at -0.4 V appears to correlate to a step faceting transition where the steps move away from the <100> direction. This transition may be related to deviation from a (3x2) to a c(p x2) structure which subsequently gives way to c(2x2) structure at -0.6 V. This interpretation is in good agreement with the charge derived from the voltmmetric data (see Table 1). It is interesting to consider the packing density of halide on the (110) surface in comparison to the van der Waals diameter of the respect halide ions. The nearest neighbor distance of a compact (3x2) structure corresponds to 0.383 nm while the van der Waals diameter of bromide and chloride are reported to lie in the range of 0.39 nm and 0.36 nm respectively [14]. Thus, the (3x2) bromide structure corresponds to saturation coverage based on a close packed layer while in the case of chloride an increase in the coverage and compression beyond the (3x2) structure is possible and this results in either reconstruction of the (110) terrace or perhaps a faceting transition to a (n 10) orientation. Further work is necessary to clarify this issue. Surfactant-Assisted Epitaxial Growth: During the last decade, surface science studies of metal on metal homoepitaxial and heteroepitaxial deposition have begun examining the influence of "surfactants" on the mode of film growth. Roughness evolution is often correlated to the relative rate of inter- versus intralyer surface transport. The barrier to interlayer transport, the Ehrlich-Schwoebel or step edge barrier, is known to be sensitive to adsorbates and step structure, e.g. kink density [34]. In the case of electrodeposition the surfactant coverage and structure may be easily manipulated by potential control. For example, as noted earlier, the (qI2 x'/2)R45° chloride adlayer that forms on Cu(100) acts a template guiding step flow in the <100> direction [17-22). Significant step bunching is also

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apparent in this system. However, modulating the potential through the order-disorder transition leads to significant rearrangement of the surface as the kink-saturated metal step are repetitively organized and destabilized as indicated in Fig. 6 [18-221. Thus, cycling the potential leads to oscillation in the kink density and the step edge barrier height. Furthermore, previous work has indicated that the terrace adatom population also cycles with the step faceting transition [19, 20]. In order to assess the efficacy of utilizing these transitions to alter roughness evolution during film growth, a manipulated growth scheme has been implemented whereby the electrode potential is modulated to reversibly order and disorder the halide adlayer in the presence of a copper deposition flux. Our preliminary experiments involved examining the roughness of a variety electrodeposited copper films grown on (100)-oriented copper seed-layers on Si(100) [35]. The films were grown under transport control from an electrolyte containing 0,1 M HCIO 4 , 0.001 M CuC10 4 and 10 x 10-6 M KC1. Copper films, 500 nm thick, were deposited under potentiostatic control in a regime where either the ordered or disordered halide adlayer phase exists on the surface. In both cases the resulting films were optically rough. In contrast, when the potential was modulated at 2 Hz between the two potential regimes a near specular film was obtained as shown in Fig. 11. Although these initial results were obtained for very slow growth rates, it is likely that some of the underlying phenomena described may already have manifested themselves in certain pulse plating operations. The Role of Halide in Additive Plating: It is well known that small amounts of organic additives in copper sulfate baths have a significant effect on deposit characteristics such as brightness, grain size, hardness, ductility, conductivity and internal stress. Organic compounds containing sulfur, nitrogen or oxygen functional groups are known to brighten copper deposits, however it is generally noted that chloride additions - 10-2 - 10-4 mol/L are necessary in order to obtain bright deposits with good mechanical properties [36, 37]. At potentials typically associated with copper deposition, ordered halide adlayers form spontaneously and segregate or float on the surface during film growth. It is reasonable to surmise that the strong electrosorption of halide limits the incorporation of the organic species which otherwise are known to lead to marked deterioration of the mechanical properties [37]. In the case of additive plating baths, e.g. polyether-sulfide-chloride electrolytes, the deposition rate is significantly inhibited relative to deposition from a simple acid copper sulfate electrolyte [36]. The inhibition is clearly due to some interaction between the halide overlayer and the organic molecules. Interestingly, STM studies of the adsorption of organic molecules on a gold electrode indicate that the formation of wellordered organic monolayer films is mediated by an adsorbed iodide layer [38-41]. Physically this was attributed to a change in the hydrophilicity of the surface which favors the adsorption of hydrophobic species Additional work revealed that the geometry of the halide layer also exerts a significant influence on the packing of the molecules [41]. Thus, it is anticipated that the ordered chloride adlayers formed on immersed copper surfaces facilitate the formation of a well ordered organic layer which inhibits copper deposition. The blocking nature of this organic overlayer may be subsequently disrupted at more negative potentials where the halide layer becomes mobile due to an order-disorder or some other phase transition. Favorable evidence for such a sharp transition is provided by a study of the effect of chloride and polyethylene glycol (PEG) on the polarization of copper [36]. A critical transition in the polarization curve was observed at negative potentials. The critical potential exhibited a -70 mV/decade dependence on chloride concentration. This is close to the -61 mV/dec dependence shown in Fig. 8 and ascribed to the Esin-Markov effect. Furthermore, the sharp transition in the polarization curve is consistent with the critical nature of the order-disorder adsorption phenomenon observed for Cu(100). Future work will address this issue in more detail.

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CONCLUSIONS A variety of ordered halide adlayers are observed on the three low index crystal faces of copper: ('12 x '12)R45 CI/Cu(100), ('12 x '12)R45Br/Cu(100), (3x2)Br/Cu(1 10), c(p x ",3R30)CI/Cu(1 11). These layers exert a strong influence on step orientation and dynamics. At small overpotentials for copper deposition the ordered halide adlayers float on the surface guiding metal deposition. At more negative potentials the adlayers undergo a variety of structural transitions associated with progressive desorption of halide. Order-disorder transitions which accompany the desorption reaction lead to significant rearrangement of the mesocopic structure of the surface. These potential dependent transitions may be used to influence roughness evolution during film growth and in fact may be at least partly responsible for some of the effects previously reported from pulse plating experiments. Finally, it is likely that the potential driven structural transitions in the halide layers are intimately associated with the inhibition and breakdown effects associated with organic molecules used in additive plating. REFERENCES 1. J. Lecoeur and J.P. Bellier, Electrochimica Acta, 30, 1027 (1985). 2. H. Hennig and V.V. Batrakov, Elektrokhimiya 15, 1833 (1979). 3. M.L. Foresti, G. Pezzatini and M. Innocenti, J. Electroanal.Chem, 434, 191 (1997). 4. W. Schmickler, in Structure of Electrified Interfaces, ed. J. Lipkowski and P.N. Ross, VCH Publishers, N.Y., N.Y. (1993). 5. K. Giessen, F. Hage, J. Himpsel, J.H. Riess and W. Steinmann, Phys. Rev.Lett., 55, 300 (1985). 6. P.O. Gartland, S. Berge, B.J. Lagsvold, Phys. Rev Lett., 28, 738 (1972) 7. G.A. Hass, R.E. Thomas, J. Apple. Phys., 42, 86 (1977). 8. C.B. Ehlers, I. Villegas and J.L. Stickney, J. Electroanal. Chem., 284, 403 (1990). 9. I. Villegas, C.B. Ehlers and J.L. Stickney, J. Electrochem. Soc., 137, 3143 (1990). 10. J.L. Stickney, I. Villegas and C.B. Ehlers, J.Am. Chem.Soc., 137, 6474 (1989). 11. J.L. Stickney, C.B. Ehlers, and B.W. Gregory, Langmuir, 4, 1368 (1988). 12. K. Motai, T. Hashizume, H. Lu, D. Jeon, T. Sakurai and H. Pickering, Appl. Surf. Sci., 67, 246 (1993) 13. P.J. Goddard and R.M. Lambert, Surf. Sci., 67, 180 (1977). 14. R.G. Jones and M. Kadodwala, Surf. Sci., 370, L219 (1997). 15. K. Bange, R. Dohl, D.E. Grider and J.K. Sass, Vacuum, 33, 757 (1983). 16. D.W. Suggs and A.J. Bard, J. Amer. Chem. Soc., 116, 10725 (1994). 17. D.W. Suggs and A.J. Bard, J. Phys. Chem., 99, 8351 (1995). 18. T.P. Moffat, in Nanostructured Materials in Electrochemistry, eds. P. Searson and J. Meyer, PV 95-8, p. 225-237, The Electrochemical Society, Inc., Pennington, NJ (1995). 19. T.P. Moffat, Materials Research Society Symposium V404, pg. 3, Pittsburgh, PA (1996). 20. T.P. Moffat, Materials Research Society Symposium V451, pg. 75, Pittsburgh, PA (1997). 21. M.R. Vogt, F. Moller, C.M. Schilz, O.M. Magnussen and R.J. Behm, Surf. Sci., 367, L33, (1996). 22. M.R. Vogt, A. Lachenwitzer, OM. Magnussen and R.J. Behm, Surf. Sci., 399, 49, (1998). 23. J. Inukai, Y. Osawa and K. Itaya, J.Phys. Chem. B., 102, 10034 (1998). 24. M. Krufts, B. Wohlmann, C. Stuhlmann and K. Wandelt, Surf. Sci., 377-379 (1997).

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25. 26. 27. 28.

E.D. Williams, Surf. Sci., 299/300, 502 (1994) M. Giesen, Surf. Sci., 370, 55 (1997). M. Giesen-Seibert, F. Schmitz, R. Jentjens, and H. Ibach, Surf. Sci., 329, 47 (1995). M. Giesen, M. Dietterle, D. Stapel, H. Ibach and D. Kolb, Surf. Sci., 384, 168 (1997). 29. M. Wilms, P. Broekmann, M. Kruft, Z. Park, C. Stuhlmann and K. Wandelt, Surf. Sci., 402, 83 (1998).. 30. W. Li and R.J. Nichols, J. Electroanal. Chem., 456, 153 (1998). 31. M. Wilms, P. Broekmann, C. Stuhlmann, K. Wandelt, Surf. Sci., 416, 121 (1998). 32. X. Gao and M. Weaver, J.Phys. Chem., 97, 8685 (1993). 33. C.Y. Nakakura, V.M. Phanse and E.I. Altman, Surf. Sci., 370, L149 (1997). 34. Z. Zhang and M.G. Lagally, Science, 276, 377 (1997). 35. M. Shima, L. Salamanca-Riba, T.P. Moffat, R.D. McMichael and L.J. Swartzendruber, J.Appl.Phys., 84, 1504 (1998). 36. M.R.H. Hill and G.T. Rogers, J. Electroanal. Chem., 86, 179 (1978). 37. D. Anderson, R. Haak, C. Ogden, D. Tench, and J. White, J. Apple. Electrochem., 15, 631 (1985). 38. M. Kunitake, N. Batina and K. Itaya, Langmuir, 11, 2337 (1995). 39. N. Batina, M. Kunitake and K. Itaya, J. Electroanal. Chem., 405, 245 (1996). 40. K. Ogaki, N. Batina, M. Kunitake and K. Itaya, J.Phys. Chem., 100, 7185 (1996). 41. K. Sashikata, T. Sugata, M. Sugimasa and K. Itaya, Langmuir, 14, 2896 (1998). Table 1 Published pzc and Work Function Data Face

(111) (100) (110)

46

pzc [1, 2, 3] (SCE) -0.451 -0.81

-0.572 -0.63 -0.7 -0.8 -0.87 -0.93±0.01

D [4-7] (eV) 4.635 4.946 4.987 4.45 4.40

4.59 4.48

4.83 4.45

Electrochemical Society Proceedings Volume 99-9

Table 2 Chlorine Strutures and Coverages: Ideal and Experimental [8-24] 2 Cu atoms/cm

Surface

Cl Structure

CI coverage

Charge (MEQ)*

dnn

(z=1) mC/cm2

(nm)

0.123

0.362

0.094 0.111 0.119 0.125 0.128

0.450 0.409 0.398 0.393 0.386

0.087 0.114

0.511 0.383

(100)

1.53 x 1015

(42 x 42)R450

(111)

1.77 x 1015

(110)

1.08 x 1015

(,3 x 43)R300 0.33 (123 x 12 /3)R300 0.39 (9M3 x943)R300 0.42 (4q7 x 447)R19.20 0.44 (643 x 6/3)R300 0.45 3.0 > p >2.5 c(p x /3R-30°) c(2x2) 0.5 (3 x 2) 0.66

*

0.5

MEQ - monolayer equivalent charge

Halogen van der Waals diameter [ 14] Cl Br I

0.36 nm 0.39nm 0.44 nm

150

.... .. ... ..

100

i

Cu(lOO)

50 S

.

...

. cu(11I)

/.

...... ........

o-50

10 -150

•

-200M

0 0

-250

-1

.

. ... . -0.8 -0.6

HO, 0+001 MCl

100 mVIs

-0.4

-0.2

0

-

Potential V(SCE) Fig. 1. Voltammetry for the three low index copper surfaces in the presence of chloride.

Fig. 2. STM image of c(p x43)R300 chloride adlayer on Cu(1 11) at 0.25 V. (6.7 nm x 6.7 nm)

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Fig. 3. STM image showing the electrocompression of the c(pxxi3)R30o adlayer on 200 Cu(l 11). As the potential is swept in the positive direction from yI = -0.441 to E 100 Y2 = -0.298 V compression of the adlayer is appearent. (6.9 nm x 6.9 nm)0

/ 7. ..

a 10 C

toM/

a)

-20

/

,., /

•"

-- - - -o.oiMHCSO,+ ....

0.01 M H,SO,

I

-300 -1

-0.8

-0.4 -0,6 Potential V(SCE)

I

-0.2

Fig. 4. Influence of anions on the voltammetry of Cu( 111) in perchloric acid.

Fig. 5. STM image (12.5 nm x 12.5 nm) of (,2 xq2)R450 chloride adlayer on Cu(100)

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0

Fig. 6. A.) Formation of the 42 x4/2)R45o chloride structures at -0.096 V leads to rapid step faceting in the <100> direction. B.) When the potential is shifted to more negative values, -0.649 V, an order-disorder transition occurs and the kink saturated metal steps move rapidly to <110> direction in order to minimize the kink density. C., D.) the •I2 x412)R45° chloride structure forms and the mesocopic structure coarsens rapidly when the potential is stepped back to more positive potentials, -0.096 V. (39 nm x 39 nm).

Electrochemical Society Proceedings Volume 99-9

49

30

u(100) O

¶ 20

lOmWS

.........

-0.24

-

"~I M HM,

IM•aO*,=0~1U0 .-

ý I&eHC0) + OKI 0.01 ... HcIO ÷ ,,to0.K•

20mV/P

0.26

10 -0.26

.......

......... i

-0.3

-20

-0.32

-30 f ..... '..... I .... ..... '. .... ..... -0.6 -0.7 -0.8 -0.5 -0.4 -0.3 -0.2 -0.1 0 Potential V(SCE)

-0.34

L

Fig. 7. Influence of anions on the voltammetry of Cu(100).

A

101 10" Chloride Concentration (tnoolL)

Fig. 8. The dependence of the peak potential of the faceting transition on chloride concentration. Assuming the transition occurs at a fixed charge, the slope -0.061 V/dec is proportional to the EsinMarkov coefficient.

B

Fig. 9. STM image revealing the faceting transition between (110) terraces and a (nlO) like structure as the potential is swept between A.) -0.395 V and B.) -0.194 V. (74 nm x 74 nm)

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0.

. . . . .. . . . . . . . 0.01 M HClO + 0.001 M KB, 100nV/o

0.02

S-0,02 U

-0.04

C(2)) 70, disordered Or adlayer

I

c(p x2)

.

-0.06 - ... . . . . .., . -0.8 -0.7 -0.6 -0.5 -0.4

(3x2)

-0.3

. -0.2

I -0.1

Potenlial V(SCE)

Fig. 10. Voltammetry of bromide adsorption on Cu( 110). The voltammogram is featureless in the absence of halide.

at -0.1 ML/s from 0.1 M HC10

4 +

0.001 M Cu(C10 4)2 + 0.00001 KCI.

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A MODEL OF SUPERFILLING IN DAMASCENE ELECTROPLATING H. Deligiannia, J. 0. Dukovica, P. C. Andricacosaand E. G. Waltonb, aIBM,T.J. Watson Research CenterP.0. Box 218, Yorktown Heights, N.Y 10598

bIBM Microelectronics,1000 River Road, Essex Junction, Burlington, VT 05452

ABSTRACT We describe modeling results of shape evolution of single Damascene features used in electroplating of on-chip interconnects. The model that predicts superfilling was first described in reference (1). The rate of copper electrodeposition contains an expression which gives the level of copper inhibition based on the additive diffusion, adsorption and reaction to the surface. A comparison of experimental partial fill with the model, results in extraction of values for two parameters used in the inhibition factor. The parameters have been further used to predict shape evolution profiles in lines with 0.2 micron width and aspect ratio 2 and 5 and in vias with aspect ratios of 4. In vias with aspect ratio of 4, the copper is being depleted to 85% from its original bulk concentration resulting in voiding. Ways to eliminate voiding in high-aspect ratio vias are discussed. The model also predicts the local additive flux along the feature wall at each timestep. INTRODUCTION Electroplating in Damascene structures has been used at IBM to produce on-chip copper interconnects (2). Additives, compounds added to the plating solution to improve deposit properties, induce a behavior we call "superfilling" in which deposition rates are higher at bottoms and sidewalls of trenches and vias than at shoulders. A more specific definition of superfilling can be derived from Figure 1 which shows the predicted shape evolution of electroplated copper within a trench. Superfilling can be understood by comparing deposition rates at different points along the feature profile, as shown in Figure 1. If we consider point A on the feature sidewall at distance about one fifth from the feature top surface and point B at a distance on the sidewall two fifths from the bottom wall, then the plating rate difference between B and A is defined as superfilling. At each timestep, the higher the difference in thickness between these two point, the better the tendency of the plating solution to superfill Damascene structures. This point is explained qualitatively in reference (3). Our model has the quantitative capability to predict the superfilling behavior and also the capability to predict conditions for which superfilling breaks down and voiding occurs for both trenches and vias. The essence of the model lies in the assumption that the rate constant for electrodeposition, t., is higher at point B than at point A due to differential inhibition. The surface concentration of adsorbate species varies along the feature because it is influenced by the diffusive transport of the additive/inhibitor. Diffusion is sustained because the additive is consumed at the surface by reaction or incorporation into the deposit. It is assumed that the kinetic inhibition is a function of the additive flux and so the

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Electrochemical Society Proceedings Volume 99-9

rate constant of electrodeposition is multiplied by an inhibition factor V/, monotonically with the addtive flux Cj' .

which varies

We describe below the basic equations of the model and simulation results in both trenches and vias. MATHEMATICAL MODEL The following system of equations was solved. All equations are in dimensionless form: 2 V*7 I, = 0

potential in the electrolyte [1]

V*2 CM = 0

cupric ion concentration [2]

V 2 CA* = 0

additive concentration [3]

At the wafer surface we have the following boundary conditions:

Cjt =0

[4]

C*=ShD*

[5]

(*'= kvIC'Y-'ace"a

copper electrodeposition rate

[6]

1

where V/=

I 1l+bCj'A

b =Ktevy, , (DACAL C-DCA L

inhibition function

[7]

.) 'V

f

[8]

=nFDMCM

[9]

S

Parameter b is a function of the physical properties of the additive and of the inhibition constant Kiev. The exponent p was introduced arbitrarily to widen the range of fluxes over which inhibition occurs and obtain rounding of interior comers. It was determined necessary to have an exponent less than one to obtain rounded comers of the deposited copper profiles.

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We will discuss results of a numerical model that represent the shape-evolution behavior of the system. Deposit profiles within high aspect-ratio lines and vias are presented. The model predicts a different filling behavior in lines than in vias. The local additive flux along the feature sidewall, as well as the inhibition function, give useful insight into the mechanism of superfilling.

RESULTS Figure 2 on the left shows an experimental result of copper plating in a single Damascene line using proprietary additives. The line width is 1.62 um and the trench height is 1.54 pm. Deposition was interrupted before complete filling was achieved to assess the shape of deposited copper. Figure 2 on the right shows the comparison of the experimental profile (dashed line) with the shape of copper predicted by the model (solid line). The match between experiment and simulation is very good when the values for a, b=3.16 and p=0.25 where used in the inhibition function. The parameters WaT, Sh, y + -n were determined from process conditions or were taken from the literature. The effect of aspect ratio on superfilling and shape of the deposited copper is shown in Figure 3. On the right, the profile evolution in a 0.2 pm trench with aspect ratio of 2 (i.e. the insulator thickness is 0.4 pm) is shown. Figure 3 on the left shows the deposited copper profile in a 0.2 pm trench but with aspect ratio of 5. The parameters used for these simulations are b=17.8 and p=0. 2 5. Both trenches fill well without voids or seams. However, the line with AR of 5 fills up more abruptly than the line with AR of 2 which fills up more sequentially. There is always a timestep in the high aspect ratio trench after which, the line fills from the bottom up. Also, as expected, the shape evolving in the AR of 2 line is more rounded than the shape of copper deposited in the AR of 5 line. Figure 4 demonstrates the difference in the shape of the deposited copper when different values are chosen for b. On the left hand side, a value of b-56 was chosen which gives a high degree of superfilling and very rounded profiles. On the right hand side, a value of b-3 was used. These values of b and p generate rectangular comers and a microtrench at the centerline of the feature because of the rapid growth of the sidewalls. Filling of vias is a lot more difficult than filling of trenches. The main reason relies in the restricted nature of the via geometry and or of the shape of the evolving profile that promotes depletion of the cupric ion in solution and generates an appreciable concentration overpotential. It is because of the concentration overpotential due to the depletion of the cupric ion that Figure 5a shows a void in the copper deposit which is located at the lower 1/4 of the via centerline. The void appears because the cupric ion concentration is severely depleted to 85% of its original bulk value. The depletion of cupric ion primarily occurs in the location of the void. Figure 5a shows a via with AR of 4 and width of 0.2 pm. One way to obtain good fill of these type of vias, is to relieve the concentration overpotential by increasing the bulk concentration of cupric ion or by increasing the overall agitation to thin down the diffusion layer thickness or by decreasing the superficial current density. Figure 5b shows that good fill can be obtained when the bulk concentration of cupric ion is increased fourfold. Figure 5c shows that by choosing a

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different bath chemistry with higher b parameter, i.e. b=17.8 and p=0.25, a 0.2/um x 0.8 ,um via can be filled reliably without a void or a seam. A plot of the inhibition function, / ,as a function of the local additive flux as calculated by the simulation is presented in Figure 6. This function has the value of 1 when there is no inhibition in the copper electrodeposition rate and is typically between 0 and 1 when differential inhibition results in superfilling. The inhibition function reaches asymptotically a constant value when the inhibitor has reached saturation. For b=10 and p--0.5, there is a few orders of magnitude of additive flux for which the inhibition function is 1 and only a short range of useful fluxes for which the inhibition function is between 0 and 1. For b=3.16 and p=0.25 there is a wider range of useful additive fluxes, and as b increases to higher values the useful range of fluxes becomes several orders of magnitude. For example, for b=56.2 and p--0.25, the inhibition function curve has several orders of magnitude of useful fluxes at which inhibition of the copper electrodeposition reaction can occur. A bath with these characteristics shows promise to fill high-aspect ratio trenches and vias. It is this type of differential inhibition over a wide range of fluxes that results in superfilling. Figure 7 depicts the additive flux along a trench with dimensions 1.62pmxl.54pum for different timesteps as the feature plates up with copper. The lowest additive flux occurs at the lowest corner of the feature while the maximum flux at the upper corners of the trench. Position of 0 denotes the center point of the trench bottom wall. Figure 8 shows the same type of additive flux as a function of position but for a simulated via with dimensions 0.2pimx0.8pum. It appears that the fluxes at the bottom sidewalk of this high aspect ratio via are too small to be resolved. This in turn, will lead to copper electrodeposition taking place without the effect of inhibition and will also lead to copper deposits with rectangular shape (without corner rounding) as has been observed in the via simulated profiles.

CONCLUSIONS Results of a detailed mathematical model that predicts superfilling have been presented. Differential inhibition of electrodeposition along the sidewall of a Damascene feature, a phenomenon we call superfilling, can be accomplished by plating from certain additive-containing plating solutions. In high-aspect ratio trenches, simulated profiles yield a range of shapes from rectangular corners to rounded corners and from bottom fill-up to sidewall thickening depending upon the values of two model parameters. In high-aspect ratio vias, severe depletion of the cupric ion is predicted by the simulation which gives rise to void formation toward the lower 1/ of the feature centerline. Formation of seams or voids occurs because of the interplay between shape evolution and cupric ion depletion in deposit profiles where sidewall growth is favored. Plating baths that exhibit superfilling are baths that during deposition, a wide, dynamic range of fluxes exists over which differential inhibition of copper deposition occurs.

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55

REFERENCES 1. P.C. Andricacos, C. Uzoh, J.O. Dukovic, J. Horkans, and H. Deligianni, IBM J. Res. Develop., 42, 567, 1998. 2. D. Edelstein, I. Heidenreich, R. Goldblatt, W. Cote, C. Uzoh, N. Lustig, P. Roper, T. McDevitt, W. Motsiff, A. Simon, J. Dukovic, R. Wachnik, H. Rathore, R. Schulz, L. Su, S. Luce, and J. Slattery, Technical Digest, IEEE InternationalElectron Devices Meeting, 773, 1997. 3. P.C. Andricacos, C. Uzoh, J.O. Dukovic, I. Horkans, and H. Deligianni, Proceedings of the Advanced Metallization Conference (AMC 1998), G.S. Sandhu, H. Koerner, M. Murakami, Y. Yasuda, and N. Kobayashi, eds., Materials Research Society, 29, 1998.

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Figure 1. Definition of superfilling based on rate of copper electrodeposition along the feature sidewall.

II

- I

O.S

0

O.SI

Figure 2. Comparison of line partially deposited with copper with model prediction. Solid line is predicted copper profile and dashed line is experimental copper profile: b =3.16 and p=0.25 were used in the model.

Electrochemical Society Proceedings Volume 99-9

57

6

5-

43-

33 2-

2-

0

"'' -1.5

-1

Figure 3.

-

0

.0.5

0r

0.5

1.5-1.5

I

AR of 2, b=17.8, p=0.25 6

0.5

1

1.5

5-

4-

4-

3-

3

2-

2

-I

0

.0.5

6

Z"O -w

5--

-1.5

-1

Effect of aspect ratio on superfilling of a 0.2 micron trench. Left AR of 5, right

-0.5

0

0.5

I

1.5-I.5

-1

-0.5

0

0.5

!

1.5

Figure 4. Effect of superfilling parameters in shape evolution. Left b=56.2, p=0.25, right b=3.16, p=0.25.

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1.2-

Improvement in

o.4.

"• 0.8-

S0.6-

04

*

0.13x1.04 b=3.16, p= .25 S00.13xM.04b=1O, p=0.5 S0.2x0.8 via b-3.16, p=0.25

0.2

* 0.2x0.8 via b=17.78, p=0. • 0.2xi.O b=3.16, p=0.25 0.2x1.0 b=17.8, p=0.25 0.2xl.O b=56.2, p=0.25

25

"i* "IE-12

1E-10

1E-8

IE-6

0.0001

0.01

additive flux dimensionless

Figure 6. Inhibition function versus additive flux for different values of the superfilling parameters.

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59

1-

0.01-

S0 .00 1*

0o0001

1E-5 -2

-1

0

1

2

position along feature

Figure 7. Additive flux as a function of position in a line 1.62 micron x 1.54 micron I

Sthi time stepý,

S20th 40th 0.01 -

1. E-61 IE-10' -3

-2

-1

0

1

2

3

position along feature

Figure 8. Additive flux as a function of position in a via 0.2 micron x 0.8 micron.

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A MASS TRANSFER MODEL FOR THE PULSE PLATING OF COPPER INTO HIGH ASPECT RATIO SUB-0.25pM TRENCHES Desikan Varadarajan+, Charles Y. Lee++, David J. Duquette++ and William N. Gill+ Center for Integrated Electronics and Electronics Manufacturing, Rensselaer Polytechnic Institute, Troy, NY 12180-3590 +Department of Chemical Engineering, +Department of Materials Science and Engineering, Rensselaer Polytechnic Institute, Troy, NY 12180-3590 ABSTRACT A mass transfer model has been developed for the pulse plating of copper into high aspect ratio sub-0.25 micron trenches and vias. Surface and concentration overpotentials coupled with the shape change due to the deposition on the sidewalls and the bottom of the trench/via with time have been explicitly accounted for in the model. Important parameters have been identified and their physical significance described. The resulting model equations have been solved numerically as a coupled non-linear free boundary problem. A complete parametric analysis has been performed to study the effect of the important parameters on the step coverage and deposition rate. In addition, a linear analytical model has also been developed to obtain key physical trends in the system. From the parametric analysis three regimes of operation have been identified, viz., the steady state regime which is obtained when large pulse periods are used, the unsteady state regime when small pulse periods are used and a transition regime between the two for intermediate values of the pulse period. It has also been found that using small pulse periods gives better filling characteristics inside the trench. The duty cycle is an important parameter in pulse plating. Using a small duty cycle and current density along with small pulse periods gives the best step coverage. The step coverage is also better for smaller aspect ratios. Experiments for the pulse plating of copper into trenches have been performed using a new alkaline bath. The alkaline bath is non-corrosive and does not contain any additives. The model trends have been used to design the experiments. Model trends are found to be in excellent agreement with our experimental observations. INTRODUCTION The current trend in semiconductor technology toward smaller device features has led to the narrowing of integrated circuit line width. Increases in chip functionality and chip performance have led to the need for multilevel interconnects. In order to build multilevel interconnects filling high aspect ratio holes in dielectric reliably is critical. Even though it is possible to create micron and sub-micron size features using current photolithography technology, voidless filling of such features still presents a difficult problem in chip processing. Copper is rapidly emerging as the interconnect metal of choice for the next generation of sub-0.25gm devices. It has superior mechanical properties, lower resistivity and higher electromigration resistance when compared to aluminum. Electrochemical deposition (electroless/electroplating) of copper is a versatile, inexpensive and reliable way of filling

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such high aspect ratio features. Electrochemical deposition of copper has come to be one of the most important steps in the metallization schemes using the dual damascene technique. In pulse plating the substrate on which metal is to be deposited is the cathode. A rectangular, sinusoidal or triangular current waveform may be applied. Of these, the rectangular waveform is the most popular. The pulse plating of copper into damascene trenches using rectangular rectification is investigated in this paper. THEORY Figure 1 shows a schematic cross section of a typical plating tool along with an enlarged view of a feature inside the wafer. The following assumptions are made in order to simplify the problem, 1. Convective effects in the reactor space external to the feature are included by making use of the film theory. The effects of the bath hydrodynamics external to the wafer are included by assuming a thin concentration boundary layer adjacent to the wafer. 2. A well-supported electrolyte is assumed. Hence the contribution of migration to transport is small and a solution of the potential field is not necessary. 3. A rectangular waveform with a period during which current is passed and deposition occurs (ON) and a period during which no current is passed and pure diffusion occurs (OFF). 4. Ohmic influences are assumed to be less important than the concentration and activation overpotentials. It is assumed that a single cathodic deposition reaction occurs and that the current density normal to the cathode surface is described by the concentration dependent Tafel equation, i = -io

exp(- CF

[1

The resulting two-dimensional free boundary mass transfer problem' requires a complicated and time-consuming numerical strategy. In order simplify the problem further and obtain important trends, without much loss in generality or accuracy the following assumptions are made, 1.

The aspect ratio of the feature is assumed to be large compared to its width.

2.

Since the dimensions are sub-0.251im and the aspect ratio is assumed to be large, the concentration variations across the width of the feature are small. Therefore the concentration in the x-direction, across the feature width, can be represented by the average concentration, ca., which is defined in eqn. [2], ,4y)

Jc(x,y,t)dx =_

62

0

G

0

w(y)

[21

Electrochemical Society Proceedings Volume 99-9

Making use of eqn.12] in the two dimensional formulation and defining the following dimensionless variables and parameters we get for the ON period, t

_ y_ . w'

Y' tp

, C-

WO

c® C.,

2

W2(

w

h wh

WO

WO)

W,

2

I x -f

DtP

2nFDc,,

RT

[3]

2

kw )

Mc,

2D

[4] tp

[4]

w0

The model equations become, S t, =

-

,[51

c,(y,,O)=1.0

ac. (0,

inO

[6]

, =-Sh(l.0 - c,)

0 < x, < w,

[71

ay h, t aCy(

= _ (¢ )

+

0

<--X ,

--W j

[8 1

The growth of the deposit is given by, [9]

dT-- = I (c,)-*". dt1 rz

[10]

S)=0

t1=0 For the OFF period,

[11]

____=___c

att

ayl [12]

c, =c,(y,,DF) inO

a

6-x,

_<w,

ay I

______

[13]

[141

There is no growth of the deposit during the OFF period. The physical significance of the dimensionless parameters is described in Table 1. An analytical model has been derived

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by neglecting the effect of the free boundary, assuming pseudo steady state and that a v+_- =1.0. These assumptions make the problem linear and enable one to obtain an

n

analytical solution, in terms of hyperbolic sines and cosines, that provides more physical insight. EXPERIMENTAL PROCEDURE Plating experiments were performed on sections of both blanket and patterned wafers. The wafers were p-type device quality wafers subjected to wet oxidation at 1050°C for 1.25 hours to develop 7jim of oxide. A copper seed layer was sputtered at a base pressure of 10.7 Torr and an argon pressure of 5mTorr. The sputtered layers were 30nm thick and exhibited a resistivity of 2.1 td)cm. The patterned wafers had a 0.5 jim minimum feature size with a 2:1 aspect ratio. The electroplating experiments were performed with a DynatronixTM micropulsereversing unit. The wafer sections were clipped onto the rotating disk electrode and plated in a solution containing a copper-phosphorus anode. The plating bath composition selected was 0.08M CuSO 4 5H20, 0.15M (NIh) 2SO 4, and 0.2M NH 3. Plating in only the forward direction was performed at various pulse cycles ranging from 10 to 1000 Hz at an applied bias of -750 mV vs. SCE. Plating was also conducted using both forward and reverse pulses, for which a reverse potential of -100 mV vs. SCE was established. EXPERIMENTAL RESULTS Pulse and Pulse reverse plating experiments have been performed on 0.Splm, 2:1 aspect ratio features. The resistivity of the copper deposits was measured using a fourpoint probe. Pre- and post-anneal measurements were taken. The resistivity values of the deposits before annealing ranged from 2.2 to 2.5 Rit) cm, as shown in Fig.3. A 5% reduction in resistivity was observed upon annealing. RESULTS AND DISCUSSION Figure 4 shows the step coverage and the deposition rate obtained from the analytical model plotted as a function of the parameter, 4, the polarization parameter. As polarization increases the step coverage decreases however the deposition rate increases. An increase in the polarization indicates that the deposition rate on both the sidewalls and the base of the trench has increased more quickly than the rate of mass transfer. This leads to a steep concentration gradient inside the trench, which in turn leads to larger growth rates at the trench mouth than at the base resulting in poor step coverage. Polarization increases with increasing current density and since the growth rate is directly proportional to the current density the growth rate increases with increasing polarization. This suggests that there is a trade off in obtaining high deposition rate and step coverage and the question is: what is the best set of parameters for the process? An optimization of the parameters is required in order to make the process attractive. The analytical model overpredicts the step coverage as it does not account for the movement of the boundary. Thus the depositing species encounter increasingly aggressive aspect ratios. This leads to an increase in mass transfer resistance as the trench moves toward

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closure. Accordingly to obtain the best step coverage the parameters must be chosen so that the mass transfer resistance is small compared to the kinetic resistance, and this is the optimization problem mentioned above. Figure 5 shows the evolution of the deposit inside a trench to closure. As the film evolves inside the trench and the profile moves close to closure, the accessibility of the reactants through the mouth is reduced. Accessibility is reduced further as the growth rate near the trench mouth is greater than that at the bottom, leading to smaller feature width at the trench mouth. Hence we see that the deposit is nearly conformal at the beginning whereas at closure a large keyhole forms inside the trench. Therefore proper choice of the pulsing parameters is crucial in order to obtain perfectly conformal deposits even at times near closure. Figure 6 shows the step coverage as a function of deposition rate for varying pulse periods and duty factors. At high pulse periods (>20ms) the curve is flat and the effect of pulsing is negligible. However on decreasing the pulse period (-2ms) there is a large increase in the step coverage as one decreases the duty factor. On further reducing the pulse period there is an increase in the step coverage; however the increase is not large. This shows that an asymptote is reached with respect to the pulse period near 0.5ms and the step coverage and deposition rate do not improve with decreasing pulse periods below this value. Operation at this pulse period will ensure the filling of small features at the optimal rate. Figure 7 shows the comparison of an experimental and simulation deposition profile. The model results are in good agreement with the experimental observation. CONCLUSIONS From the analysis of the model trends and experimental observations the following conclusions can be made, An analytical model has been developed based on the assumption of steady state, linear-kinetics and fixed boundary. The analytical model can be used as a simple estimation tool for determining the lower bound on the step coverage. Results from the analytical model clearly show that there is a strong trade off between obtaining good step coverage and large deposition rates. Hence a suitable choice of parameters is crucial in obtaining reliable deposits without keyholes. A complete parametric study of the unsteady state mass transfer model clearly shows that ti, the pulse period, 4, the polarization, A, the aspect ratio, and DF, the duty factor have a profound effect on the evolution and the final shape of the deposit. Large polarization's and aspect ratios lead to deposition that is mass transfer controlled. This results in keyhole formation, as the concentration gradient inside a high aspect ratio trench is very large. On the other hand, when the deposition is kinetically controlled (i.e. for small values of polarization and aspect ratio) the gradient down the length of the trench is much smaller and deposition proceeds at nearly the bulk concentration. This leads to conformal deposition, as there is negligible variation in the deposition rate at the mouth and at the bottom of the trench. Small duty factors lead to a small drop in concentration during the ON period. Hence the deposition can be made to occur at nearly the bulk concentration. Large pulse periods

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(-lOOms) and duty factors along with large current densities lead to the formation of a keyhole in the trench. On the other hand using small pulse periods and duty factors along with reasonable current densities give good step coverage and deposition rate leading to conformal filling. Moreover for a given aspect ratio and current density there exists an asymptotic value of the pulse period for which the step coverage is maximum. By operating at this pulse period and by choosing the duty factor in such a way so as to obtain reasonable deposition rates filling can be optimized. Copper pulse plating experiments have been performed using a new alkaline plating bath. The bath is non-corrosive and does not contain any additives. Features of 0.5gtm size and 2:1 aspect ratio have been plated using this bath. Good step coverage and deposition rates have been obtained at small pulse periods and duty factors. The resistivity of the plated copper is close to the single crystal bulk resistivity. The model trends are found to be in very good agreements with the experimental observations. REFERENCES 1. A tertiary current distribution model for the pulse plating of high aspect ratio sub0.25ýim trenches, Desikan Varadarajan, Charles Y. Lee, David J. Duquette and William N. Gill, Submitted to the Journal of the Electrochemical Society, May 1999.

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2

Diffusion of Cu from the reactor into the feature

t

/

'

\

"

RW •'la

•

Thin•film

-

y

DV 2¢C= 4

ac

h

wo

Figure 1. Schematic of plating tool. Also shown is an enlarged view of the system geometry

Pulse Plated

Pulse Reverse Plated

~Aj

Figure 2. SEM pictures of pulse plated and pulse reverse plated features. Notice that void size decreases with decreasing pulse period. No voids are observed for pulse reverse plated specimens.

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67

Before anneal Matter anneal 2.5

I S2.0

1.5 d.c.

90/10

9/1 0.9/0.1 0.9/10.1 Pulse cycle (me)

0.5//0.1

1.510.1

Fig. 3 Observed resistivity of copper deposits pre and post anneal. Good resistivity values are obtained.

17

, 3.5

2.8

0.95-

2.1

j

S0.9 0.85 -0

0.002

0.003

0.004

0.005

0.006

0.007

Polarization parameter, 4 Figure 4 Trade offbetween high step coverage and deposition rate.

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10% closure

100% closure

Figure 5 Evolution of deposit inside a 0.181im, 4:1 aspect ratio trench. Simulation parameters used are, 4=0.01, DF=0.4, T=1.35x1 04

tp

0.5ms Ims$

&

". . .and

Asymptote(maximum step coverage deposition rate)

2ms

o0.9

20M.-

0.8 0

0.4

0.8

1.2

1.6

Deposition Rate (ptm ImIn) Figure 6 Effect of pulse period and duty factor on step coverage and deposition rate. Simulation parameters are A=4.0, wo=0.18.tm, 4=0.003. Better step coverage can be obtained at the same deposition rate (at a given duty factor) by using smaller pulse periods. An asymptote is reached, as the pulse period is decrease. For this value of the pulse period the step coverage is maximum.

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69

LII

L 1.. k

Figure 7. Comparison of experimental deposit profile to simulation results. Model results are in good agreement with experimental results.

Table 1. Physical significance of dimensionless parameters

PO-ftAubOM

PivatWnbWhn

A

Denison

Rcd SfgVncm-c

Asec Rai0

rta~petaofta

I

Chma

k w0 2 D

S,

bulk irtothe

9ct•

tm

t fromw

Also widuds the itnch. mi pln ar to ttu

the !•of

D2

! S

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Electrochemnical Society Proceedings Volume 99-9

Numerical Simulations of Fluid Flow and Mass Transfer within an Electrochemical Copper Deposition Chamber

P.R. McHugh, G.J. Wilson, L. Chen Semitool, Inc. 655 W. Reserve Drive, Kalispell, MT. 59901

Steady-state numerical simulations of fluid flow and cupric ion transport within an electrochemical fountain plating system are presented. Specifically, the diffusion-limit is determined directly from the computed flux of cupric ions to the wafer under the assumption of complete surface consumption. This maximum flux, in turn, determines the maximum ionic current that can be passed through the electrolyte to the wafer, which is called the limiting current. The goal of the present study is to predict variations in the limiting current density for different electrolyte volumetric flow rates and wafer (cathode) rotation rates. The efficacy of different computational models, including one-dimensional, twodimensional axisymmetric, and three-dimensional approximations, are assessed via comparisons of numerical predictions with experimental data.

INTRODUCTION

Steady-state numerical simulations of fluid flow and cupric ion transport within a commercial electrochemical copper deposition chamber are presented. The plating chamber is bounded by cylindrical vertical walls through which an electrolyte solution flows upward. The fluid enters the bottom of the chamber near the centerline, below a disk shaped anode situated at the bottom of the chamber. The flow travels around the anode and passes up through a planar diffuser plate, consisting of a discrete asymmetric pattern of circular holes. Above the diffuser plate, the electrolyte impinges upon a rotating wafer substrate, which acts as the cathode. The electrolyte exits the chamber over top of the chamber wall, which acts as a weir. Figure 1 shows salient chamber features using a simplified two-dimensional chamber cross section. Electrical contact is typically made at the outer edge of the wafer to a thin copper seed layer. Electrodeposition of copper is typically determined from such quantities as the surface overpotential and the cupric ion concentration at the wafer surface. At low overpotentials, the current increases with increases in the overpotential. However, at high overpotentials the copper plating rate is determined directly from the flux of cupric ions to the wafer surface. A limiting current can be observed as the cupric ion concentration at

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the wafer surface approaches zero. Limiting current values are strongly dependent upon the electrolyte bath, the hardware design, and the flow conditions. Although operation at the limiting current is not desired, it is important to understand how to modify conditions to yield a desired limiting current value. For example, good within wafer plating uniformity and good feature fill characteristics may require operating at a certain fraction of limiting current. The two goals of this study are: 1) Predict variations in the limiting current density for different electrolyte volumetric flows and wafer rotation rates using onedimensional, two-dimensional axisymmetric, and three-dimensional models; and 2) Assess the efficacy of these different computational models via comparisons with experimental data. The one-dimensional model formulation assumes a uniform potential flow impinging upon an infinite rotating disk. A one-dimensional advection-diffusion equation is solved for the cupric ion transport. The approximations made in developing the one-dimensional model are well known (1-4). Axisymmetric two-dimensional and three-dimensional models were constructed using a commercial computational fluid dynamics (CFD) package developed by CFD Research Corporation (5). The incompressible Navier-Stokes equations are solved along with a scalar transport equation for the cupric ion species mass fraction. In two-dimensions, the diffuser plate is assumed to yield a uniform inflow, while the three-dimensional model enables representation of the discrete asymmetric hole pattern of the diffuser plate. The model assessment experiments use test wafers with different symmetric areas (i.e. circles or rings) exposed to copper plating. A potential sweep technique is used to gather electrical current versus potential data. Limiting current values are determined from the current plateau, where the current remains constant even when the potential is increased. In simulating the experiments, the mass transfer limit is imposed by fixing the cupric ion concentration on the exposed plating surface to zero. In this manner, the diffusion limit is imposed and so calculation of the electric field is avoided.

COMPUTATIONAL MODELS

The electrolyte fluid flow is assumed to be well represented by the incompressible Navier-Stokes equations (1,6), which in cylindrical coordinates can be expressed as (6), Continuity: I du r. v

1 &o r 60

'iv a

Momentum:

72

Electrochemical Society Proceedings Volume 99-9

"01

V

a

-"

--- Pq+

r

V2U

•-+(V-V)w=p-

r2 2

&

r

r 2

op

r r7

r2

Lr Ifj

P

[2]

r2 0u

+VV2w

[4]

where u,vo,and w are the radial, angular, and axial velocities, respectively. r, and z are the radial and axial coordinate variables, while 0 represents the angular coordinate. The pressure and density are given by pandp, while v is the kinematic viscosity. The convective operator is given by, d J

vo d V-V= VO r~

d U,[5]9

~

and the Laplacian operator is defined as, V2

6] 1 2 + 02 + _-rIW -. r a-6,r-)

1 0 (

[6]

An additional time-dependent advection-diffusion equation is used to represent the mass transport of the cupric ions. This equation can be expressed as,

C E+(V.-V ) ZF= DV c[

7]

where D is the diffusion coefficient and J is the cupric ion mass fraction defined as the ratio of the cupric ion concentration to the bulk concentration, c/cb . The mass transfer limit is imposed by fixing the cupric ion concentration at the electrolyte-electrode interface to zero. The expression for the diffusion-limited current density at the wafer surface is then given by,

iD = nFD(Vc '-n)c.o=O.

[8]

Effects such as flow rate, wafer rotation rate, bath transport properties, and bath Cu concentration all influence iD. Assumed values for transport properties and important constants appearing in Equations [1] through [8] are listed in Table (1). Note that the values for c, and v are measured directly from the bath, while the value for D is

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Table 1. Assumed values for model parameters. Model ParameterName Symbol Value Bulk Cu concentration cb 0.2868 moles/liter Wall Cu concentration C0 0. 0 moles/liter Cu ion diffusivity D 4.73e-10 m2/sec Faraday's constant F 96485 C/equivalent Electron/ion discharge (valence) n 2 Electrolyte kinematic viscosity v 1.4 72e-6 m2/sec estimated by applying the Levich equation to a series of rotating disk electrode experiments that use the same electrolyte bath (7,8). In order to better compare with experimental limiting current density (iL) data, model estimates of the diffusion-limited current density (iD) are adjusted to account for the effects of charge migration (8). The acid plating bath used here requires a correction factor of roughly 1.05 (i.e. iL = 1.05.iD) (8). The equations defined in this section are applied to simplified representations of a commercial electrochemical copper deposition chamber. Specifically, in all formulations discussed here, only the flow region above the diffuser plate represented in Figure (1) is considered. With this simplification, the exit plane of the diffuser plate is the inlet for the computational domain.

One-Dimensional Model

A steady-state, one-dimensional model is constructed from Equations [1] through [8] for an infinite rotating disk in a free stream, as proposed by Hannah (2) and Tifford and Chu (3). The similarity variables used here are,

u = rQcF(O) v = rOG(4) w = F•-cH(Of Po=p- Ip(c - 1)2 &r c = 1+

74

a

a

[9] 2

-pVQcP(4)

=Rotationparameter

Electrochemical Society Proceedings Volume 99-9

The rotation parameter, a/l., is a measure of the relative importance of the forced flow compared to disk rotation. .2 is the rotation rate and a is a constant that defines the potential solution corresponding to the free stream impinging upon the disk (i.e., u = ar and w = -az with the disk centered at r = z = 0). a can be set to U,/d, where U, is a characteristic velocity related to the volumetric flow and d is a characteristic length. In this work, U. was set equal to the imposed volumetric flow rate divided by the crosssectional area of a 200mm-wafer. The characteristic length, d, was selected from the geometry of the chamber. Two possible choices were examined: 1) The distance from the wafer to the inlet plane (roughly 29mm), and 2) The distance between the wafer and the top of the outer wall (roughly 9mm). The second choice corresponds to a stronger impinging flow and generally results in a larger value for the diffusion-limited current density unless wafer rotation effects dominate. Substitution of the above similarity variables into Equations [1] through [4], yields the following system of ordinary differential equations, 2F+ H' =0 F2 +

PH _-.1-G2

-V+-F-H- ,F " (0c-• =

[10]

2FG + HG'- G" = 0 P + HH' - H" = 0

No-slip boundary conditions apply on the surface of the disk, which require F=H=P=O and G=I at z=O. The normal velocity at large distances from the disk is not equal to the potential flow value because of the non-vanishing rotating disk contribution. However, the radial velocity component at large distances from the disk is determined by the potential solution. This latter requirement means that as 4 -+ oo, u = rf2cF -) ar, or F -- a/(92c) = (c - l)/c. The boundary-value problem defined above is solved for a specified value of c using a "shooting" method (9) implemented within the MATLAB computing environment (10). In one-dimension, the diffusion-limited current density is computed from, iD = nFD

= nFDCbo =00!I)z 1

[12

where is . is the diffusion layer thickness. The concentration gradient at the wall is obtained by solving a one-dimensional form of Equation [7]. Using the previously defined similarity variables and introducing,

Electrochemical Society Proceedings Volume 99-9

75

0O -c

, t =OCct

[13]

Cb - Co

Equation (7) can be reduced to the following one-dimensional equation,

[14]

-- dr* Sc iV2 where Sc = v/D is the Schmidt number. density can be computed from,

In steady state, the diffusion-limited current

17

'D =

nFD(?

=

nFDCb

nFDCb

C1Jesc

-

di~d~

[15]

Two-Dimensional, Axisymmetric Model

A steady-state, two-dimensional model is constructed from Equations [1] through [7] assuming rotational symmetry. The two-dimensional model equations are solved using a commercial computational fluid dynamics (CFD) package called CFD-ACE, a product of CFD Research Corporation (5). Second-order accurate discretization is employed for diffusion terms, while first-order accurate upwind discretization is used for advection terms. The model geometry, boundary conditions, and computational mesh are described in Figure (2). In the two-dimensional case, the diffuser plate is assumed to yield a uniform inflow profile across the area of the diffuser containing the holes, which has a radius of roughly 90mm. The wafer is located 29mm above the inlet plane and the radius of the outer wall is roughly 8mm beyond the edge of the 200mm-wafer and extends to an elevation 20mm above the inlet plane. Nearly 15,000 computational cells are used to resolve this geometry with a majority of these cells located in the thin diffusion layer that resides near the wafer surface (the first cell is less than 1pmn from the wafer). The flow is allowed to exit at the outer wall radius between the top of the outer wall and the wafer. The blocked region at the edge of the wafer is used to approximate the effects of hardware associated with the electrical contact. The mass transfer limit is imposed by fixing the Cu concentration to zero along the exposed surface of the wafer.

76

Electrochemical Society Proceedings Volunme 99-9

Three Dimensional Model

In the three-dimensional case, CFD-ACE software (5) is again used to solve the steady-state form of Equations [1] through [7] for the geometry shown in Figure (3). The two-dimensional cross section of this three-dimensional model is the same as the twodimensional model described above. However, in contrast to the 15,000 computational cells needed to resolve the two-dimensional geometry, nearly 300,000 computational cells are employed to represent the three-dimensional geometry. The horizontal plane displayed in Figure (3) represents the top of the diffuiser or the flow inlet. The darker regions reflect high axial velocities and so indicate diffuser hole locations. The left vertical plane illustrates the radial and axial mesh distribution. The right vertical plane presents axial velocity contours, which depict the flow jets passing through the diffuser holes. An advantage of the three-dimensional model is the more accurate representation of the asymmetric hole pattern of the diffuser plate compared with the two-dimensional, axisymmetric case. Figure (4) illustrates the hole pattern of the diffuser plate as approximated by the three-dimensional model. In order to avoid constructing a structured computational mesh that includes mesh boundaries for each individual hole, a simple radial mesh is employed. It is further assumed that the imposed volumetric flow passes evenly through the set of diffuser holes. Inlet boundary conditions approximating this condition are imposed by first identifying the computational cells that reside within each diffuser hole. The set of cells within each hole are used to approximate the crosssectional area of the hole. This approximate cross-sectional area together with the fixed volumetric flow through the hole are used to set the inlet velocity boundary condition for each of the hole cells. A significant advantage in this approach, in addition to its simplicity, is the ability to quickly change diffuser hole patterns in the model without remeshing. A drawback in using this inlet condition is the inability to resolve the velocity distribution exiting each hole. High resolution simulations of the flow through a single hole were performed to better understand the consequences of this assumption. These simulations illustrate the constriction of the flow through a vena contracta, with a diameter roughly 15% smaller than the hole diameter. To first order, this effect can be approximated by imposing uniform inlet velocities across holes with a 15% smaller diameter, which causes the inlet velocity to increase by approximately 38% for a fixed mass flow rate. In the results section below, simulation data are presented with the hole diameter set to the actual diffuser hole size (case A) and with the hole diameter reduced by 15% (case B).

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77

RESULTS

The computational models described previously are exercised over a range of flow operating conditions. Specifically, wafer rotation rates are varied between Orpm and 100rpm, while the volumetric flow was set to either 1.Ogpm or 5.5gpm. Table (2) lists the specific operating conditions studied and presents numerical estimates for the average limiting current density (iL)across the surface of the wafer. The first two flow conditions (Orpm and 20rpm at 5.5gpm) yield the most significant variations between the different model predictions. This is especially true in the case of the one-dimensional model, which shows a high sensitivity to assumptions made regarding the impinging free-stream flow. Once rotational flow effects dominate impinging flow effects, the different model predictions are similar. With the flow rate fixed at 5.5gpm, a five-fold increase in the wafer rotation rate from 20rpm to 100rpm roughly doubles it In contrast, the reduction in iL due to a five-fold reduction in flow rate (from 5.5gpm to lgpm) at a fixed rotation rate (20rpm) is less pronounced, with the decrease ranging between 3-18%. This trend illustrates the effectiveness of wafer rotation in enhancing mass transfer. Table 2. Model predictions of average limiting current density across wafer surface. Flow 1-D Model, iL 2-D Model, iL 3-D Model, iL 2 2 2 (mA/cm ) (mA/cm ) (mA/cm ) Conditions Rotation

Flow

d=29mm

d=9mm

Orpm 20rpm 50rpm 100rpm 20rpm

5.5gpm 5.5gpm 5.5gpm 5.5gpm 1.Ogpm

17.25 29.90 46.20 65.11 29.10

29.92 35.65 48.07 65.80 29.22

18.41 29.62 45.78 64.78 28.73

A

B

30.14 31.10 46.94 66.51 29.60

38.23 34.47 47.23 66.48 29.59

A set of limiting current experiments are conducted to assess the accuracy of the different models at different operating conditions. The experimental procedure consists of using a potential sweep technique to gather electrical current versus potential data. Limiting current values are determined from the current plateau, where the current remains constant even when the potential is increased. The potential sweep equipment could deliver no more than 2A, which is not sufficient to reach limiting current over the entire surface of the wafer for the flow conditions of interest. Consequently, the plating area of the test wafers is restricted to either a 2cm radius circle or a ring with an inner radius of 3cm and an outer radius of 4cm. In this manner, current density can be driven to limiting current values for all but the lOOrpm/5.5gpm test condition listed in Table (2). Figure (5) presents sample experimental current versus potential data for the test wafer with a 2cm circle exposed to plating. Similar data was also obtained for the test wafer with a 3-4cm ring exposed to plating. Limiting current density values gleaned from

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Electrochemical Society Proceedings Volume 99-9

Table 3. Comparison of model predictions and experimental data for limiting current density (mA/cm 2 ) across a centered circle with a radius of 2cm. Flow Conditions Exp. 2-D Model 3-D Model (A) 3-D Model (B) Rotation Flow Data iL % diff. iL % diff. iL % diff. 44.77 9.9 38.29 22.9 Orpm 5.5gpm 49.7 19.46 60.8 34.40 25.4 43.40 5.9 20rpm 5.5gpm 46.1 30.65 33.5 50rpm 5.5gpm 52.5 46.96 10.6 47.23 10.0 48.21 8.2 66.19 9.6 67.47 7.8 67.00 8.5 100rpm 5.5gpm 73.2 29.50 9.5 30.14 7.5 30.07 7.8 20rpm 1.Ogpm 32.6 Table 4. Comparison of model predictions and experimental data for limiting current density (mA/cm 2) across a centered 3-4cm ring. 3-D Model (B) Flow Conditions Exp. 2-D Model 3-D Model (A) iL % diff. iL % diff. Rotation Flow Data iL % diff. 35.48 35.0 46.47 14.9 Orpm 5.5gpm 54.6 30.51 44.1 47.07 17.1 48.02 15.5 20rpm 5.5gpm 56.8 48.17 15.2 73.50 11.2 72.17 12.8 50rpm 5.5gpm 82.8 73.80 10.9 102.04 -102.00 -100rpm 5.5gpm >90 103.95 -46.40 10.4 45.58 12.0 45.57 12.0 20rpm 1.0gpm 51.8 the experiments are accumulated in Tables (3) and (4). The 2cm-circle data shows that near the center of the wafer, the limiting current density does not change drastically as the wafer rotation varies between Orpm and 50rpm. In contrast, a 100rpm spin rate drastically increases the limiting current density, while a five-fold reduction in volumetric flow appreciably reduces the limiting current density. Note that in the case of the 3-4cm ring, no specific estimate for iL is given for the 100rpm spin because the maximum current value was encountered before limiting current was reached. At this radial location, a 50rpm spin rate appreciably increases the limiting current density, while sensitivity to the volumetric flow is lessened. The 3-4cm ring limiting current data is substantially higher than the 2cm circle data due to the transport of fresh electrolyte from the inner 3cm of the wafer across the ring. As such, this data does not reflect limiting current density values that would be observed at that radial location if the entire wafer surface was exposed to plating. Two-dimensional, axisymmetric and three-dimensional simulations are conducted that mimic the experiments by forcing the wafer Cu concentration to zero across the same exposed areas. The one-dimensional model is independent of radial variations, and so it is not considered here. Table (3) compares the model predictions of iL with experimental values for the 2cm circle test wafer. The two-dimensional model shows poor agreement with the data for the no rotation case. The impinging jet flows near the center of the wafer enhance the mass transfer in this region, and the two-dimensional model is incapable of capturing these effects. However, as wafer rotation effects dominate, two-

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79

dimensional model agreement improves measurably. The base three-dimensional model (case A) agreement for the no rotation case is improved but still poor. The modified three-dimensional model (case B) demonstrates significantly better agreement with the experimental data with no wafer rotation. By reducing the hole diameters by 15%, the flow jets are strengthened, which improves agreement for this condition without adversely affecting agreement at the higher wafer rotation rates. Table (4) compares the model predictions of iL with experimental values corresponding to test wafers with a 3-4cm ring exposed to plating. Again, with no wafer rotation, the two-dimensional model and the base three-dimensional model (case A) do not accurately predict the mass transfer effects of the impinging flow. The modified three-dimensional model (case B) again demonstrates much better agreement. At this radial location, the impinging flow effects are less pronounced than at the center of the wafer, as evidenced by the improved agreement at the 20rpm flow condition. In fact, with the wafer rotating at 20rpm or faster, there is little difference between the two- and three-dimensional model predictions of the average limiting current density. Model predictions are consistently below the experimental limiting current values, a trend also seen in Table (3) for the 2cm circle data. Consequently, it is anticipated that in cases where predictions are within 15% of data, a small (say 10%) increase in the assumed value of the diffusion coefficient would appreciably improve model accuracy.

SUMMARY Steady-state numerical simulations of diffusion-limited mass transfer within an electrochemical plating chamber were presented for a set wafer rotation rates and volumetric flow rates. Predictions of average limiting current density were given for a 200mm-wafer and for specially prepared wafers with either a 2cm circle or a 3-4cm ring exposed to plating. Both simulation and experiment suggested that mass transfer is enhanced more by higher wafer rotation rates than by increased volumetric flow rates. At higher volumetric flow rates (i.e. 5.5gpm) and low wafer rotation rates (less than roughly 20rpm), iD is strongly influenced by impinging jet flows, which pass through the asymmetric array of diffuser holes. In this flow regime, three-dimensional models were used to better match experimental data. Agreement using the two-dimensional, axisymmetric model was poor. Three-dimensional model (case B) predictions of limiting current were within 10% of experimental values for the 2cm circle tests and within roughly 15% for the 3-4cm ring tests, but the computational cost was high. Efforts to further improve the resolution of the three-dimensional jet flows using higher-order advection discretization schemes were largely unsuccessful due to algorithm convergence difficulties and high computational cost. Future efforts will attempt to overcome these difficulties via algorithm parameter adjustments and/or grid modifications. As the wafer

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Electrochemical Society Proceedings Volume 99-9

rotation rate increased (e.g. greater than 20rpm at 5.5gpm) or the volumetric flow rate decreased (i.e. Jgpm), the effects of the impinging jet flows were lessened. In these flow regimes, the simpler two-dimensional, axisymmetric model yielded limiting current predictions that were within 13% of the experimental values. The one-dimensional model can also be used in this flow regime for useful qualitative estimates of average diffusion-limited current densities.

REFERENCES

1. Schlichting, H. Boundary Layer Theory, McGraw Hill, NY. 1960. 2. Hannah, D.M., "Forced Flow Against a Rotating Disk," British ARC R&M 2772 (1952). 3. Tifford, A.N. and Chu S.T., "On the Flow Around a Rotating Disk in a Uniform Stream," J Aero. Sci. 19, 284 (1952). 4. von Karman, T., NACA-TM-1092, 1921. 5. CFD-ACE Version 5.0, CFD Research Corporation, Hunstville, AL, 1998. 6. White, F.M., Fluid Mechanics, 2nd ed., McGraw-Hill, Inc., NY, 1986. 7. Bard, A.J. and Faulkner, L.R., ElectrochemicalMethods, John Wiley & Sons, 1980. 8. Newman, J.S., Electrochemical Systems, Prentice Hall, Englewood Cliffs, NJ, 1991. 9. Gerald, C.F. and Wheatley, P.O., Applied Numerical Analysis, 3rd ed., AddisonWesley, Reading, MA, 1984. 10. MATLAB High-Performance Numeric Computation and Visualization Software, User's Guide, The MathWorks, Natick, MA, 1992.

Rotating Wafer (Cathode)

It t I

Flow

T Tt Diffuser

Si

Anode

t

I

- Flow

Fig 1. Cross-sectional schematic illustrating components of copper plating chamber.

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81

SimplifIed contact geometry

RottLing Water

0W04

0.02

-0.01 -0.03U

Figure 2. 2-D model description (5.Sgpm/2Orpm, axial velocity contours and mesh.)

w

2oto,S.,

Figure 3. Three-dimensional model description with axial velocity contours (5.5gpm/2Orpm).

orprn. 5 gpm

. 0 ...-

n-

SO

Figure 4. Flow inlet plane of the threedimensional model.

..

.

.. !. . .

. •. . .

lorm55p

04

o

1.4.. .. .. .. ...

.. . .

Figure 5. Experimental limiting current density data for test wafer with a 2cm circle exposed to plating.

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Electrochemical Society Proceedings Volume 99-9

MODEL OF WAFER THICKNESS UNIFORMITY IN AN ELECTROPLATING TOOL H. Deligianni", J. 0. Dukovica, E. G. Waltonb, R. J. Contolinil, J. Reid', E. Patton'

"IBM,T.J. Watson Research CenterP.O. Box 218, Yorktown Heights, N.Y. 10598 bIBM Microelectronics,1000 River Road, Essex Junction, Burlington, VT 05452 CNovellus Systems, PortlandTechnology Center, 26277 S. W. 95th Ave, Wilsonville, OR 97070

ABSTRACT We describe modeling results of a plating tool that is currently used in Damascene electroplating of on-chip interconnects. The tool is a cup plater with elements that shape the potential field and with a peripheral semi-continuous terminal to contact the wafer. A parametric study has been performed and the effect of the key dimensionless groups on the wafer scale nonuniformity identified. Based on this study, simulations of tool scale-up to 300 mm wafers are shown. Comparison of experimental plated thickness profiles determined at different time intervals with simulated profiles show reasonably good agreement but also suggest that phenomena pertaining to mass transport of additives and cupric ion may be important. This work illustrates the importance of modeling predictive capability in developing, scaling-up and improving plating tools. INTRODUCTION In recent applications of electroplating such as Damascene plating of on-chip interconnects (1), because of the need for shrinking electronic devices, there is a tendency to use thinner conductive seed layers. The high active area density in Damascene plating, along with trends toward larger wafers, higher plating rates, and stringent requirements on thickness uniformity have increased the need to control the "terminal effect". The terminal effect, which is caused by the high ohmic drop within the seed layer and the plated deposit, results in nonuniform current distribution in the vicinity of the electrical contacts. Figure 1 is a cross-section of an electrolytic cell with a resistive electrode and a terminal for contact at one end of the electrode. The current lines in the cell are shown along with the corresponding potential drop. Within the electrolyte (point C-D) the potential drop is linear; at the electrolyte/seed layer interface there is a sudden drop in potential, on one side there is the charge transfer and concentration overpotential while on the other side is the metal potential. Finally there is a non-linear drop through the seed layer (A-B). The current lines are closely spaced near the contact terminal both on the electrolyte side and within the seed layer. This effectively means that the local current density will be high next to the contact terminal where the current lines are closely spaced. is a registered SFIDAPtrademark of FLUENT Inc., 10 Cavendish Court, Centerra Resource Park, Lebanon. New Hamoshire 03766

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Kawamoto (2) developed a two-dimensional model that is based on a double iterative boundary element method. The numerical method calculates the secondary current distribution and the current distribution within anisotropic resistive electrodes. However, the model assumes only the initial current distribution and does not take into account the effect of the growing deposit. Matlosz et al. (3) developed a theoretical model that predicts the current distribution in the presence of Butler-Volmer kinetics, the current distribution within a resistive electrode and the effect of the growing metal. Vallotton et al. (4) compared their numerical simulations with experimental data taken during lead electrodeposition on a Ni-P substrate and found limitations to the applicability of the model that were attributed to mass transfer effects. Mehdizadeh and Dukovic (5) expanded the theoretical treatment and included mass transport effects in an axisymmetric system as well as a 3-D geometry. In the 3-D geometry, they assumed four peripheral low-contact-area terminals and have shown the effect of peripheral point contacts on the thickness distribution of a 200 mm wafer. Initially, the thickness near the four point contacts is very high, whereas between the contacts is very low. A time series of a growing deposit. with four peripheral point contact terminals is shown in (6). Point contacts result in azimuthal nonuniformity. However, the nonuniformity in the vicinity of the contacts becomes appreciably better as the plated thickness builds up. In applications such as Damascene electroplating where the final plated thickness is usually not more than 1,um, azimuthal nonuniformity can be a problem. Our solution was to implement an almost continuous peripheral contact terminal and to assume that the system is axisymmetric and that only the radial nonuniformity needs improvement. In this paper we describe a model of a cup plater with a peripheral continuous contact and "passive" elements that shape the potential field. The model takes into account the ohmic drop in the electrolyte, the charge-transfer overpotential at the electrode surface, the ohmic drop within the seed layer, and the transient effect of the growing metal film as it plates up (treated as a series of pseudo-steady time steps). Comparison of experimental plated thickness profiles with thickness profile evolution predicted by the model is shown. Tool scale-up for 300 mm wafers was also simulated and compared with results from a dimensionless analysis.

MATHEMATICAL MODEL The following system of equations was solved: 2

V 0E

v (gvoA)

=0

potential in the electrolyte [1]

=0

potential in the seed layer [2]

where g is the combined "sheet conductance" of the seed layer and the electrodeposit and is the reciprocal of the sheet resistance (R0 ). Equations [3-8] are boundary conditions imposed at the different interfaces: ' FIDAP is a registered trademark of Lebanon. New Hamoshire 03766

84

FLUENT Inc., 10 Cavendish Court, Centerra Resource Park,

Electrochemical Society Proceedings Volume 99-9

on anode [3]

OE•= OA

t,, = -- VOE-n = 1,tVom-n

"= I"{exp[ aF(Om -

]- exp[- a,

R -

on electrolyte/wafer interface [41

E)}

on electrolyte/wafer interface [5]

OM =0 0

on electrolyte symmetry lines [7]

n=0

on seed- layer symmetry lines [8]

VqE * n =

VqM

.

on electrical contact [6]

where OE and Om are the potentials in the electrolyte phase and the seed layer. Typical values of the constants that appear in the equations above are given in Table 1. Instead of treating the thin-film phase as a growing domain, we artificially hold its thickness, t, constant and allow the sheet conductance to increase over time, reflecting deposit growth. The equations above are nondimensionalized using the following dimensionless variables: T9 x

*

--

-- ,[9]r,

Recasting Eq. [1-8] in dimensionless form yields: V2% = 0

in electrolyte [10]

v7 - G v* O = 0

in metal [11]

rw G

-

n = z,

*

17"

.n

=

on wafer surface [12]

on wafer surface [13]

where i* is,

FIDAP is a registered trademark of Lebanon. New Hampshire 03766

FLUENT Inc., 10 Cavendish Court, Centerra Resource Park,

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85

ep-

[exp(-!- WaT WaL(l + a,)-exp-Wa

'

[4 [14]

Wa T

[=

on the anode [15]

at the contact terminal [16]

=0

where G the dimensionless sheet conductance is, G=

at

[17]

art

Before solving the problem we made some scaling manipulations to avoid dealing with the complication of having a growing finite element mesh and a metal film that was thin and difficult to mesh. Initially, we artificially expanded the z-axis and transformed the seed-layer domain by stretching in the vertical dimension (to facilitate meshing). Secondly, we kept the metal thickness constant through out the plating process and instead of increasing the thickness of the metal layer at every time step, we artificially hold its thickness t constant and allow the sheet conductance to increase over time, reflecting deposit growth. These transformations require the use of anisotropic "sheet conductance" properties in the code. We assume that the stretching parameters are:

Pq=to Z,,=wsh

[18]

where z,,-.h is the thickness of seed layer after stretching and t, is the initial seed layer thickness. When applying transformation [18] to Eq. [10,11,12,13,14, and 15], these become as follows:

G

prGa

pqGK'

G = pGa qG0 ,c

for the axisymmetric case [19]

Eq.[19] yield the values of G in Eq.[12], pG a

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86

"

n* = i•

Eq.[12] becomes Eq.[20]

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Electrochemical Society Proceedings Volume 99-9

METHOD OF SOLUTION A commercial code called FIDAP' was customized and used to solve the set of equations. Initially, the boundary value problem was solved subject to the nonlinear boundary conditions Eq.[201 for Gj.Go which is the initial dimensionless sheet conductance. Growth of the deposit was then simulated by using the converged solution of the prior step j, according to the formula:

Gj=Gj_, + i+-U.A(j

j= 1,2,3 ...... n

[21]

AGj is the plated thickness increment at each time step. The value of the conductance at the next time step is determined from the conductance and the normalized dimensionless current densities of the previous time step. Stepping through time stops when a certain value of the sheet conductance Gj is reached that corresponds to the plated thickness of interest. The geometry was left unchanged throughout the simulation. This part was handled by an AIX shell script that ran FIDAP' for G., then calculated the sheet conductance value of the next time step, and re-run FIDAPI until the desired sheet conductance value tj is reached. At each time step, the local current density along the wafer is integrated and the average current density is made to equal the applied current density by doing a Newton-Raphson iteration on the anode potential. The Newton-Raphson scheme as well as the update of the anode-potential boundary condition are incorporated into subroutines that are attached to the executable module. The executable module is called at each time step by the AIX shell script as described above.

RESULTS Table 1. Typical values for copper plating on a 200 mm wafer = 0.52ohm-1cm-'

Bath conductivity

K

Average current density

i = 7, 15, 20mA/cm 2

Wafer radius exposed in electrolyte

9.56cm

Contact area

0.334cm

radius of peripheral contact

Cathodic Tafel slope

RT = 50mV a,.F

Exponent in kinetic expression

y = 0.6

Exchange current density

io = 0.4mA/cm 2

SFIDAP

is a registered trademark of FLUENT Inc., 10 Cavendish Court, Centerra Resource Park, Lebanon. New Hamoshire 03766

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Ratio of anodic/cathodic transfer coefficients

2--= 3

Wagner number of linear kinetics

WaL = 1.3

Cathodic transfer coefficient over n

- = 0.25

Seed layer conductivity

u = 5xlO'ohm-'cm-

Seed layer domain stretching in z direction

Zmeh = 1cm

Experiments with variable thickness seed layers in a cup plater have shown that the edge of the wafer had consistently thicker deposits than the wafer center. As a result, we undertook an effort to design shields or "passive" elements that shape the potential field and yield a current or thickness distribution that is almost uniform. This was done with modeling of the secondary current distribution and verified by experimentation. Figure 2 shows a schematic of a cup plater. Also shown in Fig. 2 are the equations that correspond to the secondary current distribution with an "infinitely thick" seed layer on the wafer surface. We treated the problem as axisymmetric with axis of symmetry the centerline of the cup and thus only half of the cup was modeled. The cup plater contains shields which are located in a region extending from the peripheral edge of the wafer to the side and upper surface of the anode. Typically, electrolyte enters at the inlet, flows around the anode, the wafer, next to the shields and exits as an overflow at the outlet. The wafer also rotates during electroplating. In this paper though, we are not concerned with fluid flow and mass transport in the electrolytic cell. Figure 3 shows the normalized current distribution on an "infinitely thick" seed layer. The current density is higher at the center of the wafer than at the edge. Overshielding of the wafer edge occurs under secondary current distribution conditions. Figure 4 is a schematic of a cup plater that includes the case of the resistive electrode. Corresponding equations within the electrolyte, at the anode and wafer interface and within the seed layer and plated film are shown. Figure 5 is a transient normalized thickness distribution of the plated fim along half of the wafer (center-to edge) at different plated thicknesses onto a IOOOA initial seed layer. Curve A corresponds to a final thickness of 2100A with a a of 7%. Curve B corresponds to a final thickness of 3500A with a a of 6%, curve C corresponds to a final thickness of 5200A with a a of 4%, curve D corresponds to a final thickness of 7200A with a a of 3%, curve E corresponds to a final thickness of 9600A with a a of 2%, and curve F corresponds to a final thickness of 2,un with a a of 1%. It is interesting to note that even though the thickness distributions at the initial stages of plating are very nonuniform, the thickness distribution at 2,um of plated thickness is overshielded and resembles the thickness distribution of an "infinitely thick" seed layer (Figure 3). The calculation of the a of the thickness distribution was done by taking 9 points along the wafer and assuming a different weight for each of these points. The further the point from the wafer center, the higher the weight. We assumed a weight of one for the center point and a weight of 72 for the point close to the edge. ' FIDAP is a registered trademark of Lebanon. New Hamoshire 03766

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Figure 6 is a transient normalized thickness distribution of the plated film onto a 104A initial seed layer. The initial film of 1300A is very nonuniform with a of 85%. As the film plates-up the nonuniformity improves but not as much as in the case of Figure 5. When the film has plated to a thickness of 2#m it is still quite nonuniform with a a of 6% Figure 7 is a comparison of experimental thickness profiles (points) determined at different time intervals as copper was deposited onto a 500A seed layer to a final thickness of 2pum with predicted (solid curves) profiles by the model. The agreement is fairly good at the intial stages of growth (800A) and at the final profiles (i.e. lm and 1.97 prm). In-between the agreement is poor in particular toward the wafer center. This is thought to be attributed to mass transport effects of plating solution additives that may be playing an important role. For example, an additive that inhibits the copper electrodeposition reaction may diffuse at a faster rate at the wafer center than at the wafer edge. It was determined that if one solves the system of equations using the parameters in Tablel, then the current distribution and the overall non uniformity depend upon 4 dimensionless groups: N, =f(geometry, Go0G, Wa r)

[22]

where the nonuniformity N, is defined as the maximum dimensionless thickness minus one (tax - 1). Figure 8 shows the effect of the initial seed layer conductance on the plated thickness nonuniformity. It was determined that the nonuniformity depends upon the initial sheet conductance to the -0.48 power and upon the plated film conductance to the -0.70 power ( N, x Go-°' 48G6-'° 70 ). The effect of the Wagner number is shown in Figure 9. The higher the Wagner number the better the non uniformity because the ohmic effects become less important at high Wagner numbers. It was determined that the non uniformity is proportional to the Wagner number to the -0.60 power (N, K Go-4d-°7°Wa4-6). Thus the nonuniformity depends as follows upon the main dimensionless parameters: 70 N, x Go 0.48 G,". wa0.60

where the Wagner number for Tafel kinetics is defined as follows: WaT = acFirw RTK

[23] [4 [24]

Based on this dimensionless analysis, it was attempted to scale-up the cup plater for 300 mm wafers. All the dimensions in the cup plater were scaled-up 1.5 times. If one substitutes the parameters in Go, G, and War, then it turns out that the nonunuformity Njis proportional to the wafer radius raised to the 1.78 power: Nt K r 17

[25]

Applying Eq.[251 means that the nonuniformity of the 300mm wafers is expected to be worse than the nonuniformity of the 200 mm wafers by a factor of 2. The result of the ' FIDAP is a registered trademark of Lebanon. New Hampshire 03766

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simulated relative a of the thickness profiles is shown in Figure 10 and indeed confirms what Eq.[25] predicts. CONCLUSIONS A model of a cup plater is described that takes into account the ohmic drop in the electrolyte, the charge transfer over potential at electrode surface, the ohmic drop within the seed layer and the plated film, and finally the transient effect of the growing metal film as it plates up. Instead of treating the seed layer as a growing domain, we artificially hold its thickness constant and allowed the sheet conductance to increase with time. Additionally, the thickness of the seed-layer domain was artificially increased to facilitate easier meshing. It is shown how all these transformations affect the resulting equations and that one can solve for G which is the dimensionless sheet conductance of the growing film. The cup plater has a peripheral contact and adequate shielding and the resulting thickness distribution is one order of magnitude more uniform than a case with point contacts and without shields (5). The nonuniformity is a strong function of the plated film sheet conductance, the Wagner number of Tafel kinetics, the seed layer sheet conductance and the ratio of the contact area to the wafer area. Experimental verification of the model shows that the agreement is fairly good but that mass transport effects of the plating additives may be playing an important role as well. A simulated scale-up of the cup plater for 300 mm wafers predicts that the nonuniformity for the 300 mm wafers will be worse than for the 200 mm wafers by a factor of about 2. REFERENCES 1. P.C. Andricacos, C. Uzoh, J.O. Dukovic, J. Horkans, and H. Deligianni, IBM J. Res. Develop., 42, 567 (September 1998). 2. H.Kawamoto, J. Apple. Electrochem., 22, 1113 (1992). 3. M. Matlosz, P.-H. Valotton, A.C. West and D. Landolt, J. Electrochem.Soc., 139, 752 (1992). 4. P.-H. Valotton, M. Matlosz and D. Landolt, J. Apple. Electrochem., 23, 927 (1993). 5. S. Mehdizadeh and J.O.Dukovic, Extended Abstracts of the 184th Meeting of the ElectrochemicalSociety, 93-2, Abstract No. 210, 1993. 6. H. Deligianni, J. 0. Dukovic, and S. Mehdizadeh, Extended Abstracts of the 195th Meeting of the Electrochemical Society, May 2-7, 1999.

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Electrochemical Society Proceedings Volume 99-9

/ T ER M, 1".^i

ABC PC)SITIOCN

AL4=N-

CURRENT

PATH

Figure 1. Top:schematic illustrating the path followed by the current when traveling from the anode D through the electrolyte C into the metal film B, then through the conductive film to the contact terminal A. Bottom: Qualitative plot of potential drops along the A-B-C-D pathway described above.

Contact Terminal

Ou I er

Wafer surface

IlkI}

2OE= 0

potential in the electrolyte

Figure 2. Schem atic of a cup plater with the corresponding equations for an infinitely thick seed layer. Case of secondary current distributuion with B utler-V oliner kinetics at the wafer s u rfa ce.

Electrochemical Society Proceedings Volume 99-9

91

"Feasibility tool-C.d.

on an infinite

USER-DEF.D X-Y CORDINATE PLOT

seed layer

15.2 mAIcm2

1.50000

0 - sigma 4.6% 1.30000 c.d. 1.100000

.90000

.70000

.50000 .00000

.20000

40000 r-coordinate

.60000

.OO00

1.00000

FIDAP 29 Jan 7.60 97 17:21:38

Figure 3. Normalized current distribution on an infinitely thick seed layer.

S"n

In-

--KVqSE~fl= gvq5A.n

v2•b potential = = Ct)0

in ttie electrolyte potential in thT seed layer

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U

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92uations

92

the electrolyteathandwfriefcad adpae

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anlpaedyerarhon the started

SentoyP, ,telectrocyeiat waoee ing ue, a

Electrochemical Society Proceedings Volumne 99-9

USER-DEF.D X-Y

Feasibility tool-Thickness evolution on a 1000A seed

coRD--ATE PLOT thik ckess c.d. 15.2mAitr2

1.50000

A 1.30000 G. A 1.10000

C D R

0.21 - 0.35 0.52 0.72 (1.,

6.9% 5.8% 4.3% 3.0% 2 0'

G

2..

1.211

.90000

.70000

.50000

.00155

.20124

.40093

.60062

.80031

FIDAP 7.60 10 Apr 97 10 :29:26

1.00000

r-coordinate

Figure 5. Transient normalized thickness distribution of the plated film at different time intervals. Starting seed layer IO00A. Feasibility

tool-Thickness evolution on a

104A seed

USER-DEF.D X-Y CORDINATE PLOT

5.00000

thickness c.d. 15.2mA/=2

4.02000

A

A B C D E -

0.13um 85% 0.28 i- 49%

0.4sum 32% 0.66urm 22% 0.1lum 16%

F - 1.20M., G &- ;Oý,

3.04000

H

-2.Oum

'% 1.1%

6.4%

2.06000

2.08000

.10000 .00155

.20124

.40093 r-coordinate

.60062

.80031

1.00000

FIDAP 9 Apr 7.60 186:11: 17

Figure 6. Transient normalized thickness distribution of the plated film onto a 104A seed layer

Electrochemical Society Proceedings Volume 99-9

93

100,000 ,

-----

,.

E10,000

MU

-

•

I-_

-

-

=

-

" '•"

*805 A

1134 1424 --Ir= •1681

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Radial Position (dimensionless) Figure 7. Comparison of experim ental thickness profiles (points) determ ined at different time intervals as copper was deposited onto a 500X seed layer to a final thickness of 2 p m with predicted (solid curves) profiles by the model. The agreement is fairly good at the intial stages of grow th (800A4) and at the final profiles (i.e. lprm and 1. 9 7 pmu ).

I0-~~

=0.0

==

=1.9

-i

0.1

44I

II

I

10

100

G, average final thickness Figure 8. N onuniform ity transient for a wafer w ith a perip herald axisym m etric contact for different values of the intial sheet conductance (G o).

94

Electrochemical Society Proceedings Vohlme 99-9

0.1

~~~~~~

L. L

__

0.010.1

10

I

G, average final thickness Figure 9. peripheral

Nonuniformity transient for a wafer with a axisymmetric contact for different values of the

Wagner number (WaT).

25 a) 2 W

20

A

0 Model 200mm

Cn*

Exp 200mm

Model 300mm

15

.-

Ct 10

E

0I)

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0)

0 100

10000 1000

100000

Average Metal Thickness (Angstrom) Figure 10. Relative o of the thickness profiles as a function of plated thickness for 200 mm wafers both sim ulated and experimental and model prediction for 300 mm wafers

Electrochemiical Society Proceedings Volume 99-9

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BATH COMPONENT CONTROL AND BATH AGING STUDY FOR A Cu PLATING SYSTEM USING AN INERT ANODE

Mei Zhu, Yi-Fon Lee, Demetrius Papapanayiotou, and Chin H. Ting CuTek Research, Inc. 2367 Bering Dr. San Jose, CA 95131

ABSTRACT

Electroplating of copper for ULSI interconnect applications is a new process for semiconductor wafer fabrication. In contrast to typical CVD or PVD processes where the chemicals used for film deposition are well controlled, monitor and control of electroplating bath for a manufacturing environment is a new challenge. We studied consumption of various bath components and showed that they are proportional to total amount of wafers plated. The predictability of the consumption rate of various bath components in our system allows replenishment strictly based on the number of wafers processed and amount of electroplating time. An extended plating experiment was run to test an automatic replenishment method without changing the plating solution. Copper film qualities and gap filling capability of the electroplating bath were also studied as the bath ages.

INTRODUCTION

Electroplated Cu is being used by more and more IC fabrication companies for advanced interconnect applications. Control of plating bath to achieve Cu films with consistent mechanical and electrical properties becomes an important issue for prolonged use of the plating bath. This paper addresses bath component control, additive consumption rate, within film contamination level and gap filling capability as bath ages. These are the key issues to successfully incorporating Cu electroplating process into IC fabrication. A Cu plating system with inert anode is more desirable than soluble anode for reasons such as less impurity incorporation, more consistent additive consumption rate, and less preparation time for plating after system idle time. However, the bath components in an inert anode system are perceived as more difficult to control because both Cu and sulfuric acid need to be balanced. Further

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Electrochemical Society Proceedings Volume 99-9

more, traditional inert anode system consumes more additives due to oxidation. The chemical reactions during electroplating of copper with an inert anode is described by the following equations, Cu 2÷ + 2e-21120 -4e -

Cathode: Anode:

Cu 4H+ + 02

(1) (2)

ElectroDep2000 from CuTek Research is a novel copper plating system with an inert anode.' However, in contrast to common perceptions, tight bath component control is easily achieved with a proprietary replenishing method where both the Cu and sulfuric acid are controlled simultaneously. The novel design of the processing chamber minimizes additive consumption due to oxidation. Therefore, the consumption rates of organic additives are comparable to that of a soluble anode system. Besides the consumption due to chemical reactions, another source of consumption is solution loss during wafer processing, which is also called drag out. This number has been consistent in our system. An automatic bath replenishment method was established based on a consistent consumption and drag out rate of various bath components. An extended electroplating experiment was carried out to test our model. Electroplating bath was sampled and analyzed periodically to check the validity of the model as the bath ages. Copper films deposited at different ages of the bath were analyzed for their film resistivity and impurity incorporation level. Patterned wafers were also deposited to assess gap filling capability as the bath ages. EXPERIMENTAL Extended electroplating experiment was carried out in a bench top setup, with plating parameters are the same as those used on CuTek's ElectroDep 2000. Electroplating was done during the normal working hours, and stopped for nights and weekends to simulate the stop-and-go operation. The electroplating bath was replenished periodically based on plating time. Cu 2+ and acid were balanced by adding a copper salt mixture into the plating bath. Cr was replenished with diluted HCI. Organic additives were replenished by a commercial additive system. The total addition volume is equal to the drag out volume during wafer plating process. Therefore, the total bath volume is a constant throughout the experiment. Samples from plating tank were taken periodically and analyzed. Cupric ions, sulfuric acid, and CI were measured by traditional titration method. Total

ST. Andryushchenko, W. Proceedings of 1

5

H. Hohkamnp, W. C. Ko, F. Lin, D. Papapanayiotou, B. Stickney, and C. H. Ting, 1998, Santa Clara, CA.

1h VMIC,

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organic carbons (TOC) was measured by oxidation method. Organic additives were measured by Cyclic Voltammetric Stripping (CVS) method. Blanket copper films were deposited at different stages of the bath to study the film quality as the bath ages. In film impurities were measured by Secondary Ion Mass Spectrometry (SIMS). Sheet resistance of the copper films was measured using a four point probe station. In some cases, the sheet resistance of the blanket films was monitored as a function of time after deposition to investigate its selfannealing characteristic. Patterned wafer pieces were also deposited at different ages of the bath to investigate gap filling capability of the bath as it ages under automatic bath replenishing method. Scanning Electron Microscope (SEM) was used to examine the cross sections of the patterned samples for gap filling capability. RESULTS AND DISCUSSIONS Bath component control Consumption of bulk chemicals is governed by chemical reaction and solution loss. Therefore, it is proportional to total plating time and number of wafers plated. To verify whether this is also true for trace amount of additive, we studied the consumption of additives in a close loop system. Fig. 1 shows the antisuppressor, a component of the plating additives, concentration versus plating time These data give a straight line which indicate that at constant current. consumption of additives follows the same trend as we have observed with bulk chemicals. Further more, additive consumption rate is independent with its starting concentration in the plating bath. Fig. 2 displays sulfuric acid concentration in the plating bath over five month The period of plating experiment with an automatic replenishing method. horizontal axis is expressed in terms of "turnovers". One turnover is the plating time needed to plate out the Cu content of the plating solution completely and replacing it with new Cu from additions made to the solution. In our set up, one turnover is equivalent to plating 3,000 200 mm wafers with 1.0 um thick Cu film. The fluctuation of sulfuric acid is less than (+/- 10%), which is within the process window of copper plating. Anti-suppressor is used to refine copper grain size and increase copper's ductility. The concentration of the anti-suppressor in our system is shown in Fig. 3 as a function of plating time. We were able to control this additive's concentration within its range over a long period of time with automatic addition of a constant amount of additives. This means that during system standby period there was no additive consumption, and also there was no self-induced decomposition during

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Electrochemical Society Proceedings Volume 99-9

system idle time. Furthermore, it indicates that the analytical method we used for monitoring organic additives is valid with aged bath. During electroplating, some of the organic additives form breakdown products which do not affect Cu deposition speed. The functional organic additives, together with the breakdown products, are measured as total organic carbon (TOC). The TOC level reaches steady state at long plating times. Numerical simulations were also performed to determine the steady state of total organic carbon level assuming zero additive incorporation in the copper film. Both experimental and simulation data are shown in Fig. 4. It shows that the TOC increase levels off after five turnovers, which means that plating bath has reached steady state. We have also observed a good match between the experimental data points and simulated curve. This indicates that additive consumption due to incorporation in the copper film is negligible when compared with additive decomposition during the plating process. Copper film quality as the bath ages. Impurity incorporation into the Cu film is the key concern for IC manufactures. Cu films deposited at different stages of the bath were sent out for SIMS analysis for impurities such as Na, K, Ca, Cl, S, C, and 0. Table 1 is a comparison of impurity levels incorporated into copper films deposited in fresh and aged bath. The impurity data shows that impurity incorporation is slightly less for films deposited in aged solution than that of fresh solution. Since C, S, N and 0 are the major elements in organic additive, their incorporation in copper film does not increase with bath aging indicates that accumulation of the breakdown organic molecules does not affect the properties of the Cu film. Table 1. Impurity incorporation in (plated) copper films (SIMS data in atoms/cc) Element C N 0 F S CI P Na Mg Li K

Fresh bath 2.0e18 2.5e18 9.0e17 4.0e15 1.0e18 5.0e18 4.0e16 1.6e14 1.6e14 8.0e13 7.0e13

Bath after 10 Turnover 6.0e17 1.6e18 5.9e17 5.0e15 9.0e17 2.4e18 4.0e16 1.3e15 1.4e14 7.0e13 6.0e13

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Resistivity of copper film and its self-annealing characteristic are important aspects of its quality. Fig. 5 shows sheet resistance of two copper films deposited at different stages of the bath. The copper film deposited in aged bath has the same sheet resistance as the film deposited in the fresh bath. Furthermore, the selfannealing curves of these two films are almost identical.

Gap filling capability

The gap filling capability of the bath was also tested throughout the experiment. Test wafer used for this study is 0.3 um trenches with aspect ratio of 5.5. Fig. 6 contains three SEM pictures of the sample deposited in the fresh bath, 5turnover, and 10 turnover with the same process recipe. All three samples have seamless filling of copper film. These results indicate that the gap filling capability of the bath remains good as bath ages.

SUMMARY

Our five months extended plating experiment demonstrated a superior Cu plating system using an inert anode. This system excels other commercial systems in that it has a predictable chemical consumption rate. Therefore, all chemical replenishment can be accomplished based on number of wafers processed and total plating time. Using an automatic bath replenishing method, various bath components were maintained within its process window during the experiment, which is equivalent to plating 30,000 wafers. Further more, consumption of the additives remains the same as the bath ages. In film impurity does not increase as the bath ages. Films deposited at different stages of aging have the same resistivity and self-annealing characteristic. This indicates that the accumulation of total organic carbon in our system does not affect copper film qualities. Most importantly, we also showed that gap filling capability remains good as the bath ages in our system. The electroplating bath in our study has reached its steady state after five turnovers. Therefore, we can conclude that the electroplating bath can be used indefinitely in the CuTek ElectroDep-2000 system.

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Fig. 1 Consumption rate of the anti-suppressor. 9

7

t;

2 4

0.0

CL

CL0 P

25

23

Plating time (relative)

2 Fig. 2 Sulfuric acid concentration over extended plating.

•-

150 One S100 0

o

turnover

means

that the total amount of Cu plated is equal to that in the container. In our case, it is equivalent to plating

50

M 0

3000 wafers 2

0

6

4

10

8

Plating time (turnover)

Fig. 3 Anti-suppressor concentration over ten turnovers.

157

t.

-

°*

°

71

*°-

5

0

0

2

6 4 # Turn Over

8

10

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Fig. 4, Total organic carbon (TOC) accumulation. TOC vs. Plating Time 250 -

200 8150

r -TOO

S100

A

(sirnijrion) TOC (experimental)

50 0~ 0

2

6

4

8

10

# Turn Over

Fig. 5, Resistivity and self-annealing of two copper films.

20 S16 E12

___________

"0 8

s , ,, l T° -U-10

1 TO T

S0 0

20

10

30

Time (Hr)

Fig. 6 SEM pictures of trenches deposited at different stages of the bath.

Fresh solution

102

After 15000 wafers

After 30,000 wafers

Electrochemical Society Proceedings Volume 99-9

THE EFFECTS OF PROCESS PARAMETERS ON THE STABILITY OF ELECTRODEPOSITED COPPER FILMS Brett C. Baker, David Pena, Matthew Herrick, Rina Chowdhury, Eddie Acosta, Cindy R. Simpson and Greg Hamilton Motorola, Semiconductor Product Sector Advanced Products Research and Development Laboratory 3501 Ed Bluestein Boulevard Austin, TX 78721 ABSTRACT Deposition process parameters are known to affect the properties of copper films. These process parameters include applied current density and additives in the bath chemistry, as well as the concentrations of these additives (1). Our focus in this work was to investigate the effect of current density on the self-annealing behavior of copper. Blanket copper films deposited at higher current densities were found to change more over time than those deposited at lower current densities. Films deposited at low current densities contain more impurities than those deposited at high current densities. Resistivity transients for a blanket film were compared and found to be similar to copper electrodeposited in lines. INTRODUCTION The grain growth/recrystallization of copper deposits due to self-annealing of electrodeposited copper is often quantified by measuring changes in resistivity and stress after deposition (2-4). These changes have been seen to take anywhere from hours (3,5) to weeks. Using deposition parameters to affect self-annealing by either increasing or decreasing the amount of change will offer some understanding as to why certain films are more stable than others. Changes in the degree of self-annealing and the rate of self-annealing were studied by altering the applied deposition current density as well as changing the deposition waveform. Typical impurities of C, S, 0 and Cl are incorporated in electrodeposited copper films. These impurities were measured in order to correlate impurity concentrations to the self-annealing phenomenon. In addition to monitoring the self-annealing of copper films with resistance and stress measurements on blanket films, resistivity changes in copper electrodeposited into lines were also measured.

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EXPERIMENTAL Prior to electrodepositing copper, poly Si wafers were deposited with oxide, barrier and copper seed. Blanket, 200 mm wafers were electrodeposited (ED) with a commercially available bath (Motorola formulation) in a commercially available plating tool. Four applied deposition current densities were investigated: 7, 13, 20, and 33 mA/cm'. A pulse-reverse (PR) and a DC waveform were used for each current density. The reverse current and timing of the PR waveform were identical for each applied deposition current. Other plating parameters including temperature and agitation were the same in all cases. The deposit thickness in all cases was approximately the same. Two wafers were processed at each condition; one wafer was measured over time for changes in stress and resistivity while one wafer was analyzed for impurity concentrations (carbon (C), sulfur (S), oxygen (0) and chloride (Cl)) with dynamic SIMS. The SIMS data presented are values of the impurities taken in the bulk of the deposit. The values shown are concentrations taken at the same depth in all cases. The trends presented have been reproduced for previously processed samples. Stress measurements were taken at room temperature on a standard stress tool. The radius of curvature was measured before the oxide deposition on each wafer and again after each subsequently deposited layer. However, the stress values reported here for the ED copper are in reference to the radius of curvature measurement of the seed prior to electrodeposition and are presented as the change in stress from the initial value immediately after deposition. Sheet resistance measurements were conducted with a noncontact, eddy current method. The resistance values used to calculate the changes reported are an average of 49 point measurements (6mm edge exclusion) on each wafer. The changes in resistance shown in Figures 2 and 3 are calculated with respect to the value measured immediately following deposition. In order to ensure that changes observed for the ED copper with time were not because of instability in the seed, one wafer with seed only was also monitored. A 1.5% decrease in the seed resistivity and a 50 MPa change in stress occurred in the first 5 days, after which very little change in resistivity and stress were observed. The time between seed deposition and ED copper was five days in all cases. Copper was also electrodeposited on a patterned wafer with lines of 0.4 and 19.3 micron widths. This wafer had the same underlying materials as the blanket wafers. Four terminal resistance measurements were performed on 16 lines of each width on a regular basis following deposition. RESULTS AND DISCUSSION Impurity concentrations for C, S, 0 and Cl are shown in Figures 1 and 2 as a function of current density for both waveforms, PR and DC. The concentrations of C and O in the deposit decrease with increasing current density. The S and Cl data display a shallow minimum at 20 mA/cm 2 . Overall, the impurity concentrations are found to be at least one order of magnitude higher at the lowest current density than at the highest current density. These trends are seen for both a DC and a PR waveform. For most current densities, the impurity concentrations of C, S, 0 and Cl are greater for a PR waveform than a DC waveform, although these differences are within the error of this particular technique.

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The concentrations of impurities are known to shift with other deposition parameters such as plating temperature (6). Figure 3 presents the transients in the resistance of the PR ED films. The resistance of films deposited at higher current densities decrease more with time than those deposited at lower current densities. The same trend is seen for the DC waveform case shown in Figure 4. However, larger decreases are seen for all current densities deposited with a DC waveform. This may be due to the fact that the average current density of the PR waveform is less than that of the applied current density of the DC waveform. The PR waveform used may also produce a variety of initial microstructures that could also account for these differences. The stress of the films was also measured after deposition. Changes in stress for the PR and DC waveforms are shown in Figures 5 and 6. The film deposited at the lowest current density, 7 mA/cm 2 , for both waveforms show similar transients to those shown elsewhere (3). This film is initially compressive (with respect to the substrate) and moves to a near zero stress with time. However, the stresses of copper films deposited at higher current densities show a very different behavior. Immediately after deposition, these films were tensile. They increase to a more tensile stress, however, they then relax towards zero stress. The changes in stress and decrease in stress relative to the initial stress are greater for films deposited at higher current densities. The increase in stress and then relaxation suggests a two-step mechanism of self-annealing for these particular films. Again, films deposited with a DC waveform show greater changes in stress than films deposited with a PR waveform. Once the samples reach equilibrium, they should be annealed. The bulk values for the resistivity at this point can be compared to note the effect of impurity concentration. We were also interested in comparing the changes in the resistance of electrodeposited copper in lines to ensure that what we observe on blanket films is not dramatically different. Resistance transients for 0.4 and 19.8 micron lines are shown in Figure 7. The decrease in resistance are in qualitative agreement with that observed in blanket films. Differences in the transients between the lines of different widths may be related to the thickness of the underlying copper seed. Preliminary data on resistivity transients as a function of seed thickness show larger decreases in the resistivity of ED copper films deposited on thinner seeds. The trends in stress and resistance imply that deposits with less impurities are less stable and self-anneal more at room temperature. However, changes in the microstructure and grain size as a function of current density are not well understood and may also be significant in explaining the data presented above. Microstructural differences between the PR and DC waveform deposits may also explain the larger deviations from initial values seen for the DC waveform data than for the PR waveform data. We have reason to believe from the ion beam images shown in Figures 8 and 9 that the initial deposit microstructures for low and high current densities are very different. In order to determinethe mechanism by which these films self-anneal, it will be necessary to monitor the mincrostructure of the deposits as they self-anneal. In addition to ion beam imaging, orientation in the film via XRD as a function of time needs to be studied. With this additional information, the role that impurities and microstructure play in self-annealing may be better understood.

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CONCLUSION We have demonstrated that the applied current density during electrodeposition affects the transients in resistance and stress of the film. Impurity concentrations decrease with increasing current density for both waveforms studied, PR and DC. Films that contain less impurities display larger changes in resistance and stress and self-anneal more than films with larger impurity concentrations. The films deposited with a DC waveform display even larger changes with time than deposits from PR waveforms. Stress transients also suggest that there is a two-step mechanism for self-annealing of films deposited at larger current densities. ACKNOWLEDGMENTS We would like to give special thanks to the following contributors for their support and help: Martin Gall, LaSandra Butler, Betty Burleson, Mike Tiner, Steward Rose and Kitty Corbett (APRDL) and Kari Noehring and Erika Duda (Materials Characterization, AZ). REFERENCES 1. J. J. Kelly, C. Tian and A. C. West, "Leveling and Microstructural Effects of Additives for Copper Electrodeposition", J. Electrochem. Soc., submitted, 1998. 2. T. Ritzdorf, L. Graham, S. Jin, C. Mu and D. Fraser, IITC Conference proceeding, 1998, pp. 887-894. 3. C. Cabral, P. C. Andricacos, L. Gignas, I. C. Noyan, K. P. Rodbell, T. M. Shaw, R. Rosenburg and J. M. E. Harper, "Room Temperature Evolution of Microstructure and Resistivity in Electroplated Copper Films", Advanced Metallization and Interconnect Systems for ULSI Applications in 1998, Colorado Springs, CO, 1998. 4. C. Lingk and M. E. Gross, J. Appl. Phys., 84, 5547 (1998). 5. Q. T. Jiang, R. Mikkola and B. Carpenter, "Room Temperature Film Property Changes in Electro-deposited Cu Thin Films", AMC Conference, Colorado Springs, CO, 1998. 6. Q. T. Jiang, R. Mikkola and B. Carpenter, "Critical Influence of Plating Bath Temperature on Cu Damascene Electrodeposits", MRS Spring Conference, San Francisco, CA, 1999.

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DOPANTS IN ELECTROPLATED COPPER' P.C. Andricacosa2 , C. Parks', C. Cabral', R. Wachnikb, R. Tsai', S. Malhotrab, P. Lockeb, J. Fluegelb, J. Horkansa, K. Kwietniak', C. Uzoh', K.P. RodbelP, L. Gignaca, E. Waltonc, D. Chungc, R. Geffkenc "IBM Research, Yorktown Heights, New York 10598 bIBM Microelectronics,Hopewell Junction, New York 12533 VIBM Microelectronics,Essex Junction, Vermont 05452

ABSTRACT Dopant incorporation and resistance transients in unpatterned films of electroplated copper were studied as a function of bath age and other plating parameters such as current density, agitation, temperature, additive concentration and chloride concentration. Dopant content exhibits a strong dependence on agitation and additive concentration; it also depends on current density but to a lesser extent. Chlorine content of the film is independent of chloride content in the bath. Dopant incorporation is independent of bath age. Resistance transients are slower the higher the dopant content of the film.

Copper electroplating from baths containing additives has been shown to fill Damascene structures because of a phenomenon called supetfilling in which plating rates increase along the feature sidewalls and bottom making it possible to plate void-free and seamless deposits [1 - 5]. In the model of superfilling [1], additives are consumed at the wafer surface causing incorporation of impurities or "dopants" in the plated film. We determine here the plating parameters that play a role in defining dopant levels. We further explore the effect of these parameters on the kinetics of the resistance transformation of electroplated copper. We conclude that there is a correlation between dopant levels and resistance-transient kinetics; namely, the higher the dopant level, the slower the transformation.

EXPERIMENTAL A design-of-experiments (DOE) software package called BestDesign was used to identify the plating parameters that define dopant content. BestDesign is a novel system for designing optimum DOE matrix that minimizes the number of runs while maximizing accuracy of response surface estimation satisfying a variety of application specific constraints on the responses, inputs or both. Existing experimental runs are taken advantage of while designing the rest of the matrix.

SDopants are

impurities in the plated film; additives are substanes added to the plating solution

to improve the properties of the plated film 2 Email: [email protected]

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It also finds the best process inputs that optimize multiple objectives or responses and process window sizes, resulting in optimum processes that are least affected by unwanted process or equipment variations. It is also capable of finding multiple solutions satisfying given constraints, as well as finding single global optimum without the trouble of local minimum. Arbitrary constraints (linear or nonlinear) can be imposed while seeking the optimum solutions. Parameters such as bath chemistry, current density, and level of agitation were varied over wide ranges. In order to save wafers and prevent extensive bath-chemistry modifications in a wafer-plating tool, we made use of a rotating wafer holder shown in Figure 1. Use of this apparatus required less than I liter of plating solution while permitting accurate control of such parameters as rotation speed and current density. Design of the wafer holder permitted electrical contact to be made in the front of the wafer fragment. Typically wafer fragments 2 cm x 2 cm in size were cut and mounted with a circular area 0.5 inch in diameter exposed to the electrolyte. All runs were performed on wafer fragments covered with a sputter-deposited copper seed layer. The weight of the wafer fragment was measured before and after plating. A plating experiment was characterized as successful if the Faradaic current efficiency was well in excess of 0.9. Dopant levels in the plated copper film were determined by Secondary Ion Mass Spectrometry (SIMS). SIMS profiles were measured with a Cameca ims-5f tool using 14.5 keV cesium primaries, negative ion detection, and sufficient mass resolution to separate S- from 02. Quantification was done using ion implant references of "3C, l"0, and 35C1 into copper with S being in arbitrary units. A nominal copper density of 8.92 g/cc was used to convert to units of parts per million by weight (ppmw). Sheet resistance measurements were made close to the center of the wafer fragment using a 4-point probe technique; transients were recorded at room temperature, although measurements at higher temperatures were performed in most instances. Sheet resistance values were normalized with respect to the value measured immediately (within 10 minutes) after plating. Dopant dependence on bath age necessitated the preparation of baths with controlled age. In order to accomplish this, bath samples were obtained from IBM's semiconductor development site at East Fishkill, New York, and mixed with fresh baths with the same composition. Typically aged baths had been in operation in excess of 1 year. Mixing ratios of 25 % by volume fresh bath + 75 % by volume aged bath, 50/50, and 75/25 were used together with 100 % fresh and 100 % aged baths. Bath age was measured by HPLC [6]. RESULTS AND DISCUSSION Results of the matrix experiments are shown in Figures 2,3, and 4. With a few exceptions especially at very low chloride concentrations (not shown here), the dependence of dopant content on a parameter was similar for all dopants. Rotation speed and additive concentration were more important in defining dopant content than current density. As shown in Figure 3, C content decreased with current density especially at the higher rotation speeds, but increased much more rapidly with rotation speed and additive concentration. The latter also played a key role in defining the CI content of the film. As shown in Figure 4, Cl content depends weakly on the Cl concentration in the bath, but very strongly on the additive concentration. In order to verify the results of the DOE study, we performed experiments in which we varied rotation rate and additive concentration keeping other parameters such as deposition temperature and remaining bath chemistry constant. Results shown in the table below confirm the findings of the

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DOE experiments: as the additive concentration is doubled at constant rotation speed, dopant content approximately doubles. As rotation speed quadruples, dopant content approximately doubles in agreement with Levich theory [7 1 and mass transport controlled dopant incorporation.

Additive Concentration (arb. units) 1 2 2 3

Rotation Speed (rpm) 85 85 350 350

Carbon in Film (ppmw) 16 36 60 101

Chlorine in Film (ppmw) 11 19 29 42

Oxygen in Film (ppmw) 26 53 92 132

Next we examined the role of bath age on dopant content. Bath samples from wafer plating stations were withdrawn and mixed at different proportions with fresh baths of identical composition as described before. Results of Figure 5 suggest that dopant incorporation does NOT depend on bath age. Extensive use of baths therefore is not expected to cause performance deterioration attributable to impurity incorporation. This result of course depends to a certain extent on the particular chemistry used as well as the level of bath maintenance and control employed. Measurements of Rs transients were conducted in order to assess the effect of dopants / plating parameters on the kinetics of the transformation of electroplated copper [8]. Results are shown in Figure 6. For a constant bath temperature, the parameters that affect dopant incorporation the most are current density, rotation speed, and additive concentration. It is seen that an increase in additive concentration and rotation speed leads to a delay in the resistance transformation and to an increase in dopant content. Similarly, an increase in plating current density causes an acceleration of the resistance transformation and a decrease in dopant incorporation. It is thus concluded that dopant content increase causes delays in the resistance transformation of plated copper in accordance with the observations of Harper et al [8]. Results shown in Figs. 7 and 8 corresponding to different bath temperatures as well as plating from three different commercial chemistries are consistent with this correlation. Dopants Increase with additive concentration Increase with agitation Decrease with current density

Kinetics of Rs Transient Decrease with additive concentration Decrease with agitation Increase with current density

In summary, we have determined that parameters such as level of agitation, additive concentration, and current density influence the dopant incorporation in plated copper in a systematic manner. Bath age does not have an effect on dopant amounts. The resistance decrease of plated-copper films is slowed down by all parameters that cause an increase in dopant levels.

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REFERENCES 1. P.C. Andricacos, C. Uzoh, J.O. Dukovic, J. Horkans, and H. Deligianni, IBM J. Res. Develop., 42, 567(1998). 2. P.C. Andricacos, Interface, 8(1), 32(1999). 3. P.C. Andricacos, Interface, 7(1), 23(1998). 4. P.C. Andricacos, C. Uzoh, J.O. Dukovic, J. Horkans, and H. Deligianni, in Advanced Metallization Conference in 1998 (AMC 1998), C.S. Sandhu, H. Koerner, M. Murakami, Y. Yasuda, N. Kobayashi, Editors, p. 29, Materials Research Society, Warrendale, PA (1999). 5. P.C. Andricacos, C. Uzoh, J.O. Dukovic, J. Horkans, and H. Deligianni, in Electrochemical Processingin ULSI FabricationI and Interconnect and Contact Metallization: Materials, Processes, and Reliability, P.C. Andricacos, J.O. Dukovic, G.S. Mathad, G.M. Oleszek, H.S. Rathore, C. Reidsema Simpson, Editors, PV 98-6, p. 48, The Electrochemical Society Proceedings Series, Pennington, NJ (1999). 6. J. Horkans, unpublished results. 7. V.G. Levich, Physicochenmical Hydrodynamics, p. 297, Prentice Hall, Englewood Cliffs (1962). 8. C. Cabral Jr., P.C. Andricacos, L. Gignac, I.C. Noyan, K.P. Rodbell, T.M. Shaw, R. Rosenberg, J.M.E. Harper, P.W. DeHaven, P.S. Locke, S. Malhotra, C. Uzoh, and S.J. Klepeis, in Advanced Metallization Conference in 1998 (AMC 1998), C.S. Sandhu, H. Koerner, M. Murakami, Y. Yasuda, N. Kobayashi, Editors, p. 81, Materials Research Society, Warrendale, PA (1999). 9. J. Harper, C. Cabral, Jr., P.C. Andricacos, L. Gignac, I.C. Noyan, K.P. Rodbell, and C.K. Hu, J. Apple. Phys., 86(5), 2516(1999).

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ECD SEED LAYER FOR INLAID COPPER METALLIZATION L. Chen and T. Ritzdorf Semitool Inc., ECD Division 655 West Reserve Drive, Kalispell, MT,59901

ABSTRACT A novel approach is presented in this paper for inlaid copper metallization. Contrary to the traditional approach regarding seed layer application, an ultra-thin copper flash layer, serving as an adhesion layer, is deposited by a PVD process. This flash adhesion layer is conformally enhanced from Semitool's specially formulated plating solutions by electroplating. The ECD seed layer is then used to deposit copper from an acid copper sulfate plating bath. The advantage of depositing an ultra-thin copper flash adhesion layer and ECD seed layer, rather than a relatively thick PVD copper seed layer, is that pinching off of small trenches or vias can be avoided, while ensuring adequate sidewall coverage. INTRODUCTION Copper is going to replace aluminum as the material of choice for semiconductor interconnects due to its low electrical resistance and high electromigration resistance (14). An inlaid interconnect is used for copper metallization in which the insulating dielectric material is deposited first, trenches and vias are formed by patterning and selective dielectric etching, and then diffusion barrier and copper seed layer are deposited into the trenches and vias (5). Electrochemical deposition (ECD) has been found to be the most efficient method to deposit copper for void-free fill, and gives the best electromigration resistance performance of the interconnect (6,7). The electrodeposition of copper is generally suitable for applying copper to an electrically conductive copper seed layer, often prepared by either PVD or CVD. For better gap fill, conformal copper seed layer in the feature is highly desirable. CVD generally provides good conformal coatings inside features but with poor adhesion. PVD can readily deposit copper on the barrier layer with good adhesion when compared to CVD processes. The disadvantages of PVD processes, however, are that they tend to leave thinner sidewalls and limited bottom coverage (nonconformal) as shown in Figure 1. Since the ECD process relies on the seed layer to carry current from the top of the trench to the bottom, insufficient PVD copper seed layers tend to produce voids in the feature. To avoid this problem, the normal approach for PVD processes is to deposit a thicker seed layer (- 1000 to 2000 A) so sufficient sidewall and bottom coverage (-IOA) can be achieved. However, this approach will not be viable for

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more aggressive features because the upper portion of the feature is effectively closed off by the PVD seed layer deposition prior to the ECD process, thus creating center and/or bottom voids in the feature. Conventional wisdom indicates the eventual need of costly CVD process to overcome these problems. In this work, contrary to traditional thoughts regarding seed layer application, a novel approach was used for copper metallization as shown in Figure 2 (8). In this approach, an ultra-thin copper flash is first deposited by PVD, mainly for the purpose of good adhesion. This ultra thin adhesion layer is conformally enhanced from our specially formulated plating solutions by electroplating prior to the full deposition from an acid copper sulfate plating bath. By depositing an ultra-thin layer, rather than a relatively thick one, pinching off of small trenches or vias can be avoided. EXPERIMENTAL All experiments were performed on 200mm wafers using Semitool's plating tool. Trenches with various geometries and aspect-ratios were patterned in silicon oxide coated wafers. Titanium Nitride (TiN) or Tantalum (Ta) diffusion barriers with nominal thickness of 300 A were deposited on the trenches by vacuum techniques such as PVD or CVD. Unless specified differently, a PVD copper adhesion layer with a nominal thickness of 200A was deposited on top of the barrier by PVD techniques. This thin PVD copper adhesion layer was electrochemically enhanced in Semitool's proprietary ECD seed plating solution prior to the full deposition from an acid copper sulfate bath. Plating time for the ECD seed was determined by the thickness of desired total copper seed layer. Three different plating baths for ECD seed were examined for conformal plating. Some wafers were plated directly using the acid copper sulfate bath without the ECD seed enhancement and were compared to those processed with ECD seed enhancement. Potential sweep measurements were obtained using an EG&G potentiostat (Model 263). A three-electrode system was used in which a piece of wafer served as cathode, a large area of platinum sheet as counter-electrode, and a platinum wire as reference electrode. Scanning Electron Microscope (SEM, Amray) and Focused Ion Beam (FIB, FEI Dual Beam 820 ) were used to examine the cross-sections of features after ECD seed and full-fill deposition. Chemical etching rate of PVD copper seed as a function of immersion time in the ECD seed plating solutions was obtained by measuring the thickness change using a four point probe station (CDE, RESMAP).

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RESULTS AND DISCUSSION ECD Seed Layer From Different Plating Solutions Various ECD seed plating solutions were evaluated for conformal copper deposition. Figure 3 compares results obtained from three ECD seed baths. Figure 3a shows the SEM cross-section of collimated PVD copper with a nominal thickness of 1000A. The copper coverage inside the trenches was very limited and the step coverage was estimated to be less than 5 percent. Figure 3b shows the ECD seed copper deposit obtained from plating bathl. Smooth deposits were obtained on the top of trenches, However, large copper crystals were observed on the sidewalls of the trenches. Apparently this bath cannot be used for ECD seed process because these large crystals may cause voids. Figures 2c and 2d show the SEM cross-sections after ECD seed deposition from bath2 and bath3, respectively. Conformal copper deposits were obtained and the step coverage for ECD seed process was found to be higher than 60%. This provides a great improvement for the total seed coverage (PVD copper plus ECD seed) within the trenches and can significantly improve the gap fill from an acid copper sulfate bath. Characterization of ECD Seed Plating Bath Copper Direct Plating on Barrier Layer. The use of an ultra-thin copper flash adhesion layer introduces its own problems. One of the most significant of these problems is the fact that an acid copper sulfate bath, the most commonly used plating solution for copper interconnects, cannot be successfully used to fill trenches on such ultra-thin layers. This is because the high acid concentration bath normally attacks the copper at quite a high rate. In addition, copper oxide can readily form when exposed to an oxygen-containing environment and its removal in the acid copper sulfate bath can further reduce the copper seed coverage, particularly on the sidewall inside the feature where the proportion of copper oxide to metallic copper can be significant for a thin copper layer. The chemical removal of copper oxide may result in non-continuous coverage of copper on the barrier layer. Such non-continuous seed can be a potential spot for voids during the acid copper plating. Another problem related to the ultra-thin copper adhesion layer is that the ultrathin layer cannot uniformly cover the barrier and may have some spots which are not coated by copper. Copper cannot be plated directly on the exposed barrier layer from acid copper sulfate baths. Therefore, it is desirable for the copper deposit from the ECD seed bath to have relatively good adhesion to barrier layer. To examine the adhesion of copper deposits to barrier layers, direct plating on barrier layer was compared between ECD seed bath and an acid copper sulfate bath. The acid copper sulfate bath normally produces powdered deposit with poor adhesion that can be easily washed off with water. ECD seed bath provides a continuous, smooth copper deposit with much better adhesion to barrier layers such as TiN, TaN, and WNx. Table 1

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summarizes the resistance change and the adhesion of plated copper seed as a function of copper seed thickness. The resistance was measured using a multimeter over a distance of -lcm. As expected, thicker ECD copper seed resulted in lower resistance. The adhesion of plated copper seed was strongly dependent on seed thickness. The ECD seed with a thickness of less than 1050A passed the tape-pulling test while the one with 21 OOA failed the test, indicating the adhesion is not good enough for thick copper. Figure 4 shows a SEM cross-section of trenches which were plated with 700A ECD seed layer on TiN barrier followed by copper full fill from a standard copper sulfate bath. Delamination between the copper and barrier was observed One way to improve adhesion, as proposed in the paper, is to use an ultra-thin PVD adhesion layer prior to the ECD seed layer deposition. Chemical Etching Rate in ECD Seed Bath. Since a very thin PVD copper adhesion layer is used, the ECD seed bath should have a slow chemical etching rate on copper to minimize the thickness reduction of the original PVD copper layer. Figure 5 presents the chemical etching rate of a copper seed layer as a function of immersion time in the ECD seed bath. The wafer was immersed in ECD seed bath for a predetermined time for chemical etching and then the thickness of the copper film was determined by using a 4point-probe station. An etching rate of less than 1A per minute was obtained for the ECD seed bath. This is at least 20 times slower than the acid copper sulfate baths, which were determined to etch at roughly 20A per minute. For clarity, the thickness change in an acid copper sulfate bath is included in Figure 5 for comparison. Conversion of Copper Oxide to Metallic Copper in ECD seed Bath. Copper oxide can form readily on PVD copper seed if the seed is exposed to an oxygen-containing environment prior to the ECD seed process. The oxide is normally removed in an acid copper plating solution by a chemical dissolution process prior to the plating. For a thin seed layer, particularly on the sidewall of the feature, the removal of this oxide can lead to a significant reduction in the seed thickness. Thus, the ECD seed bath should not dissolve the copper oxide but convert the copper oxide to metallic copper to minimize the thickness reduction. Figure 6 compares the potential sweeps obtained from our ECD seed bath. The dotted curve was obtained on a copper deposit and the solid one on copper-oxide-covered deposit. The copper oxide was formed by heating the copper deposit at 140'C for 10 minutes in air. As seen from Figure 6 for copper deposit, one current peak was obtained prior to the onset of hydrogen evolution and this peak can be related to copper plating from the ECD seed bath. For the oxide-covered deposit, two additional current peaks were obtained before the copper plating from the ECD seed bath. Since the only difference between these two samples is the existence of copper oxide, it is reasonable to assume that these two additional peaks are related to the conversion of copper oxide to metallic copper. This also eliminates the concern that there is any possible existence of copper oxide between the PVD adhesion layer and ECD seed layer.

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Uniform Deposition from ECD seed Bath. Electroplating relies on the seed layer to carry current from the edge to the center of the wafer. Insufficient seed layer generally provides thick deposits at the edge and thin deposits at the center. Typically for a thick PVD seed layer, uniformity is achieved by proper reactor design to compensate for seed layer resistance effects and the acid copper sulfate bath is optimized for gap fill and film properties such as film resistivity and electromigration resistance. However, for this very thin copper adhesion layer, a plating bath with low conductivity is beneficial because the effect of PVD adhesion layer on deposition non-uniformity is less significant with a lower conductivity plating solution. The conductivity for an acid copper sulfate bath was found to be around 500mS/cm while that for our ECD seed bath was -20mS/cm, more than 10 times less conductive. Figures 7 through 10 compare SEM cross-sections of trenches plated with the acid copper sulfate bath and ECD seed bath. Figure 7 shows PVD adhesion layer at the center (a) and at the edge (b) of the wafer deposited by a long-throw PVD system. The target thickness of PVD copper layer was 200A. The barrier was TiN with a thickness of 300A. Due to the very thin PVD copper layer, it is very difficult to distinguish the PVD copper from TiN barrier. Figure 8 shows the cross sections after plating 75 coulombs from the acid copper sulfate bath. No plating was obtained at the center of the wafer while a powder deposit was seen at the edge of the wafer. This indicates that the acid copper sulfate bath cannot be used to plate copper on this 200A adhesion layer. Figure 9 compares the cross-section after plating 75 coulombs from an ECD seed bath. Uniform deposits were obtained both at the center and edge of the wafer, indicating the advantage of using ECD seed on the thin PVD copper layer. In addition, the side and bottom step coverage was found to be over 60%, much higher than for PVD processes. Figure 10 shows SEM cross-sections after plating 75 coulombs ECD seed copper and, in this case, a PVD adhesion layer with a nominal thickness of 1OA was used. Similar to those in Figure 9 with a 200A PVD layer, a uniform deposit across the wafer was obtained. This demonstrates the capability of the ECD process on a very thin PVD adhesion layer. It should be mentioned that the adhesion of the copper deposit to a very thin PVD copper layer passed all the tape-pulling tests. Full-Fill With Standard Copper Sulfate Bath After ECD seed Process Full fill of features was carried out on some of the wafers after ECD seed. Figure 11 compares cross sections for trenches (0.25l., 4:1 AR) with 200A PVD copper. Figure 1 a was plated directly from an acid copper sulfate bath without our ECD seed and Figure 1lb was plated with ECD seed. As expected, bottom-voids were observed in the trenches without ECD seed and complete void-free fill was obtained after ECD seed, indicating the need for ECD seed with a very thin copper layer.

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The ECD seed process was also examined with via wafers. Figure 12a shows a conformal ECD seed layer on vias with an originally 200A PVD copper adhesion layer. Excellent step coverage was achieved by the ECD seed process. This ECD seed can be used for void-free filling from the acid copper sulfate plating solution as shown in Figure 12b for vias with 0.3.tm, 4:1 aspect ratio. Note that the IMP seed layer was only 200A thick. Figure 13 shows the effect of ECD seed thickness on via fill. A nominal PVD copper thickness of 400A was used for this experiment and the via size was O.4A with 3:1 aspect ratio. Figure 13a shows the FIB image of features plated directly from an acid copper sulfate bath without any ECD seed. Large bottom-voids were observed in the vias, indicating insufficiency of the PVD copper coverage at the bottom of the vias. Plating 200A ECD seed reduced the bottom-voids as shown in Figure 13b. Void-free fill was obtained when the ECD seed thickness was 400A or 800A and their corresponding cross-sections are shown in Figures 13 c & d. It should be mentioned that our ECD seed bath can also be used to enhance the thin seed layer inside aggressive features even if the PVD copper thickness is more than IOOOA. Figure 14 compares cross-sections of original IOO0A PVD seed, after 800A ECD seed, and void-free fill after the ECD seed. Bottom-voids were often observed for this trench (0.211, 6:IAR) without the ECD seed enhancement. Figurel4b shows the ECD seed layer and copper coverage in the feature was significantly increased. Figure 14 c presents the void-free fill after the ECD seed process. CONCLUSIONS A process has been developed using Semitool's patent-pending ECD seed layer deposition. This process is capable of depositing a copper film on very thin PVD copper flash layers that are used to provide adhesion for the ECD seed. The proprietary chemistry was developed so as not to etch the copper adhesion layer, and it is able to convert copper oxide to copper metal. Submicron trenches and vias have been successfully filled after the ECD seed process. The ECD seed layer process is useful in extending the inlaid copper metallization process beyond the limit of PVD seed layers. This process will allow the semiconductor industry to use current low cost copper deposition processes, even as device geometries continues to shrink. ACKNOWLEDGEMENTS The authors wish to thank the engineers and technicians of Semitool's Electrochemical Deposition Division for their support and encouragement on this work. Special thanks are due to Laura Rashid and Mike Funk for taking the SEM and FIB images.

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REFERENCES 1. P. Murarka, in "Metallization: Theory and Practice for VLSI and ULSr', P. 3, Butterworth-Heinemann, Stoneham, MA (1993). 2. D. Edelstein, et al, in "Full copper wiring in a sub-0.25 Pm CMOS ULSI technology", Proc. IEEE IEDM, pp. 773-776 (1997). 3. S. Venkatesan, et al, "A high performance 1.8V, 0.20 pjm CMOS technology with copper metallization", Proc. IEEE IEDM, pp. 769-772 (1997). 4. P. Singer, SemiconductorInternational,20(13,November),67(1997). 5. P. Singer, Semiconductor International,20(9,August),79(1997). 6. Nguyen, Y. Ono, D. R. Evans, Y. Senzaki, M. Kobayashi, L. J. Charneski, B. D. Ulrich and S. T. Hsu, in" Interconnect and Contact Metallization", Eds. H. S. Rathore, G. S. Mathad, C. Plougonven and C. C. Schuckert, PV 97-31, The Electrochemical Society Inc., Pennington, NJ. 7. C. Ryu, et al. "Electromigration of Submicron Damascene Copper Interconnects", 1998 Symposium on VLSI Technology, June 8-11, 1998. 8. L. Chen, US patent (Filed in Jan.1998). Table 1. Dependence of copper seed resistance and adhesion on ECD seed thickness (the ECD seed was directly plated on TiN barrier layer) Plated Copper Thickness (A) 0 175 525 700 1050 2100

PVD Cu Seedlayer

S)J7

Barrier layer

..-...

Figure 1: A schematic representation for non-conformal PVD seed layer.

128

Resistance P() 130 87 18 11 4 2

Tape Test N/A Passed Passed Passed Passed Failed

ECD • Cu Seedlayer

Barrere layer

4

.f ,<

Figure 2: Semitool's deposition process.

ECD

seed

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(a) 1000A PVD copper before ECD seed

(c) After ECD seed in bath2

(b) After ECD seed in bathl

(d) After ECD seed in bath3

Figure 3:Comparison of copper deposits plated from different ECD Seed baths.

Figure 4: SEM cross-section of trenches (pIi, 2:IAR) filled with 700A ECD seed on TiN barrier followed by standard copper full fill.

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1800 1 4

0_•"_

-

_" • - _ _-_-

0-

ECd ,CudF ilm Oxide-covoru Cu Flm"

1200 1000 000

Auo - Coppenbath (20O/ran)

"

-ECh 5400 P

Seed Cu

p

latid Cuon 7

fonte (otted

0neco

250OA TON 1500A C.

200 0

10

20 30 40 Etching Time (min)

N0

80

Figure 5: Comparison of etching rates of 1500A PVD copper in the acid copper bath and ECD seed bath

(a) Center

Potential (V)

Figure 6: Potential sweeps obtained with ECD Seed bath on plated copper (dotted line) and on copper oxide (solid)

(b) Edge

Figure 7: 200A PVD copper adhesion layer at the center (a) and edge (b) of wafer for trenches (0.25gt, 4:1AR)

(a) Center (b) Edge Figure 8: Plated 75 coulombs from the acid copper sulfate bath on trenches (0.25/am, 4:1 AR.) with 200A PVD copper layer.

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I

1LII

(b) Edge (a) Center with Figure 9: Plated 75 Coulombs from ECD seed bath on trenches (0.25 pm, 4:1 AR.) 200A PVD copper layer.

(b) Edge (a) Center (0.25ýtm, 4:1 AR.) with trenches on bath seed ECD from Figure 10: Plated 75 Coulombs layer. copper PVD 1OOA

(a) Without ECD seed

(b) With ECD seed

Figure 11: Comparison of gap-fill for trenches (0.25 jim, 4:1 AR) with 200A PVD copper layer.

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(b) Void-free fill after ECD seed (a) ECD seed profile on vias Figure 12: Cross sections of vias (0.3lim, 4:1 AR.) with 200A IMP copper layer: (a) after plating 75 coulombs ECD seed and (b) after full-fill on the enhanced ECD seed layer.

(a) No ECD seed enhancement

(c) With 400A ECD seed

(b) With 200A ECD seed (d) With 800A ECD seed Figure 13: Comparison of the Gap-Fill using ECD Seed on 400A PVD copper for vias (0.4prm, 3:1 AR).

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(a) I(0)(A VVD

(b) After 800A ECD Seed

(c) Full-fill after ELCD seed Figure 14: Comparison of the gap-fill using ECD seed on IOOOA PVD seed trenches

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Thermodynamics of Faceting on the Submicron Scale in Copper Electroplating Q. Wu and D. Barkey Department of Chemical Engineering University of New Hampshire Durham, NH 03824

Copper single crystal electrodes with orientations of (100) and (110) were imaged by atomic force microscopy during copper deposition in acid sulfate solution with and without chloride. At low overpotentials, facets appear only in the presence of chloride. The roughening and faceting transitions observed as potential was varied, and the stabilization of facets and terrace edges by chloride are analyzed in thermodynamic terms. Introduction The atoms on the surface of a copper crystal immersed in a plating bath are mobile at ambient temperature and will tend toward an equilibrium configuration by galvanic action and by surface diffusion. On the macroscopic scale, this configuration may be faceted and contain regions of singular flatness. Alternatively, the surface may be rounded, with a topography smoothed out by a nearly isotropic surface tension. 1,2 Corresponding to these macrotopographies are distinct microscopic configurations, the singular surface and the microscopically rough surface. Facets give way to smoothly rounded 3 4 features as the temperature is raised above the local roughening threshold. ' At ambient temperature in vacuum, the equilibrium shape of copper is faceted, and even viscinal faces roughen only at elevated temperatures. Cu(110) has been shown to remain singular at least to 900 K 5 , and Cu(100) and Cu(lll) to at least 770 K6 . Using helium scattering, Villain et al7 found a roughening temperature T, of 431 K for Cu(113), 356 K for Cu(115) and 315 K for Cu(117), while Fabre et al found Tr=380 K for Cu(1l5). The interpretation of these measurements has since been questioned, and X-Ray scattering, 9 LEED10 and recent He scattering" measurements suggest higher transition temperatures. Hoogeman et a112 report direct observation of a rougheing transition at 465 K on Ag(115) by STM. At the same time, facets are not always

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observed on copper surfaces in sulfate solution, whereas they can be produced easily if chloride is added to the solution. These observations suggest that immersion in solution lowers the roughening temperature of copper surfaces by adsorption or by inclusion of contaminants10 ' 13 , and that the singular surfaces are restored by addition of chloride, which raises Tr. There is already experi14 16 mental evidence that the Cu(100) face is reversibly stabilized by chloride, 14- 15 ' effect. and Vogt et al have identified this stabilization as a thermodynamic In this paper, we advance a thermodynamic interpretation of the effect of chloride on copper surfaces in plating solutions. We have pursued this interpretation experimentally by observation of faceting on the sub-micron scale on low-index surfaces of copper single crystals. In the two sections that follow, relevant portions of the theory of equilibrium roughness and its relation to macroscopic faceting are presented. We consider how adsorbed chloride may stabilize the Cu(100) surface at equilibrium and relate this mechanism to simple models of thermal roughening. AFM experiments on copper plating on low-index copper crystal electrodes axe then described and related to the theory. Macroscopic Description Immersion of a copper crystal in an electrolyte solution containing the metal ion fixes the electrochemical potential p of the metal, defined as the partial derivative of the total Gibbs free energy G of the solid phase with respect to the number of mols n of metal. OG = On G, WOG 8 =Onn_+ -5-[] On

[2

Subscript o refers to the bulk phase and subscript s to the surface. The first term is the chemical potential of the bulk metal pro. The second term is obtained by integration of a, the surface excess free energy per unit area, over the metal-solution interface. IL= po +0

ds

Because the chemical potential of the metal has a single value, the second term can be expressed as a local constraint on the curvature K.1,2 For a two dimensional crystal, S=/to + tu(O + -•),

[3]

P=o+ KV4

[4]

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where v is the molar volume and 0 the local surface orientation. The sum of a and its second derivative with respect to orientation is the surface stiffness According to Eq. [41, the electrochemical potential of a macroscopic or planar electrode, for which K is either small or zero, is independent of surface orientation because addition or removal of material changes only the quantity of metal in the bulk and not the surface shape or area. For sufficiently small crystals or surface features, the curvature is appreciable, and the equilibrium potential is shifted from the bulk value by a capillary potential represented by the second term on the right hand side of Eq. 14]. To obtain the equilibrium shape, Eq. [4] is written in terms of surface orientation 0 and a position coordinate I defined as distance along the surface. K=

-l

=

k

The characteristics of the equilibrium surface shape are determined by the dependence of a on 0.1 Along close packed orientations at low temperature, the surface stiffness approaches infinity, and the curvature approaches zero, forming facets. Along these singular orientations, a negative curvature (convex) produces a negative capillary potential, and the protrusion retreats to form a flat interface. A positive curvature (concave) produces a positive capillary potential, and the surface advances to form a fiat interface. For orientations with finite positive 1P,Eq. [5] can be satisfied by a smooth convex or planar surface. Orientations with negative stiffness are unstable and do not appear in

the equilibrium shape. For finite shapes, these directions form sharp corners, whereas planar surfaces of unstable orientation decompose to a hill and valley structure. 17 Similar remarks apply to terrace edges. An excess free energy per unit length may be defined, and from its dependence on orientation, the edge stiffness can be determined. Faceted terrace edges should be observed when the edge stiffness is infinite. The stability and equilibrium curvature of a given orientation are functions of %Pand not of a alone. Adsorbates reduce a on any surface to which they spontaneously attach. However, to produce infinite stiffness and facets, adsorption must be narrowly focused on particular orientations. The formation of such ordered adlayers has been well documented for chloride on the Cu(100) 2 1 - 2 5 and Cu(111)21,26,27 surfaces.

Microscopic Description As the temperature of a surface is raised above the roughening temperature Tr, its stiffness is reduced and it no longer appears as a facet in the equilibrium shape. On the microscopic level, this corresponds to a shift from the low entropy, low energy singular surface toward the high entropy surface populated by islands and adatoms. 18- 20 At ambient temperature, low-index copper surfaces are below the roughening temperature in vacuum. However, in

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solution adsorbed species may modify the energetics of the surface. One possible result is chemical roughening or a lowering of T, to ambient temperatures by specific interaction of solvent or additives with the metal or by inclusion of contaminants in the metal matrix.10, 13 To illustrate how adsorbates may affect the energetics of the interface, We consider results for three simplified models of the interface: a solid on solid modelss,", an island-edge model20, and a terrace-ledge-kink model7 . In the solid-on-solid model, the energy penalty for placement of an adatom on the surface is added to the product of the temperature and the configurational entropy of the radomuly distributed adatoms, and this expression for the surface excess free energy is then minimized. The transition to a rough surface is gradual and occurs at approximately Ur

L.1

[6]

2 v

Lo is the binding energy of an atom in the bulk, 771the number of nearest neighbors in the layer below and v the number of nearest neighbors in the bulk. In the island model, a partition function based on the energy of formation of edges is computed. The edge free energy vanishes, and islands of all sizes proliferate at temperatures above kTr = n

[7)

J is a coupling constant that gives the energy cost of a step change in the surface height. For a vicinal surface, roughening may occur by proliferation of kinks at a temperature given implicitly by

W., U

Wo

(I-)

2

[8]

Wn is an energy of interaction between steps, and W,, is the energy of kink formation. According to these models, the roughening temperature will be reduced by immersion in solution if adsorption occurs preferentially at high-coordination sites. Such adsorption reduces the energy penalty L,, J, or Wo, for formation of adatoms, steps or kinks. Conversely, the roughening temperature would be raised, and faceting restored, if adsorption were to increase L,, J. or W,. This is the case for the VF X v2_ chlorine overlayer on the Cu(100) surface as shown in Fig. (1). The key assumption is that a chlorine atom may occupy the four-fold Cu hollow site only if the four adjacent hollow sites are empty. Fig. (la) shows that addition of an adatom expels one chlorine atom while addition of a dimer expels four. The situation for formation of steps is shown in Figs. (1b) and (1c). Vogt et a115 show this type of step arrangement as well as a second type in which chlorine atoms occupy positions at the edge where

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two adjacent four-fold sites are occupied by copper. Fig. (lb) shows formation of a step along the (110) direction which is the close packed direction of the copper surface lattice. Formation of a step requires expulsion of chlorine from the surface because the adlayer rows on either side of the step are further apart than rows on the same level. Fig. (Ic) shows the same effect for a step faceted along the (100) direction. Expulsion of the extra chlorine atoms imposes an additional energy cost to adatom or step formation by effectively increasing the number of broken bonds, and it raises T,. The stability of terrace edges depends on the energetics of kink formation. Fig. (1d) shows formation of kinks on an edge oriented in the (110) direction. Formation of the kink pair expels a chlorine atom from the upper terrace, but creates a space for it on the lower terrace. Hence there is a no net expulsion of chlorine, and no extra energy cost for kink formation. As a result, this edge direction should be rough and not appear at equilibrium. Formation of a kink on an edge oriented in the (100) direction, however, does require expulsion of chlorine. As shown in Fig. (le), no space on the lower terrace is created for the atom expelled from the upper terrace. Kink formation on this edge requires additional energy for removal of chlorine. Therefore, it should be stiff and appear in the equlibrium form. The stabilization of (100) terrace edges has been noted by prevous investigators, who observed that this corresponds to the close-packed direction of the overlayer.14- 16 We are presenting a different interpretation. The close packed direction of the adlayer should be controlling if the energetics of the surface are dominated by chlorine-chlorine interactions. In the model advanced here, the energetics are dominated by the copperchlorine interaction. Experiment Deposits were formed in dilute cupric sulfate to avoid rapid attak of the substrate by cupric ion. The basic solution was 0.01 M CuSO4 / 1.0 M H 2 S04. 0.1mM or 2.0 mM chloride as HCl was added to two of the solutions. Two solutions without added chloride were prepared, one with reagent grade materials and another with Aesar Puratronic cupric sulfate and sulfuric acid. All of the solutions were made with demineralized water which was doubly distilled and passed through a Nanopure II filtration system. Copper single crystal disks of orientation 100 and 110 were obtained from Monocrystals Incorporated. They were polished with 0.05 pm alumina on an irrigated wheel and then electropolished in orthophosphoric acid. After polishing, the samples were rinsed sequentially in 10 % nitric acid, 10 % sulfuric acid and water. The surfaces were imaged with a Digital Instruments Nanoscope E AFM in both deflection and height mode in a fluid cell. Electrolyte was allowed to flow slowly through the cell by gravity from a reservoir. The counter electrode was placed in the upstream reservoir, and a Hg/HgSO4 reference electrode was placed in a downstream receiver. A constant potential was applied to the working electrode with a PARC Model 362 potentiostat. The open-circuit potentials varied between -410 and -430 mV versus the reference. In the following section, working electrode potentials are reported versus open circuit.

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Results In high-purity chloride-free solution (Fig. (2)) at a low overpotential of 20 mV, the main surface features produced on the Cu(100) surface were squares with edges facing the (100) direction. The height of the step edges was two to five nanometers. At 100-300 mV, the deposit did not produce a square geometry. Instead, the main features were rough nodules whose edges showed no preferred orientation. At 400-500 mV, flat regions of the (100) orientation reappeared. In reagent solution (Fig. (3)), deposits on the (100) surface formed in the range from 20 to 100 mV were strongly anisotropic. The main features were truncated rectangular pyramids with edges parallel to the (100) direction. From 200 to 300 mV, layer growth was produced with isotropic edges and step heights of two to five nanometers. At 500 mV, the layers were flat with edges along both the (100) and (110) directions and step heights greater than 20 monolayers. Deposits formed in 0.1 mM HCI (Fig. (4)) were similar except that truncated pyramids were produced at 200 to 300 mV. These grew by successive nucleation of layers with step heights of two to five nanometers. The edges were oriented in the (100) direction. In 2 mM HCI (Fig. (5)) , layer growth was observed at overpotentials above 150 mV, and at 300 mV, spiral growth with steps of a few nanometers appeared. Below 150 mV, the surface was dark and rough, probably because of precipitated CuCI. On the Cu(110) surface in high-purity solution (Fig. (6a-c)), deposits showed little relation to the substrate orientation, although some anisotropy was visible at 400 mV. In reagent solution (Fig. (6d-f)), ridges formed along the (100) direction at 10 mV. At 100 mV, the surface was nearly isotropic. At 200 to 300 millivolts, the surface was dominated by truncated tetragonal pyramids with edges at an angle of 45 with the (100) direction. In 0.1 mM HCI (Fig. (7a-c)), the surface was dominated by ridges extending in the (100) direction and interupted by (111) planes. In 2 mM HC1 (Fig. (7d-f)), the ridges were bounded by facets on the (210) and (111) planes. This is similar to the 28 shape of depressions observed by Markovac in dissolution in sulfate solution. In all cases, deposits formed at 600 mV, near the onset of hydrogen evolution, were rough,-probably as a result of three dimensional nucleation and kinetic roughening.2 Discussion

The Cu(100) surface appears to undergo faceting/roughening transitions in sulfate solution as the concentration of chloride and the potential are varied. In the absence of chloride, the Cu(100) surface is rough at low overpotential. At high overpotential, the singular surface reappears, suggesting that adsorption of sulfate at low overpotential and its expulsion at high overpotential plays a role in the transition.3° Chloride stabilizes the Cu(100) surface as well as terrace edges oriented in the (100) direction on this surface. This observation is consistent with the roughening models discussed in the introduction. The chloride overlayer imposes an energy penalty for addition of adatoms and the creation of steps. It also suppresses formation of kinks in the stable (100) edge but not in the unstable (110) edge.

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The observation of an ambient temperature roughening transition can be used to interpret brightening in a thermodynamic context. A macroscopically smooth, thermodynamically rough surface is bright, whereas a microfaceted surface is not. If brighteners are specifically adsorbed at high coordination sites, they will promote thermal roughening. Another possibility is that incorporation of the brightener or one of its components provides the roughening mechanism. 10' 13 In either case, the faceted growth induced by chloride alone is incompatible with bright plating, and this effect is probably overwhelmed by other additives in practical bright plating. Conclusion Copper immersed in solution may undergo adsorbate-induced roughening/faceting transitions at ambient temperatures. Immersion in CuSO4 /H 2S0 4 solution eliminates facets at low overpotentials. The reappearance of facets at high overpotentials may be accompanied by expulsion of specifically adsorbed sulfate, suggesting that this specie plays a role in roughening. Specifically adsorbed chloride stiffens the Cu(100) surface and restores the singular interface. Chloride also stiffens (100) edges, but not (110) edges, on the Cu(100) surface. Our results support the conclusion of Vogt et al that faceting of the Cu(100) 14 15 surface in chloride solution is a thermodynamic effect. , Acknowledgements: This work was supported by the National Science Foundation under Gr. Nos. CTS9306837 and CTS-9622634 References 1. C. Herring, Phys. Rev., 82, 87 (1951). 2. C.Herring in Structure and Prooperties of Solid Surfaces, R. Comer and C.S. Smith eds., University of Chicago Press (1953). 3. J.C. Heyraud and J.J. Metois, Surf. Sci., 128, 334 (1983). 4. J.C. Heyraud and J.3. Metois, J. Crys. Growth, 82, 269 (1987). 5. P. Zeppenfeld, K. Kern, R. David and G. Comsa, Phys. Rev. Lett., 62, 63 (1989). 6. J. Lapujoulade, J. Perreau and A. Kara, Surf. Sci., 129, 59 (1983). 7. J. Villain, D.R. Grempel and J. Lapujoulade, J. Phys. F, 15, 809 (1985). 8. F. Fabre, D. Gorse, J. Lapujoulade, and B. Salanon, Europhys. Lett., 3, 737 (1987). 9. K.S. Liang, E.B. Sirota, K.L. D'Amico, G.J. Hughes and S.K. Sinha, Phys. Rev. Lett., 59, 2447 (1987). 10. J. Wollschlager, E.Z. Luo and M. Henzler, Phys. Rev. B, 44, 44 (1991). 11. H.J. Ernst, R. Folkerts and L. Schwenger, Phys. Rev. B, 52, 52 (1995). 12. M.S. Hoogeman, M.A.J. Klik, D.C. Schlosser, L. Kuipers and J.W.M. Frenken, Phys. Rev. Lett., 82, 1728 (1999).

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13. B.E. Sundquist, Acta. Metall., 12, 585 (1964). 14. M.R. Vogt, A. Lachenwitzer, O.M. Magnussen and R.J. Behm. Surf. Sci., 399, 49 (1998). 15. M.R. Vogt, F.A. Moller, C.M. Schilz, O.M. Magnussen and R.J. Behm. Surf. Sci., 367, L33 (1996). 16. T.P. Moffat, Mat. Res. Soc. Proc., 451, 75 (1997). 17. W.W. Mullins, Phil. Mag., 6, 1313 (1961) 18. W.K. Burton, N. Cabrera and F.C. Frank, Trans. Roy. Soc. London, A243, 299 (1951). 19. D.P. Woodruff, The Solid-Liquid Interface, Cambridge University Press, Cambridge (1973). 20. A. Zangwill, Physics at Surfaces, Cambridge University Press, Cambridge (1988). 21. J.L. Stickney, C.B. Ehlers and B.W. Gregory, Langmuir, 4, 1368 (1988). 22. I. Villegas, C.B. Ehlers and J.L. Stickney, J. Electrochem. Soc., 137, 3143 (1990). 23. C.B. Ehlers and J.L. Stickney, Surf. Sci., 239, 85 (1990). 24. C.B. Ehlers, I. Villegas and J.L. Stickney, J. Electroanal. Chem., 284, 403 (1990). 25. J.L. Stickney, I. Villegas and C.B. Ehlers, J. Am. Chem. Soc., 111, 6473 (1989). 26. D.W. Suggs and A.J. Bard, J. Am. Chem. Soc., 116, 10725 (1994) 27. J.L. Stickney and C.B. Ehlers, J. Vac. Sci. Technol., A7, 1801 (1988). 28. V. Markovac, J. Electrochem. Soc., 119, 1461 (1972). 29. W.U. Schmidt, R.C. Alkire and A.A. Gewirth, J. Electrochem. Soc., 143, 3122 (1996). 30. G.M. Brown and G.A. Hope, J. Electroanal. Chem., 382, 179 (1995).

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aC

b

c

e

Figure 1. Cu(IO0) surface with chlorine overlayer. The lower copper layer is shown in light gray, the upper copper layer in dark gray and chlorine in white. a. Adatoms, b. terrace edge, (110) direction, c. terrace edge, (100) direction, d. kinks on the (110) edge, e. kinks on the (100) edge.

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b

a

z,.00

c

d

e -d

Figure 2. AFM deflection images of Cu(100) in high-purity solution.

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a

b

I

Md

ef

Figure 3. AFM deflection images of Cu(100) in reagent solution.

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a

b

c

Figure 4. AFM deflection images of Cu(IOO) in

d

0.1mM CI- solution.

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i1

II

1.00

c

d

I~w

0

Figure 5. AFM deflection images of Cu(100) in 2.0mM Cl- solution.

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a

b

C

d

e

f

Figure 6. AFM deflection images of Cu(1 10) in high-purity solution (a-c) andin reagent solution (d-e).

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a

b

Figure 7. AFM deflection images of Cu(1 10) in 0.1 rMlv chloride solution (a-c) and in 2.0 chloride solution (d-e).

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Deposition of Copper on TiN From Pyrophosphate Solution John G. Long, Aleksandar Radisic, Peter M. Hoffmann and Peter C. Searson Department on Materials Science and Engineering Johns Hopkins University Baltimore, MD 21218 Abstract In this paper, we report on the electrochemical deposition of copper on a 30 nm TiN barrier film from pyrophosphate solution. We show that deposition occurs through the instantaneous nucleation of hemispherical clusters followed by diffusion-limited growth over a wide potential range. In this potential regime, the nucleus density increases exponentially with applied potential. Introduction Copper deposition onto most diffusion barrier materials occurs through VolmerWeber island growth [1,2]. In order to electrochemically deposit continuous thin films it is essential to develop a fundamental understanding of the mechanism of nucleation and growth as a function of solution chemistry and applied potential. In this paper we report on the deposition of Cu on unpatterned TiN surfaces from pyrophosphate solution. Experimental The substrates for deposition were prepared by sputter deposition of 30 nm TiN on nSi(100), N, = 1 x 10"'cm 3 (Wacker Siltronic, AG). The TiN layer was rf sputtered at room temperature for about 1 minute (V, = 620 V). In all cases ohmic contacts were made to the back side of the silicon wafer using InGa eutectic. Since the n-Si/TiN contact is ohmic, this method avoids limitations associated with the sheet resistance of the TiN layer. The aqueous 50 mM Cu(II) solution was prepared from 25 mM Cu 2P 2O7 "3H 20 with 0.2 M K4 P20 7 . The pH of the solution was adjusted to pH 8.5 with pyrophosphoric acid (H 4P 2 0 7 ). From the equilibrium constants, we determine that > 99% of the Cu(II) is present in the form of Cu(P 20 7 ) 6 -. The experiments were performed under ambient conditions using a conventional three-electrode cell with a Ag/AgCI (3 M NaC1) reference electrode connected via a Luggin capillary and a platinum gauze counter electrode. All potentials are given with respect to the reference electrode (0.22 V vs. NHE). Results and Discussion Figure 1 shows current-potential curves for TiN in 0.25 M KaP 2 0 7 , with and without 50 mM Cu(II) at a scan rate of 10 mV s-1 . In the 50 mM1 Cu(II) solution, the open-circuit

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potential was 0.11 V, and the first cycle was initiated from this potential. The onset of Cu(II) reduction on the first scan occurs at about -0.5 V, followed by a small peak at -0.75 V and a characteristic diffusion-limited growth peak at -0.95 V. After the deposition peak, the current again increases at a potential of about -1.2 V due to hydrogen evolution resulting from the reduction of water at copper clusters on the TiN surface. The reverse scan in the 50 mM Cu(II) solution shows a steady-state, diffusion limited deposition current density of about 2 mA cm-2 over a wide potential range. At potentials positive to -0.25 V, a stripping peak is observed corresponding to the removal of about 630 equivalent monolayers of copper (assuming 100% Faradaic efficiency). On the second cycle, the onset for copper deposition is shifted to about -0.3 V. Since the copper deposited during the first cycle is not completely stripped from the surface, the 0.2 V shift in the deposition peak indicates that a nucleation overpotential is required for the deposition of copper onto TiN. Subsequent scans are essentially equivalent to the second sweep and suggest that the that the deposition and dissolution of copper on TiN/Cu is a quasireversible process. Similar features have been reported for copper deposition from borate solutions [2]. The mechanism of nucleation and growth was determined by analysis of deposition current transients as a function of potential. Figure 2 shows a series of current transients for copper deposition on TiN from 50 mM Cu(lI) solution for potential steps from the open-circuit potential to deposition potentials in the range from -0.9 V to -1.5 V plotted on a semi-log plot. The nucleation and growth process is characterized by a current peak where the deposition current first increases due to the nucleation of copper clusters and three-dimensional diffusion-controlled growth, and then decreases as the diffusion zones overlap resulting in one-dimensional diffusion-controlled growth to a planar surface [36j. The deposition transients are characterized by a maximum current, i..,, that occurs at time tmax.

After the current maximum (t > t.ax), the transient deposition current decreases with . From plots of i 2 vs. t, the diffusion coefficient for Cu(P 20 7 )6 was determined to be between 1 x 10-6 and 2 x 10.6 cm 2 S-Iover the potential range from -0.9 V to -1.5 V. This value is somewhat smaller than the value of 6 x 10.6 cm 2 s- for Cu 2÷ [71 due to complexation of the copper ions. These results confirm that at long times in the measured potential range, linear diffusion to a planar surface is the rate limiting step in the deposition process. At longer times (typically t > 3t,,,x) the transients exhibit a small second peak possibly due to renucleation on the existing clusters. Figure 3 shows selected deposition transients replotted in dimensionless form. Also shown are the growth laws for diffusion-limited growth of 3D hemispherical clusters. The time-dependent deposition current density (normalized to the geometric surface area) for instantaneous nucleation followed by three dimensional diffusion-limited growth is given by [3,4]: 2

tm

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1/2 1/22 L1 exp

N

81coV)t)]1

where c. is the bulk concentration, N. is the nucleus density, and V is the molar volume of the deposit. For progressive nucleation, the time-dependent deposition current density is given by:

i~)=zRcD 1 2 1 exp(4 kND(21t 3cOV /2 t2)](2 E1/2 t /2 Pi 7t

L

(2

where k is the (first order) nucleation rate constant. The normalized current density for instantaneous nucleation followed by diffusion limited growth is given by: i21.942tmax =

• 1

=1942F

1 _exp(_l1.2564

L

max

t__

(3 {3}

tmax

For progressive nucleation, the normalized deposition current is given by:

S2= tma

2

1.2254

'max

m

- 2 .3 3 6 7

-exp

t

.

t2

] {4}

tmax

From Figure 3 it can be seen that the deposition transients in the potential range from -1.1 V to -1.3 V follow the theoretical growth law for instantaneous nucleation followed by diffusion limited growth. At more positive potentials the transients follow the instantaneous nucleation growth law at short times but then deviate at longer times due to the second peak. At potentials negative to -1.4 V, the deposition current at long times is larger than predicted by the instantaneous nucleation model due to water reduction on the copper clusters. According to the model for instantaneous nucleation followed by three dimensional diffusion limited growth [3,4], t_ and i.., are given by:

max

-

/ tmx= 1.2564 NoirD(87cOV)I/ 2

imax = 0.6382zFc0D(8itc0V)

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5

(51

16)No

151

Figure 4 shows the dependence of t... and i,.. on the deposition potential. The slopes of the linear regions in the two plots are aU/alogt... = 240 mV/decade and aU/alog(-i_,,) = -447 mV/decade. Assuming that the nucleus density No is the only potential dependent parameter in equations {5) and (6) then we obtain aU/alogi_, = 2 alU/alogtm.,. From the values of the slopes we obtain a coefficient of 1.87 indicating that the potential dependencies of t,,, and imaxare determined by the potential dependence of N0. Equations (51 and (6} can be combined to give the following expression for the nucleus density: /

N0 =0.65

-1/2(

1

) 8c 0 VJ

"2

zFc0

2(7)

Himaxtmax

Figure 5 shows the potential dependence of the nucleus density obtained from analysis of the current transients according to equation (71. The exponential dependence of the nucleus density on potential suggests thermal activation of nucleation sites, consistent with classical nucleation models [5,8] where No - exp(-eAU/kT). Analysis of deposition transients shows that deposition of copper on TiN from 50 mM copper (II) pyrophosphate solution proceeds through instantaneous nucleation of three dimensional hemispherical clusters and diffusion limited growth. Determination of the diffusion coefficient from the current maximum and analysis of the current decay using the Cotrell equation yielded values of 1 x 10.6 to 2 x 10.6 cm2 s-', slightly lower than the value for Cu2 * ions due to the presence of the pyrophosphate ligand. The potential dependence of i,,, and tin,asuggest that the nucleus density is the only potential dependent parameter. Acknowledgements This work was supported by SRC and the National Science Foundation under grant CTS-9732782. References 1. G. Oskam, J. G. Long, A. Natarajan, and P. C. Searson, J. Phys. D: Appl. Phys., 31, 1927 (1998). 2. G. Oskam, P. M. Vereecken, and P. C. Searson, J. Electrochem. Soc., 146, 1436 (1998). 3. G. Gunawardena, G. J. Hills, I. Montenegro, and B. R. Scharifker, J. Electroanal. Chem., 138, 225 (1982). 4. B. R. Scharifker, and G. J. Hills, Electrochim. Acta, 28, 879 (1983). 5. E. Budevski, G. Staikov, and W. J. Lorenz, Electrochemical Phase Formation and Growth, VCH, Weinheim (1996).

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6. Southampton Electrochemistry Group, Instrumental Methods in Electrochemisty, Ellis Horwood, New York, (1990). 7. T. I. Quickenden and Q. Xu, J. Electrochein. Soc., 143, 1248 (1996). 8. M. Volmer, Kinetics of Phase Formation, Steinkopff, Dresden (1939).

0.015 0.01

0.005 0 -0.005

2

b

-1.5

-1 -0.5 0 U (V vs. Ag/AgCI)

0.5

Figure 1. Current-potential curves for TiN in 0.25 M K4P20 7 with (a) 0 and (b) 50 nM Cu(II) at a scan rate of 10 mV s-'. The first scan (1) was initiated at the open-circuit potential (-0.1 V).

0

-0.02 0.01

.

.

5v, ... ... 0.1

1

... ,,_ ....... 10

100

Time (s)

Figure 2. Current transients for the deposition of copper on TiN at (from top): -0.9 V, -0.95 V, -1.00 V, -1.05 V, -1.10 V, -1.15 V, -1.20 V, -1.25 V, -1.30 V, -1.35 V, -1.40 V, -1.45 V, and -1.50 V

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0.8

0.8

F 0.6

0.6

0.4

0.4

0.2_

0.2 -0.95V

0

1

2

3 -

1 -I

E

-105V 0

0.8

0.6

0.6

0.4

0.4

o 0

2

3

I

1

0.8

0.2

1

C

0.2 -1.1-115V 1

2

3

0

1

2

3

2

3

11

E

0.8

0.8-

0.6

0.6-.-,,

0.4

0. 4

0.2

0.2 (-1.2V

0 0

I 2

1 t/tmax

3

j-1.3V C, 0

1 t/tmax

Figure 3. Reduced parameter plots for selected transients for the deposition of copper at -0.95 V, -1.05 V, -1.10 V, -1.15 V, -1.20 V, and -1.30 V. Also shown are the theoretical curve for instantaneous (dashed line) and progressive (solid line) nucleation.

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10"1

100

,

I

10l

10l-2

17

103 1T

1 0 -4

0.1

I

-1.3

-1.5

-1.5

-0.9

-1.1

-1.3

-1.1

-0.9

U (V vs. Ag/AgCI)

U (V vs. Ag/AgCI)

Figure 4. Potential dependence of t... and ia,,, obtained from the current transients

plotted versus the deposition potential. 108

,

I

8 z

S107o

0

_ 00

0 106

0 0

0

105

-1.5

-1.3

-1.1

-0.9

Potential (V vs. Ag/AgCl)

Figure 5. Nucleus density determined from deposition transients plotted versus the deposition potential.

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ELECTROCHEMICAL STUDY OF COPPER DEPOSITION ON SILICON SURFACES IN HF SOLUTIONS 1. Teerlinckl, W.P. Gomes , K. Strubbe2 , P.W. Mertens' and M.M. Heyns' IIMEC, Kapeldreef 75, B-3001 Leuven, Belgium 2 Universiteit Gent. Laboratorium voor Fysische Chemie, Krijgslaan 281, B-9000 Gent, Belgium We studied the electrochemical reduction of copper ions at n-type and p-type Si electrodes in I M HF solutions. From voltammetric measturements it is found that in I M HF [F+ 0.1 M H2S0j and in I M HF - 0.1 M HCI solutions the reduction of copper ions occurs by hole injection. In I M [IF + I M HCI solutions the reduction occurs by electron capture from the conduction band. INTRODUCTION The mechanism of an electrochemical reaction at semiconductor electrodes depends upon the position of the redox Fermi level in solution with respect to the position of the bandedges of the semiconductor. In this study we investigated the reduction of copper ions on Si surfaces in HF solutions and we examined the effect of adding HCI to the HF solutions. EXPERIMENTAL Si samples were cut from n-type (N, = 2.7-5x 10'" cm- 3) and p-type (NA = 4.3-6.5x 10'' cm-3) Cz Si(100) wafers. The samples were cleaned by immersion in a H2SO 4/H202 (volume ration 4/1) solution at 100°C followed by a 0.5% HF dip at room temperature. This procedure results in an oxide-free, hydrogen-terminated, ultra-clean Si surface.1 Ohmic contacts on the backside of the samples were made by applying a Ga-In alloy. The Si electrode surface exposed to the solution (0.28 cm 2 ) was defined using a Viton washer in a PCTFE holder. The electrochemical experiments were performed using a conventional three-electrode cell containing a platinum counter electrode and an Ag/AgCI reference electrode. All potentials are given with respect to the Ag/AgCI electrode. Prior to the measurements, high-purity N2 was bubbled through the solution in order to remove dissolved oxygen. During the measurements an N 2 blanket was maintained above the solution. All electrochemical experiments were carried out in darkness. We studied the reduction mechanism of copper ions in the following solutions: I M HFE + 0.1 M HSO.1, IM HF + 0.1 M HC1 and I M HF + I M IICI. Copper was added in the ItF/H 2S0 4 and HF/HCI solutions as CuSO 4 and CuCI 2, respectively. RESULTS AND DISCUSSION Figure 1 shows current-potential curves obtained at n-type (a) and p-type Si (b) in a I M H4F + 0.1 NI lI 2S0 4 with (full line) or without (dashed line) 5x l0-4 1\ CuSO 4 . At n-type Si. in the absence of copper, the onset of hydrogen evolution is observed at about -0.8 V. Under anodic polarization only a very low anodic saturation current is measured, due to the absence of holes required for the anodic oxidation of Si. 2 The voltammogram recorded in the copper containing solution shows a cathodic current peak in the forward scan, attributed to the reduction of copper ions. At more negative potentials the cathodic current increases exponentially due to the reduction of protons at the Si electrode partially covered with Cu. The presence of copper ions in the solution also results in a significant increase of the anodic current at n-type. At p-type Si, in the absence of copper ions, only a very small cathodic current is measured, since no conduction band electrons

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are avai able 1or proton reduction. Ihowever, in the presence of copper ions in thie solution a reduction current is clearly observed at p-type Si. This result shows that the reduction of copper ions occurs by a valence band reduction mechanism, i.e. hole injection. The first step of the anodic dissolution of Si requires the presence of valence band holes at the Si surface, resulting in the formation of electron deficient surface bonds. 2 After this initial hole capture, electrons are thermally excited to the conduction band, while a fluorine ion bonds to the surface Si atomn. This electron injection results in an increased anodic current measured at n-type Si in the presence of copper ions in the solution. Cyclic voltammograms obtained in a 1 M HF + 0.1 M HCI solution with (full line) or without (dashed line) 5x 10-4 M CuCl1 obtained at n-type and p-type Si are shown in Figuitre 2(a) and 2(b), respectively. Also in this solution the reduction of copper ions is found to occur by hole injection, resulting in a cathodic current at p-type Si and an increased anodic current at n-type Si. Figure 3(a) and 3(b) show cyclic voltammograms obtained in a I N\ HF + I M 1tC1 solution with (full line) or without (dashed line) 5x 10-4 M CuCI 2 obtained at n-type and ptype Si, respectively. At ti-type Si. a reduction current attributed to the reduction of copper ions is still observed. I lowever, we only observe a very small cathodic current at p-type Si in copper containing solutions. This shows that in a I NI IIF + 1 HC solution Ithe reduction of copper ions occurs largely by electron capture from the conduction band. To estimate the position of the bandedges we performed Mott-Schottky measurements. Figure 4 shows the results obtained in a I M HF + 0.1 M H 2 SO 4 solution With or without 5x 10-4 M CuSO 4 and Figure 5 shows the results in I M HF + 0.1IM HCI with or without 5x1(- 4 NI CuCI 2. The addition of HCI is found to have no effect on the position of the bandedges. The bandedges estimated from the results are Ecb = -0.8 eV and E,, = 0.3 eV. The presence of copper in the solution has no effect on the flat band potential for p-type Si. For n-type Si however we observe a shift of 160 mV to more negative potentials. In these solutions the copper reduction occurs by hole injection. Under depletion conditions the holes injected into the n-type by the copper ions remain at the surface. This results in an increased etching of the Si surface and therefor in an increased surface concentration of Si-F bonds. Due to the highly polar nature of this bond this results in an increased negative charge at the Si surface resulting in a negative shift of the bandedges. At p-type Si under depletion the injected holes are driven towards the bulk of the substrate. fherefor no shift of the flat band potential is expected for p-type Si. Figure 6 shows Mott-Schottky measurements in I M HF + I M HCI solutions with or without 5x]04 M CNICI2. It is seen that the addition of I M HCI has no effect on the position of the Si bandedges. Upon addition of 5x 0-4 M CuCI 2 there is also no shift of the flatband potential of n-type Si. This follows from the fact that the reduction of copper ions in this solution occurs by electron capture from the conduction band and not by hole injection. From the Mlott-Schottky measurements it follows that the change of the reduction mechanism Cor copper ions from a valence band to a conduction band mechanism by the addition of I M 1-CI can not be attributed to a shift of the position of the bandedges of the Si. Therefor NNesuggest that the addition of I M HCI results in the formation of cupric and cuprous chloride species resulting in a shift of the redox Fermi level. REFERENCES NIl.Nieuris ei el.. Proc. ECS Fall meeting 1993 (ECS, Inc., Pennington, 1994) p. 518. - F.S. Kooij and D. Vanmaekelbergh, J. Electrochemn. Soc., 144, 1296 (1997).

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0.1

0.1

(b)

(a)

0.05 0

- -

-- --- -- -- ----

/E

;i E -0.1

0

--

-0.05

-0.2 -1 2

-0.8

-0.1 -1.2

04

0 -0.4 U vs Ag/AgCI (V)

-0.9

0

-0.3 -0.6 U vs Ag/AgCI (V)

Figure 1. Current-potential curve for (a) n-type and (b) p-type Si in darkness in a 1 M HF + 0.1 NI 112SO4 with (full line) or without (dashed line) 0.5 mM

CuSO 4 .

0.01

0.05

(b)

(a)

E

0

-0.01

-0.05

-0.1 -1.2

-0.8

0 -0.4 U vs AgIAgCI (V)

0.4

-0.02 -1.2

0

-0.4

-0.8

U vs Ag/AgCI (V)

Figure 2. Current-potential curve for (a) n-type and (b) p-type Si in darkness in a I M HF + 0.1 M HCI with (full line) or without (dashed line) 0.5 mM CuCI2 . 0.005

0.1

(a)

(b)

00----

0

-0.1

-0.2 -1.2

-- -- -- -- -- -- -- -----

-0.005

-0.8

-0.4

0

U vs Ag/AgCI (V)

0.4

-0.01 -1.2

-0.9

-0.6

-0.3

0

U vs Ag/AgCI (V)

Figure 3. Current-potential curve for (a) n-type and (b) p-type Si in darkness in a I M HF +- I M HCI with (full line) or without (dashed line) 0.5 mM CnCI2.

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4

8

6

3 _Sp-Si

"-Si

'E

'E 4 o

0

on-Si

2

U,

p-Si 2

1I.

o

0 -0.7

-14

0.7 0 U vs AgIAgCI (V)

14

Figure 4. Mott-Schottky plots of n-type and p-type Si in 1 M IIF +0.1 M H2 S0 4 with (open circles) or without (full circles) 0.5 mM CuSO 4 . (measuring frequentie 15 kHz).

-1.5

-1

-0.5 0 U vs Ag/AgCI (V)

05

Figure 5. Mott-Schottky plots of n-type and p-type Si in 1 M HF + 0.1 M HCl with (open circles) or without (full circles) 0.5 mM CuC12 (measuring frequentie 15 kHz).

6

n-sl

4 E

b 2

0 -1.5

-075

ns 0 075 U vs Ag/AgCI (V)

1.5

Figure 6. Mott-Schottky plots of n-type and p-type Si in I M HF + 1 M HCI with (open circles) or without (full circles) 0.5 mM CuLCI 2 (measuring frequentie 15 kHz).

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Charge exchange processes during metal deposition on silicon from fluoride solutions P. Gorostiza, R. Diaz, F. Sanzi, J. R. Morante Departamentsde Quimica Fisica i Electr6nica,Universitat de Barcelona. Marti i Franquds, 1. Barcelona E-08028 P. Allongue CNRS UPR 15, Universit6 Pierreet Marie Curie. Tour 22, Place Jussieu, 4. ParisF-75005 The deposition of platinum and nickel on silicon from fluoride solutions at the open-circuit potential is studied under potentiostatic control. The results are interpreted in terms of the coupling between the anodic dissolution of silicon in fluoride media and the cathodic reactions, including metal deposition and hydrogen evolution. Platinum ions reduce to metallic Pt by injecting holes into the Si valence band. Thus Pt ions act as an oxidizing agent for silicon, and result in the simultaneous formation of photoluminescent porous silicon under certain conditions. Nickel ions may exchange charge with both the conduction and the valence band. The reduction of Ni ions competes with hydrogen evolution, and the deposition of Ni can only be achieved at high pH where it is kinetically faster. The role of silicon surface states as reaction intermediates is discussed.

INTRODUCTION The interest of metal deposition on silicon from fluoride solutions arises from several areas: plating processes (usually as the activation step) [1], tools for silicon characterization (defect revealing, junction delineation) [2] or studies of the damaging effects due to metallic contaminants in cleaning solutions [3]. Metal ions can be reduced and deposited on the silicon surface when they withdraw electrons from the substrate, but different effects can be expected if the transfer of electrons is done with the conduction band (CB, free electrons) or from bonding levels (valence band, VB). Several factors must be taken into account to dilucidate the mechanism, namely the chemical potential of the metal system in solution, the energy of silicon bandedges and the band bending at a given pH, and the chemistry of the silicon surface in the solution under study. The experimental energy diagrams can be sketched to give an 5 Corresponding author. E-mail: [email protected]

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insight into the possible charge transfer processes. For example, platinum II and IV levels in solution lie close to the silicon VB and thus hole exchange between them can be significant (figure 1, left). Ni2+/Ni redox energy level, however, is located within the silicon bandgap and it cannot in principle exchange ions directly with either of the bands (figure 1, right). Fluoride solutions are known to etch the silicon oxide and even silicon itself, depending on pH and the availability of holes at the surface. In the steady-state situation at the open circuit potential (OCP), the oxidation current through the silicon surface is balanced with a cathodic current of the same amount and opposite sign, such as to yield net zero current. Thus the OCP of the system is the potential leading to the same rate for the two reactions ("mixed potential"). The cathodic current may be due to the reduction of protons or water molecules (hydrogen evolution reaction, HER) or the reduction of metal ions if they are present in the solution. Actually a competition between both cathodic reactions is established, and given a set of conditions, the reaction having faster kinetics will be the prevailing one. The two half-cell reactions usually occur at different sites of the surface, namely cathodic (metal nucleation) sites and anodic (substrate corrosion) sites. Results concerning the deposition of Pt and Ni are presented, including the analysis of their coupled effects with the silicon oxidation reaction.

p-Si

electrolyte

/

--500

n-Si

electrolyte

p-Si

-1000c

Conduction Bandedge

-0

-500-

NEIFN' M

0-

Pt*41Pt° - 500 ValenceBandedge

500

Potential E /mV

vs SCE

Potential E ImV vs SCE

Figure 1: Energy diagrams showing the relative positions of the silicon bandgap and the chemical potential of platinum ions (left) and nickel ions (right) influoride solutions.

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EXPERIMENTAL The silicon (100) substrates were cut from n- and p-type wafers (Siltronix) having a resistivity of 1 0.cm. Ohmic contacts were obtained by painting the rear side with InGa alloy. Electrochemical measurements were performed in a teflon cell using the standard three-electrode configuration and in darkness unless otherwise specified. The potentiostat was a Solartron Electrochemical Interface 1287 and capacitance measurements were performed with a Solartron Frequency Response Analyzer 1255 at 25 KHz. Prior to the experiments, and in order to have a well-defined departure surface, samples were electropolished as described in [4]. In this way, reproducible measurements of the Si flatband potential using the Mott-Schottky method can be obtained. Concentrated HF was used to remove the Si oxide, and all other solutions were freshly prepared from reagent-grade chemicals (Merck) and MilliQ water. Platinum deposition solutions were 2 M fluoride (pH=l) and 1 mM K2PtCl6. Nickel deposition solutions were 50 mM NiSO 4.6H 2O in 5 M fluoride at pH<1 and pH=8 (prepared from concentrated HF and NH4F respectively). Samples were inspected by SEM (using either a Leica Stereoscan S-360 or a Cambridge S-120 equipped with energy dispersive X-ray analysis), TEM (Philips CM-30) and tapping mode AFM (Nanoscope Ill).

RESULTS AND DISCUSSION Platinum deposition Due to the overlap between the Pt 4÷/Pt redox level in solution and the Si VB (figure 1, left), Pt ions can easily withdraw electrons from the VB (i.e. inject holes). This occurs even at the OCP and leads to Pt deposition. Whenever holes are captured at the surface in the presence of fluoride ions in the solution, the silicon will be simultaneously oxidized. The hole injection current can be measured as a cathodic plateau in the I-V plot of a p-type electrode. The value of the plateau (hole injection current) depends on the concentration of Pt 4* ions in solution and in the stirring conditions, as corresponds to a diffusion-controlled process [5]. It is well known that relatively low oxidation currents in fluoride media lead to the formation of porous silicon (PS), whereas larger currents result in the condensation of an oxide at the silicon surface (electropolishing regime) [6]. In the conditions employed in the experiments, hole injection currents of a few hundreds of pA/cm 2 were obtained, while the PS regime spans 20 mA/cm 2 in a 2 M fluoride solution [7]. Thus the Si substrate undergoes an oxidative process in the PS regime simultaneous to (and as a result of) the Pt deposition at the OCP. Figure 2 shows a TEM cross-section of the PS-like layer that is formed at the anodic sites around the deposited Pt nuclei. As a consequence of the PS formation, samples deposited in this way

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Figure 2: TEM cross-section showing two platinum nuclei deposited on n-type silicon. The nuclei are buried in the substrate and a porous layer has formed around,

display visible photoluminescence [7]. Increasing the hole injection current due to Pt ions (by increasing Pt concentration or solution stirring) or decreasing the fluoride concentration can lead to the formation of oxides in the electropolishing regime. In a coarse approach, Pt reduction is spontaneous because it depends little on the band bending or the silicon type (there are always bonding electrons available at the surface) and therefore Pt deposition can be regarded as the initiating step of the overall reaction. In addition, Pt reduction is kinetically faster than the HER as the cathodic reaction, because the H*/H 2 redox level is more negative than Pt4*/Pt at this pH. This point is further developed in the case of Ni. Nickel Deposition [8] The Ni2 /Ni redox level lies far from both the CB and the VB, so that in principle there is no charge available for deposition. This is shown for pH<1 in figure 1 (right), and is in agreement with the fact that Ni could not be deposited from low-pH fluoride solutions neither at the OCP nor under negative bias. However, increasing solution pH up to 8 enabled Ni to deposit on the surface either by hole injection or by electron extraction (figure 3), while the relative position of the Ni level and the Si bandedges remains essentially unchanged. Furthermore, voltammetry (stripping) measurements yield an OCP deposition rate ten times larger on n-Si (0.19 ML/s) than on p-Si (0.02 ML/s). The appearance of n- and p-type samples is also quite different: when compared with solutions free of Ni ions (figure 4A), the n-Si substrate roughness is strongly enhanced by Ni deposition (4B), whereas it is practically unchanged in p-Si either in the dark (4C) or under illumination (4D).

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•'5, 3 - psi

a)

illumination

1

)-2 -105

-0.5

0.0

Potential E I V vs SCE Figure 3: Voltammograms showing that holes are injected from nickel ions into the p-Si VB

(lower), and that electrons can also be withdrawn from the CB under illumination (upper).

The reported results can be explained by considering the different processes occurring at the OCP on the Si electrode immersed in a fluoride solution. The Si etching reaction can be outlined as [9]: Si-H -> Si" + H*+ e

(la)

Si' + H20 --* Si-OH + H* + e Si-OH + 3HF (or 3H 20) - SiHF 3 (or SiH(OH 3)

(Ib) (lc)

where the rate-determining step is (la) and the overall rate for steps (lab) is highly pH-dependent: 0.03 nm/min at pH=l and 0.5 nm/min at pH=8 [9]. Si-H bonds can be regarded as weakly acidic, since they are more dissociated as the pH increases. The radical Si* represents a Si atom with one unpaired electron and is also involved in the cathodic counter-reactions, namely hydrogen evolution (HER): 2H÷ + Si' + e' H2 0 + Si" + e'

--

Si-H +1/H 2 Si-H + OH'

(2a) (2b)

and Ni deposition by either the VB or the CB: Ni2÷+ Si" --> Si-Ni + 2h+ Ni2+ + Si" + 2e -> Si-Ni

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(3a) (3b)

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Figure 4: AFM images of the silicon surface after immersion in 5M fluoride solutions at pH=8

for 20 min. (A) Blank solution; (B) 50 mM Ni 2 *, n-Si in the dark; (C) 50 mM Ni 2 *, p-Si in the dark; 2 (D) 50 mM Ni *, p-Si under illumination. The substrate RMS roughness is indicated.

Therefore the anodic and cathodic reactions are coupled through the formation of Si" sites. The fact that Ni is deposited at pH=8 and not at pH<1 can be explained within the framework of the above set of reactions. At pH<1 two facts are against Ni deposition: (i) the Si dissolution rate is very small (<0.1 nm/min), and (ii) dissolution is simply balanced by the HER. The kinetics of HER is actually faster than the reduction of Ni2+ ions since the redox potential Eo[Ni2 /Nil < Eo[H+/H 2]. In other words, the weak dissociation of Si-H bonds and the strong concentration of protons at low pH favor the HER as cathodic counter-reaction. The mixed potential is thus established without participation of the Ni2+ ions, which cannot even withdraw the bonding (VB) electrons of the SiH bond (hole injection). At pH=8, the situation depends on the type of substrate. In the case of pSi, the mixed potential is defined by dissolution and the Ni VB deposition (reaction 3a). This is supported by the fact that the hole injection rate measured from figure 3 (equivalent deposition rate 0.03 ML/s) is closely related to the experimental determination (0.02 ML/s). This small deposition rate is consistent with the AFM images, showing a surface rather homogeneous, probably

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with the AFM images, showing a surface rather homogeneous, probably covered by a very thin Ni layer. If Ni deposition was also occurring through the VB process at n-Si, the same rate of deposition should be expected at n- and p-Si electrodes. The increased deposition rate at n-Si must therefore be attributed to the CB process as counter reaction at the OCP. Indeed, the density of electrons at the surface of n-Si (calculated from the band bending) is about 108 times larger than in p-Si. On n-Si the mixed potential is therefore mainly defined by the dissolution (anodic process) and Ni CB deposition (cathodic process, reaction 3b). The HER does not interplay because it is kinetically slower: at pH=8, Eo[Ni 2+/Ni] > E0 [H+/H 2]. The rate of deposition (0.19 ML/s) is about 10 times the nominal dissolution rate of Si in the corresponding solution (0.5 nm/min [9] is equivalent to 0.026 ML/s), which explains the roughness increase after immersion in the Ni solution (figure 2AB). The image suggests indeed that the dissolution of n-Si is enhanced by the presence of Ni ions. This confirms the coupling between metal deposition and dissolution, through the formation of Si' sites (see above). The process is seemingly autocatalytic.

CONCLUSIONS An electrochemical study of platinum and nickel deposition on silicon from fluoride solutions at the open circuit potential is presented. In the steadystate situation, the silicon oxidation current is balanced with a cathodic current such as to yield net zero current. In the case of platinum, the prevailing cathodic process is platinum deposition by hole injection into the valence band. In nickel solutions, a competition is established between nickel reduction and hydrogen evolution: at pH=8 metal deposition is the prevailing reaction, either through a valence band process on p-type silicon or through a conduction band process on n-type. On the contrary, at pH<1 the hydrogen evolution reaction is kinetically faster and nickel deposition is not observed. The anodic and cathodic processes are coupled through the formation of silicon surface states.

REFERENCES (1] C. H. Ting, M. Paunovic, J. Electrochem. Soc. 136 (1989) 456. [2] P. Gorostiza, J. Servat, F. Sanz, J. R. Morante, in Defect Recognition and Image Processingin Semiconductors, A. R Mickelson, editor. lOP Publishing, Bristol UK 1996, p.293. [3] X. Cheng, G. Li, E. A. Kneer, B. Vermeire, H. G. Parks, S. Raghavan, J. S. Jeon, J. Electrochem. Soc. 145 (1998) 352. [4] P. Allongue, C. H. de Villeneuve, L. Pinsard, M. C. Bernard, Appl. Phys. Lett. 67 (1995) 941.

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[5] H. Gerischer, M. Lubke, J. Electrochem. Soc. 135 (1988) 2782. [6] F. Ozanam, J. N. Chazalviel, J. Electron Spectrosc. 64-65 (1993) 395. [7] P. Gorostiza, R. Diaz, M. A. Kulandainathan, F. Sanz, J. R. Morante, J. Electroanal. Chem. in press. [8] P. Gorostiza, M. A. Kulandainathan, R. Diaz, F. Sanz, P. Allongue, J. R. Morante, J. Electrochem. Soc. submitted. [9] P. Allongue, V. Kieling, H. Gerischer, ElectrochimicaActa, 40 (1995) 1353.

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EVALUATION OF EFFECTS OF HEAT TREATMENT ON

ELECTROLESS DEPOSITED COPPER Kai Yu Liu, Wang Ling Goh and Man Siu Tse Division of Microelectronics, School of Electrical & Electronic Engineering, Nanyang Technological University, Nanyang Avenue, Singapore 639798 ABSTRACT Copper (Cu) has been actively pursued as the most promising candidate for replacing the current Aluminum (Al) metallization for submicron device interconnection because of its higher electrical conductivity and better resistance to electromigration. In this work, Cu was deposited on A]/Cu/Ti seeding layer by electroless plating method from formaldehyde-based solution with EDTA as a complexing agent. The effect of heat treatment on the electroless plated Cu film under inert, oxidizing and vacuum ambient conditions was studied. The temperature of the heating ambient was varied from 200'C to 400'C. The microstructure of electroless deposited Cu film was observed using both the SEM and AFM. The X-ray diffraction (XRD) analysis, revealing an increase of the intensity ratio 1(111)/1(200) of the (111) and (100) X-ray peaks, indicated a growth of the (111) crystallographic orientation for the electroless deposited Cu film with heat treatment. The EDX analysis also showed a change in the element concentration of the electroless Cu sample before and after heat treatment. This is due to an inter-diffusion of Cu to the seeding layers. INTRODUCTION As the ULSI device dimensions approach the submicron region, the current Albased interconnect materials face more problems in integrated circuits, such as electromigration and delay time. Cu is a potential substitute for Al metallization due to its higher conductivity and better resistance to electromigration. Cu can be deposited by various means such as PVD, CVD and plating (electro- or electroless plating). Electroless Cu deposition is a potential process for Cu metallization due to its high selectivity, low processing temperature, low cost and good filling capability [1]. The obstacle to the widespread application of Cu technology is however, its oxidation rate. Cu oxidizes at a significant rate for temperature of as low as 150'C, forming a non-protective surface. Studies on the phenomenon of Cu oxidation reviewed that the low temperature (<2501C) oxidation process follows an inverse logarithmic rate law, which is a mixture of both parabolic and cubic behavior for intermediate temperature; and a domination of parabolic rate at high temperature [2]. It was reported that the presence of a strong (111) crystallographic structure is one of the important parameters that affect the electromigration performance of the interconnect lines [3,4]. Thermal annealing is an integral processing step in wafer fabrication and the heat treatment can modify the crystal microstructure and the electrical properties of electroless deposited Cu. The objective of this work is to compare the oxidation behavior of electroless deposited Cu at different annealing conditions. The variations of the microstructures of electroless deposited Cu films were studied using both Scanning Electron

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Microscope (SEM) and Atomic Force Microscope (AFM). The variation of the crystallinity was analyzed using X-Ray Diffraction Spectroscopy (XRD). The element concentration of the annealed electroless plated films was investigated using Energy Dispersive X-Ray Spectroscopy (EDX).

EXPERIMENT In our study, a three-layered Al/Cu/Ti film was employed as the seeding layer for electroless Cu deposition process. These metal films were deposited using the electron-beam evaporation technique and the substrates employed were thermally oxidized <100> silicon wafers. Ti is employed as the first layer, to serve as a barrier/adhesion promotion layer since Ti adheres well to most dielectric substrates and can prevent Cu diffusion into SiP 2. The second layer, Cu is the best homogenous catalyst for electroless Cu deposition. The last layer, Al is a sacrificial layer to prevent Cu oxidation before immersing into the electroless deposition solution. The electroless deposition solution consisted of 3 g/l of CuSO 4 to function as oxidant; 8 g/l of EDTA to serve as a complexing agent, to prevent Cu precipitation in the solution; and 4 ml/1 of HCHO to work as a reductant. The electroless bath was maintained at 651C with a pH value of 12.6. The electroless plated Cu film was about 1 prm thick for all the samples employed in this study. The Cu film samples were treated in inert (nitrogen), oxidizing (oxygen) and vacuum ambient at temperatures ranging from 2001C to 400*C and the details are represented in Table 1. The surface microstructure of the annealed Cu film was analyzed using SEM and the surface morphology was observed via AFM. The crystal structures before and after thermal annealing were investigated by X-ray diffraction analysis. The resistivity of the Cu films was measured using four-point probe. Table 1 Different oxidation conditions for electroless deposited copper films. Ambient Vacuum Inert/N 2 Oxidizing/0 2

Annealing Temperature (QC) 200, 300 200, 300, 350, 400 200, 300

Time (min) 30 25 25

RESULTS AND DISCUSSION Fig. 1 and Fig. 2 are the SEM micrographs of as-deposited and annealed electroless deposited Cu films after annealing for 25 minutes at 300 0 C in inert (nitrogen) ambient. It can be seen clearly in Fig. 2 that the grain sizes had increased and the grain boundaries reduced after the heat treatment. The surface roughness of electroless deposited Cu films can be improved by thermal annealing. In our study, the roughness of as-deposited Cu was 125 A for a 1 gm thick film. The roughness reduced to 109 A after annealing for 25 minutes at 2001C in nitrogen. When the as-deposited Cu film was annealed at 300 0 C, the roughness reduced to 106 A. Similar results had been observed for other annealing

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ambient when the annealing temperatures were less than 350'C. When the annealing temperature was higher than 350 0C, the roughness and adhesion to base material worsen because of the surface thermal stress and inter-diffusion of the Cu film with the underlying seeding layers. The surface color also becomes black and opaque. Fig. 3 is the AFM micrograph of electroless deposited Cu. The as deposited Cu film after annealing for 25 minutes at 300TC in nitrogen is shown in Fig. 4. The X-ray diffraction graph of Fig. 5 shows a distinctive polycrystalline structure of the as-deposited electroless plated Cu film without preferred grain orientation. As illustrated in Figure 6 and 7, significant variations in crystal structures were observed after thermal annealing in vacuum (10-6 Torr) for 30 min. at 200TC and 300°C respectively. The Cu(ill) crystal peak increased tremendously as the annealing temperature increased, indicating a solid-state recrystallization of the as-deposited electroless plated Cu with annealing temperature. The ratio of crystal orientation 1(111)/1(200) increased by 10 to 20 percent after thermal annealing, signifying a strengthening of the (111) peak. The crystal texture of the metal film is an important parameter that determines electromigration performance. It was reported that the presence of a strong (111) fiber texture could result in a more reliable interconnect structure [3]. Electromigration performance of damascene-Cu interconnects formed by PVD method could be improved by controlling the film texture to (111) [4]. The texture control would be especially influencing in the electromigration behavior of dual-damascene for interconnection. A simple thermal annealing step of 200TC to 300TC is sufficient to increase the (111) crystal orientation, hence improving electromigration. Such thermal annealing step can be easily integrated into a dual Damascene-Cu process flow such as the dielectric deposition process. Fig. 8 and 9 are XRD graphs of as-deposited Cu film after annealing for 25 minutes at 300TC in nitrogen and oxygen ambient, respectively, revealing strong intensities of Cu 2O (111) and CuO (111) peaks. The high temperature heat treatments of the Cu films in oxidizing ambient resulted in the formation of both Cu 2 0 and CuO. Only weak intensities of Cu 2O (111) and CuO (111) peaks appeared after annealing at 300TC in vacuum ambient. Fig. 10 is an EDX spectra of as-deposited Cu after annealing for 25 minutes at 300TC in N 2 ambient. Only Cu, Si, Ti, 0 elements were obtained and no other element was detected. The percentage of Cu element in the as deposited Cu films, as measured by EDX, reduced from 79.30% to 75.73% and 70.68% after annealing in N2 ambient for 25 min at 200TC and 300°C respectively. This is due to the increased in concentration of oxygen elements, from 6.71% to 11.09% and 15.96%, respectively, after the high temperature heat treatments. The measured resistivities of as-deposited electroless Cu films were in the range of 1.9 ýtL-cm to 3.0 ftQ-cm. The higher resistivity, when compared to that of the bulk material, was due to the effects of film morphology, especially the grain boundary and the loose film structure. These irregularities contributed to the scattering of electron carriers, giving rise to the observed higher resistivities. Approximately 5 to 10 percent reductions in resistivity had been observed when the Cu film was annealed at 200'C in both vacuum and nitrogen ambient. Such improvement was an outcome of the tremendous reduction in grain boundary scattering due to grain growth after thermal annealing and the reduction of surface scattering due to reduction in surface roughness.

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CONCLUSIONS The quality of electroless deposited Cu after heat treatment was studied using AFM, XRD and SEMIEDX. The surface morphology of electroless Cu was much smoother after heat treatment. The oxidation products, Cu 20 and CuO increased significantly with increased in annealing temperature, in both nitrogen and oxygen ambient. The copper oxides are believed to have formed in the heated N 2 ambient due to the adsorbed moisture layer on the Cu film surface. Heat treatment in vacuum is a more effective method for preventing oxidation of Cu film. At temperature greater than 350'C, the adhesion of electroless Cu to the base material becomes poor. The resistivity of electroless deposited Cu reduces after annealing at 200 0C due to the reduction of grain boundary scattering and surface scattering. However, at 300'C in an oxygen ambient, the increased in oxidation products, Cu20 and CuO causes the resistivity of electroless deposited Cu film to increase.

ACKNOWLEDGEMENT The authors would like to thank Mr. Ang K. S. for performing the SEM/EDX analyses. REFERENCES 1. V.M. Dubin, Y.S. Diamand, B. Zhao, et al, J. Electrochem.Soc.,Vol. 144, No.3, p.898, (1997). 2. A. Ronnquist and H. Fisher, J. Inst. Met. 89 (1960-61) 65. 3. D. P. Field, J. E. Sanchez, Jr, et al, J. Apple. Phys. 82(5), p. 2383, (1997). 4. H.Onoda, et al, MRS Symp. Proc., April, (1998).

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Fig. 1. SEM micrograph of electroless deposited Cu.

Fig. 2. SEM micrograph of electroless deposited Cu after annealing for 25 min at 300'C in inert/N 2 environment.

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Fig.3. AFM micrograph of electroless deposited Cu with a scan size 5pam x 5pm.

Fig.4. AFM micrograph of electroless deposited Cu after annealing with a scan size 5pm x 5pm.

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1400 1200

(

1000 800

(200)

600 400 2000 1 -20

1 40

- I

,

,

. , 60

80 2-Thela

100

120

140

Fig.5. XRD of electroless deposited Cu film.

1600 " 1400 1200 .,.1000 C800

600 400 200 20

40

60

80

120

100

140

2-Theta

Fig.6. XRD of electroless deposited Cu after annealing at 200'C for 30 min in vacuum (10-6 Torr). 2400, 2000• 16001200

S800 400 01--

20

-,-

40

1-

1.

60

I

80

.

100

. •,

120

140

2-Theta

Fig.7. XRD of electroless deposited Cu after annealing at 300TC for 30 min in vacuum (10-6 Torr).

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Cu (111)

2SO

200

>,s

=r

;o 2-Theta

Fig.8. XRD graph of as-deposited Cu after annealing for 25 min at 300NC in N2 ambient.

CU(111)

100. S

o 0~

so.

40-O

2-Theta

Fig.9. XRD graph of as-deposited Cu after annealing for 25 min at 300NC in 02 ambient.

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3000-

2500-

2000-

15000

S1000 500= Soo CU

0

Ti 00

5

10

15

20

Energy (KeY)

Fig.10. EDX spectra of as-deposited Cu after annealing for 25 minutes at 300NC in N2 ambient.

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Cu ELECTROPLATING ON n-Si(111): PROPERTIES AND STRUCTURE OF n-Si/Cu JUNCTIONS

T. Zambelli, F. Pillier, and P. Allongue* Laboratoirede Physique des Liquides et Electrochimie, CNRS-UPR15, 4 Place Jussien Tour 22, F-75252 Paris Cedex 05, France

Alkaline CuCN solutions were used for the first time to electrodeposit homogeneous and adherent Cu films onto silicon. The obtained Cu/n-Si(111) junctions show a nearly perfect rectifying behavior. The Schottky parameters (barrier height (DB = 630 mV; ideality factor n = 1.2) do not change importantly with time. It is also demonstrated that highly adherent Ni films can be plated onto n-Si(111) from an acidic Watts bath, if copper clusters were elecrodeposited onto the silicon surface first.

INTRODUCTION In ultra-large-scale integration structures, aluminum or an aluminum alloy is now generally used as the interconnecting material. To overcome the limitations of aluminum connections, copper wiring technology has been widely investigated in the last years, since copper has a higher melting point and lower resistivity than aluminum. Particular attention was given essentially to copper chemical vapor and to copper electroless deposition (1). As far as electrochemical deposition is concerned, studies were mainly carried out with acidic CuSO 4 solutions, occasionally buffered with HF (2,3), or, more recently, with acidic CuCO 3 .Cu(OH) 2 solutions(4). Information on the mechanism and the kinetic laws of deposition could be inferred from these experiments, but nothing about the electrical properties of the Cu/Si junctions was reported. This is probably due to the fact that such Cu films are not sufficiently adherent. In this report, we demonstrate that robust electroplated Cu/n-Si(111) junctions with a nearly perfect diode behavior may be grown from alkaline CuCN solutions (5). Results of investigations about aging of contacts in ambient are also presented.

* corresponding author: [email protected]

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Finally, a two step procedure to obtain very adherent Ni, Co and Fe films on n-Si is illustrated EXPERIMENTAL 8 x 8 mm 2 silicon samples were cleaved from 3" silicon wafers (SILTRONIX, n-type, 1-10 Qcm, < 0.5' miscut). After thermal oxidation (1100 'C, - 100 nm of oxide thickness), the samples were ultrasonicated in methanol, immersed for 30 min in bidistilled water (BW) mixed with 4% Labwash 12 (Prolabo) and finally etched for 1 min in 40% HF to remove the silicon oxide and produce an H-terminated surface. Deposition was performed either from the High Efficiency (HE) or the Strike CuCN solutions. Both solutions consist in a mixture of NaCN and CuCN and Rochelle salt (potassium sodium tartrate) in NaOH (pH 13-14, see Table I). Table I: Composition of the CuCN solutions. High Efficiency

Cu Strike

CuCN

0.8 M

0.3 M

NaCN

1.9 M

IM

Rochelle salt

0.2 M

0.1 M

0.1 - 2M

0.2 M

NaOH

Reagent grade chemicals were utilized. Electrodeposition was carried out in a conventional three-electrode cell under potentiostatic control with a mercury sulfate electrode as reference (in the following, all potentials are quoted versus this reference) and a platinum wire as counter electrode. Solutions were stirred and deoxygenated by bubbling nitrogen. Backside ohmic contacts of Si samples were achieved with an InGa eutectic. The i-U characteristics of the solid state junctions were measured in air. RESULTS AND DISCUSSION Figure 1 shows a typical voltammogram for an H-nSi(111) surface in the CuCN HE solution (dashed line) and the corresponding supporting electrolyte (no CuCN added, solid line). In the supporting solution, the cathodic current observed for potentials U < -2.1 V is the reduction of molecular water according to the reaction 1120 + e- -> 1/2H 2 + OH-. In the copper solution, the cathodic wave appearing for U < -1.75 V. It is interpreted as the beginning of Cu deposition since it is absent in the blank solution. The anodic peak at -1.2 V (also absent in the Cu free solution) detected on the positive going potential sweep corresponds to the stripping of the Cu deposit.

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150

0~

.................... ......

~ ~

E -150

-300 -2,4

2,1

-i '8

-1,5

1,2

-0,9

U (V)

Fig. 1: Voltammogram of an n-type H-Si(111) surface in the 0.5 M high efficiency CuCN solution in 0.1 M NaOH. Solid line: without CuCN; dashed line: with CuCN. Scan rate: 20 mV/s. After plating, the first test of deposit was controlling the mechanical adhesion of Cu layers using the adhesive tape test. All films passed successfully this test whereas films obtained from an acid CuSO 4 solution never passed the same test. The excellent mechanical properties of Cu films deposited from alkaline cyanide solutions is therefore presumably related to some specific interactions between the CN ions and the Si surface as recently observed for the electrodeposition of gold on n-Si from KAu(CN) 2 solutions (6). 10

n-Si/Cu contacts anl

S0,1

n X×

.

180

240

nn=. x×E ..........

0,101

IE-3

-

-180 -120

0 xxx

% XMXE

-60

0

60

120

Bias (mV) Fig. 2: Electrical characteristics of an electroplated n Si(111)/Cu contact (Vd = -1.75 V, td = 300 s) measured immediately after preparation (squares) and after 23 days (crosses).

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Junctions obtained by Cu plating at Vd = -1.75 V in the HE solution are perfect diode (Fig. 2, squares): the direct current is an exponential law at positive bias over two decades, until ohmic losses become non negligible at large current density. The reverse current at negative bias rapidly saturates. Using the expression i, = A**T2 exp(-q 0 i-V/kT) [exp(qV/nkT) - 1] (7) to analyze the exponential branch of the characteristics, where symbols have there usual meaning, a barrier height (DBi-V = 632 ± 3 mV and an ideality factor n = 1.28 +-0.04 were found. It was also checked that the value of (DB derived from the saturation current i, = A**T 2 exp(-q DBi-V/kT) was consistent with the above determination. Using capacitance measurements (MottC-V i-V Schottky method) 6 q)B is found to be typically 60 mV greater than 'B . This small difference is a further indication of the abruptness and chemical homogeneity of the interface. These characteristics are comparable to those reported for contacts prepared by physical methods (8). The dependence of the electrical properties on pH and relative concentration of the CuCN solution was also investigated. Diluting the HE solution from 0.5 to 0.05 M enhanced ftB by a small amount (640 ± 15 mV) leaving n almost unchanged (i.e., its position and its value of minimum). On the other hand, keeping the concentrations of NaCN and CuCN fixed and increasing that of NaOH led to a shift of the onset of the diode/resistance transition. For a I M NaOH solution, the transition occurred at 1.85 V instead of -1.95 V. With regard to the Rochelle salt concentration, usually present in the commercial baths, no significant effect could be discerned, not even in the complete absence of this component. Employing the Strike solution, diodes were achieved with lower 0•B (600 ± 10 mV) and with higher n (best value 1.8 ± 0.1). Since these junctions were clearly of lesser quality, the systematic study of the effect of the solution concentration and pH was not pursued. We only noted, however, that, in this case, the Rochelle salt was indispensable to obtain adherent films. Table II: Aging of Schottky junctions. day

Alkaline copper (B

180

n

0 1 2

621 662 671

1.22 1.21 1.17

3 4 10 20 30

694 685 688 683 682

1.24 1.29 1.27 1.32 1.35

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After succeeding in producing Schottky junctions of high quality, their aging at ambient was investigated by repeating barrier height measurements (see Table II). The Schottky parameters of twelve rectifying junctions prepared under the same conditions (Vd = -1.75 V, td = 300 s) were followed over one month. They behaved in the same way: 0,BIN increased by - 50 mV after one day and stabilized around 682 ± = (DBC6 mV after 20 days (Fig. 2, crosses is an example of result) and the difference A V i-V B = 60 mV remained unchanged over the same period. The values of n remained essentially unchanged, and ranged between 1.3 and 1.4.

a)

b) EF - - -

(B

E Eredox

Eredox

ýU n-Si

CU film CuSO 4 ,aq

n-Si CuSO 4 ,aq

Fig. 3: Energy diagram a) of a Cu/n-Si (111) junction and b) of a bare n-Si(111) in contact with a CuSO 4 solution (pH 2). One obvious interpretation of above results is oxidation at the Si/Cu interface through voids in the Cu layer. As preliminary test to clarify whether these observations may be asssigned to copper and/or silicon oxidation, the porosity of the Cu films was inspected by immersing a Cu/Si junction into an acidic solution of CuS0 4 (pH 2) with increasing HF content. Initially, the open circuit potential (OCP) of the silicon covered by the Cu film was - 0.38V, which is equal to the rest potential

of a clean Cu wire. This indicated that the junction

n-Si/Cu/CuSO4

solution was at

equilibrium (Fig. 3A). Addition of a small amount of HF, up to 2%/, however, induced a rapid shift of the OCP of the n-Si/Cu electrode, the value being intermediate between that of the Cu wire and that of the bare n-Si electrode in contact with the CLIS0 4 solution (Fig. 3B, the rest potential of bare n-Si is - 0.64 V). Since HF is known to dissolve Si oxide, the negative shift of the OCP means that HF actually reaches the Si surface, i.e. that Cu films are not ideally compact. Porosity of the Cu films is also

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consistent with the increase of

4

B with time, which we therefore attribute to

oxidation at the Si/Cu interface.

50

Fig. 4:

rn1

Cross section TEM image of a Cu layer electroplated onto n-Si(lll).

Figure 4 shows an XTEM view of a Cu/n-Si(l1) contact. The copper layer is constituted of nm cristallites, with no preferential orientation. Rings with dots were found by electron diffraction. The image evidences a sharp interface between silicon and copper, in agreement with electrical measurements. Despite the XTEM sample preparation, we note that the film is still attached to the silicon. This is a further proof of its adhesion.

Fig. 5: In plane TEM image of Cu clusters electroplated onto n-Si(111). The excellent adherence of Cu layers gives the opportunity of preparing electroplated adherent films of various metals onto n-Si(111), using a two step process in which Cu clusters are first grown as precursors and then, the metal of interest is plated. Figure 5 shows an in plane TEM view of Cu clusters electrodeposited on n-Si(111) (Vd = -1.75 V, td = 40 s). They represent the minioiuni quantity of copper necessary to obtain nickel films from a modified Watts bath (pH 3). Nickel was electrocristallized at Vd = - 1.30 V and we emphasize that it was not possible to achieve Ni deposition on n-Si(111) at this potential without the presence of Cu clusters. Ni films are also very adherent and they successfully passed the

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adhesive tape test. Moreover, the obtained contacts behave as nearly ideal Schottky i-V diodes (Fig. 6) with (DB of 635 ± 5 mV and n of 1.08 ± 0.04. Experiments with cobalt and iron solutions also at pH - 3 are currently in progress.

n-Si/Cu/Ni

contacts e0

z~0,1 O0

01

•_0,01

U

o1

e°o e.ooooooo°•

IE-3 -200

-100

0

100

200

Bias (mV) Fig. 6:

Electrical characteristics of a n-Si(111)/Cu/Ni contact (Cu: Vd -1.75 V, td 40 s, Ni: Vd = -1.30 V, td = 5 min) measured immediately after preparation.

=

CONCLUSIONS In summary, this study shows the great possibility of generating Cu/n-Si junctions with a nearly perfect rectifying behavior from CuCN solutions. Diode characteristics are comparable to those reported for contacts prepared by physical methods and are not appreciably subject to modification with time. The second promising point is the high adherence of Cu films, which was exploited to electrodeposit adherent Ni films from a modified Watts bath. This two step procedure seems to solve the major difficulty encountered upon growing thick metal layers onto H-Si surfaces from acidic solutions and enables to prepare stable electrical junctions with defined electrical properties. ACKNOWLEDGMENTS This work is part of the QUEST-Project MEL ARI 23274 supported by the European Community. REFERENCES 1. see, for example, the review article Copper metallization in Industry, MRS Bulletin Vol. XIX, No. 8 (1994). Electrochemical Society Proceedings Volume 99-9

183

2. S. G. dos Santos F°, L. F. 0. Martins, P.C.T. D'Ajello, A. A. Pasa, and C. H. Hasenack, Microeletronic Engineering, 33, 59 (1997). 3. G. Li, E. A. Kneer, B. Vermeire, H. G. Parks, S. Raghavan, and J. S. Jean, J. Electrochem. Soc., 141, 241 (1998). 4. G. Oskam, J. G. Long, A. Natarajan, and P. C. Searson, Appl. Phys., 31, 1927 (1998). 5. R. H. Atkinson, in Modern Electroplating, 3rd ed., F.H. Lowenheim, Editor, John Wiley & Sons, 3rd Edition, New York (1973).

,

p. 165,

6. G. Oskam, D. van Heerden, and P.C. Searson, Appl. Phys. Lett. 73, 3241 (1998). 7. E.H. Rhoderick, in Metal-Semiconductor Contacts, P. Hammond and D. Walsh, Editors, p. 7, Clarendon Press, Oxford (1980). 8. S.M. Sze, Phiysics of SerniconductorDevices, 2nd ed., p. 291, John Wiley & Sons, New York (1973).

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THE USE OF COPPER BASED BACKMETAL SCHEMES AS A LOW STRESS AND LOW THERMAL RESISTANCE ALTERNATIVE FOR USE IN THIN SUBSTRATE POWER DEVICES T. Grebs, R. S. Ridley, Sr., *J. Spindler, J. Cumbo and J. Lauffer Harris Corporation, Semiconductor Division 125 Crestwood Road, Mountaintop, PA 18707 ABSTRACT In this study, a tantalum and copper backside metalization scheme' was demonstrated to be an effective alternative solderable metalization scheme for thin substrate power devices. The conventional solderable backmetal scheme is comprised of some combination of Ag, Al, Au, Cr, Ni or Ti films, all of which have significantly large stress as compared to Ta/Cu. The alternative metal stack of Ta/Cu demonstrated lower stress levels thus reducing wafer warpage and therefore reducing wafer breakage and handling issues. This alternative backmetal process for power semiconductor devices was developed using physical vapor deposition (PVD) of the barrier/contact layer tantalum, followed by PVD of the conducting layer copper on the backside of a thinned silicon wafer. The Ta/Cu film stack also possesses excellent electrical properties, thermal conductivity and lower processing costs, all of which are required for manufacturing power discrete devices. INTRODUCTION In power semiconductor device manufacturing, especially in a U-shaped trench MOS (UMOS) structure" or double-diffused MOS (DMOS), seen in Figures 1 and 2 respectively, the backside of the silicon wafer is usually metalized to form a drain terminal. In power devices were current flows both laterally and vertically, the resistance from drain to source (Rds0 n) is made up of several resistive components in series as shown in Figure 2'. The optimization of each of these resistive components is important in producing competitive devices. In the past, backside metal films were only required to have the properties of low ohmic contact resistance to silicon, high thermal conductivity, and be a reliable and solderable film stack to optimize packaging and device performance. In this study, the focus has been shifted to include optimization of wafer warpage. Since wafer warpage has been shown to be proportional to wafer size and thickness'v, the increase of wafer size from 4" to 8" in an attempt to improve manufacturing costs and obtain higher utilization of equipment makes the issue an engineering priority. The effect of the backmetal stress on wafer bow is also dramatic,

" Currently with Eastman Kodak Co.,

1999 Lake Ave., Rochester, NY 14650.

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particularly as wafer diameters increase and wafer thicknesses decrease; trends which cannot be avoided in power device manufacturing. Power device backmetal schemes must have minimum tensile or compressive stress since wafers are typically back thinned to between 4 - 14 mils. After which, the thinned wafers are then processed through automated equipment. The additive stresses that are characteristic of the blanket backside metal films have a significant affect on the overall stress induced on a wafer and therefore causes a high level of wafer warpage and breakage especially in thinned larger diameter wafers. The extent to which a wafer is thinned is mainly dependent on technology and application. Wafers are typically back thinned to reduce the substrate's contribution to the overall operational resistance (RdSoo) of the device as shown in Figure 2. Also, most device packaging options require the metal film stack to be solderable so that the die can be solder mounted onto a lead frame. Furthermore, the total combined thickness of the die and backmetal is becoming thinner due to new smaller package height requirements. A theoretical study of the most important characteristic of backmetal schemes for power devices such as contact resistance, thermal conductivity, resistivity and barrier height all suggest the Ta/Cu has equivalent or superior characteristics' in comparison to the power device industry standard backmetal scheme Ti/Ni/Ag (shown in Table I). This comparison can also be applied to the cost associated with using each metalization scheme in device manufacturing. Since the cost of Cu is generally lower than the cost of either a Ti, Ni, or Ag, it is likely to lower the backmetal deposition process cost. The actual raw material cost of the dual metal scheme Ta/Cu is 47% lower than that of the typical tri-metal scheme. Using a standard four chamber Novellus sputtering system with parallel processing the Ta/Cu stack has an approximate 75% increase in wafer throughput per hour based on sputter rates and wafer process limitations. Furthermore, since the copper deposition in this study occurs at the end of processing no special handling or isolation of the wafers is required, which is typical when copper is used in topside metalization schemes. All of these factors can be translated into lower cycle time, higher throughput, higher yield, and thus lead to a lower utilization cost.. EXPERIMENTAL PROCEDURE In this study n-type, arsenic doped, <100>, 6"and 8"prime silicon substrates were used in unit step experiments. The devices were typically fabricated on n-type <100> silicon with an epitaxial layer. Both unit step and fully processed device wafers were back thinned from 30 to 14 mils using a standard mechanical grind process and chemical stress relief process. Subsequently, a native oxide removal step was performed on the backside of the wafers. Metalization of the wafers was then carried out in the Novellus applications laboratory on a multi-chamber Novellus M2000 PVD tool resulting in an -50 mn thick tantalum layer and copper layers of various thicknesses. The tantalum was deposited under the following conditions: chuck temperature 150C, argon flow 35 sccm, power 3 KW. Copper was deposited on top of the tantalum film in the same Novellus

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M2000 under the following conditions: chuck temperature 150C, argon flow 40 sccm, and power 3.5 KW. A second group of pilot and device wafers with the standard sputtered Ti/Ni/Ag backmetal stack were also prepared for comparison. All wafers were measured for stress, warpage and bow using the Tencor FLX-2320 thin film stress measurement tool, which uses a radius of curvature measurement technique. Some wafers were analyzed using SEM and TEM to investigate the physical properties of films as well as their interfaces characteristics. The samples were also tested for compatibility with current soldering and packaging methods. A solder wetting balance test was used to evaluate the effectiveness of the film in terms of solderability and de-wetting. More extensive solder methods were used to examine metal film stack diffusion characteristics during the soldering process. In this process the device wafers receive an automated circuit probe testing followed by the standard plastic package assembly operations. Electrical testing was performed and results were compared to the control cell. ELECTRICAL PROPERTIES The primary function of the backmetal system in power devices is to provide an excellent solderable contact to the wafer backside, which also serves as the drain contact. The extent to which any metal system will perform in this regard is measured by certain key electrical & physical parameters. The key electrical properties associated with each element commonly used in semiconductor metalization processes are gathered and shown in Table I. Most of the typical backmetal schemes used consist of at least two of these metal layers. However the layer in contact with the silicon determines the contact resistance. For low on-resistance power devices, the metal contact to the silicon is required to have a low barrier height, where barrier height is proportional to contact resistance. A comparison of barrier heights shows that titanium is the optimum metal for achieving lowest theoretical contact resistance (Roto, with tantalum being the next lowest. In the standard backmetal scheme Ti is used and one would expect to observe a shift in contact resistance when using tantalum. However, this slight shift in contact resistance does not significantly change the total backside resistance Ro. Moreover, the resistance attributed to any variation of metal films, R.,,. has minimal impact on total backside resistance R,,.,. Since in most cases the total backside resistance 1. is dominated by the resistance of the substrate R,,,o, thinning the substrate is necessary to remove as much silicon as possible. However, when wafers are thinned researchers have shown that they are susceptible to bow, stress and warpage especially with blanket backside metalization. THIN WAFER STRESS AND WARPAGE In this study, the overall stress in the Ta/Cu film stack is seen to be appreciably less than the overall stress in the Ti/Ni/Ag metal stack. Figure 3 shows the bow measurement of two identical 200mm wafers, one with the Ta/Cu backimetal stack and

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the other with the standard Ti/Ni/Ag backmetal stack. The measurement of bow is assumed to be directly proportional to the amount of stress in the backmetal stack. The wafer prior to backmetal deposition is under compressive stress and exhibits positive bow. The backmetal films investigated are known to cause tensile stress and exhibit negative bow, therefore it follows that wafer bow is proportional to the backmetal stress. This proportionality is observed by examining the net effect on wafer bow after backmetal deposition which is that it becomes more positive. In this case, positive bow is relative to the placement of the wafer when measuring bow, which is always with the front or device side up. The initial tests were run at a wafer thickness of 14 mils. Realizing that the trend is toward thinner die, and thus thinner wafers, the benefit from a less stressful backmetal film becomes obvious when looking beyond 14 mils. Figure 4 shows the trend in wafer bow versus wafer thickness, where the bow is mainly caused by the stress from the deposited backmetal layers. Shown is the actual measured bow for the standard Ti/Ni/Ag backmetal on wafers at a thickness ranging from 6 to 14 mils. A theoretical curve is applied using a principle derived from a previous study by M. Grief and J. Steele Jr.•, where the bow is said to be inversely proportional to the square of the substrate thickness. The theoretical curve is normalized to the standard bow value at 14 mils and then projected outward. The Ta/Cu curve is based on the actual measured bow of the wafer at 14 mils, projected to a thickness of 6 mils using the same relationship described above. The apparent benefit from the low stress Ta/Cu backmetal stack is enormous, especially when considering thinner substrates. Future studies will investigate stress characteristics of Ta/Cu films ranging in thickness, on thinner substrates. PHYSICAL ANALYSIS In discrete power semiconductor devices the backside silicon surface is intentionally roughened to promote good metal adhesion and provide increased metal contact area. As discussed earlier this backside contact area and metal films used are important in achieving the lowest possible resistance ron,, and r respectively which is a requirement for backside contacted devices. This roughened surface increases the requirements for metal deposition tools to provide a continuous and conformal film coating over the backside topography. SEM and TEM analyses were performed on wafers with simulated device processing, revealing 50nm of continuous tantalum metal film. The tantalum layer covered a 200nm (rms) roughened backside silicon surface. No copper was observed in the bulk silicon, which also confirms that the tantalum protection barrier was adequate since copper diffuses into silicon at a rapid rate (4E-02 cm 2/sec @ 23°C). SIMS analysis also confirmed the tantalum barrier integrity, exhibiting sharp elemental transitions between the films with no evidence of copper detected in the bulk silicon.

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THERMAL AND SOLDERING ISSUES In discrete power semiconductor devices, heat is internally generated within the device. This heat must be thermally transferred away from the device as efficiently as possible to prevent device degradation. The heat is transferred out of the silicon by three methods, which are conduction, convection or radiation. Backmetal aides in the removal of heat via the conduction method, while convection and radiation effects are minimal. Both copper and silver possess excellent thermal conductivity properties that are beneficial for heat dissipation. Another key factor to be considered is device solderability to a package, which also strongly influences the heat dissipation. Device solderability to a package is controlled by several factors but most importantly the top layer of the backmetal stack and its thickness. To improve heat dissipation, one has to optimize the top backmetal layer, which should possess excellent thermal conductivity and low dissolution into a tin based solder. In this investigation, both the copper and silver are shown to possess these characteristics. It is important to understand the key components of dissolution for copper and silver during the solder process. The key components include time and temperature of soldering as well as tin content of solder because they determine the thickness necessary for proper adhesion. The liquid-solid diffusion rate information for solder scavenging of copper and silver is very limited in the literature, so estimations have been made. The rate of dissolution of copper and silver into a PbSn or PbSnAg solder, seen in Table II, is highly dependent on the percentage of tin present in the solder. Higher tin levels result in faster diffusion into the solder. The copper and silver backmetal thicknesses need to be kept above a minimum value to avoid diffusion of the entire layer into the solder, especially in cases where the next layer underneath is nonsolderable. In this study, the minimum suggested copper and silver thicknesses were chosen to be compatible with tin based solder that was reflowed for - 90 seconds. Also, some additional top layer backmetal thickness was added as a safety factor to protect against solid state diffusion that can cause exposure of the non-solderable metal during this high temperature solder operation. An examination of both the copper and silver dissolution rates into tin based solder, seen in Table II, shows that silver is approximately 1.5 times the rate of copper at a typical soldering temperature of 375'C". Since the die top layer backmetal diffuses into the solder, tin's ability to scavenge the backmetal will decrease and the rate of diffusion of backmetal into the solder will decrease. This effect is very difficult to calculate, therefore the diffusion rate figures are a constant-rate approximation only. PARAMETRIC RESULTS The three key areas examined were fallout after packaging and electrical testing of packaged devices, where Vsd and Rdson were the key electrical parameters evaluated. Vsd is a measure of voltage drop across a P-N junction, (source to drain) or the body diode of the device. This measurement is effected by the epitaxial layer, substrate,

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surface concentration of the P/P+ region of the body diode as well as the backside (drain) metal contact resistance. As seen in Figure 2, Rdson is defined as a sum of the resistors within a power device of which the backmetal is one of these resistors. First, devices from both the Ta/Cu and control group (Ti/Ni/Ag) were packaged and subsequently electrical parametric tests were performed. The packaging yield is associated with soldering the device onto a lead frame, wire bonding of the device and encapsulating the die into a finished molded package. As observed in Figure 5, the Ta/Cu cell had a 99% yield and the Ti/Ni/Ag cell yielded 100%, which is statistically indifferent. The indifference in the packaging yield indicates that the Ta/Cu metal scheme is a viable alternative without altering the current packaging process. Power discrete devices typically function as a switch and as such most high-power applications require these devices to be low in resistance to minimize heat and current load as well as optimize Vsd and Rdson. As with prior test, the Ta/Cu backmetal had no significant impact on Vsd or Rdson as compared to the control group. Since the Ta/Cu was not examined for electrical benefits but for stress benefits, there is only a need for it to be equivalent to the standard metal scheme in the electrical and parameteric performance. These results confirm that since the metal schemes evaluated behave in a similar manner, the bulk silicon resistance is the dominant factor in determining Vsd and Rdson of the device. CONCLUSION This study has demonstrated that a tantalum and copper backside metalization scheme is an effective alternative solderable metalization scheme for thin substrate power devices. The conventional solderable backmetal scheme typically comprised of Ti/Ni/Ag has significantly large stress which translates into large wafer bow as compared to the Ta/Cu alternative. This alternative stack has demonstrated lower stress levels thus reducing wafer warpage and therefore reducing wafer breakage and handling issues. The Ta/Cu film stack also possesses lower metalization costs, versus a tr-metal scheme (Ti/Ni/Ag). The actual raw material cost of the dual metal scheme is 47% lower than that of the tri-metal scheme. Using a standard four chamber Novellus M2000/M21 sputtering system with parallel processing the Ta/Cu stack has an approximate 75% increase in wafer throughput per hour based on sputter rates and wafer process limitations. The electrical properties of the various back metal schemes examined showed a slight difference in the contact and metal resistance for standard verses the alternative backmetal schemes. However, the slight shift in contact and metal resistance do not significantly change the total backside resistance Rk 1 . This is because the total backside resistance Rt,, is dominated by the resistance of the substrate Rsilion, The dominance of substrate resistance Ria,,_ is a significant the driving force for wafer thinning, however thinned wafers are susceptible to bow, stress, warpage and breakage especially with blanket backside metalization. Thinned wafers also have relatively rough back surfaces for increased contact area however this can cause metal conformality issue. Upon

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examination the Ta layer acts as an excellent barrier for Cu and was shown to by SEM and TEM analysis to be very conformal. The backmetal schemes investigated primarily remove heat via the conduction method. Both copper and silver possess excellent thermal conductivity properties, which are beneficial for heat dissipation. Device solderability to a package, which also strongly influences the heat dissipation, was not effected by the Ta/Cu metal scheme. The three key parametric areas examined, which included packaging, Vsd and Rdson all showed that the Ta/Cu metal scheme is a viable alternative without altering the current packaging process. ACKNOWLEDGEMENTS The authors would like to thank Steve Vahey, Don Pavinski and KC Wong for their extensive support in soldering and packaging experiments. A special thanks is given to Novellus for their support in demonstrating Ta/Cu PVD metal deposition method. REFERENCES 'T. Grebs, et al, US Patent invention disclosure, submitted December 23, 1998. "B.J.Baliga, Power Semiconductor Devices, PWS Publishing Co., Boston MA, 1996. S. Benczkowski, Internal Harris Semiconductor Report, 1998. 'vM.K. Grief and J.A. Steele Jr., Proceedings of IEEE/CMPT Int'l Electronics Manufacturing Technology Symposium, p.p. 190-194, 1996. ' S.M. Sze, Physics of Semiconductor Devices, Wiley Publishing Co., New York, NY (1981). " E.H. Rhoderick and R.H. Williams, Metal- Semiconductor Contacts, Oxford Publishing Co., New York, NY (1988). "S.Vahey, Internal Harris Semiconductor Report, 1998. FIGURES AND TABLES t

S -urase Channel region

~Gatet Syue

P

N-

Channel region

N-4 Drain~

Figure 1 A cross-sectional view of a UMOS structured Power MOSFET.

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"Neck

jf

IRFE

-

N Epi

Rept

R.ubstrato Rdraln contact

N+ Substrate

Figure 2 A cross-sectional view of a typical DMOS structured power MOSFET with the resistive components shown. 350

------

T

300 t .250,

--

200

0

-

Ta/Cu

Ti/Ni/Ag

Fiigure 3 Bow measurement of standard vs. Ta/Cu backmetal scheme on

1600 oo

14 mil thick, 200mm wafers.

1400 5

1200 1000

-

"800 600

400 200 0. 4

6

8

10

12

14

16

Wafer Thickness Imils] -i-- Theoretical

* Std. Backmetal --a

Ta/Cu .

Figure 4 Bow versus Wafer Thickness for various backmetal schemes.

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1 00 5 2

98 96 -o 94

92

U

0

Z

Final Test Yield

Rdson

Vsd

o] Ta/Cu

*_[ Ti/Ni/Ag

Figure 5 Device yield and parametrics data versus backmetal scheme.

Element Al

Thermal Conductivity 2 (cal-cm/sK-cm ) @20-C

Electrical Conductivity (106/ohm-cm) @20-C

0.570

0.372

Au

Resistivity 6 (10- ohm-cm) @20-C

Barrier Height (ev)

268070

'

-~ --- G-TF

"U

0.940

Va

0.130

Ti lack MeCtl Schemes

0.599 0401

1.669 12.346

0.580 0550

0.024

667

0.500

RmeiaI

(ohm-em )

(ohm-cm )

6.00L-04

2.07E-09

6.766-04

600E-04

2.76-09

7.6214-05

6.00E-04

1.91 E-09

7.62E-05

6 76E-04

6.00E-05

1.45E-I 0

7.62E-05

1.366-04

60E-5

4.33E-10

7060

1

R,111io

Rtotai = Rcontact +

Rcontaci

(ohm-cm )

2

2

Rmetal+ R-11vo 2

(ohm-cm ) Al- It-Ni

A-Ti-Niu KI-

iNiAg

•a-Cu I a-Cu-Ag T'M -ar-u

-.1 V1E-05-

3.2--7E-I 0

7162E-05

--

7.62E7T-5

6.76E-04

E

8.-62E-05

Table I Behavior of backmetal film elements and resistance of various backmetal film schemes. {Note: calculations are based on Si =.003ohmcm (2el9atom/cm3) @10 mil thickness} Solder Alloy

Approximate Diffusion Rates of Copper into solder at 350-375 0 C

Approximate Diffusion Rates of Silver into solder at 350-375 0 C

PbSn, 100 A/sec n/a PbSn5 Ag2.1 70 - 80 A/sec 200 - 300 A/sec PbSn 2Ag2 5 50 - 70 A/sec 75 - 115 A/sec Table II Copper and silver diffusion rates as a function of solder type

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Possibility of Direct Electrochemical Copper Deposition without seedlayer H.P.Fung and C.C.Wan Dept of Chemical Engineering Tsing-hua University,Hsin-chu,Taiwan

ABSTRACT The possibility of applying copper deposition directly on top of TiN barrier via electrochemical method was studied. Previous report of using contact displacement to deposit copper was found chemically questionable. The copper deposition observed could be due to reaction between cupric ion and silicon underneath through cracks in the intermediate TiN layer. INTRODUCTION Copper interconnection via electrochemical means has received increasing attention. Currently the most acceptable method is based on electrodeposition of copper on top of a copper seed layer which has previously been deposited by CVD or sputtering method('). Other electrochemical methods have also been explored. For instance, it is possible to deposit copper by electroless method with appropriate reducing agent(2 ). Theoretically, the copper can be more uniformly deposited. However, it has its own drawbacks. The bath is more complex and difficult to control, which means it is a more expensive method. The deposits' property is in general not as good as that by electrodeposition since it contains more contaminants and less desirable crystal structures(3 ). Dubin et.al. 4' mentioned a possible alternative. They proposed that it is possible to deposit copper by displacement method, which is still based on electrochemical principle. According to their method, the wafer covered with a TiN or TaN barrier layer will be dipped into an acidic copper sulfate solution containing NaF as an etching promoter. Copper will immediately deposit on the barrier layer presumably due to a displacement reaction between the cupric ion and the nitrid compound. This method needs no external applied current or reducing chemical. In theory, it is better than electroplating or electroless plating. However, very little information is available regarding the mechanism of the actual reaction occurred or the subsequent technical development based on this concept, although it is a fact that Si or Ti can be chemically displaced by cupric ion. So we carried out a study to investigate the reaction involved in this deposition

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process and the potential drawbacks which may be associated with this method. EXPERIMENTAL The wafer firstly covered with TiN barrier was dipped in a displacement solution, which may contained cupric ions or palladium ions. As for the subsequent copper electroplating, the electrolyte contained 75g/1 CuSO 4 - 5H 20

and 100g/I H2S0 4 , the palladium contact displacement solution

contained PdCI2 I g/l and NHF • t4F

6

g/l. The copper contact displacement solution

contained CuSO4 • 5H20 I g/l and NH4F • HF lOg/I and the temperature was controlled at 18-20'C. The copper deposit was finally analyzed by SEM, XRD and AES methods. A four-point probe was used to measure the film resistance. RESULTS AND DISCUSSION Copper deposition by contact displacement Since we are interested in the mechanism of copper deposition by contact displacement, we prepared three kinds of solution to ascertain the controlling factor. a. CuSO4 • 5H 2 0

lg/l

HF 10ml/l

b. HF 10ml/l c. CuSO 4 • 5H,O

lg/I

Then wafer samples covered with TiN layer were dipped in each of the solution, respectively. The samples came from two sources,

designated as A and B.

Furthermore, we also dipped bare Si and TiN powder in the test solution for comparison. The results is as follows, Table I Test of Copper deposition by being dipped in three kinds of solution A B Si TiN powder (a) CuSOC.5H 20 lg'l HF (b) HF

10 ml/I

(c)CuSOC.5HO lg/l

o

x

0

x

x

×

0.00957mg/Ig

x

x

×

0.0102mg/Ig

0.24mg/Ig

-0

10 ml/l

deposition

x no deposition

0.24mg/Ig means copper contact was found to be 0.24mg per gram of TiN Note: contact time 15 minutes Obviously copper can be deposited by contact displacement on Si surface directly, but the reaction needs the assistance of fluoride ion. In fact M.K.Lee alreadyy observed this and proposed the following reaction,

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2

and

SiF 6 - + 4e

I,

Cu2> + 2e -

o Cu

Si + 6F-

(E= -1.24V) (E= 0.34V)

So it is a spontaneous deposition, although the copper deposit showed poor adhesion. But silicon substrates covered with TiN showed different behavior. Firstly, the copper deposit grew very slowly and difficult to observe because the TiN substrate's color was also golden. However after being dipped in solution(a), the copper contact was analyzed to be 0.24mg/g TiN, which is much slower than Si. In the case of solution(b), the copper contact was found to be 0.00957mg/g. Since there was no copper in solution(b)., the copper should be impurity originally contained in the TiN powder. As for solution(c), there was only a minimal increase of copper content when compared with solution(b). So presumably, copper cannot be deposited with CuSO 4 solution without F- ions. Sample A responded very slowly to solution (a) in contrast to sample B. For sample A, there was a thick SiO, (100nm) layer beneath the TiN layer. But for sample B, the TiN layer was directly in contact with the Si substrate. If the copper deposition was due to reaction between TiN and cupric ion, there should not be such a distinct difference between Sample A and Sample B. Furthermore, we observed that the TiN layer was etched away by solution (b) as shown in Fig . So we suspect that the so-called displacement reaction between TiN and Cu" is really a reaction between Cu2' and the underneath Si when TiN is etched away. SEM observation(Fig2) of the copper deposit also shows that the copper is not uniformly distributed but dispersedly located. This again indicates that copper grows through the crack of TiN layer. Fig 3 shows the TiN composition profile by AES near the crack area and Fig 4 is the profile of the copper deposit. These two figures again confirm that the copper deposit is not due to displacement reaction between TiN and Cu2-.

A direct chemical analysis of the product after we dipped TiN powder in the solution for copper contact displacement indicates TiN can react with CuSO4 solution but very slowly. Apparently Cu2> ions can readily be displaced by Si and Ti instead of TiN. How other metallic ions behave in contact with those materials are of great interest to us as shown in the follow table.

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Table 2

Some metallic ions behave in contact with those materials Si

Ti

PVD TiN

CVD TiN

Sr (E°=-2.888)

×

x

x

x

Mg (E7=-2.363)

x

x

x

x

AI (E"=-1.662)

x

x

x

x

Zn (E"=-0.7628)

x

0

x

x

Fe (E'=-0.4402)

x

0

x

x

Ni (E'=-0.25)

x

0

x

x

Sn (E"=-0.136)

A

0

x

x

Cu (E =+0.337)

0

0

A

A

Ag (E'=+0.7991)

0

0

0

0

Pd (E"=+0.987)

0

0

0

0

M=Ig/I

NHF • HF=6g/I

0

x =no reaction

O=react perfectly

A=react partially and slowly

Fig 5 is AES profiles of sample after reaction with PdCl,/NH 4F.HF solution. We also found by AES analysis, there was 1.5% Pd remaining on the surface. This can also be observed by X-ray mapping as shown in Fig 6. The copper electroplated on top of the Pd layer actually show fairly good adhesion, which indicates good adhesion between the Pd and the barrier layer after the contact displacement reaction. So palladium may serve as a good adhesion promoter for copper plating on TiN.

CONCLUSIONS The copper deposition observed between TiN barrier layer and acidic copper solution containing F ions is actually due to reaction between the bare Si- material and Cu 2" through cracks in the TiN layer due to etching reaction by the fluoride ions. But other metal ions such as palladium can indeed induce displacement reaction and serve as a possible alternative for copper deposition without copper seed layer by CVD or sputtering.

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REFERENCE 1.H.S. Rathore and D. Nguyen ,"Effect of Scaling of Interconnection" ,copper metallizationfor Sub-Micron Integrated,8,May,(1998). 2.Yosi Shacham-Diamand , Valery and Matthew Angyal, " Electroless copper deposition for ULSI", thin solidfilm,262,93-103(1995). 3.C.H.Seah , S.Mridha and L.H.Chan. ,"Groeth morphhology of copper",1EEE,98,157-159(1998).

electroplated

4.Valery M.Dubin, Yosi Shacham-Diamand, "Selective and blanket electroless Cu plating initiated by contact displacement for deep submicron via contact filling", VMIC Conference, June,27-29,(1995). 5.M.K.Lee, J.J.Wang and H.D. Wang, "deposition of copper films on silicon from cupric sulfate and hydrofluoric acid", J Electrochem. Soc.,144,May,1777-1779 (1997)

ACKNOWLEDGEMENT The assistance by the Electronic Research & Service is sincerely appreciated.

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Fig 1. The TiN layer was etched away by solution (b)

(HF 10 ml/l)

Fig 2 SEM observation of the copper deposit by contact displacement

AE5 Septh ProfilePC lltereeting

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1

I

-

- --

Ot\

..-

-

TI 055• . m

Wier 1..

(.0

Fig 3 The TiN composition profile by AES near the crack area

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AEStoethProtil PCAlten.ating t3 Jan 59 Spdes- SitH egion

A Area.

I Smtten lim: 04.50.in

fWe: cul Scale Factor: 2760,096kilo

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to

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ho2

hii'" '

hO

00

30

4o 0

50

00

70

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iES epithP~otite Pt atlonnatlna Hie

9toecime. 00

Sit

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I

0

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72

SOIttL r tme

Fig 5 The TiN composition

tint

profile by AES of the palladium deposit

Fig 6 TiN surface dipped in palladium contact displacement solution by X-ray mapping

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Modulated Reverse Electric Field Copper Metallization for High Density Interconnect and Very Large Scale Integration Applications JJ. Sun', E.J. Taylor', K.D. Leedy2 , G.D. Via2 , MJ. O'Keefe 2, M.E. Inman', and C.D. Zhou' 1) Faraday Technology, Inc. 315 Huls Drive Clayton, Ohio 45315

2) Air Force Research Laboratory Sensors Directorate, AFRL/SNDI WPAFB, Ohio 45433-7322

ABSTRACT We are currently developing a copper electrochemical metallization process for very large scale integration (VLSI) and high density interconnect (HDI) applications using a modulated reverse electric field (MREF) waveform utilizing a short cathodic duty cycle and a long anodic duty cycle. The key technical objectives for this research work are: 1) void-free copper metallization, 2) conformal copper deposition, 3) feature filling copper deposition with minimal copper over plated, and 4) simple, easy to control plating bath chemistry. The results from our experimental study show that by proper tuning of the MREF frequency and cathodic to anodic charge ratio, these objectives can be realized for features in the range of 0.5 gm to 100 gim. INTRODUCTION Metallization of plated through-holes (PTHs) for printed wiring boards (PWBs) is accomplished by electrodeposition of copper. Electrodeposited copper is also the leading candidate for metallization of high density interconnects (HDIs) for multichip modules[& and very large scale integration (VLSI) applications(2 1. In both HDI and VLSI applications, void-free copper electrodeposits and either conformal or via/trench filling are required. In plating of PTHs for the PWB industry, chemical additives such as "brighteners" and "levelers" are added to the plating bath to improve the throwing power and to yield a fine-grained deposit. More recently, pulse reverse current (PRC) deposition in conjunction with additives has been reported for high rate copper electrodeposition of PTHs 131. The PRC process consists of a long cathodic duty cycle followed by a short anodic duty cycle and provides enhanced mechanical properties of the copper electrodeposit 41 . However,. there are considerable challenges for extension of PTH electroplating processes to the smaller features used in HDI and VLSI applications.

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Specifically, the additive chemistries used in "conventional" and "high throw" baths as well as PRC developed for PTHs do not provide acceptable results for HDI features in the 40 to 100pm size range111 . For VLSI applications, the development of a mass transport controlled additive which results in "super-filling" of submicron trenches has been reported1 51. The copper over-plate is removed subsequently by chemical mechanical polishing (CMP). However, control of the copper metallization process with additives may be problematic due to plating bath control issues and incorporation of impurities into the deposit. Work by Contolini and coworkers16- 71 and modeling by West and coworkers 181 suggest the

feasibility of PRC copper electrodeposition for VLSI applications. Woodman and coworkers 141reported PRC deposition of a lpm VLSI feature. While they were able to fill the feature, there was considerable excess copper electrodeposit, which would require substantial CMP. Since CMP generates 30 to 50 liters of waste slurry per 8 inch wafer, the waste disposal cost associated with copper CMP for VLSI applications is substantial91 . For HDI applications, copper over-plate limits the line width and spacing which can be formed by subsequent etching101° . While electrodeposited copper represents considerable promise for HDI and VLSI applications, simple insertion of the additive chemistry or PRC processes developed for PTHs application are not likely to be successful. Furthermore, while new additive chemistries may initially be successful, the extreme tolerances and associated control issues, impurity incorporation, and waste associated with CMP prohibit the "chemistryonly" approach. By considering the fundamental differences associated with the PTH and HDI as well as VLSI applications, we have developed a modulated reverse electric field process (MREF) for copper electrodeposition. In contrast to the long cathodic duty cycle-short anodic duty cycle used in the PRC process, the MREF process consists of a short cathodic duty followed by a long anodic pulse. By "tuning" the frequency and the cathodic to anodic charge ratio (Qc/Qa), conformal and filling capability are demonstrated for vias and trenches in the 0.5 to 100 pm size range. MODULATED AND MODULATED REVERSE ELECTRIC FIELD As shown in Figure 1, the MREF waveform consists of a cathodic peak current, Io, a cathodic on time, t•, an anodic peak current, IL,an anodic on time, ta, and an off-time, to. The sum of the cathodic and anodic on-times and the off-time is the period of the modulation and the inverse of the period is the frequency of the modulation. The cathodic and anodic duty cycles are the ratios of the respective on-times to the MREF period. The average current density or net Electrodeposition rate is given by: Electrodeposition rate = IStcT - It5T (1)

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Just as there are infinite combinations of height, width, and length to obtain a given volume, in MREF, there are unlimited combinations of peak currents, duty cycles, and frequencies to obtain a given electrodeposition rate. These additional parameters provide the potential for much greater process/product control versus DC plating. Mass Transportin MREF Mass transport in MREF is a combination of steady state and non-steady state diffusion processes. The mass transfer limited current density (i,) is related to the reactant concentration gradient (Cb-C 5 ) and to the diffusion layer thickness (8) by Nernst using the following equation: ie=-nFD (aC/dx)x=0 = -nFD[(Cb-Cs)/8]

(2)

In steady state DC electrolysis, 8 is a time-invariant quantity for a given electrode geometry and hydrodynamics. In MREF electrolysis, however, 8 varies from 0 at the beginning of the MREF process to its steady state value when the Nemst diffusion layer is fully established. The corresponding diffusion limiting current density would then be equal to an infinite value at t = 0 and decreases to a steady state value of the DC limiting current density. The advantage of MREF electrolysis is that the current can be interrupted before 8 has a chance to reach the steady-state value. This allows the reacting ions to diffuse back to the electrode surface and replenish the surface concentration to its original value before the next current interruption. Therefore, the model of mass transport in a MREF waveform can be illustrated using a simple model of "duplex diffusion layer", which was developed by Ilb [I-1'] for pulse plating. As shown in Figure 2, the diffusion layer may be divided into two parts, a pulsating diffusion layer of thickness 8p and a stationary diffusion layer. At the end of a pulse, the pulsating diffusion layer thickness 8p (under low duty cycle) is given by: 8p = (2Dtoj 1/2

(3)

Therefore, very high instantaneous limiting current densities can be obtained with MREF electrolysis as compared to DC electrolysis. The pulse on-time, ton, may be reduced by increasing the frequency or decreasing the duty cycle. CurrentDistributionin MREF Metal distribution is determined by the current distribution. For HDI, VLSI, as well as PTH applications, an important determination of current distribution is macroprofile and microprofile. In a macroprofile (Figure 3a), the roughness of the surface is large compared with the thickness of the diffusion layer, and the diffusion layer tends to follow the surface contour. In a microproffle (Figure 3b), the roughness of the surface is small

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compared with the thickness of the diffusion layer. In most "conventional" plating applications, the substrate in question has large geometrical features and electrodeposition is governed by a macroprofile. For example, the thickness of the diffusion layer under conditions of moderate bath agitation is approximately 75pro (50 to 100pm). In PTHs applications, the dimensions of the PTH are large (approximately 325.m) compared to the thickness of the diffusion layer. Therefore, the PTH case represents a macroprofile. As shown in Figure 4, under pulse conditions, the pulse diffusion layer becomes considerably smaller and electrodeposition is still governed by a macroprofie. Under such conditions, the relative influence of tertiary current distribution control (mass transport) is less compared to primary current distribution control (geometrical)"I's. Consequently, for PTH applications, pulse current yields a more non-uniform deposit. Pulse reverse waveforms have been developed for PTH plating consisting of a long cathodic duty cycle, i.e. "DC like", followed by a short anodic duty cycle, i.e. "PC - like". In this case, the PTH "dogboning" generated during the forward cycle is preferentially removed during the reverse cycle. For VLSI applications, the dimensions of surface features such as trenches are small (<1pm) compared to the thickness of the diffusion layer. Consequently, the electrodeposition process is governed by a microprofile. As shown in Figure 5, under pulse conditions, the diffusion layer becomes considerably smaller and may convert a microprofile to a macroprofile. In this case, pulse current yields better throwing power, provided the electrodeposition process remains under tertiary current distribution control. Consequently, the optimum MREF waveform for VLSI plating should consist of a short forward duty cycle followed by a long reverse duty cycle 1141 . During the forward cycle the electrodeposit is preferentially "thrown" into the trench feature while during the reverse cycle the over-plated electrodeposit is preferentially removed. In this manner, metallization of VLSI features is accomplished with minimal need for chemical mechanical polishing (CMP). For HDI applications, the dimension of surface features such as lines or vias are approximately equivalent (25 to 100pm) to the diffusion layer thickness (as shown in Figure 6). However, in this case the width of the HDI is also on the order of the diffusion layer thickness and the contour of the lines or vias are inaccessible to the diffusion layer. We designate this a special case -- a "hydrodynamically inaccessible microprofile". Consequently, the optimum MREF waveform for HDI plating should consist of a short forward duty cycle followed by a long reverse duty cycle, with benefits analogous to the VLSI case t 1 . EXPERIMENTAL WORK The experimental apparatus includes: 1) a rotating disk system (RDE) to mount a test wafer, control the rotating speed, and adjust the distance between the cathode and anode;

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2) a plating cell that consists of an inner cell and outer cell; 3) a pump; 4) a rectifier that can output direct current (DC), modulated, or modulated reverse electric fields; and 5) an oscilloscope. Solutions of acid copper sulfate (containing only chloride and carrier) were used as the copper electroplating bath. A piece of titanium mesh (diameter = 55 mm) coated with iridium oxide was used as an insoluble anode. The bath was pumped through the anode to the cathode under 1 /min and controlled at 25 TC. The cathode rotating speed was maintained at 165 rpm. The copper electrodeposition tests were conducted under different electric field waveforms with an average cathodic current density of 25 to 32 ASF, which was controlled by the cell voltage. Samples were cross-sectioned with a focused Ion beam scanning electron microscope (FIB-SEM) to inspect both the quality of the copper deposits in the trenches or via-holes. Silicon wafer test coupons were designed and fabricated by Case Western Reserve University using 51mm diameter silicon wafers. The wafers were etched with trenches in the size range of 0.5 to 10pom and then covered with an oxide layer. The wafer was diced into three 19 mm x 19 mm square devices. Each trench consisted of a 9 x 9 array of cells. The arrays were located at the center of the 6.35 mm x 6.35 mm active area in the center of each 19 mm square device. Each trench in Device 1 was 5 pm long, 1 Pm wide, and 3 pm deep. Device 2 had dimensions 2x that of Device 1, and Device 3 had dimensions 4x that of Device 1. Finally a conductive seed layer of 200 A /1000 A Ti/Cu or Cr/Cu was sputtered on the chip surface. For HDI applications, some 100 pm diameter via-holes with aspect ratios greater than 1 were drilled into brass chip samples to evaluate the effect of MREF waveform parameters. RESULTS DISCUSSION Figures 7 and 8 show copper deposits in the 100 pm via-hole after DC and PC plating processes, respectively. Both the DC and PC cases exhibit poor throwing power as well as void or key-hole defects. Although PC can Improve the throwing power, as previously demonstrated by Andricacos for gold plating in 50 pm features 1 I, the problem of the voids and copper over plate could not be solved In PC process. As expected from the above discussion, the PRC waveform developed for PTH application, i.e. long cathodic duty cycle - short anodic duty cycle, exhibited even poorer throwing power than the DC or PC cases (Figure 9). Figure 10 shows the results from the same PRC waveform at a higher frequency. In this case, better throwing power was achieved compared to low frequency. However, the dog-boning would result in voids in the deposits with slightly longer plating time. The MREF data are presented in Figures 11 and 12, using the waveform parameters with short cathodic duty cycle - long anodic duty cycle designed

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for microprofile plating. The MREF waveforms were able to achieve conformal as well as trench filling with minimal copper over-plate. The throwing power data are presented in Table 1. The results indicted that the MREF waveform can get higher throwing power and void-free deposits compared to DC and PC. Table 1. Comparison of Micro throwing Power

I

MREF Waveform DC

II

PC

III IV

MREF MREF

Thickness Ratio I 3.2 3.9 1.2 0.35

Thickness Ratio II 5 4 1.05 0.2

Quality Void Void Void-free Void-free

Ratio I: Comer thickness to trench/via copper thickness, Ratio II: Surface copper thickness to trench/via copper thickness

Figure 13 shows that conformal copper deposits (without any dog-boning) can be obtained in a line (2 pm width x 4 pm pitch x 2 mm long) using the MREF (i.e. short cathodic duty cycle and long anodic duty cycle). Figures 14 and 15 show micrographs from FIB/SEM analyses of copper deposition in 0.5 pm trenches using the MREF waveform. The surface copper film thickness can be reduced or nearly eliminated by decreasing of the charge ratio (Qc/Qa), as shown in Figure 16 and 17. Figure 18 shows the microstructure of the copper grain structure in the trench under MREF waveform.

CONCLUSIONS In summary, these results indicate that the MREF process alone, i.e. without complex additive chemistries such as "brighteners or levelers", offers considerable promise for metallization of features in the size range relevant to HDI and VLSI applications. The MREF process demonstrated void-free copper deposits and the ability to obtain both conformal or via/trench filling with minimal copper over-plate. An important illustrative lesson is that the additive chemistry and/or PRC parameters used in PTH applications may not be simply inserted into HDI and VLSI applications. In fact, attempts to use the PRC process for HDI applications has lead other researchers to conclude that the electroplating conditions are difficult to determine1"71. However, with the understanding that the HDI and VLSI applications are governed by a microprofile and a hydrodynamically inaccessible microprofile, respectively, the full potential of the MREF process can be realized. ACKNOWLEDGMENT

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Financial support for this work was provided under Air Force Contract No. F33615-98C-1273. The authors gratefully acknowledge Wright Patterson Air Force Research Lab for FIB-SEM analysis and Case Western Reserve University for trench samples. REFERENCES 1. S. Castaldi and D. Fritz, in IPC Printed Circuits Expo, April 26-30, 1998 2. V.M. Dubin, C.H. Ting, and R. Cheung, in Proceedings of International VLSI Multilevel Interconnect Conference, VMIC Catalog No. 97 IMSIC-107, p.69, Santa Clara, CA, 1997 3. T. Pearson and J.K. Dennis, J. Applied Electrochemistry, 20, 196, 1990 4. A. Woodmen, M. Kimble, and E. Anderson, in Proceeding of the 1998 AESF/EPA Conference, AESF Society, Jan.25-30, Orlando, FL. 5. P. Andricacos, Interface, 8(1) 32-7, 1999 6. R.J. Contollni, S.T. Mayer, and A.F. Bernhardt, Solid State Technol., 40, 155, 1997 7. R.J. Contolini, A.F. Bernhardt, and S.T. Mayer, J. Electrochem. Soc., 141, 2503, 1994 8. A.C. West, C. Cheng, and B.C. Baker, 1. Electrochem. Soc., 145, 3070, 1998 9. B.M. Belongia, P.D. Haworth, J.C. Baygents and S. Raghavan, The Electrochemical Society, Inc. Proceedings volume 98-7. 10. G. Milad and D. Morrissey, in IPC 3 rd Annual National Conference on HDIS 1998 11. N. Ibl, J. C. Puippe, and H. Angerer, Surface Technology, vol. 6, 287, 1978 12. N. Ibl, Surface Technology, vol. 10, 81, 1980 13. N. Ibl, Proceedings of the Second International Pulse Plating Symposium, AESF, Florida, 1981 14. E.J. Taylor, C. Zhou, and J. Sun, "Pulse Reverse Electrodepositionfor Metallization and Planarizationof Semiconductor Substrates", U.S. Patent Pending, filing date 14 October, 1998 15. E.J. Taylor, C. Zhou, and J. Sun, "Electrodepositionof Metals in Small Recesses for Manufacture of High Density Interconnects Using ModulatedElectric Field ",filing date, 29 January, 1999 16. P.C. Andricacos, H.Y. Cheh and H.B. Linford, Plating and Surface Finishing, September, 1977. 17. T. Fujinami, T. Kobayashi, A. Maniwa, and H. Honma, J. Surface Finishing Society of Japan, Vol. 48 (6), 86, 1997

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Cathodic T

(-)

(+)

t

Anodic Figure 1. Rectangular Modulated Reverse Current Waveform

0

_

api

distance from the cathode thickness of the pulsating diffusion layer

Thickness of the stationary diffusion layer Figure 2. Schematic Representation of Duplex Diffusion Layer

3•

3b

Diffusion layer >> It

Diffusion layer

Figure 3. (a)Macroprofile and (b)Microprofile

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8&= 75 Wm

Figure 4. Schematic of Effect of Pulse Current on the Diffusion Layer Thickness for a PTH (Drawing not to scale)

8&=•75 pm

75 ýtm 8&c•1= gm

Figure 5. Schematic of Effect of Pulse Current on the Diffusion Layer Thickness for Silicon Wafer (Drawing not to scale).

Figure 7. DC Plating

7

M

75

im

Figure 6. Schematic of Effect of Pulse Current on the Diffusion Layer Thickness for an HDI (Drawing not to scale).

Figure 8: PC Plating

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Figure 9. PRC Waveform Developed for PTH Plating

Figures 10. PRC Waveform with High Frequency

Figure 11. MREF for Conformal Deposition

Figure 12. MREF for Via-Hole Filling

''ti

Figure 13. MREF Copper Conformal Deposits on 2 pr Trench

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Figure 14. MREF Copper Metallization on 0.5 pm Trench

Figure 15. MREF Copper Metallization on 0.5 pm Trench

Ji

Figure 16. MREF Copper Metallization on 8 pm Groove

Figure 17. MREF Copper Metallization on 8 gim Groove

Figure 18. Microstructure of Copper Film

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ELECTROCHEMICAL CODEPOSITION AND ELECTRICAL CHARACTERIZATION OF A COPPER-ZINC ALLOY METALLIZATION Ahila Krishnamoorthy*, David J. Duquette* and Shyam P. Murarka** * Materials Research Center, **Center for Industrial Innovation Rensselaer Polytechnic Institute, Troy, NY 12180

ABSTRACT The objective of this research work is to develop a highly conductive copper alloy based diffusion barrier for copper metallization. The criteria for selection was that minimal increase in resistivity resulted on addition of one atomic percent of second element to copper. The copper-1 at.% zinc alloy conforms to this criteria and hence was selected as a candidate material for further study. Pure copper can easily be electroplated from simple acid copper baths, but the alloys of copper are more difficult when the deposition potential of individual elements is widely separated as in the present case. A Cu-Zn alloy can be deposited from baths containing coordinating agents. Having established that a Cu-Zn alloy can be successfully electroplated, an alloy of composition Cu3.5%Zn was sputter deposited to develop an MOS capacitor and electrical testing was performed on as-sputtered and annealed samples. The bias temperature stability tests indicate that the alloy possesses promising diffusion barrier properties.

INTRODUCTION

Scaling of ULSI circuits to ever smaller dimensions demands an increasing number of wiring levels with finer lines. For well known reasons (1-3), copper metallization will replace AI(Cu) in future interconnects. The transition from aluminum to copper as the conductor started with IBM's announcement in September 1997 (4). However, copper is not free of shortcomings; the most important being its rapid diffusion in silicon (5,6). Hence, a diffusion barrier is mandatory whenever copper is deposited on silicon or silicon oxide. What makes copper more attractive is that it can be easily electroplated. But to electroplate, one needs a conducting layer; a requirement that is not fully satisfied by the commonly employed barriers. In addition, conventional barriers tend to increase the overall line resistivity. Any material which can function as a barrier against copper diffusion that does not increase the resistivity will be an attractive alternative to existing barriers. In the present work, a copper-zinc alloy diffusion barrier was developed and evaluated by bias temperature stability tests.

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Background

Resistivity charts of different alloys of copper (with 1 at.% of alloying element added to the copper) were consulted (7). This addition, in the case of zinc to copper, increases the resistivity of copper by only 0.25gtcm. Therefore Cu-Zn alloy was selected. The chemistry of copper electroplating is well known (8) and commercial plating solutions are widely available. To achieve codeposition, both Cu and Zn should be simultaneously reduced to give rise to an alloy of required composition. Cu-Zn alloy deposition belongs to an irregular codeposition process, a situation in which the more noble metal is obtained in a higher percentage and the less noble one in a lower percentage than is indicated by the metal ratio in the solution. The deposition potential can be manipulated and thus conditions can be created for codeposition of copper and Zn. The deposition potential is a function of the bath chemistry and hence by altering the bath composition, codeposition of a wide variety of compositions is possible.

EXPERIMENTAL DETAILS

The electrochemical measurements were carried out using a rotating disk electrode at 200rpm. A calomel reference electrode (SCE) and a Pt counter electrode were used. The test solution contained copper and zinc sulfate in various ratios, ammonium sulfate as a supporting electrolyte, and ethylenediamine (ED) and ammonia to form coordinating complexes. The polarization experiments were performed on a copper rod to simulate the sputtered copper seed layer on a wafer, at a scan rate 2 mV/s in plating solutions. From these measurements, the desired range of potential for plating Electroplating experiments were carried out using a Dynatronix was selected. microreverse pulse unit. The resistivity of the electroplated film was computed from sheet resistance measured by a four point probe and the thickness determined by a profilometer. The wafers used in this work were p-type device quality wafers with 700nm of thermal oxide. A copper seed layer of 30nm thickness, was deposited by sputtering at a 7 base pressure of 10 Torr and an argon pressure of 5mTorr. The sputtered layer exhibited a resistivity of 2.1[tfcm before annealing and 1.9ltf1cm after annealing at 250'C for 30min. To test the electrical stability of the Cu-Zn alloy and Cu on silicon oxide, a 50nm gate oxide with an Al back contact on p-substrate was prepared. By sputtering through a shadow mask, metal oxide semiconductor (MOS) dots of 1.2mm diameter were developed. The specimens were annealed at different temperatures and tested for bias temperature stability.

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RESULTS AND DISCUSSION

Cathodic Polarization

Potentiodynamic deposition of Zn, Cu-Zn and Cu was characterized for a wide range of solution compositions. Fig. 1 represents a typical example, where concentration of Zn in solution was 0. 1M and the amount of copper was varied from O.02M to O.08M. Hydrogen liberation that occurred at steady state (point 'a' in Fig. 1) to a significant extent when Zn in the plating bath was high, was negligible when more than 5g/l of copper was present in solution. Calculated current efficiency from weight of copper deposit was above 98%. Point 'b' represents the deposition/dissolution of Zn. The steady state region at potentials more positive to -0.5V (SCE) correspond to reduction/oxidation of copper deposit or copper rod (point 'c' in Fig. 1). A plot of open circuit potential (OCP) of the copper (rod or deposit) as a function of weight fraction, R (R = ZnSO4/ ZnSO 4 + CuSO 4 ) in solution is given in Fig. 2. Although the solution composition was high in Zn, the deposit contained low zinc of the order of I to 2% in the range of potential selected for plating. The desired composition of the deposit was obtained by electroplating using a solution containing both elements in a composition ratio of 35 g/l ZnSO 4:15 g/1 CuSO 4 in an ammonia water mixture (pH = 10)

,

c

-0.5 -1.0 U-

a•

-

. -1.5

0.02M

-

-----. 0.06M

-

-

- 0,04M 0.08M

-2 .0 1.. -3.0

-2.0

-1.0

0.0

Log i, mA/cm

2

1.0

2.0

Fig. 1 : Selection of composition by potentiodynamic polarization

Fig. 3 shows both the potentiodynamic trace of a copper rod in the selected plating solution (35 g/l Zn-sulfate and 15 g/l copper sulfate) and the potentiostatic response in the same solution, the latter being measured in Dynatronix pulse power supply where the potential was set with respect to the OCP of anode (-0.382V vs SCE). When 0.9V was set in Dynatronix power supply, it represented the potential between the anode and

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the cathode and the potential of the cathode was equal to -1.28V vs SCE. Plating between -1.OV and -1.2V vs SCE did not result in measurable or observable hydrogen evolution on the copper. More negative potentials were not attempted due to a large current and a resultant rough deposit. -0.3

-0

.4. 0

©-0.6 0.5

[3

E

E -0.4324R - 0.0588 '

.

'

0.6 0.7 0.8 0.9 Fraction (R) of 'ZnSO4' in solution

1

Fig. 2 : Open circuit potential as a function of fraction of ZnSO 4 in solution 1.15

-0

>

-0o-

-2

potentiostatic

>

--x-- potentiodynamic

U 0.85

........

1.5

Solution : 35:15

S0.55

S-1

-

.

E5I

0.25 -0.5 -0.05 0.1

1 10 2 Current density, mA/cm

100

Fig. 3 Potentiostatic and potentiodynamic response of copper in a plating solution that contains 35 g/1l zinc sulfate and 15 g/l copper sulfate in an ammonia-water mixture. Plating was performed above the dotted line

Plating and Deposit Characterization Resistivity measured as a function of the pulse peak potential with a pulse cycle of 90ms forward 'on' and lOms 'off' (90/10) is shown in Fig. 4. The average resistivity in the potential range selected was of the order of 2~Q cm. The higher resistivity at more negative potentials was due to higher levels of Zn in the deposit, and that at more positive potentials was due to more dissolution than deposition.

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Plating rate as a function of pulse cycle is plotted in Fig. 5 for various pulse peak potentials. In the plating range, the pulse plating rate was not much different from that of DC plating. The potentials more positive to -0.8V vs SCE were not considered for electroplating as copper deposition rate was very low. On the basis of foregoing results, an alloy of composition, Cu-3.5wt. % Zn, was selected for electrical testing. An alloy target of Cu-5% Zn provides this deposit composition on sputtering. 4 E As-plated Q Annealed

Plating potential (SCE), V Fig. 4: Resistivity as a function of plating potential. Pulse used : Forward 90/10; plating solution contains 35 g/l zinc sulfate and 15 g/l copper sulfate in ammonia-water mixture

750

-

Zn:Cu :: 30:20

a 500

"

0'-l.382V D -l.282V O -0.982V [-0.832V

(SCE) (SCE) (SCE) (SCE)

B:-1.332V 0 - 1.182V EI-0.882V [I-0.782V

(SCE) (SCE) (SCE) (SCE)

250

0 DC

90/10 90/20 Plating parameter

90/30

Fig. 5 : Plating rate represented as thickness of deposit obtained per rain. as a function of pulse cycle at various pulse peak potentials. Plating solution contains 30 g/l zinc sulfate and 20 g/l copper sulfate in ammonia-water mixture

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Bias Temperature Stability

The metal oxide semiconductor with either copper or Cu-3.5%Zn as gate metal and an oxide of 50nm thickness was fabricated. The samples were annealed at 250'C, Each capacitor was tested at a bias temperature 300'C, 350'C or 400'C for 30min. aging (BTA) temperature of 200'C in steps of 30mrin and at a bias of 2MV/cm. Fig. 6(a) and 6(b) superimpose C-V curves of the Cu-MOS and Cu-Zn-MOS capacitors respectively, in the unannealed condition, tested under 'no bias' and BTA. In the case of copper, the C-V curves moved back and forth at increasing times of biasing. In Cu-Zn alloy, after the first movement due to annealing of surface states, the curves did not shift. I1E-09 Copper No annealing '9E-10

---

No Bias

30min -0-- 60min

.A 6E-10 U

U 3E-10

-0

1E-1I -10

-5

1E-09

ll •

0 Potential, V

5

10

Alloy- No annealing

S9E-10 t 6E-10

--o-- 30rain -0- 60min 90min

S•

`U 3E-10

X 120min

lE-11 -10

-5

0 Potential, V

5

10

Fig. 6 : C-V Plots of as-sputtered MOS capacitors on bias temperature aging (a) Cu (b) Cu-Zn

The shift of the C-V curves did not occur when the capacitors were annealed prior to testing as can be seen from Figs. 7(a) and 7(b). Although Cu-capacitors failed after

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30min. of biasing, the C-V curve did not indicate any change. measurements alone are not sufficient to measure failure.

8E-10

Accordingly, C-V

Pure copper Anneal : 250C-30min

--

4E-10

-

No Bias BTS 30min

4E-12 -10

-5

0

5

10

Potential, V

Cu-Zn alloy Anneal : 250 0C-30min

IE-09

No Bias

n 8E-10

-o-- BTS 30min

"cc S4E-10

--o- BTS 60min -a-- BTS 90min x*BTS 120min -

BTS 150min

4E-11

........... -10

-5

0

5

10

Potential, V Fig. 7 : C-V plots of annealed MOS capacitors on bias temperature aging

(a) Cu (b) Cu-Zn Figs. 8(a) and 8(b) show a comparison of leakage currents of copper and of the Cu-Zn alloy as a function of annealing temperature, at +10V (extracted from I-V curves, not shown here). Relating the magnitude of leakage current and the maximum survival time before failure, it is clear that Cu-Zn alloy is a very promising candidate to provide a barrier for diffusion of copper. I-V data can thus be used to detect the dielectric breakdown (indicated by leakage current). At an annealing temperature of 250'C, copper fails after 30min. of biasing whereas Cu-Zn capacitors did not fail until 150min. It can be inferred that copper diffusion into the silicon substrate did not occur when the alloy was present as an

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intermediate layer. In addition, the leakage current measured after 150min of biasing was at least 2 - 3 orders of magnitude smaller than that of copper. At all the conditions tested, the copper alloy experienced a longer time without leaking and exhibited an excellent diffusion barrier tendency. It can be concluded that an alloy of Cu-3.5at.% Zn can function as a promising diffusion barrier to copper diffusion, without at the same time, appreciably increasing the overall line resistivity.

I E-2

-

IE-6

-

Cu,

+10V

SLE-10

I1E-14 AS

IE-2

S1E-4

250 300 Annealing Temperature, ° C

EUNo BTA 0r30rmin [60min E090mi 9 120main 0 150min

350

Cu-Zn alloy, +10V

IE-8 U IE-10 AS

250 300 Annealing Temperature, 0 C

350

Fig. 8: Leakage current as a function of annealing temperature. 'AS' stands for assputtered condition (a) Copper (b) Cu-Zn alloy. Legend is the same for both the Figures.

CONCLUSIONS

Cu-Zn films were found to provide an effective diffusion barrier capability to copper diffusion into silicon as characterized using C-V and I-V measurements. The alloy film was stable against copper diffusion until an annealing temperature of 400'C. This alloy did not increase the resistivity of copper above 2.5p. cm in the compositional range tested (0.1 to 3.5 wt. % of Zn), thus leading to a conclusion that it can replace high resistivity conventional barriers. Another attractive feature of this alloy is that it can be easily electroplated. More investigation is needed to better characterize the diffusion of copper into the semiconductor and is planned for future.

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ACKNOWLEDGMENT

The authors acknowledge the financial support of Semitool, Inc, Kalispell, MT, and in particular, the helpful comments of T. Ritzdorf and L. Graham.

REFERENCES 1. D. Edelstein, G.A. Sai-Halasz, and Y.-J. Mii, IBM Res. Develop., 39, 383 (1995) 2. P.C. Andricacos, The Electrochem. Soc., Interface, 32, Spring (1999) 3. P. Gwynne, IBM Research, 4, 17 (1997) 4. L. Zuckerman, "IBM to make smaller and faster chips - Second breakthrough in a week has wide uses", The New York Times, Dl, Monday, September 22, 1997. 5. J.D. McBrayer, R.M. Swanson, and T.W. Sigmon, J. ElectrochemicalSoc., 133, 1242 (1986) 6. A.G. Milnes, Deep Impurities in Semiconductors, Wiley, New York, (1973) 7. J. Harper, I.B.M., T.J. Watson Research Center, Yorktown Heights, NY, Private Communication. 8. W.H. Safranek, The Properties of Electrodeposited Metals and Alloys, II Edition, The American Electroplaters and Surface Finishers Society, Orlando, Florida (1986)

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ELECTRODEPOSITION OF Cu, Co AND Ni ON (100) n-Si A. A. Pasa, M. L. Munford, M. A. Flori*, E. M. Boldo, F. C. Bizetto, R. G. Delatorre, 0. Zanchi, L. F. 0. Martins, M. L. Sartorelli and L. S. de Oliveira Departamento de Ffsica, UFSC, P. 0. Box 476, CEP 88040-900, Florian6polis -SC-Brazil. L. Seligman Curso de P6s-Gradua~do em Eng. Mecanica, UFSC, Florian6polis -SC-Brazil. W. Schwarzacher H. H. Wills Physics Laboratory, Tyndall Avenue, Bristol BS8 1TL, U.K.

ABSTRACT In this work we investigated the electrodeposition of Cu, Co and Ni thin films on Si substrates. The main objective was to understand the electrochemical aspects related to the preparation and the physical properties of nonmagnetic and magnetic thin layers electrodeposited on Si. The films were prepared under potentiostatic control from different aqueous solutions containing basically the appropriate sulfate (CuSO 4, COSO 4 or NiSO 4) and Na 2SO 4, with or without H 3B0 3. Typically, thin compact metallic layers of Cu, Co and Ni with regular granularity were obtained. Aspects related to the deposition process and deposited layers were investigated by voltammetry, current transients, electrical and magnetoresistive measurements, scanning electron microscopy, X-ray diffractometry, Rutherford backscattering and magneto-optical Kerr effect. INTRODUCTION The electrodeposition technique has a major advantage over other methods of thin film production, namely, the possibility of performing deposition at normal conditions of pressure and temperature, requiring relatively inexpensive equipment. Additionally, electrodeposition gained renewed attention, being considered a breakthrough the success of this technique on one of the most technologically advanced areas, namely, the manufacturing of chips (1). In this area, electrodeposition of Cu is being used for the fabrication of interconnects in ultra-large scale integration (ULSI) technology. The same technique is also being currently used in the preparation of metallic nanostructures (2). It is our purpose in this work to present some interesting results obtained by electrodepositing thin layers of Cu, Co and Ni directly onto Si substrates, i.e., without the presence of a seed layer. As it is well known, semiconducting substrates can conduct sufficiently well to allow direct electrodeposition. Different groups have already . Departamento de Engenharia de Materiais, UNESC, Cricidima, SC, Brazil.

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demonstrated the feasibility of such technique (3-7). In particular, we draw attention to the fact that also magnetic multilayers have been fabricated, showing a magnetoresistive effect of about 5% and a field sensitivity over 0.04%/Oe (8). Electrodeposition of thin films and multilayers directly on semiconductors is therefore a subject of fundamental and practical significance. Such investigation could lead to the integration of an efficient, inexpensive and convenient method for fabricating thin layers with the silicon technology. Thin films of Cu, Co and Ni on Si were prepared from different aqueous electrolytes containing sulfates of the respective metals as well as some supporting electrolyte/additive. Voltammetry and current transients were used to analyze the electrochemical aspects of the deposition. The electrodeposited layers were investigated by scanning electron microscopy (SEM), Rutherford backscattering (RBS), magnetooptical Kerr effect (MOKE), X-ray diffractometry (XRD) as well as by electrical measurements.

EXPERIMENTAL The substrates used in our experiments were single side polished, technical grade (100) oriented Si wafers, n doped for a resistivity of 1-7fl.cm. Electrical contact to each substrate was achieved through a GaAl back contact. An adhesive tape was used to mask off all the substrate except for the area on which deposition was desired. Each substrate was cleaned in a 5% HF solution and then immediately transferred to the electrodeposition cell. In order to minimize chemical reactions between the substrate and the constituents of the electrolyte, the time between immersion and application of potential control was kept to a minimum. All electrolytes, as well as the etching solutions used to clean the samples prior to the electrochemical experiment, were prepared from analytical grade reagents and filtered deionized water with a resistivity of 18 MQ).cm. A three-electrode cell was used, together with a computer-controlled potentiostat. The potentials were measured against a saturated calomel electrode (SCE), which was placed as close as possible to the Si surface to minimize the ohmic potential drop in the electrolyte. The Pt foil counter electrode was placed directly opposite to the working electrode (substrate). RBS analyses were performed using a 3.OMV Tandetron ion implanter at the Physics Institute of Universidade Federal do Rio Grande do Sul, Porto Alegre, Brazil.

RESULTS AND DISCUSSION We will present some results obtained by electrodepositing thin films of Cu, Co and Ni on silicon. Emphasis will be given to different aspects on each case, namely, the morphology and growth rate of copper thin layers, hydrogen evolution during cobalt deposition and structure and electrical properties of nickel layers.

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0.0

E s.0.6

Z -1.0 C C U

-2.0

-0.76 -0.60 -0.25 0.00

0.25

0.60

0.76

E vs SCE (V)

Figure 1: Cyclic voltammograms (20mV/s) obtained with electrolyte containing 0.013M CuSO 4 and 0.5M Na 2SO 4 . Cu Thin Films on Silicon Figure 1 displays a typical voltammogram obtained using Si electrodes and electrolytes containing copper sulfate and sodium sulfate. As a general feature, a large nucleation loop resulting from the reduction of copper ions on a foreign electrode is observed. Concerning the morphology of the electrodeposited layers, electrolytes containing two different concentrations of copper sulfate (0.013M and 0.104M) and sodium sulfate (0.5M) were investigated. The applied voltages for the potentiostatic depositions were chosen from the voltammograms near the onset of the cathodic current.

Figure 2: SEM micrographs of deposits obtained with a solution containing 0.013M CuSO 4 + 0.5M Na 2SO 4 at -0.42V (300 seconds).

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Figure 2 shows a SEM micrograph of a layer, electrodeposited at -0.42V for 300 seconds. This compact and granular structure is a representative result for films electrodeposited from both electrolytes. Analysis of the current transients, related to the initial stages of the deposition, indicate an instantaneous nucleation process (7).

5000 200a

4000

2000

8

120 04

0 2000

8 04 100

200

300

400

Channel

Figure 3: Series of RBS spectra of Cu thin films as a function of deposition time. The electrolyte used contained 0.104M CuSO 4 and 0.5M Na 2SO 4 and the applied potential was -0.5V. In order to investigate the uniformity and the growth rate of copper thin films, RBS measurements where done on samples electrodeposited from electrolytes with different concentrations of copper ions and different deposition times. Figure 3 shows a sequence of RBS spectra obtained from an electrolyte containing 0.104M of CuSO 4 and 0.5M Na 2SO 4, at a deposition potential of -0.5 V. Uniform layers with increasing thicknesses are clearly seen. For this electrolyte, Figure 4 shows that film thickness, as calculated from the width of the RBS depth profiles, grows linearly with deposition time at a rate of 22 A/s. On the other hand, a deposition of 2.5 A/s was obtained for the 0.013 M CuSO 4 bath. These results are in good agreement with a factor of 8 in the relative Cu ion concentration between both baths. Figure 4 also shows the nominal thickness of the Cu layers, as calculated from the electrodeposited charge. One observes an increasing disagreement between both curves with deposition time. As for this system no hydrogen evolution is expected, the observed discrepancy between both curves can only be explained if one assumes a thickening of sample edges with increasing deposition time. Whereas the electrodeposited charge reflects the overall process, yielding an average value for the film thickness, RBS measurements are performed locally, with a diameter beam of about 2mm directed towards the center of the sample.

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7000 6000

0

Electrodeposited charge

0

RBS

0

S5000 C

G 4000 .

3000 2000 1000 50

100

150

200

Time (seconds)

Figure 4: Thickness of Cu thin films as function of deposition time, as calculated from RBS measurements and from electrodeposited charge. Films were electrodeposited at -0.5V, from a 0. 104M CuSO 4 + 0.5 M Na 2SO 4 bath.

Co Thin Films on Silicon Similarly to the Cu/Si system, studies concerning the composition of electrolyte, as well as the adequate deposition potential and the possible influence of hydrogen evolution were conducted for the Co/Si system (9). Electrolytes containing cobalt sulfate and sodium sulfate, with and without boric acid were tested. As a general result, homogeneous, granular and compact layers were obtained for all solutions, irrespective of the presence of boric acid (7, 9). On the other hand, the metallic ion concentration showed a marked influence on the kinetics of film formation. Low concentrated electrolytes induced a progressive nucleation mechanism, whereas for high concentrated baths, an instantaneous nucleation mechanism was observed. In order to characterize structurally and compositionally the electrodeposited Co layers, RBS measurements were performed on films obtained from two electrolytes with different Co concentrations plus 0.5 M Na2 SO 4 and containing no boric acid. Deposition rates of 5.6 A/s and 28 A/s were observed, respectively, for electrolytes containing 0.026M and 0. 104M CoSO 4 . The applied potential was -1.07 V for the less concentrated electrolyte and -1.15 V for the more concentrated one (9). Co layers with good adherence and thicknesses ranging from 100A up to 7,OOOA were obtained from both electrolytes. Influence of hydrogen on the deposition process was evidenced in electrolytes containing boric acid. In such electrolytes, application of very negative potentials caused, simultaneously, Co reduction as well as evolution of hydrogen. Film thicknesses obtained by the RBS technique were used to determine the cobalt average current density cobalt, which was then compared with the average total current density itoteI, calculated from the measured deposition current (7).

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12 I' o•10

E

roW.1

E

4 3 1,0

1,1

1,2

1,3

1.4

E vs. SCE (V)

Figure 5 Mean total and cobalt current densities as a function of the applied potential for a 0.104M COSO 4 + 0.5M Na2SO4 + 0.5M H3B0 3 electrolyte. Figure 5 shows the dependence of itoral and icoball on the applied potential. As observed, for less negative applied potentials the influence of hydrogen evolution is negligible and the efficiency of the process is higher than 93%. At more negative values the total current increases markedly due to hydrogen evolution. Figure 6 shows the dependence of itota1 and icobal on the electrolyte cobalt concentration. Despite the dispersion on the Gcoba, data, both curves show a parallel behavior, indicating that the hydrogen partial current remains constant with increasing cobalt sulfate concentration. These results suggest that H2 evolution and cobalt reduction are two independent processes. Moreover, hydrogen evolution seems to be inhibited for highly Co concentrated baths or for low applied potentials.

70

I..

0

20

40 C

00.:

.00

100

120

CoSO, Concentration (rM)

Figure 6: Mean total and cobalt current densities as a function of the cobalt sulphate concentration for a deposition potential of-1. l V.

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0.004

0.002

(0 C

0.000

0 2 S.0

0 02

-0.004 -400

-200

0

200

400

Applied Field (0e) Figure 7 Kerr hysteresis loop of a cobalt film, electrodeposited from a bath containing 0.104M CoSO 4 and 0.5M Na 2SO 4 , at -1.15V during 60s.

Figure 7 illustrates a MOKE-measurement performed on a 1000 A Co film with the magnetic field applied parallel to the film surface. The observed hysteresis indicate an inplane magnetization with a coercive field of about 90 Oe. No significant change in the hysteresis loop was observed by rotating the applied field relative to some fixed direction in the substrate plane, suggesting therefore the absence of in-plane anisotropies.

Ni Thin Films on Silicon

Ni thin films with metallic appearance as well as granular and compact morphology were obtained from an aqueous electrolyte containing 1.0M NiSO4, 1.0M Na2SO4 and 0.5M H3BO 3. RBS measurements showed the layers to be uniform and yielded a deposition rate of 45A/s (7). Figure 8 shows XRD spectra of Ni films electrodeposited on silicon for different deposition times at -1.OV. The diffraction patterns correspond to a fcc structure, with a lattice parameter of 3.516 A. One observes a systematic increase in the relative height of the (220)-peak with increasing thickness, which is indicative of texture formation. The evolution of the XRD spectrum as a function of the deposition time (and also film thickness) can be better visualized in Figure 9, which depicts the relative increase of the intensity corresponding to planes (200), (220) and (311). The orientation factor M, shown in this figure, is defined as: (hk1)/l (111)],CPDs 51 Volue..9..22 Mc(hkl)= [i[I(hkl)Pro ed1

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where the intensity of the peak (hkl) is normalized with respect to the peak (11) and compared to the a similar ratio obtained from the JCPDS data (10). From this figure it is clearly seen the tendency of the Ni-film of growing with a texture in the [2201-direction.

1000

4:

..

.

A,,

2004

_ 0

1800

F4

F0

JL

I

2e

Figure 8 X-ray diffractograms for Ni thin films with different deposition times, electrodeposited on silicon at a deposition potential of -I.OV, from a 1.0 M NiSO 4, LOM Na 2SO 4 and 0.5M H3BO 3 electrolyte.

3.0

A

220

I

200

*

311

2.5 2.0

"1.5 1.0 0.5 50

100

150

200

250

300

time (a)

Figure 9

228

Orientation factor M(hkl) as a function of the deposition time for Ni films grown on Si (100).

Electrochemical Society Proceedings Volume 99-9

Electrical measurements were performed in order to determine the electrical properties of the metal/semiconductor contact. Figure 10 shows a Mott-Schottky plot for an electrochemically fabricated Ni/n-Si contact. The plot is linear between 0 and 2V for the three different frequencies tested. From the intercept with the potential axis and the donor density a barrier height of about 0.60eV was obtained. From current-voltage curves, as a function of the deposition potential, values as high as 0.66eV for the Schottky barrier and ideality factors of about 1.30 were determined. These barrier heights are in agreement with reported values for junctions fabricated by vapor deposition of nickel layers on silicon (11,12).

1MHZ 0.7MHz 0O.MHz

0 A

4X10"

3010"

'b

2X1017

1X10"

0.0

0.0

-0.0

.1.0

-1.5

-2.0

Voltage (V)

Figure 10 Mott-Schottky plot, for three different frequencies, for the structure formed by the electrodeposition of a Ni thin film on top of a n-type Si substrate. The Ni film was prepared from an aqueous electrolyte containing I.OM NiSO 4, LOM Na 2SO 4 and 0.5M H 3B0 3 at a potential of-l.OV during 150 Seconds. CONCLUSIONS

It was shown that thin films of Cu, Co and Ni could be successfully deposited onto Si substrates, without the need of a seed layer. For all three metals, uniform layers with a compact and granular morphology could be obtained. From RBS data the deposition rates as well as the current efficiencies could be determined. For Co films it was shown that addition of boric acid caused the evolution of hydrogen. On the other hand, it was possible to improve the current efficiency of electrolytes containing boric acid by increasing the concentration of cobalt sulfate in the bath. For Ni films electrodeposited from a highly concentrated sulfate electrolyte, it was observed the formation of texture in the (220)-direction. Electric measurements performed on Ni/n-Si structures yielded values for Schottky barriers which are comparable to the ones obtained for junctions fabricated by vapor deposition.

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ACKNOWLEDGEMENTS

The authors would like to express their gratitude to Prof. Moni Behar, Physics Institute, UFRGS, Porto Alegre, for providing RBS facilities and to Dr. A. M. Maliska, LabMAT/UFSC, for providing the microscopy facilities. Financial support from the British Council (UK), and the Brazilian agencies CNPq (PADCT III 62.0090/97-9 and RHAE 610021/99-0) and CAPES is also acknowledged. REFERENCES 1. P. C. Andricacos, Interface, 8, 32 (1999). 2. W. Schwarzacher, Interface, 8, 32 (1999). 3. C. Wisniewski, I. Denicol6 and I. A. Hormmelgen, J. Electrochem. Soc., 142, 3889 (1995). 4. S. G. dos Santos Filho, L. F. 0. Martins, P. C. T. D'Ajello, A. A. Pasa and C. M. Hasenack, Microelectronic Engineering, 33, 65 (1997). 5. L. J. Gao, P. Ma, K. M. Novogradecz and P. R. Norton, J. Apple. Phys, 81, 7595 (1998). 6. G. Oskam, J. G. Long, A. Natarajan and P. C. Searson, J. Phys. D: Appl. Phys. 31 1927 (1998). 7. A. A. Pasa and W. Schwarzacher, Phys. Stat. Sol. 173, 73 (1999). 8. A. P. O'Keeffe, 0. I. Kasyutich, W. Schwarzacher, L. S. de Oliveira and A. A. Pasa, Apple. Phys. Lett. 73, 1002 (1998). 9. M. L. Munford, M. L. Sartorelli, P. C. T. D'Ajello, A. A. Pasa, L. Seligman, W. Schwarzacher and S. G. dos Santos Filho, Manuscript under preparation. 10. Joint Committee on Powder Diffraction Standards, card 04-0860, International Center for Diffraction Data, Philadelphia (1995). 11. E. H. Rhoderick and R. H. Willians, Metal-Semiconductor Contacts, p. 52, Oxford University Press, Oxford (1978). 12. S. M. Sze, Physics of Semiconductor Devices, p. 291, Wiley, New York (1981).

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X-Ray Photoelectron Spectroscopic Characterisation of a Cu / p-GaAs interface E.M.M Sutter, J.Vigneron and A.Etcheberry IREM Institut Lavoisier UMR CNRS C 0173 University de Versailles ,45 av des Etats-Unis 78035 Versailles Cedex, France

Abstract Electrodeposition of copper was performed on p-GaAs. XPS Studies of the buried interfaces show that an interracial chemical reaction happens. A copper- arsenic compound is detected.

Introduction Copper metallization for submicron integrated circuits receives much attention. Electrochemical deposition has a good chance of becoming the preferred method. It is necessary to understand each stage of the growth and particularly to have information about chemical evolution of interfaces to implement reproducible technology. The electrochemical behaviour of Cu 2' depends on the semiconductor, which governs the nature of the electron transfer. In this paper, we study the Cu / p-GaAs interface formation provided by electrochemistry. Recent papers [1,2] report that electrical or optical transformation happen at the interface. We try in this paper to determine if chemical transformations are also present.For doing that we have performed XPS analysis of interfaces buried under thin (around 20nm) copper layers deposited by electrochemistry.

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Experiments The electrochemical measurements were performed on (100) oriented p-GaAs single crystals. The surface was etched previously by mecanochemical polishing with Br 2MeOH, rinsed thoroughly in MeOH and dried with Argon The electrochemical set up was a classical three electrode configuration with a saturated mercurous sulphate electrode (MSE) as reference. The X-Ray photoelectron spectroscopy measurements were performed on a VG ESCALAB 220i-XL spectrometer. The X-Ray was a monochromatic Al Kot line. The spectra were recorded with pass energy of 20 eV or 8 eV in a constant analyser energy mode. The XPS peak areas were measured after substraction of the background using the Shirley's method.

Results and Discussion As shown in fig 1 two cathodic and anodic domains appear in the cyclic voltammograms obtained in the dark. As soon as Cu2" is added to the solution a reduction current appears below-0.5 V/MSE, and in the following reverse scan, a well defined anodic peak is detected

32Fj•

Fig I cyclic voltammogram on (100) p-GaAs inthe dark;V=20mV.sl; (a) IM H2SO 4 ; (b)IM HI2SO4,+ 10-3 M Cu S04

"..

(a

0

(b) 41 --

-10

I

I III

-0.5 0.0 ElV vsfMSE

centred around -0.3V/MSE.With various Cu 2÷ concentrations, the shape of the voltammogram is always the same. Only the intensities of the electrochemical features change proportionally to the Cu 2 concentration. The cathodic current is associated with the Cu 2* reduction according to :

Cu 2÷+2 e---* Cu

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giving rise to a copper deposit on the surface. The anodic peak can be interpreted as the electrochemical dissolution of the previously deposed Cu film according to: Cu

-_

2

Cu '+2 e-

Electrochemical copper deposition is performed at constant potential, V=-0.85 V/MSE. Cathodic charges between 3mC/cm 2 and lOOmC/cm2 have been used in this work to vary the thickness of the deposits. Electrodes were removed from the solution at the rest potential just after the end of the growth. Coated electrodes were dried under N2 stream and transferred toward the analysis chamber sheltered from air interaction in a glove box. Cu coatings modify the AS3d responses of p-GaAs surfaces. A typical three bump signal was recorded as shown in fig2. I

I

I

I

AS 3 d

Z d "-

Fig 2 XPS signal of As3d core level; a)signal of an etched surface or copper coated surface cleaned by several minute treatment in 1M HCI; b) signal coming from a buried interface obtained by copper electrodeposition.

Ab

I

I

44

43

I

42

41

40

Binding Energy / eV

The strength of the signal decreases with increasing thickness of the copper deposit. The latter is determined by the potential, the time and the Cu2" concentration in solution. Due to the copper deposit, the strength of the Ga3d signal falls too, but without any modification of its spectral distribution. Another important observation is an increase of the As/Ga ratio compared to that of clean GaAs. These two results show that the (copper / p-GaAs) interface is not abrupt and that a thin interfacial layer is present. An accurate simulation of the As3d region can be done (fig3) for the modified interfaces, using strong fit constraints demonstrating that a well established chemical transformation involving arsenic is caused by the copper deposition. Each spectrum is decomposed into two main contributions, each of them split in two components by the spin orbit coupling of the 3d core level. The low binding energy contribution ( As3d Electrochemical Society Proceedings Volume 99-9

Ga)

Can

233

be associated with the GaAs lattice response. The high energy contribution

(AS3d)

is

associated to a new chemical environment of the As interfacial atoms.

As 3d

Fig.3 Simulation of a S3a

As3d

signal using two

contributions; (1) AsGa (dashed peaks); 3d (2)As M new contributions; the area ratio is As3d* / As3d a = 1.63

44

43

42

41

40

Binding Energy/eV Table I :fit parameters of fig3 Contribution 1

Contribution 2

3d 3/2

3d 5/2

3d 3/2

3d 5/2

Centre (eV)

41.82

41.15

42.65

41.95

Fwhm (eV)

0.67

0.67

0.8

0.8

A (eV)

0.67

0.7

Ratio 5/2 -3/2

1.5

1.5

The energy separation between the two contributions is always close to 0.9 eV (T0.05). The ratio between the two contributions is in the range As*/As~a =0.25-4.5, with a majority of values comprised between I and 1.5. A characteristic peak fit table is given in the table I associated with the fig 3. The chemical bonding of the excess amount of As can be discussed on the basis of two considerations. We can assume that the additional XPS contribution is associated either only with elemental As or with a Cu-As compound. We note that no contribution associated to oxide is detected, neither for arsenic nor for gallium. The energy shift of 0.9 eV between the two As contributions is relatively strong. Elemental As on GaAs generally gives rise to a shift in the +0.6-0.8 eV range. However, for anodic oxide, higher shifts (0.8-1 eV) can be observed associated with additional small charging effect. So our results suggest that the excess As is not present only as elemental As and they raise the

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question of bonding As and interracial copper. Analysis of copper signals, the Cu2p3/2 core level and the CULMM Auger lines, supports this assumption for thick copper layers ( no As or Ga signals detected). The copper signal for the

Cu 2 .3/ 2

is accurately centred at 933.05 eV with a

FWHM in the 0.85-0.9 eV range. The associated CULMM Auger lines have the specific features of metallic copper with a principal maximum at 568.4 eV. For the XPS and Auger signals we used these spectra as references. The reproducibility of the response on thick layers allows us to check the handling procedure since no oxidation of copper occurs after its deposition on the GaAs surface. When we looked at samples with thinner coating we observed a modification of XPS and Auger copper signals. The Cu2p3/2 level slightly shifts positively in energy with a FWHM enlargement that can reach 1.25 eV. More interesting are the modifications observed on Auger lines for which positive shifts as large as I eV for the principle maximum and shape line modification are observed as shown in fig.4. I

I

I

I

I

I

ra

Fig 4

r3

Differentiate CULMM Auger line.a) thick copper layer; b) thin copper layer.

576

572

568

564

Binding Energy/eV An interesting point is that the amplitude of the modification is all the larger as the coating is thinner. This suggests that for intermediate thickness, the copper signal should be the sum of a copper metallic contribution and an inner one associated with modified buried copper at the Cu-GaAs interface. Only a chemical binding between Cu and As can explain these correlated

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XPS and Auger modifications. Simulations of enlarged Cu 2p3/21evels can be done using two contributions. The low energy one is fixed as a pure metal and using this fitting procedure we see that the ratio of areas divided by the elemental sensitivity factors fluctuates in the a.(ASI aA,(Cu) =0.7 to 5 range. This suggests that no phase with a well established composition is present. Experiments show that Cu -As phases rich or poor in As can be obtained. However, the more common composition is around acu(AsV aAgC, equal to 1. In literature several compounds are described among which the more common is Cu 3As. So in our case the situation is more complex because of the result of an interfacial reactivity that must involve several steps. Nevertheless, in all cases limited arsenic enrichments and gallium losses are present indicating that GaAs surface undergoes a chemical or more probably an electrochemical instability through a predominant

valence band process during the

electrodeposition of copper. We can consider that this surface decomposition comes as the initial step at the beginning of the coating. This agrees with the lack of correlation between the increase of the aA,

aGa

ratio and the copper thickness. Then the As enriched surface interacts at

ambient temperature with the inner part of the metallic copper layer. As the time between the end of electrochemical deposit and the beginning of the XPS analysis is longer than five hours we cannot give information about the kinetics of the interfacial transformation. We performed an anodic oxidation of the coated samples previously analysed by XPS to verify that the electrochemical behaviour of the surface analysed in UHV is not perturbed. Whatever the initial coating conditions we observed in H2SO4 solution the same anodic peak whether or not the sample had been analysed by XPS. The intensity of the peak depends on the previous cathodic treatment as described elsewhere. When we analyse the surface after the anodic oxidation, we observed that the surface has been cleared from most of the copper coating. Nevertheless, a residual layer was present (<10% of the initial Cu signal) that can be considered as a part of the buried modified interface.

Conclusion In this work we have shown that p-GaAs coated by a copper layer undergoes a complex chemical transformation. The phenomenon is only located at the interface. The study of the As3d,

Cu 2 p and

Auger signals coming from the buried interface shows that Cu-As bonds

are present in the interfacial layer. Over this interracial layer a pure copper layer can grow, The

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global system is stable over two weeks. The strong modification of As/Ga ratio demonstrated that a first step happens with a limited surface decomposition during the copper coating of pGaAs. These observations agree with results of the literature that suggest preliminary interfacial reorganisation. The interaction seems specific of p-type because at this time we have never observed on n-GaAs the modifications of the interface composition described for p-type. Finally we shown that the oxidation of the coated electrodes eliminated most of the Cu layer. Nevertheless we have detected residual deposit of Cu and As on the p-GaAs surface. These observations are in accordance with our previous optical results that suggested that recovery of the GaAs surface is not complete in a lot of case.

Literature P.M. Vereecken, K. Struble, W.P. Gomes J. Electrochem. Soc., 145 3075 (1998) E.M.M. Sutter, I Gerard, A. Etcheberry J. Electrochem. Soc.;(accepted for puplic.), (1999)

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Copper CMP Characterization by Atomic Force Profilometry Larry M. Ge, Dean J. Dawson, and Tim Cunningham, Digital Instruments, Veeco Metrology Group, 112 Robin Hill Road, Santa Barbara, CA 93117, USA ABSTRACT Characterization of Chemical Mechanical Planarization (CMP) processes has become increasingly important in both process development and production monitoring for deep sub-micron device manufacturing. The small feature sizes involved in these processes place stringent requirements upon CMP characterization and metrology equipment. A new type of metrology tool, the Atomic Force Profiler (AFP), has been developed, combining AFM resolution and long scan profiling capability. The AFP can be used to characterize CMP processes of dual damascene, shallow trench isolation (STI), tungsten, and interlayer dielectric (ILD), providing measurements of dishing, erosion, plug recess and line width and depth. To highlight the capability of this new technique, the AFP is used to characterize a post-CMP Cu Damascene processed sample. The sample studied is a 200mm wafer containing fine Cu-filled trench test structures with varying trench widths and pitch. The CMP process was applied after the trench filling. Both long-range profiling and high resolution AFM imaging were used to characterize dishing and erosion effects on this wafer. In addition a second Cu sample with 0.22/am Cu filled trenches were measured at the two post-CMP stages.

Introduction Characterization of Chemical Mechanical Planarization (CMP) processes has become increasingly important in both process development and production monitoring for deep sub-micron device manufacturing. CMP effects such as dishing, erosion and plug recess have been measured by a combination of stylus profilers, AFM's and other metrology techniques. With the reduction in critical dimensions into the deep submicron range, traditional stylus profilers cannot measure these smaller surface features due to insufficient resolution and the distortion of the feature being measured. A new metrology tool, the Atomic Force Profiler (AFP) was developed which combines both long profile capability of the stylus profiler with the high resolution of an AFM. Instrumentation The AFP was used to make the measurements shown in this paper. The tool has X and Y drives capable of positioning the sensor head at any point on a 300mm wafer with lgm repeatability, and a profile drive capable of executing linear profiles up to 100mm long anywhere on the wafer (Figure 1). The sensor head itself is an AFM specifically designed for highly repeatable metrology measurements. In addition to its linear profiling capability, the AFP incorporates all of the functionality of the APM, specifically its ability to execute high resolution raster scans up to 70pm x 70pm square. Additionally, the AFP also has the

238

isolated structure supports acoustic isolation panels, which reduce measurement noise induced by airborne vibration. The AFP was developed to bring to bear two fundamental advantages that the AFM has over all stylus profilers. These are superior resolution and the elimination of sample damage. To eliminate sample damage, the AFM sensor head is operated in TappingMode, which provides extremely low tip force, and eliminates lateral (dragging) forces on the sample. In this mode, the silicon cantilever holding the tip is driven to resonate at its fundamental frequency (10s to 100s of kHz), only "tapping" the sample briefly and with minimal and almost purely normal-rather than lateral-force. It is the lateral shear force generated by stylus profilers that typically leads to sample damage. The low tip force of the AFP also contributes to high lateral and vertical resolution as sample distortion is reduced. Sampling density is high enough for die length profiles to be made with sufficient resolution to allow the user to zoom in and view fine features in the same profile without re-measurement. Each AFP profile consists of up to 262k data points with a DSP sampling rate of -20kHz. Thus, for example, a 10mm profile will have a sample density of 26.2 samples per micron (or 38nm spacing between data points). Profiling speed can be up to 200ltm/sec for the non-destructive measurement; the usable speed range for a particular sample is determined by specifics of feature size and spacing. High resolution is also achieved due to small tip geometry (5-10nm

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The Metrology AFM head incorporated in the AFP has been designed to produce the tight limits on axis orthogonality, flatness of the x,y plane, linearity, accuracy, and repeatability required for CMP and other demanding metrology applications. The proprietary design of the piezo stages results in a very flat x,y scan and perpendicularity of < 0.1 degree between the axes. The head can also be used in open loop mode for measurements for which a lower noise floor is required, such as measurement of roughness on smooth surfaces. The AFP step height repeatability is < 5A on a 14sm step height standard. Total indicated runout (TIR) is <10nm for a 10mm profile. The noise floor in closed loop mode is - 4.5A RMS in a clearroom with 76dBc acoustic noise. In open loop mode, under the same conditions, the noise floor is - 1.5 A RMS. Measurements and Results The AFP was used to characterize post-CMP Cu Damascene processed samples. The fist sample studied (Figures 2 to 5) is a 200mm wafer containing fine Cufilled trench test structures with varying trench widths and pitch. The trenches were filled via an electroplating process. The CMP process was applied after the trench filling, the excess Cu on top of the interlayer dielectric was removed by CMP. Additionally a second Cu sample with a 0.22,tsm design rule was measured (Figure 6). The 2 measurements show the effect on 0. 2MumCu lines at two different post-CMP stages. Figure 2 shows a 21.5mm-long profile extending over four test structure patterns within a single die. Each test pattern has a different combination of trench, width and space. All have the same line/space ratio of land the line/space ratio increases in successive test structures from left to right in both profiler scans. The die-level dishing was 0.5psm.

Figure 3a clearly shows that the sample is overpolished (shown as a deeper recess) in the transition regions between the upper dielectric and the Cu-filled trench patterns. The additional recess over the average erosion of the Cu trench pattern is -30nm. High resolution AFM imaging was used to identify and analyze structures in the Cu lines. Figure 4 shows that there is no clear trend of erosion increasing with trench width for this sample. Figure 4 also shows stronger erosion effect on the Cu section with a line/space = I than that of line/space = V2. This indicates that erosion depends strongly on the Cu line density rather than Cu line width. Figure 5 is a 4,t.mx4ltm AFM image in the transition area shown in Figure 3. In the image, the wider and higher lines with textures are Cu lines and the smoother, lower areas are dielectric. The average height of Cu lines relative to the dielectric is -5nm. Further examples of the high resolution measurement capability of the AFP are given in Figure 6a, 6b, and 6c, where a sample with 0.22j.tm Cu lines are compared to two post-CMP stages. The images clearly show that the Cu lines protrude above the field oxide. The cross-section graphs show a reduction of average step height from 10nm to 4nm. This suggests that the additional post-CMP 2 process step improves the local flatness. In this paper, measurement data performed on Cu samples show both long scan high resolution profiling and AFM imaging detailing dishing and step height changes have been presented. These measurements are made possible by the AFP's flexible dual mode operation-long scan mode and 3D AFM imaging mode.

Figure 3 shows the zoomed (5.5mm in length) and leveled profile of the leftmost test pattern (with trench width 0.51am and space at 0.5ltm) in Figure 2, showing the Cu filled trench pattern in respect to the upper lielectric. The recess is due to the erosion effect of CMP. Srosion was measured to be in the range of 30-60nm for rench width 0.5-2!.m over the entire wafer. For Cu-filled renches with line/space ratio = 1/2, the erosion increases vith trench width.

"ecessed

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densor

ui0~CMelrology Opts

chuckeand lede?

AFM head

sample

profile reference

profile dive

positioning

Figure 3a. Zoomed 5.5mm-long scan of location indicated by the box in Figure 2. (profile Figure 1. Diagram showing the profiling stage drive) and Metrology AFM head on the AFP

______

Z-range is 200nm. is_ _______ -

-Ipb

I° I

Figure 3b. Zoomed profile (25pim) of Figure 3a showing the transition between the upper dielectric and lower Cu-filled trench patterns. Z range is 50nm.

22mm Figure 2. 21.5mm-long profiler scan across a die showing four test patterns. Z-range is 1.0im.

- ....-

---

50

50

- *

-

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-

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-'

20

-

----

--

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--

.... -

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0 0

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O Erosion (A) U E~roson (B)F

Figure 4. Graph of dishing versus trench width for measured Cu sample with a line/space ratio of 1:1 (A) and 1:2 (B)

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-4.000

3.00

-2.00 '0

-1.00

1.00

2.00 Length Ijim3

3.00

Figure 6b. Cross-section of post-CMP I Cu wafer with line height of approx. 10Onm

a 0

1.00

2.00

3.00

4.00

Figure 5. A 4pm x 4pm AFM image of the recessed Cu patterns in Figure lb showing details of individual Cu lines. Polishing defects also appear in the image highlighting the ability of the AFP to image such defects. TO

1.60

2.60 Length [E.3

3.00

Figure 6c. Measurement of same site for post-CMP 2 Cu line with reduced step height to approx. 4nm.

0

4.00 0lN 0 Data type 2 range

Height 40,00 nm

4.00 ON Data type Z range

Height 20.00 nm

Figure 6a. AFM top view image 0.25pm lines with corresponding cross-section shown in Figures 6b and 6c. Left image is post-CMP, right image is post CMP 2. Note the scratches on the image.

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ANODIC PROPERTIES AND SULFIDATION OF GaAs (100) AND InP (100) SEMICONDUCTORS R. F. Elbahnasawy and J. G. McInerney Department of Physics, National University of Ireland, University College Cork, Ireland

ABSTRACT The anodic properties of n- and p-type GaAs (100) and InP (100) surfaces have been studied in H20 2, NH 4 OH, Na 2S. and (NH 4)2S. solutions. The technique investigated the anodic sulfidation conditions suitable for n- and p- type GaAs (100) and InP (100) surfaces in (NH 4)2Sx solution. The passivation produced chemically stable surfaces with good surface quality and thickness possibly controlled. X-ray photoelectron spectroscopy (XPS), Auger electron spectroscopy (AES), atomic force microscopy (AFM) and secondary ion mass spectroscopy (SIMS) have been used for surface characterization. The sulfide overlayer has proven to be durable against ambient oxidation for at least four months, which seems promising for semiconductor device applications.

INTRODUCTION The increasing importance of GaAs and InP semiconductors in the fabrication of electronic and optoelectronic devices and the need for understanding their surface properties provided the major inspiration for this type of research.' Chemical treatments in sulfide, acidic and basic solutions have been utilized to improve these properties in the recent years. 2'3 For example, chemical treatment of the AIGaAs/GaAs heterojunction bipolar transistor in Na2 S and (NH4)2S. solutions has improved the ideality factor and produced higher current gain. 4' 5 The Metal-Insulator-Semiconductor (MIS) structures6 fabricated on (NH4) 2Sx-treated GaAs have shown very low interface state density. Buried heterostructure (BH) laser treatments in (NH4 )2 Sx solution have shown a three times lower threshold compared to BH lasers without treatment. 7 Finally, Kamiyama et al. have achieved an increase of 70% in the catastrophic optical damage level of A1GaInP visible laser diodes by sulfur treatment. 8 In this study, the anodic processes were investigated in order to produce chemically stable passivation and develop a method to control surface quality. The anodic properties and sulfidation of GaAs and InP (100) in (NH 4)2S, Na 2Sx, P2S 5 and (NH 4 )2 S. solutions were investigated using X-ray photoelectron spectroscopy (XPS), Auger electron spectroscopy (AES), secondary ion mass spectroscopy (SIMS) and atomic force microscopy (AFM). The study provided data that would help understanding the roles of the hydroxyl group and sulfur species during the sulfidation processes of both GaAs and InP surfaces.

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EXPERIMENTAL ARRANGEMENT The samples used were n- and p-type 0.6 - 6.5x10s 8 cm"3 GaAs (100) and InP (100) single crystal wafers with thickness 350 - 550 jim. The wafers were cut into 9x9 mm2 and held using a vacuum pump for anodic treatment. Electrical contact was made by connecting the isolated rear of the wafer to the anode of a potentiostat using silver paint and wiring through a glass tube (Figure 1). The exposed surface area of the samples was 1.2 cm 2. The potentiostat was a German-made (Bank Electronik) Potentio-Galvano-Scan 25V/2A Wenking PGS95 with PC-control and SPK-RP software. The electrochemical cell consisted of the sample, which functioned as the anode (working electrode), AgCIreference electrode and platinum standard gauze basket as a counter electrode. Before anodization, samples were degreased ultrasonically in both acetone and methanol (1 minute each) followed by a DI water rinse. Electrodes were then aligned in a rectangularshaped glass vessel for electrolysis in basically 3M (NH 4)2Sý (x=5g S/100ml) solution. X-ray photoelectron spectroscopy scans were performed using a VG-Microtech x-ray source (Al K,). The depth profiling was performed using Ar' bombardment at a milling rate of 2 nm/min. Secondary ion mass spectroscopy was also performed on a SIMS analyzer (Cameca IMS-3f) with primary ion beam 50nA (14.5 keV) and a heavy bombardment of cesium ions. Atomic force microscopy was recorded in contact mode, yielding the average deviation of the average height, Ra. RESULTS AND DISCUSSION Anodic Propertles and Passivation of n-tvye GaAs (100) lxl0' cm"3 This study demonstrated the effect of pH concentration on the behaviour of n-type GaAs passivation, dissolution and surface quality. The anodic treatment in H20 2 and NH 4OH solutions (Figure 2 and Figure 3) did not show any surface dissolution or damage to surface quality at both low and high molarities. In anodic treatment in (NH 4)2S solution, the achievement of durable passivation with good surface quality depended on molarity, sulfur ion concentration and the position at the I-V sulfur characteristic peak. Reducing molarity increases OH' concentration in the sulfide solution that could erode the GaAs surface during anodic polarization. Equations 1, 2 and 3 show the reaction mechanism between aqueous (NH4) 2S, solution with the GaAs substrate during anodic sulfidation. The number of moles of electrons flowing through the external circuit per mole of semiconductor dissolved was 6 for GaAs.' 0 GaAs---Ga 3+ + AS 3+ + 6e GaAs+ 10OH +6 h+---GaO3 3 +AsO2 GaAs + 5 S2- + 6 hGaS 3 3- + ASS3

+5H 20

(1) (2) (3)

Experimentally, aqueous (NH 4 )2S solution should have high molarity and should be sulfur saturated during the reverse anodic scan (starts at high anodic potential) to achieve

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chemically stable anodic sulfidation. Increasing molarity accommodates more sulfur ions in the solution and saturating the solution with sulfur shifts the anodic reaction from surface oxidation and dissolution (equation 2) to depositing sulfide (equation 3). These processes were conditioned by turning the n-type GaAs effectively to p-type like (reverse anodic scan) in order to create a strong anodic interaction between GaAs substrate and sulfur ions in solution until the sulfide deposition took place at the interface. In the anodic sulfidation processes, XPS analysis has shown that: (i) Although the anodic potential was high in the reverse scan for sulfur saturated (NH 4)2S solution (Figure 4, Region II) and for P2S5 saturated (NH 4)2S solution (Figure 5, Region II), the anodic treatment of n-type GaAs did not exceed the conventional dipping treatment. No evidence of sulfidation has been recorded after DI water rinsing and blow dry in nitrogen. (ii) At the sulfur characteristic peaks (Figure 4, Region I and Figure 5, Region I), the anodic passivation takes place in characteristic steps at which the thickness of the sulfide overlayer can be controlled by either time or current density. The characteristic peaks were mainly dependent on the sulfur-ion concentration of the solution and were positioned according to the anodic cell parameters and substrates doping concentration. However, it should be noted that anodic sulfidation in sulfur-saturated sodium sulfide solution (Figure 6, Region I) left the surface severely eroded and damaged. Observation of GaAs surface quality after passivation was therefore the main task of this work. The chemical stability and electronic properties of the GaAs surface were also examined after passivation. There were two factors found to be directly responsible for GaAs surface roughening. The first, anodic sulfidation place-exchange processes" in which the driving force, imposed by the high anodic potential displaced atoms from their lattice positions in order to increase their coordination with the surrounding sulfur species. The second, being the thickness of the deposited overlayer, which is usually a function of current density and/or depositing time. Atomic force microscopy displayed the surface morphology for low, intermediate and high anodic current densities. The assessed surface roughness was 21, 44, 63 and 100 nm corresponding to current densities of 5, 8, 12 and 14 mA/cm2 as shown in Figure 9. At higher current densities (12 and 14 mA/cm 2, 2.8 V) surface morphology get rough (Figures 9(c) and 9(d)), probably because of the formation of mounds which grow and coarsen with increasing thickness. Surface characterizations including XPS, AES and SIMS have investigated the deposited layer. XPS depth profiling revealed the atomic concentration of gallium, arsenic and sulfur. Both carbon and oxygen were also detected. SIMS depth profiling (Figure 7) detected continued presence of Ga, As, S, C and 0 for an approximate overlayer depth 200 - 300 nm. The strong carbon and oxygen signals are probably due to the high sensitivity of SIMS to light elements. The GaAs anodic sulfidation displayed high chemical stability against oxidation for at least four months and an hour exposure to the Ar÷ laser (512 nm) at power density 5 mW/tm 2; this looks promising for optoelectronic device applications. AES surface analysis (Figure 8) for n-type GaAs treatment in P2S 5 saturated (NH4 )2 S solution (Figure 5) revealed Ga, S, C and 0. Neither arsenic nor phosphorous were detected; in the case of arsenic, probably due to the high

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solubility of its compounds in the (NH 4 )2S solution and also in DI water during rinsing. Also no phosphorous has been detected by XPS and SIMS for the same procedure. The XPS results suggest that the anodically grown layer consists of a mixed chemical phase region including Ga-As, Ga-S, As-S and possibly As/Ga-O bonds. 12.14 Anodic Propertles and Passivation of p-tvoe GaAs (100) 6x1018 cm

3

Because p-type GaAs (100) is a hole-rich material, biasing the surface with high anodic potential is not necessary and the reverse anodic scan could be excluded. These presumptions were proved experimentally by passivating p-type GaAs (100). The anodic conditions for p-type GaAs (100) passivation in aqueous (NH4 )2 S, solution (x=5g S/100 ml) gave the Dolphin-shaped graph (Figure 10). The anodic scan was 5 mV/s forward (0.0 to 0.7 V) and 2 mV/s reverse (0.7 to 0.0 V). This procedure left the surface well passivated and topographically homogeneous. AFM has assessed the surface roughness to be 31 nm. The potential span (Figure 10) was found to vary as the doping concentration changed. Long potential span is needed for low doping p-type GaAs. The SIMS depth profiling (Figure 11) revealed the presence of Ga, As, S, C and 0 for an estimated depth of 250 nm. The passivated layer was shown to be chemically stable in ambient air for four months. Ga, 0, C and S atomic concentrations have also been detected by AES. The passivated layer assumed to be gallium and arsenic sulfide, while defective carbon and Ga/As oxides cannot be ruled out. Similar anodic characterizations in alkaline, acidic and sulfide solutions have also been performed. The characterizations were found to be consistent with n-type GaAs results under the same experimental arrangements. Anodic Propertles and Passivation of n-tvne InP (100) 3x10

8

em"3

With particular attention to excess interface electrons, an anodic procedure has been performed for n-type InP (100). The anodic voltammogram was similar to Figure 15. No specific characteristics have been observed and a stable overlayer of indium sulfide has been formed. Equations 4, 5 and 6 show the reaction mechanism of aqueous (NH4 )2S solution with the InP substrate during anodic sulfidation. Equation 5 is responsible for the anodic dissolution of InP in (NH 4 )2S solution when the hydroxyl group is dominating the solution. Equation 6 is the one responsible for sulfidation and depositing sulfides. InP)-In3 ý + p 3+ + 6e InP+90H- +6h+ ) InO2 + HP0 3 2- + 4 H20 InP + 7 S2- + 6 h÷ InS 3 3- + PS 5 5 -

(4) (5) (6)

Auger electron analysis (Figure 12) showed strong peaks for atomic concentrations of S and In. Weak C and 0 signals have also been detected. In addition, SIMS depth

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profiling (Figure 13) showed continued evidence of S, In, C and 0. The oxygen and carbon spectra remained strong throughout the grown layer with a marked quantity at the InP substrate. Insignificant phosphorous has also been identified with continued growth near to the interface. The approximate depth was 150 nm. The surface may be rough as shown in Figure 14 (1372 nm) but the deposited sulfide thickness can be controlled by reducing either the passivation time or the anodic current density. As mentioned in section (a), the thickness of the deposited layer is very important for the formation of mounds that grow and coarsen with the result of high surface roughness. It was also found that unlike GaAs (100), reducing the molarity of (NH 4 )2S solution yielded better anodic passivation for n-type InP (100). This probably reflects the better stoichiometry of InP as well as the chemical stability of the surface after passivation. Similar anodic studies in IM H20 2 and NH 4OH solutions were found consistent with the characteristic results of GaAs (100). No roughness or surface erosion being observed. Following the experimental data mentioned above, the thick passivated overlayer assumed to be indium sulfide. 3

8 Anodle Properties and Passivatlon of P-tyPe InP (100) 4x101 Cm"

With regard to n- and p-type InP (100) and GaAs (100) substrates, the p-type InP (100) was found to be the best at anodic treatments. The reaction was simple as in equation 6 and easy to control. The anodic behaviour (I-V plot) was consistent with previously reported work with respect to the doping concentration.9 At the plateau (Figure 15, 1280-1440 mV) the indium sulfide deposition was mild and stable with favorable surface quality. At higher anodic potentials, the deposition increased exponentially and was difficult to control.9 Strong S and In peaks as well as weak C and 0 have been detected by AES. The SIMS depth profiling (Figure 16) showed continued evidence of In, S, P, C and 0, with deposited overlayer in the region of 50 nm. The phosphorous profile was insignificant, while the sulfur spectrum remained strong and steady as the layer was removed by Cs' bombardment. It does not seem to diminish rapidly before the interface has been reached and diffused beyond the interface. As the layer approaches the interface, an increased part of phosphorous sulfide and indium phosphorous could probably be formed. The thick sulfide layer was found durable against moist ambient air for four months, probably belonging to the stable indium sulfide. The sulfide phase would be attributed to the anodic decomposition reaction of the InP substrate in equation 6, followed by dissolution of phosphate ions in (NH 4)2S solution and precipitation of an insoluble In 2S 3 film at the surface. 9 The quality of the passivated surface was quite good with assessed surface roughness 18 nm; this is the lowest value among n- and p-type GaAs and n-type InP surface treatments in (NH 4 )2S solution. CONCLUSIONS The anodic sulfidation has been shown to produce chemically stable passivation with good surface quality for n- and p-type GaAs (100) and InP (100) surfaces. The sulfur-ion concentration in the (NH4) 2S solution played a crucial role in achieving the correct passivation formula i.e. to satisfy durability and surface quality, particularly with respect

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to n-type GaAs (100). Turning the n-type material to a p-type like surface is another factor that seems vital to achieve anodic passivation for n-type GaAs (100). In this study, the anodic treatment of GaAs and InP in H20 2 and NH 4OH solutions has proven to be non-erosive in comparison with the aqueous sulfide solutions. Dipping GaAs (100) in (NH 4)2S solution could initiate two simultaneous reaction mechanisms; the reaction of the substrate with the sulfur ions to form sulfides and the reaction of the sulfide with H20. The second reaction is strong enough to dissolve the sulfide if the anodic potential is low and the sulfide solution is not saturated with sulfur. The study has also confirmed that there is no necessity to saturate the sulfide solutions with sulfur for InP (100) anodic passivation; eventhough increasing sulfur concentration still improves the reaction performance. The study should provide reference data for the best anodic passivation conditions for the most important III-V semiconductor compounds. Much work has still to be done in this field in order to investigate the reaction mechanisms occurring during the anodization process in-situ.

ACKNOWLEDGMENTS The authors would like to thank Greg Hughes and Tony Deeney for helpful discussion and Enterprise Ireland for financial support. REFERENCES C. J. Sandroff, M. S. Hegde and C. C. Chang, J. Vac. Sci. Technol. B7(4), 841 (1989). 2 H. H. Lee, R. J. Racicot and S. H. Lee, Appl. Phys. Lett. 54(8), 724 (1989). 3 B. A. Cowans, Z. Dardas, W. N. Delgass, M. S. Carpenter and M. R. Melloch, Appl. Phys. Lett. 54(4), 365 (1989). 4 R. N. Nottenburg, C. J. Sandroff, D. A. Humphrey, T. H. Hollenbeck, and R. Bhat, Appl. Phys. Lett. 52(3), 218 (1988). s S. Shikata, H. Okada and H. Hayashi, J. Appl. Phys. 69(4), 2717 (1991). 6 Z. Liliental-Weber, C. W. Wilmsen, K.M. Geib, P.D. Kirchner, J.M. Baker and J. M. Woodall, J. Apple. Phys. 67(4), 1863 (1990). ST. Tamanuki, F. Koyama, K. Iga, Japanese Journal of Applied Physics, 30(3), 499 (1991). 8 S. Kamiyama, Y. Mori, Y. Takahashi and K. Ohnaka, Appl. Phys. Lett. 60(22), 2595 (1992). 9 L. J. Gao, J. A. Bardwell, Z-H. Lu, M.L. Graham and P. R. Norton, J. Electrochem. Soc. 142(1), L14 (1995). 10 H. Gerischer, W.C. Tobias, Advances in electrochemical science and engineering, VCH Publishers, Inc., 9-10 (1990). "1 12 E. Yablonovitch, H. M. Cox, and T. J. Gmitter, Appl. Phys. Lett. 52(12), 1002 (1988). W. Z. Cai, Z. S. Li, R.Z. Su, G. S. Dong, D. M. Huang, X. M. Ding, X. Y. Hou and X. Wang, Appl. Phys. Lett. 64(25), 3425 (1994). 13 S. G. Ershov, A. F. Ivankov, V. V. Korablev and V. Yu. Tyukin, Tech. Phys. Lett. 22(7), 561 (1996). 14 X. Hou, X. Chen, Z. Li, X. Ding and X. Wang, Appl. Phys. Lett. 69(10), 1429 (1996).

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AgClReference Electrode

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Figure 1: Experimental arrangement for anodic processes of GaAs and InP surfaces.

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60

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Figure 2: Potential sweep of n-type GaAs (100) lxlIO' cm 3 in IM H20 2 solution, sweep rate 20 mV/s and 3.30 pH.

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~30 25 20

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R0g[ o I ---o--------------------Region

U--------------

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Figure 4: Potential sweep of n-type GaAs (100) lxlOl8 cm 3 in 3M (NH4) 2S, (x=5g S/100 ml) solution, sweep rate 20 mV/s and 10.15 pH.

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26 Region 1 --------------- > -----------

120 ''16

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h--Region I -------

120ý

Region fl----

100.

80.

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Figure 6: Potential sweep of n-type GaAs (100) 1x0 ml) solution, sweep rate 2 mV/s and 14.60 pH.

250

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cm"3 in 0.5M Na 2S. (x=5g S/100

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"1 " 0.4-

0.3

0-2

0.1

[Depth urnl

Figure 7: SIMS depth profiling of n-type GaAs (100) (NH4) 2Sý (x=5g S/100 ml) solution.

20000

IxI0

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C

S

0 Ga

10000 III

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z 1u

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Figure 8: AES spectrum of n-type GaAs (100)

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Eo 1

ý1o (.)

pn

S~5111m

In0

€)

0p

10PM

0 jim

(lb)

0pmo O

10p

(dl)

25j~

4r Figure 9: AEM of anodically passivated n-type (Si) GaAs (100) lxl0'8 cm-3 as shown in Figure 4 (Region I). (a) Surface roughness (Ra) 21 nm (5 mA/cm 2 , 3 V), (b) 44 nm (8 mA/cm 2, 3 V), (c) 63 nm (12 mA/cm2, 2.8 V) and (d) 100 nm (14 mA/cm2 , 2.8 V).

o

00

20o 0

3un

400 Poo

W05o

70

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[ C/sJ

5s7

8-33 10 10C

0.2

0.1

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0.4-

[ Depth ur]

Figure 11: SIMS depth profiling of p-type GaAs (100) 6x10 18 cm"3 treated anodically in (NH4) 2Sx (x=5g S/100 ml) solution.

S 200000 In 100000

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-

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0

'

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Figure 12: AES spectrum of n-type InP (100) 3x10 1 8 cm"3 treated anodically in (NH4) 2S.

(x=5g S/100 ml) solution.

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[ C'/si

1 C>

4-1

4Z-

3L-4S

I0C> 1~

X~

[

I),pth

urn]

Figure 13: SIMS depth profiling of n-type InP (100) 3x10'8 cm:3 treated anodically in (NH 4 )2 Sx (x=5g S/100 ml) solution.

Ol0

(a)

501a

Oln0 P

(b)

1l Pm

Figure 14: AFM of anodic passivated InP (100) in (NH.-)2S. (x=5g S/100 ml) solution. (a) N-type 3x10' 8 cm 3 with approximate surface roughness 1372 nm, (b) p-type 4x10 18 cm 3 with approximate surface roughness 18 nm.

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~12 10 0

0

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8090 E [mV]

INO

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Figure 15: Potential sweep of p-type InP (100) 4x10' cm 3 in 3M (NH4) 2S, (x=5g S/100 ml) solution, sweep rate 5 mV/s and 10.35 pH.

[ C/s]

"10

S0 i i S~S-32

•

I

*

10"

3 10

"In-11s 10

( I)epth urn]

Figure 16: SIMS depth profiling of p-type InP (100) 4x1018 cm 3 treated anodically in (NH4) 2S. (x=5g S/100 ml) solution.

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A STUDY ON ELECTROCHEMICAL METROLOGIES FOR EVALUATING THE REMOVAL SELECTIVITY OF Al CMP Shao-Yu Chiu', Jyh-Wei HSUb, I-Chung Tung', Han-C Shihb Ming-Shiann Feng', Ming-Shih Tsai' and Bau-Tong Dai' aDepartment of Materials Science and Engineering, National Chiao Tung University Hsinchu 300, Taiwan, R. 0. C. bDepartment of Materials Science and Engineering, National Tsing Hua University Hsinchu 300, Taiwan, R. 0. C. 'National Nano Device Laboratories, Hinchu 300, Taiwan, R. 0. C.

ABSTRACT The in-situ electrochemical measurements were performed for the Al and Ti disks in the various slurries under the polishing or static condition. The slurries used contained A120 3 abrasive, phosphoric acid, citric acid and hydrogen peroxide. The results showed that the addition of H20 2 could help to form an effective passivating layer on the Al surface. Besides, the addition of H20 2 enhanced Al dissolution. The maximum corrosion potential drop between the abraded and nonabraded Al electrodes corresponded to the possible maximum polishing rate of Al. The novel equipment for in-situ galvanic measurements was designed for evaluating the Al/Ti galvanic couple. It was found that Al dissolution could be suppressed in the slurry with the addition of 6 vol% H2 0 2 at pH 4. As regards the AI/Ti removal selectivity, the polishing with the addition of 6 vol% H2 0 2 at pH 4 would mitigate the Al dishing, since the polishing and dissolution of Al could be suppressed while those of Ti could be enhanced.

INTRODUCTION Chemical mechanical polishing (CMP) has been accepted as an emerging key technology to achieve global planarization for interlevel dielectrics (ILDs) and damascene process in the deep submicro multilevel interconnect fabrication. Compared with conventional reactive ion etching (RIE) etch back, CMP of patterned aluminum (Al) lines for a damascene process gives the better electromigration lifetime, higher degree of planarity, and less number of processing steps for interconnection. Moreover, there are still other sufficient motivations to develop a reliable Al CMP process, based on the considerations of the more simplified process and lower cost for IC manufacturing compared to Cu CMP. Therefore, Al alloys, which have been used as interconnects for more than 30 years, are still being extensively investigated because of their admirable applicability in damascene process. Due to the soft nature of Al alloys compared to tungsten or copper, Al CMP suffers the choice of 2 a suitable pad to achieve good structural planarity and minimum surface scratch density"' . Furthermore, the complicated metal removal mechanism in CMP process is not yet clear presently. Regardless of those hindrances, to obtain a better understanding and controlling on Al CMP, electrochemical behaviors of metal in the given slurry environment during polishing should be 3 explored . To this end, conventional analytical techniques in corrosion study can be modified as the basis for evaluation of appropriate slurry formulation for a successful Al CMP. The total process time for Al CMP is also controlled by the removal rate of the diffusion barrier used. Titanium (Ti) is known to be an effective adhesin/diffusion barrier for Al metallization.' Accordingly, the polishing selectivity between Al and Ti is critical in determing the yield and throughput of Al CMP. In addition, without a proper Al/Ti polishing selectivity, passive corrosion during the overpolish time may lead to undesirable plug corrosion and recess.'

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In this study, the investigations were concentrated on the polishing of the Al alloys and the adhesion/barrier metal (Ti) in the slurries containing A120 3 abrasive, phosphoric acid, citric acid and hydrogen peroxide. The electrochemical analyses, including the potentiodynamic polarization and galvanic corrosion measurements, have been used to elucidate the electrochemical mechanism of the removal selectivity in Al CMP.

EXPERIMENTAL The slurry under investigation was formulated with a -A12 0I abrasive (0.05 pm in size), phosphoric acid, citric acid and hydrogen peroxide in an acidic aqueous solution. Phosphoric acid and citric acid were used as pH buffer solutions. The slurry pH was adjusted with potassium hydroxide (KOH). The electrochemical measurements were performed using the bulk Al and/or Ti rotating disk working electrodes on an EG&G potentiostat/galvanostat Model 273. The mixed corrosion potential was measured with respect to a standard Hg/HgSO, electrode [+640mV w.r.t. standard hydrogen 3 electrode (SHE)] as a reference electrode. The conductor electrode was platinum (Pt). The potentiodynamic scans were performed at a rate of I mv/sec from 0.25 V below the open circuit potential to 1.0 V. The corrosion current density was determined by Tafel extrapolation or calculated by the Butler-Volmer equation. In order to trace the electrochemical behavior with abrasion or without abrasion, the working electrode was kept rotating at 300 rpm, whether without or with abrasion on a Rodel Politex regular E polishing pad. During polishing, a down force of 4 psi was applied to the metal surface. The setup used for the potentiodynamic measurements is shown in Fig.l(a).' From the potentiodynamic scans, the changes in the mixed potential between the non-abraded and abraded electrodes and the current density in both electrodes were extracted. The novel equipment designed for the in-situ electrochemical measurements during polishing is schematically shown in Fig. I(b). This setup consists of two working electrodes, i.e. the Al alloys and adhesion/barrier metals, with the slurry as the electrolyte. When AUX and REF terminals were shorted, the potentiostat would control potential between two working electrodes at any specified value. If that value were set at zero, the circuit would continuously and automatically read the galvanic couple current from the potentiostat zero resistance ammeter.' It could be capable of performing the in-situ polishing or static process for the galvanic corrosion measurements. Following the electrochemical theory, the galvanic current flow is a result of the different electrochemical behaviors between the two working electrodes in the slurries.

RESULTS AND DISCUSSION The polishing mechanism for a phosphoric acid and hydrogen peroxide-based AI-CMP slurry was proposed in a U.S. patent.' The hydrogen peroxide is a weak acid added as an oxidant to the polished metal, and the phosphoric acid then etches the oxide while the slurry abrasive mechanically abrades the metal surface. H202 concentrationeffects on Al removal behavior Figure 2 shows the potentiodynamic scans for Al immersed in the slurry in the absence or presence of H20 2 at pH 2. In the absence of H202, there is a very little difference in the corrosion potential and current density between the abraded and non-abraded electrodes.' This indicates that the mechanical abrasion nearly makes no contribution to the corrosion rate. Therefore, in the absence of H20 2, the polishing rate would be dominated by Al dissolution. This Al dissolution at pH 2 is 3 suggested due primarily to the formation of Al , according to the Pourbaix diagram of aluminum water system. As also shown in Fig. 2, the corrosion potential is significantly increased after the addition of 3 vol% H20 2, indicating that a passivating layer may form due to the addition of H 20 2. In addition, in the presence of H20 2 , there appears a significant drop in the corrosion potential and an increase in the current density with abrasion, indicating that the passivating layer is continuously removed by the mechanical abrasion during the polishing process. By contrast, in the absence of H 20 2 , since the very

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little change in the corrosion potential and current density with abrasion, although oxygen in air may dissolve in the slurry and act as an oxidant, however this is clearly insufficient to produce a rather efficient passivating layer on the polished Al surface. As can be observed in Fig. 2, the current density of the non-abraded electrode in the slurry containing H20, is higher than that of the non-abraded or abraded electrode in the slurry without the addition of H2 0 2 . This manifests that the presence of H20 2 can enhance Al dissolution. For this enhancement to occur, the structure of the passivating layer should appear loose, so that the slurry solution is still capable of penetrating through the passivating layer and attacking the Al metal to bring about the corrosion reaction. In addition, in the presence of polishing action, the current density of the electrode is further increased, as also shown in Fig. 2. This is suggested to be a combined result of two actions, that is, the presence of H20 2 enhances Al dissolution and the mechanical abrasion helps to remove the passivation layer. In particular, as noted in Fig. 2, in the presence of 3 vol% H202, there is a corrosion potential 90 drop (<E) for the abraded electrode compared to the non-abraded electrode. ' This corrosion potential drop is anticipated to correspond to the weakening of the passivation effect, which may be caused by the decrease in thickness of the passivating layer due to mechanical abrasion. In Fig. 3 is shown <E as a function of the concentration of H2 0 2 added. As shown in the figure, <E can be seen to increase with the H,0 2 concentration, until the H2 0 2 concentration reaches about -3 vol%, and then decrease with the H2 0 2 concentration further. At the lower concentration of H2 0 2 (below -3 vol%), the removal rate of the passivating layer is higher than its very slow growth rate, so that the removal amountof the passivating layer would be very small and thus gives a lower <E. In such a case, the mechanical abrasion becomes less important and the polishing rate is thus dominated by Al dissolution. By contrast, at the higher concentration of H20 2 (above -3 vol%), the removal rate of the passivating layer is slower than its high growth rate. In this case, mechanical abrasion becomes important and Al dissolution is suppressed, since the thicker passivating layer acts as a better barrier against the acidic solution attacking on Al metal surface. As a result, due to the thick passivating layer, the alteration rate of the passivation effect is thus negligible and leads to a lower <E. On the same line of reasoning, in the presence of 3 vol% H2 0 2, since the removal rate of the passivating layer is equal to its growth rate, both the mechanical abrasion and Al dissolution would make the large contributions to the polishing rate, which would cause <E to approach the maximum value. Consequently, this would be the best condition to provide Al CMP with the maximum removal rate. pH effects on Al/Ti removal selectivity In the slurry used in this study, with the addition of 3 vol% H20 2 , the polishing rate of Ti metal is slower than that of Al, when the polishing rate of Al is the maximum. However, this is not a good condition for polishing the Al/Ti patterned wafer, since the Al dishing would become a severe problem. Therefore, it is preferred that the polishing rate of Al be decreased while the polishing rate of Ti be increased. To this end, the addition of 6 vol% H2O0is chosen, in which <E is a lower value (see Fig. 3). As a result, the passivation effect for At would be significant and the polishing rate of Al is also decreased. In such a case, the Al dishing can be mitigated. However, it is not unreasonable to propose that the adjustment of pH is also possible to further improve the Al dishing. In Figs. 4 are shown the potentiodynamic scans for the abraded electrodes in the slurry with the addition of 6 vol% H20 2 at pH 2 or 4. It is clear that the current density of At would be altered but that of Ti remains unchanged by the change of pH. At pH 2, the current density of Al is higher than that of Ti, whereas the current density of Al becomes lower than that of Ti at pH 4. In other words, this fact verifies that 4 at pH the polishing rate of Al can be decreased and slower than that of Ti. This is very favorable to mitigate the Al dishing when a AI/Ti patterned wafer is polished. It is thus clear that the change of pH is capable of further mitigating the Al dishing. Galvaniccurrent measurement According to the galvanic corrosion theory, while Al and Ti are electrically connected, a potential difference usually exists and produces electron flow between them," which may contribute a driving force for greater corrosion of either Al or Ti. Fig. 5 shows the galvanic current between the abraded Al and Ti electrodes with time. As seen in the figure, at pH 2 and in the absence of H2 0 2, the abraded

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Al electrode obtains a positive current, which means that Al dissolution could be enhanced by the Al/Ti galvanic couple. Conversely, in the slurry containing 6 vol% H 20 2 at pH 4, the abraded Al electrode obtains a negative current, which indicates that dissolution of Ti would be enhanced. In this particular case, the Al etching rate could be suppressed, which is fairly helpful to mitigate the Al dishing for polishing a AL/Ti patterned wafer.

CONCLUSION The electrochemical studies on the Al and Ti disks in the slurries containing A120 3 abrasive, phophoric acid, citric acid and hydrogen peroxide were performed. The results showed that the addition of H,0 2 is very helpful to form a passivating layer on the Al surface. At the lower concentration of H20 2 (below -3 vol%) at pH 2, the polishing rate of Al was dominated by Al dissolution. At the higher concentration of H202 (above -3 vol%), the polishing rate of Al was primarily controlled by mechanical abrasion. The maximum corrosion potential drop between the abraded and non-abraded electrodes in the slurry with the addition of 3 vol% H2 0 2 at pH 2 corresponded to the possible maximum polishing rate of Al, at which both mechanical abrasion and dissolution made the large contributions to the polishing rate. The novel equipment for in-situ galvanic measurements was designed for evaluating the A1/Ti galvanic couple. It was found that Al dissolution could be suppressed in the slurry with the addition of 6 vol% H2 0 2 at pH 4. By increasing the addition of H 20 2 to 6 vol% and the pH value to 4, the Al dishing would be mitigated, since the polishing and etching of Al could be suppressed while those of Ti could be enhanced.

ACKNOWLEDGEMENTS This work was sponsored by the National Science Council of the Republic of China under grant NSC 88-CPC-E-009-015. Technical support from the Nationl Nano Device Laboratories is also acknowledged.

REFERENCE 1. M. A. Fury, D. L. Scherber and M. A. Stell, MRS Bulletin Nov. (1995) pp. 61-64. 2. J. F. Wang, A. R. Sethuraman, L. M. CooK, R. C. Kistler and G. P. Schwartz, Semicond Intl. Oct. (1995) pp. 117-121. 3. C. G. Kallingal, D. J. Duquette and S. P. Murarka, J. Electrochem. Soc. 145 (1998) pp. 2074-2081. 4. J. M. Steigerwald, S. P. Murarka, and R. J. Gutmann, D. J. Duqutte, Mater Chem. Phys. 41 (1995) pp. 217-228. 5. E. A. Kneer, C. Raghunath, V. Mathew and S. Raghavan, J. Electrochem. Soc. 144 (1997) pp. 3041-3049. 6. Denny A. Jones, Principles and Prevention of Corrosion, 2nd ed., Prentice Hall Press, Upper Saddle River, NJ, pp. 177-190, 1996. 7. C. C. Yu, T. T. Doan and A. E. Laulusa, U. S. Patent 5,209, 816 (1993). 23 8 2 44 . 8. Ronald Carpio, Janos Farkas, and Rahul Jairath, Thin Solid Film, V.266, 1995, pp. 2 59 2 6 5 . 9. D. Zeidler, Z. Stavreva, M. Plotner and K. Drescher, Microelectron. Eng. 33 (1997) pp. 10. J. M. Steigerwald, D. J. Duqutte, S. P. Murarka and R. J. Gutmann, J. Electrochem. Soc. 142 (1995) pp, 2379-2385. 70 78 11. David R. Evans, Electrochem. Soc. Proc. 96-22 (1997) pp. - .

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E .. .... EG&G 273

Carner drive motor

POTENTIOSTAT

Load cell

Figure 1(a).

Schematic drawing of the in-situ potetiodynamic measurement system

Carreer drive motor

-...

EG&G 273 POTENTIOSTAT

T

At

0

Slm

Pad __ Platen

Polishing platen drive motor

Figure 1(b).

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The novel equipment designed for in-situ galvanic corrosion measurement

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A.-1°/,-0.5°Wu Murry. x vol% H0' 44uffer acdd(pH=2)4elIurnna abrasive

05

I : No abrasion (at 300orpm)

I1:with abrasion (at 4psi, 300rpm)

o.o

-10

-1.5 1E-7

1E-6

1E-5

1E-4

1E-3

2

Current density (A/crm)

Figure 2.

Potentiodynamic scans for abraded and non-abraded Al surface in the slurry in the absence or presence of H20 2 at pH 2.

140

AI-1%8I-0.5YCu Slurry. x vol% I.O6+buffer acid(pH=2)-aIurnlna abrasive

E•120

gio

20 0 0

2

4

6

8

10

H20 2 concentration (%) Figure 3. Effect of H20 2 concentration on the electrochemical corrosion potential drop of Al in the slurry at pH 2.

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1.0

Slurry. 6 vol% H02+buffer acid(pH=x)+alumina a with abrasion (at 4psi, 300rpm)

S0.5 0.0

Al

-0.5

pHp2

1E-8

pHH4

pHp2

ATi -1,0 1E-9

TI

1E-7

1E-6

1E-5

1E-4

1E-3

Current density (A/cm2 ) Figure 4.

Potentiodynamic scans for abraded Al and Ti surface in the slurry with the addition of 6 vol% H20 2 at pH 2 and 4, respectively.

0.6 ,N.1%/SI.O.5%'Cu'Rn

0.5

With abrasion at 4psi, 300rpom

0. 0.4

Slurry (alurnina abrasive) I : 0 voll/J'lO 2, pH 2

S0.3

I1:6vola/'ltOq,pH 4

~0.2

-. 5~cr

0.1

d 0.0 C

-0,I -0.2 -0.3

ýý 0.0

0.1

2 0.2

ý~r 0.3

0.4

Time (Ks) Figure 5. The galvanic current of abraded AI/Ti couple surface recorded from a potentiostatic ZRA in the slurry containing 0 vol% H20 2 at pH 2 and 6

vol% HO,2 at pH 4, respectively.

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NUCLEATION AND GROWTH OF EPITAXIAL CdSe ELECTRODEPOSITED ON InP AND GaAs SINGLE CRYSTALS L. Beaunier, H. Cachet, M. Froment, G. Maurin Physique des Liquides et Electrochimie UPR 15 CNRS, Universit6 Pierre et Marie Curie 4 Place Jussieu, 75252 Paris Cedex 05 ABSTRACT

Epitaxial CdSe layers were electrodeposited from aqueous solutions onto InP and GaAs single crystals. The analysis of current transients shows that the growth kinetics corresponds to a Scharifker model assuming an instantaneous nucleation followed by a 3D diffusion-limited growth. The diffusion control is effective after less than 0. ls after the beginning of the potential pulse. The phenomena associated with the formation of a coherent film cannot be detected by this technique. TEM observations of CdSe films with increasing thicknesses show when the diffusion control is effective, a large density of growth steps followed by the formation of epitaxial nuclei which finally coalesce. INTRODUCTION Semiconducting chalcogenide compounds epitaxially deposited on single crystal semiconductors present many applications in optoelectronics and solar energy conversion. Beside the vacuum based techniques like MBE, the liquid phase is very attractive because of its low cost. Epitaxial CdSe thin films have been recently electrodeposited from aqueous electrolytes on InP and GaAs semiconductors. A good epitaxy is achieved by monitoring the experimental parameters, in particular the selenium concentration in the electrolyte and the deposition potential (1)(2).The aim of this paper is to establish relations between the optimum conditions of epitaxy and the nucleation and growth processes implicated during the formation of CdSe films onto InP and GaAs single crystals.The growth kinetics during the first steps of electrodeposition is generally studied from the analysis of current transients. Only few papers report results concerning the kinetics of semiconductor electrodeposition compared to those devoted to metals. K.E. Heusler et al (3) have investigated the CdSe electrodeposition on metallic substrates. H. Gomez et al (4) proposed models for the electrodeposition of CuInSe2 on glassy carbon electrodes. Y. Sugimoto and L.M. Peter (5) investigated the CdTe electrodeposition on silicon single crystals. Evidence for a 2D nucleation and growth process was obtained. Nevertheless the formation of a quite amorphous deposit was not in favour of an epitaxial growth.We have recently shown that during the CdSe electrodeposition on InP and GaAs, the diffusion control is effective less than 0.1 s after the beginning of the potential pulse (2). The different phenomena associated with the growth of a coalesced film which need at least some seconds, cannot be detected by this technique. We will show that it is necessary

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to associate TEM observations to the kinetical data, in order to follow the evolution of the

film structure during its formation. EXPERIMENTAL CdSe was electrodeposited using a 0.2 M CdSO4 acidic solution (t=80°C) with various amounts of selenous acid (0.5xiO- 3 M
2

[1-exp{NoInkD/A(At-(1-exp-At))}]

[1]

where D is the diffusion coefficient, C the concentration of the diffusive species (selenous acid).and A the nucleation rate paer active site Figure 1 is an example showing the experimental transient (Figure I a) obtained during the CdSe electrodeposition onto a (100) InP surface and the best fitting using the Scharifker model. Figure lb is a RHEED pattern of the CdSe epitaxial layer, obtained after the current transient extended over 25 seconds. In fact the fitting has been achieved with the total current i(t) = il(t) + i2(t), where i2(t) is the double layer charging current according to equation (2): i2(t) = AVd/Rs*exp(-t/RsCd)

[2] where AVd is the amplitude of the potential pulse, Rs the series resistance of the electrochemical cell and Cd the double layer capacity. The experimental current, after removal of the double layer current i2, is presented in the inset (Figure la). Different

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parameters are deduced from the fitting: D = 2.9x10- 5 cm 2 s- 1 , NO = 3.6x10 6 cm- 2 , Rs = 111 92,Cd= 17.1 gFcm- 2 . Figure 2 gives the experimental current transient with the best fitting (Fig. 2a) and the RHEED pattern (Fig. 2b) corresponding to the electrodeposition of CdSe on (i11) GaAs. The parameters which have been deduced from the fitting are the following: D = 7.6x10-5 cm"2, NO = 0.36x10 6 cm" 2 , Rs = 90 Q, Cd = 74 gFcm- 2 . As soon as the experimental conditions depart from the optimum, by a variation of the selenium concentration or that of the cathodic potential, the CdSe epitaxy is disturbed and replaced by a polycristalline growth. Simultaneously the experimental current transients are no longer fitted using the Scharifker model. Such a situation is found in Figure 3 where Vd is stepped at the end of the current plateau (Vd = -1V/SSE). The experimental current transient (Exp) and the best simulation with the Scharifker model (Sch) are given Figure 3a. The polycrystaline growth is demonstrated thanks to the RHEED pattern (Figure 3b). It can be supposed that a polycrystalline growth is accompanied by a strong increase of NO (1010 cm- 2 ). Such a hypothesis is supported by an increase of NO even if the epitaxial growth is weakly disturbed. The transient current could be now fitted by the Cottrell equation (3). i (t) = zFD 1/2nt-1/2t-l1/2 +i lim [3] Figure 3 shows a relatively satisfactory fitting using this equation (Cot). Whatever the mode of growth (epitaxial or polycrystalline) the current diffusion control is effective a fraction of second after the potential has been stepped. At this moment it has been shown (2), thanks to AFM observations, that the film coalescence is not achieved. Stuctural observations are requisite to describe the phenomena associated with the formation of a continuous film. TEM observations of the film growth Epitaxial films. Figure 4 shows TEM observations of epitaxial thin layers electrodeposited on (iii) InP (Figure 4a) and (ill) GaAs (Figure 4b). The electrodeposition process has been stopped 0.5s after the current has been stepped and the mean thickness is around Inm. The kinetical results allow to conclude that the overlap of the diffusion zones is achieved. TEM images reveal the existence of growth steps parallel to [011] directions.and confirm the coalescence of the first nuclei. Nevertheless one observes on these images the formation of new nuclei on the terraces. HREM observations have been also performed. As the CdSe layer is very thin, the image contrast is particularly weak. Figure 5 shows the (220) CdSe lattice planes, edges of steps and triangular nuclei. When the CdSe layer thickness is increased (2nm) the growth steps disappear because of the coalescence phenomena but the nuclei formed on terraces are now easely observed thanks to moir6 pattern phenomena between CdSe and the substrate (Figure 6a).When the mean thickness of the layer reaches 4 nm nuclei are ready to coalesce. Figure 6b is a low magnification TEM image of an epitaxial layer electrodeposited on (111) InP; the density 1 of nuclei is around 8xlO lcm- 2 ; some of them present geometrical shapes. Figure 7 is an HREM image where lattices planes and moird patterns are superimposed. The lattice planes (0.215 nm) are indexed as (220) CdSe. The moir6 patterns are produced when two crystals which have a difference in their lattice parameters and/or their orientation, overlap. If we suppose that the (220) CdSe planes (dl = 0.215 nm) are superimposed to the (220) InP (d2= 0.207 nm) the moir6 fringes have a spacing Dth given by the equation [4]: [4] Dth = d Id2/(d I-d2)

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The theoretical value (Dth )is equal to 5.86 nm. Numerous observations give measured values (Dm) which are clearly smaller (0.5nm < Di< 2.5 nm). In fact equation [4] is valid for parallel moir6s. Figure 7 is an example where a 830 angle is measured between the (220) CdSe planes and the moir6 fringes. This angle ((D) comes from a rotation 0 between the two families of planes. The relation between these angles are the following: Dm = DthcosD [5] 0 = cost/L with L = dl/(dl-d2) [6] In the example given in Figure 7 Dm is equal to 0.767 nm. From the equations [5] and [6] it can be verified that calculated (Dis 82.70, value which is in agreement with the experimental one (83 0); on the other hand 0 equals 2.90. From the observation of numerous moir6 patterns it is found that CdSe nuclei grown on the terraces present misorientations comprised between 2 and 3'. This result is in agreement with the values found for the enlargement of the XRD patterns obtained with CdSe films epitaxied on InP or GaAs: the values of the full width at half maximum are generally found below 40 (2). Non epitaxial films. When the experimental conditions of the CdSe electrodeposition depart from the optimum, by a variation of the selenium concentration or the cathodic potential, the structure of the CdSe films is completely modified, in relation with the absence of epitaxy.During the first moments of electrolysis TEM observations of plan views show that growth steps are missing. On the other hand only few nuclei present moir6 patterns. A large proportion of the nuclei do not present any relation of orientation with the substrate. Figure 8 is relative to a CdSe film prepared at a potential of -1.1 V/SSE. Nuclei observed in this figure do not present, as for the epitaxial one, the (220) planes, normal to the (111) substrate. The HREM image is a projection of atomic columns in a [0il] direction. CONCLUSION Thanks to a severe control of the experimental conditions, epitaxial growth of cadmium selenide on indium phosphide and gallium arsenide has been demonstrated. In the optimal conditions of epitaxy, the analysis of the current transients shows that the best fit is obtained using the Scarifker model, assuming a 3D instantaneous nucleation followed by a rapid diffusion control which is effective less than 0.1 s after the beginning of the pulse. TEM observations of very thin electrodeposits confirm that the coalescence of the first nuclei is achieved. Immeiatly after new epitaxial nuclei appear which coalesce when the the thickness of the deposit reaches 4 nim. The analysis of the moird patterns reveals that these nuclei present small misorientations. REFERENCES 1. H.Cachet, R. Cortes, M. Froment, G. Maurin, J. Solid State Electrochemistry, 1, 100, 1997 2. H. Cachet, R. Cortes, M. Froment, G. Maurin, Symposium Proceedings PV 97-27 "Fundamental aspects of electrochemical deposition and dissolution including modelling" The Electrochemical Society 1997) 3.K.E. Heusler, S. Kusmuth,Electrochemical Society Meeting, Paris, 1997, ext. Abstract No 1150

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4. H. Gomez, R. Schrebler, R. Cordova, R. Ugarte, E.A. Dalchielle, Electrochimica Acta, 40, 267, 1995 5. Y. Sugimoto, L.M. Peter, J of Electroanalytical Chemistry, 381, 251, 1995 6. B. Scharifker, J. Mostany, J. of Electroanalytical Chemistry, 177, 13, 1984

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3.0 -

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Figure 4 TEM image showing groth steps on epitaxial CdSe thin films (d=lnm) a) Electrodeposition on ( 11) InP; arrows indicate nuclei on terraces. b) Electrodeposition on (1 i1[) GaAs.

Figure 5 HREM observation of an epitaxial CdSe thin film (d=lnm) electrodeposited on ( 11i)

InP.

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Figure 6 TEM observations of epitaxial CdSe films electrodeposited on (111) InP. a) d = 2 nm; moir6 patterns. b) d = 4 nm; CdSe nuclei.

observed on an epitaxial film Figure 7 :Moire patterns and (220) CdSe lattice planes (d=4nm) grown on (_111_)InP.

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Figure 8 HREM image of a non epitaxial CdSe nucleus grown on ( 111) InP (d=2nm); atomic columns are projeted on a (110) plane.

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FORMATION OF II-VI AND IlI-V COMPOUND SEMICONDUCTORS BY ELECTROCHEMICAL ALE Travis L. Wade, Billy H. Flowers Jr., Uwe Happek' and John L. Stickney* Department of Chemistry. University of Georgia. Athens, GA 30602-2556 + Department of Physics, University of Georgia, Athens, GA 30602

This paper describes ongoing studies of the electrodeposition thin films of the compound semiconductors CdTe and InAs, using the method of electrochemical atomic layer epitaxy (ALE). Surface limited electrochemical reactions are used to form the individual atomic layers of the component elements. An automated electrochemical flow deposition system is used to form the atomic layers in a cycle. Studies of the conditions needed to optimize the deposition processes are underway. The deposits were characterized using X-ray diffraction, scanning probe microscopy. electron probe microanalysis and optical/infrared absorption spectroscopy.

INTRODUCTION Electrodeposition is becoming a more accepted methodology for the formation of electronic and opto-electronic materials, as evidenced by the damascene methodology for Cui interconnect formation [I]. This suggests that electrodeposition is not inherently incompatible with the manufacturing of devices. Metals of a useful quality can clearly be electrodeposited. The extent to which electrodeposition can be used in the formation of semiconductors is not yet clear. Examples of silicon electrodeposition are few and generally result in amorphous deposits [2-5]. Pourbaix diagrams [6] suggest that Si is far from stable in water, the most desirable medium for electrodeposition, although Ge may be tractable. Significantly more progress has been made in the electrochemical formation of Il-VI compound semiconductors such as CdTe. High efficiency photovoltaics have been borined commercially using electrodeposited CdTe, and several reviews have been published concerning the electrodeposition of Il-VI compounds [7-12.] There has been a recent increase in studies of the formation of CulnSe2 and related chalcopyrite compounds, as they appear to be good candidates for the formation of photo\ oltaics. Electrochemical formation ofa ternary compound presents additional problems, such as increased problems with stoichiometry. The I1l-V compounds have proven more difficult to form then the Il-Vt. or the chalcopyrites. There are very few papers where I1l-V compounds have been formed and still fewer that result in deposits that are better then powders. Considering the majority of methodologies used to electrochemically form compound semiconductors, it is not clear where significant improvements in structure,

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composition and morphology will come from. To this end, the method of atomic layer epitaxy (ALE) [13-181 is being pursued in an electrochemical format in order to increased control over the deposition process. The principle of ALE is that each atonlic layer of a compound is deposited using a surface limited reaction. In this way. twodimensional or layer b) layer growth, is promoted. I se of the word epitaxy in ALE is not necessari ly a result, but a desired outcome. There are numerous factors \which influence whether a deposit will be epitaxial, such as the lattice match between the deposit and substrate. Ihe electrochemical form of ALE makes use of underpotential deposition (UPD). the electrochemical phenomena where an atomic layer of one element frequently deposits on a second element at a potential prior to (under) that needed to deposit the element on itself'. he driving force lbr [Pt) can be thought of as resulting from the free energy of formation of a surface compound. These surface limited reactions are then used in a deposition cycle, where atomic layers of each element are deposited in turn, in order to form a monolayer of the deposit. The number of cycles performed determines the number of compound nionolayers and the thickness of the deposit. One of the main advantages of this methodology is that the electrochemical formation of a compound is broken down into a series of individually addressable steps. Each step in the cycle becomes a point of control over the deposition process. In execution, the process involves the use of different solutions and different potentials for the deposition of each element. One immediate benefit is that the precursors for the different elements do not have to be in the same solution, as they would in the more general co-deposition methodology [7-121 scenario. The solution pH, complexing agents. and depositions potentials can all be optimized for each reactant solution individually, resulting in a high degree of flexibility in the deposition process. The thrust four work is to better understand the limits of electrodeposition as a methodology for comIpound thin film formation: what controls the structure, composition, and morphology of an electrodeposited compound. Studies of electrochemical ALE have fOcused on Il-VI compounds. such as CdTe 112, 19-27], (dSe [24. 28. 29]. (dS [24, 30-3,8. ZnTe [12, 39, 40], ZnSe [12. 40]. and ZnS [12. 40, 41]. 1lowever, there have also been a few studies of the I1l-V compounds,

GaAs [42. 43] and InAs [44]. The studies of GaAs were preliminary, resulting in the formation of only a monolayer of GaAs. There are significant challenges with the formation of GaAs, as the As atomic layers tend to reduce to arsine related species at the same potentials needed to form atomic layers of Ga. Thin films of InAs have, however, been successfully formed. This paper describes present studies of C'dTe and InAs that are ongoing in our group. ( dTe and InAs are the II-VI and III-V compounds for which we know the most concerning their formation using electrochemical ALE.

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EXPERIMENTAL (iiven the repetitive nature of compound formation using electrochemical ALIE. anl automated deposition system was constructed to form films of a reasonable thickness (Figure I) [24]. The cell is a Ag/AgCI reference plexiglass thin laNer flow cell, designed back to form I X 3 cm2 deposits. The cell is presently made of substrate i Plexiglas, with a gasket teflon nut . defining the deposit area and -.-gasket sealing the cell. Gaskets are outlet inlet usually made of silicon rubber, Teflon, or Viton .... .. ... . rubber. The two main \walls ITO counter oftihe thin-lay er cavity are I Figure 1 Thin-layer flow cell used for the formation defined by the ITro counter of deposits by electrochemical ALE. electrode and I flat Au substrate. Solutions are stored in glass bottles, degassed with N2 and pumped into the cell wilth peristaltic pumps. SolutlionI selection was performed using a block of Teflon solenoid controlled valves. The pump heads and solenoid valves were kept in a Plexiglas box. purged with N, to 30 ppm of 0)2. Ihle majority of substrates consisted of 200 nm of Au vapor deposited on Si( 100) waters. \%ith a 10 nm Ti adhesion layer between the Si and Au. They appear mirror like to the eye. but consist of 40 11nm hemispherical bumps. Recently, the Au on Si has been replaced with Au on glass. as it can be flame annealed prior to use. This results in cleaner substrates, as well as substrates with more atomically flat regions. The Ag/AgCCI(3M NaCI) reference electrode from Bioanalytical Systems was kept in the outllow, stream to avoid contamination. The solutions were all prepared with analytical grade reagents, and water from a INanopure water filtration system, \xith t V sterilization, fed bx the house distilled water system. RESULTS AND DISCUSSION CdTe The majority of work on electrochemical ALE, in this group, has concerned the growth of CdTe. The chemistry used in the (d~e electrochemical ALE cycle has generally involved deposition of Cd atomic layers by reductive UPD, while Te atomic layers were formed using somne form of oxidative LIPD. In previously published studies of CdTe deposition using an automated deposition system. [23-251, oxidative Fe t iPD was performed in two steps, initial deposition of bulk Te from a pH 2 solution of HTeO,', followed by reductive stripping in a blank electrolyte solution. Direct reductive Te tIPI), from an ItTeO2+ solution was not thought possible, given the voltamtnetry in Figure 2a and b. Figure 2a is the voltamnmetry of a ALt thin layer electrode [19, 20. 451 with an aliquot of I mM 'Cd>.p-I 4. lhe tJPI) peak is evident around 0.1 V. while bulk deposition does not begin until -0.7 V. Between --0.2 and -0.7 V, reductive current is observed that has been ascribed to the formation of a Au-Cd surtfce alloy. Experience has shown that Cd atomic layers should be deposited near --0.7 V. Figure 2b is

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voltanmmetry for a 0.2 mM aliquot of a pH 2 solution of HTeO,. A clear UPD peak is visible near 0.25 V. while bulk deposition has a peak near -0. I 5 V, with a shoulder near -0.05 V, which has also been associated with a surface limited reaction. A potential near --0.1 V\ Should produce an atomic laN er of' Te without appreciable bulk deposition. That is..rcductive Te UPD from this solution should probably not be performed any more negatively then -0.1 V, half a volt positive of where Cd atomic layers should be deposited. Cd deposited at -0.7 V would oxidatively strip while the Te is deposited at -0. 1 V. This situation led to depositing Te at potentials near --0.7. to prevent stripping of'120 the C(d. and the formation of a small amount of bulk Te. A second step was then used to reductivelC ..... remove the excess fe.

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using the p1- or additives to complex the reactants, the potentials needed to form atomic layers of the component elements can frequently be made similar, facilitating deposition of the cotmpounld.

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()ne of the benefits of changing the solution pH has been an increase in the amount of CdTe deposited each cycle. Using reductive U1PD for both elements has allowed deposition rates of just under I monolayer (NIL) per cycle, in line with simple models of ALE. Previous reports by this group indicated that the best (diTe deposits formed using oxidative Te UPD (with the two step Fe deposition process)

CdT1ELECTRODEPOSIT THICKNESS as a FUNCTION o TT DEPOSITION POTENTIAL

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were only formed at the rate of 0.4 Figure 3: (dle thickness as a function ofihe ML/cycle 125 1,rather that the anticipated I potential Used to deposit the Te atomic layers. ML/cycle. It is still not clear why only 0.4 Ml./cycle was obtained in those studies, however, the older cycle involved significantly Iclore rinsing. Rinsing x\ith the blank electrol\ te, with no ( d- activity, may ha\ e resulted in excessive Cd removal. Studies of the dependence of the old cycle on various cycle variables indicated that the optimal potential ranges were about 0.1 to 0.2 V wide, from graphs of the deposit thickness as a function of the potential used to deposit Te [25]. Figure 3 is a graph of the deposit thickness, in nor, for deposits formed with 200 cycles, as a function of the Te deposition potential using the new cycle. From this graph, the optimal potential range appears to be 0.6 V Wide, between -0.7 and -0. 1 V. There is some %amiability in the thickness. but the deposits \sere of similar quality. Use of Te potentials belows -0.7 V resulted in some bulk Te deposition. Te rich deposits, more then a ML/cycle, and a decrease in deposit quality. U se of Te potentials positive of -0. 1 V resulted in a drop in CdTe coverage, as previously deposited Cd was not stable at such positive Te deposition potentials. (Graphs such as Figure 3 are a good indication of a process controlled by surface limited reactions. The graph indicates that Te atomic lay ers cal be formed using over a 0.6 V range, suggesting excellent flexibility for the deposition conditions. X-ray diffraction patterns of these deposits (Figure 4a) indicate that the, are CdTe. and ha\ e a pie ferential ( I I I ) growth habit. The peak width is significantly, Aider than observed for single crystal CdTe. however. Some of the broadening can be attributed to the lact that the film is only 70 nm thick, however most of the broadening should be attributed to polycrystallinity in the deposit. Reasons for the formation of crystallites instead of one large single crystal film may be many and varied. Presently, efforts are focused on using better substrates. As mentioned in the experimental section, the Au onl Si(l100) substrates consisted of 40 nm Au bumps, roughly hemispherical in cross section (Figure 5a). The substrates are thus composed of a vast number of monoatomic Au steps, accounting for a significant defect density. The Au planes of'the substrate base been shownt to be predominately (I ll). and CdTe( Ill) deposits have a 3:2 lattice match on these surfaces. For every three unit cells of the ALi there are two of the CdTe (zinc blonde). Ho\seveer, even vith the 3:2 match, there is still a relatively large. 5 %. latticc imismatch, suggesting interfacial strain and defect formation.

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A

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micrographs (TEM) of 70 1nmthick CdTe deposits have shown the presence of 70 nm thick grains, with excellent structure [126]. This suggests no inherent problem with electrodeposition process. but that the deposit polycrystallinity originates

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froml substrate defects and the lattice mismatch. Figure 5a is a scanning probe image of a typical Au on Si(f100) substrate, x\ while 5b is of 200 cycles of ('dTe deposited on top. 'Te deposit is not conformal under these conditions. higher roughness than the sho wving substrate. Again, this probably results "from the fact that the apparently smooth Au bumps in Figure 5a are really composed of short Au tcrracesIsteps. Defect formation at step edges is expected in the formation of a compound deposit oti an elemental substrate [46].

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Patterns are for as deposited filns, no Optical characterization of the anaig using performed deposit w\as reflectance measurements, and a plot of (ahv)2 vs. energy is shown in Figure 6a. By extrapolating the near edge data, a hand gap of 1.55 eV was estimated for this material, consistent with the literature.

InAs As mentioned in the introduction, very little progress has been made in the electrodeposition of Ill-V thin films. Some studies of the formation of GaAs using electrochemical AI[ were performed early on [42. 43]. Ga reactivity proved too great for the hardware used at that time, and thin films were not fbmsed. Recent work x,ith electrochemical ALE on Ill-V compounds has focused on the growth of InAs. as In is significantly less reactive then Ga. Vohtamtmetry for As203 and In>' solutions, using Au substrates and tile thin-layer flow cell (Figoure I) are shown in Figures 2d and 2e respectively. The In voltamlsetry shows a small IPD feature at -0.2 V. Bulk deposition starts near -0.4 V. and slso\s evidence of a nucleation phenomena. where tlie reduction current gets very large near0.6 V, but does not climb back to zero current until -0.4 V on the subsequent positive going scan. This suggests that an overpotential is required to initiate nuclei formation. and once they are formed, deposition can occur at a reasonable rate near the formal potential (about -0.4 V). Two oxidative stripping features are observed. one for bulk In at -0.3 V and one for JPD at -0. 1 V.

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Arsenic deposition starts about -0.1 V, with a peak that might be interpreted as a UPI) feature. The peak is followed by a kind of plateau where the current remains low and relatively steady until nearly -0.8 V, after which the reduction current increases rapidly. The plateau appears to result from slow kinetics for As deposition, as mass transfer limitations would not be expected for the 5 mM solution. The charge for the UPD feature corresponds roughly to the formation of an As atomic layer. The increase in reduction current below -0.7 V appears to result from hydrogen As 20 3 to evolution, and reduction of As and AsH3. Previous studies have shown that at potentials lower then about -0.9 V, As deposition greater than a ML is not observed. Excess As appears to be converted to AsH 3 [42]. On the subsequent positive going scan (Figure 2d), all the As, bulk and UPD, are oxidatively stripped in one peak.just before 0.1 V. The cycle used to form InAs starts out with potentials suggested by the voltalmmetry shown in Figure 2d and 2e. However, the charges associated with formation of atomic layers of In and As quickly diminish, and no visible deposit is formed. More negative potentials can be used to form the atomic layers, where one atomic layer of each element is deposited each cycle, however the first ten or so cycles result in much more than the growth of single atomic layers. Such cycles were used initially [44] to form films, and those films were characterized by a relatively rough morphology, with a number of Micron sized crystals distributed across the surface. The rough morphology appears to result from using potentials in the bulk deposition range, where three-dimensional

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Au vapor deposited on Si(100), B) 100 potentials as tile deposition takes place. The cycle deposit of CdTe on Au on Si, C) 200 potentials needed for UPD of the elements on cycle deposit of tnAs on Au on Si. Au, and then on each other, shift as the deposition proceeds. It is suggested here that as the compound semiconductor is formed, a rectifying junction forms between the InAs

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deposit and tile ALu. The potential inherent at the junction is accounted for in the potentials applied to form the atomic lavers. Thus the present methodology is to start at potentials such as those suggested by Figures " 2d and 2e, and then to shift the potentials negatively as the film grows. The deposition charge call be used to monitor deposit growth, suggesting changes to the deposition potentials. This procedure dramatically improved the deposit quality.

3.0 CdTe 190nm Thickness Gold on Silicon 2.5 Band Gap EG.55 eV 2.0 -Experimental 1.5

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Aln X-ray diffraction (XRD) Figure 6: Reflectance data plotted to determine the pattern of one of the early deposits deposit band gap. A) 200 cycles of CdTe, B) 500 cycles is shown in Figure 4b. A small of [hAs. peak for In is evident in the unannealed deposits. However, elemental coverage data from electron probe microanalysis (EPMA) indicated that the deposit was rich in arsenic, not In. Evidently, the excess As is not crystalline, so that it does not show up in XRD, while tile In is crystalline, and does show up. The extent of the In peaks in the XRD and the amount of excess As. fromn EPMA, are a function of the cycle used, and optimization of the cycle is ongoing. Reflection IR measurements were obtained from these films, and a plot is shown in Figure 6b. The measured band gap was 0.44 eV. to be compared with the 0.36 eV lbr the bulk compound. Reflection IR has proven to be a very simple way of monitoring for the presence of InAs in the deposits.

ACKNOWLEDGEMENTS Support from the National Science Foundation, Division of Materials Research is gratefully acknowledged, as is support for Travis Wade by UGARF at the University of Georgia.

REFERENCES I1. 1p.C. Andricacos. C. I.zoh. J. 0. Dukovic. J. Horkans, and H. Deligianni, Ibml Journal of Research and Development 42. 567 (1998). 2. C. H. Lee and F. A. Kroger, J. Electrochern. Soc. 129, 936 (1982). 3. P. Rani, J. Singh, T. R. Ramamnohan, S. Venkatachalam, and V. P. Sundarsingh, J. Mater. Sci. 32, 6305 (1997). 4. P. R. L. Sarma, T. R. R. Mohan, S. Venkatachalam, J. Singh, and V. P. Sundersingh, Materials Science and Engineering B-Solid State Materials For Advanced Technology 15, 237 (1992). 5. P. R. L. Sarmna. T. R. R. Mohan. S. Venkatachalamn, V. P. Sundarsingh. and J. Singh. .1.Mater. Sci. 27, 4762 (1992).

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6. 7. 8. 9. 10. I1. 12. 13. 14. 15. 16. 17. 18. 19. 20. 21. 22. 23. 24. 25. 26. 27. 28. 29. 30. 31. 32. 33. 34. 35. 36. 37. 38. 39. 40.

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41. 42. 43. 44. 45. 46.

L. P. Colletti, R. Slaughter, and J. L. Stickney, I. Soc. Info. Display 5. 87 (1997). 1. Villegas and S. I.L., J. Electrochem. Soc. 139:686 (1992). 1. Villegas and J. L. Stickney, J. Vac. Sci. Technol. A 10, 3032 (1992). T. L. Wade, B. H. Flowers Jr., 1.Garvey, U. Happek, and J. L. Stickney. .1. Electrochem. Soc.. submitted (1999). 13. Gregory, M. L. Norton. and J. L. Stickney, J. Electroanal. Chem. 293. 85 (1990). S. Strite. M. S. Untu, K. Adomi, G.-B. Gao, A. Agarwal, A. Rocket, 11.Nlorkoc. D. Li, Y. Nakamura, and N. Otsuka, ,J.Vac. Sci. Technol. B 8, 1131 (1990).

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ELECTROSYNTHESIS OF THERMOELECTRIC MATERIALS BY ELECTROCHEMICAL ATOMIC LAYER EPITAXY: A PRELIMINARY INVESTIGATION Curtis Shannon, Anthony Gichuhi Department of Chemistry and Peter A. Barnes, Michael J. Bozack Department of Physics Auburn University Auburn, AL 36849-5312 The use of electrochemical atomic layer epitaxy for the electrosynthesis of high quality thin films of thermoelectric materials is studied. Specifically, the use of sequential underpotential deposition (upd) cycles of Sb and Co for the production of CoSb phases on Au substrates is investigated. Stable atomic layers of Sb can be formed on Au, and were imaged for the first time by STM. These layers consist of randomly distributed islands of Sb with a mean diameter of 5.5 nm and a mean height of 0.35 nm. Co upd layers appear to form in situ on Au, but do not survive transfer to the Sb deposition solution. In contrast, stable upd layers of Co can be produced on the Sb/Au surface. In addition, there is a 180 mV positive shift of the Co upd formal potential to more positive values, suggestive of the formation of a stable CoSb phase. INTRODUCTION Research on thermoelectric materials has experienced a considerable resurgence in the past five years driven by three underlying concerns: 1) the environmental impact of freonbased cooling technologies, 2) the generation of electrical power from so-called 'waste' heat in automobiles, and 3) the active cooling of modern electronic device components. In order for a material to be an efficient thennoelectric cooler, it must possess a large thermoelectric figure of merit, Z, which is defined by equation 1. 2

S z = --

1(p

[I]

In this equation, S is the Seebeck coefficient, p is the resistivity (p =1/ ,, where o'is the electrical conductivity), and icis the thermal conductivity. Metals are typically poor thermoelectrics because of a low Seebeck coefficient and a large contribution to the thermal conductivity by the conduction electrons. In contrast, insulators have a large Seebeck coefficient and a small electronic thermal conductivity, but the carrier density is low, leading to a high resistivity. Mahan, et al. have shown that a carrier density intermediate between that of a metal and that of an insulator is optimum (N-10"9 cm-3 ) (1). Typically, doped semiconductors make the best thermoelectrics.

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Materials such as the Bi 2TefSb2Te 3 alloys, which are used in commercially available Peltier coolers, exhibit the largest known thermoelectric figure of merit at room temperature (ZT-~). Although it has been suggested that the maximum possible value of ZT is about 14 (2), it has proved difficult in practice to increase Z by engineering materials properties alone. A notable exception is the class of materials known as the 'skutterudites' (3). One reason for this is that in many instances increasing S leads to a concomitant increase in resistivity. Furthermore, an increase in electrical conductivity leads to an increase in the electronic contribution to the thermal conductivity. Several strategies based on novel device architectures have been developed in an effort to improve overall thermoelectric efficiency, one of the most promising of which is the use of quantum well superlattices. In certain superlattice systems, the electrical conductivity through the wells is dramatically increased due to an increase in the density of electronic states in the two dimensional system. At the same time, in a layered structure such as a superlattice, thermal conductivity is decreased due to enhanced phonon scattering at interfaces. Hicks, et al. have shown that a significant increase in the figure of merit can be achieved using quantum well superlattices synthesized by molecular beam epitaxy (4). Layered nanostructures can be deposited from the electrochemical environment by applying a time dependent voltage program to the working electrode (5) or by using a sequential deposition scheme such as electrochemical atomic layer epitaxy (EC-ALE) (610). In EC-ALE, a surface-limited electrochemical reaction, such as underpotential deposition (upd), is used to synthesize a binary compound by successive deposition of each element fiom its respective solution precursor. EC-ALE is an attractive electrosynthetic alternative to conventional deposition methods that is inexpensive, operates at ambient temperature and pressure and provides precise film thickness control. This technique promises to overcome many problems associated with other electrosynthetic approaches, such as the formation of highly polycrystalline deposits and interracial interdiffusion. For example, we have recently used EC-ALE to fabricate stable semiconductor heterojunctions with extremely abrupt interfaces (11). In this paper, we investigate the use of EC-ALE to synthesize thin films of CoSb phases with an aim toward the production of layered structures of these materials for use in thermoelectric applications. If successful, such an approach will lead to thin films with enhanced thermoelectric efficiencies, while at the same time keeping the production cost of the device low.

EXPERIMENTAL

Single crystal Au(I 11) substrates were prepared according to previously published literature methods (12). Briefly, a 0.2-1.0 mm polycrystalline Au wire (Alfa-Johnson Matthey, 99.999%) is flame annealed into a microbead in an Ar-sheathed H2-O flame. The microbead is zone refined in the flame to reveal several elliptical (111) facets whose major and minor axes measure approximately 1000 trtm and 500 .tm, respectively. Immediately following removal from the flame, the Au microbead is submerged in ultrapure water to protect the surface from contamination. These substrates can be easily aligned for STM imaging using a low magnification optical microscope.

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All reagents were used as received without further purification. All solutions were made using Millipore Q 18.2 MQ-resistance water and were purged for 20 min with ultra high purity (UHP) Ar to remove dissolved 02. Cyclic voltammetry was performed using a Pine AFRDE-5 bipotentiostat and an HP7055 X-Y recorder. The flow-through electrochemical cell consisted of a three-electrode configuration: the Au microbead as the working electrode, a Pt wire as the auxiliary electrode, and a Ag/AgCI (3 M NaCI) as the reference electrode to which all potentials are referred. All depositions were carried out from pressurized solution reservoirs made of Teflon or Kel-F. The electrochemical cell was directly connected to the solution-handling manifold that allowed the electrolytes to be changed without the electrode being exposed to the laboratory ambient. It should be noted that in all experiments, no attempt was made to record the voltammetry of an isolated (11) facet; thus, the voltammetric signal originates from the entire polycrystalline microbead. Underpotential deposition of Sb was carried out from a 0.05 M H2S0 4 electrolyte that was 0.5 mM in Sb 2 0 3 . Underpotential deposition of Co was carried out from a 0.10 M NaCI/HCI electrolyte containing 1 mM Co(C1O 4 ) 2. The pH of this solution was 3.45. All scanning tunneling microscopy experiments were performed under ambient conditions using a Model SA-1 STM (Park Scientific Instruments, Sunnyvale, CA). Atomic- and micron- scale images were acquired using both constant height and constant current modes; the exact tunneling conditions are given in the figure captions. W tips, used in the atomic scale images, were prepared by etching a 0.5-mm diameter wire in 1 M KOH solution using a model TE-100 STM Tip Etcher (Park Scientific Instruments). Pt:lr (90:10) tips, cut at a 450 angle, were used for the micron scale images. In all cases, the sample was biased positive relative to the tip. The x-y plane calibration was perfonied using two different standards: highly oriented pyrolytic graphite (HOPG, donated by Dr. Arthur Moore, Union Carbide, Parma, OH), and a Au(l 11) single crystal in which the interatomic distance of Au is 0.29 nm. The calibration of the piezo in the z-direction (i.e., normal to the plane of the surface) was carried out using the Au atomic step height (0.24 nm). Unless otherwise stated, all images presented are unfiltered. Auger electron spectra (AES) were collected with a conventional single pass cylindrical mirror analyzer system. Samples were briefly exposed to atmospheric conditions while being loaded into the AES system, however, no evidence for surface contamination was observed in any of the measurements. All AES measurements were performed on 1.0 x 1.0 cm Au foils.

RESULTS AND DISCUSSION Underpotential deposition of Sb Figure I A shows the voltammetric response of a Au microbead electrode in contact with a 0.5 mM Sb 20 3 in 0.05 M H2SO, supporting electrolyte. The cathodic and anodic limits are -0.400 V and 0.400 V, respectively, and the scan rate is 0.100 V sec-'. Two cathodic and three anodic waves are observed in this i-E trace. The most negative cathodic wave at -0.210

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V is assigned as the diffusion-limited reduction of Sb2 0 3 , while the feature at -0.042 V

corresponds to the reduction of an adsorbed Sb 2O 3 species. The peak current in the wave at -0.042 V displays a linear dependence on the sweep rate, as expected for the reduction of a surface-bound species, Figure lB. Although not shown, it should be noted that the peak current in the bulk wave displays the expected linear dependence on the square root of the scan rate. Our assignments are also consistent with the earlier report of Rhee and coworkers on the Sb/Au system (13). Formally at least, the cathodic process corresponds to the three electron reduction of Sb 2O3 to Sbd,.

Sb 2 0 +±6H++6e- (=- 2Sb.,, +3H

20

[2]

Three well-defined, sharp voltammetric waves are observed when the electrode potential is swept anodically from the cathodic limit. The first of these, which occurs at -0.105 V, is assigned as the stripping of bulk Sb based on the observation that the peak current is extremely sensitive to the cathodic switching potential. Specifically, ip increases as the switching potential is made more negative and decreases when the switching potential is made more positive. The remaining two anodic features, at 0.000 V and 0.147 V, respectively, are assigned as stripping of Sb atoms bound to the Au surface (i.e., stripping of a contact adsorbed monolayer of Sb atorns). The peak currents observed for these waves are independent of the cathodic switching potential. In addition, in both cases, the peak currents exhibit a linear dependence on the scan rate, consistent with the stripping of a surface bound species. The scan rate dependence of the peak current for the 0.147 V peak is shown in Figure lB. In an effort to assess the stability of the adsorbed Sb monolayer to emersion and transfer to a different supporting electrolyte, as well as the tendency of the electrodeposited Sb to alloy with or diffuse into the underlying Au, the following experiment was performed. First, a clean Au electrode was immersed in the Sb deposition solution and scanned to a cathodic limit of -0.150 V, at which potential the electrode was emersed into an Ar atmosphere and immediately transferred to pure electrolyte (0.05 M H2SO4 containing no Sb 20 3), Figure 2A. The electrode potential was then swept anodically at 0.100 V sec and the stripping current recorded, Figure 2B. The peak potential of the large stripping wave is 0.140 V, identical within experimental error to what was observed in the presence of Sb20 3. In addition, the charge density under this wave was found to be 170 uC cm-2 . Assuming an electrosorption valency of 3, which is reasonable given the similar work functions of Sb (4.55 eV) and Au (5.1 eV), this charge density corresponds to a coverage of 0.25. Finally, Auger electron spectroscopy experiments were carried out to confirm the presence of Sb on the surface of the electrode. A typical spectrum is shown in Figure 3. The characteristic Sb transitions are clearly observed in this spectrum. The structure of the electrode surface prior to and following Sb electrodeposition was investigated using scanning tunneling microscopy (STM). Figure 4A shows a representative 0.41 Lm x 0.41 um STM image obtained from a single Au(1 11) facet after flame annealing. Atomically flat Au( Ill) terraces separated by single Au atomic steps (0.24 nm in height) are observed. Following deposition of Sb, the surface morphology is characterized by a large number of pits and small protrusions as shown in Figure 4B. The pits are generally triangular in shape and are all oriented in the same direction. The observation of oriented pits is the characteristic signature of atomic level corrosion of Au(l 11). Similar structures

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are observed in CN- solutions, for example (14). Corrosion initiates at surface defects and propagates by lateral expansion of the pit nucleus. Small triangular pits are also characteristic of the formation of Au vacancy islands during the adsorption induced lifting of the (23x',3) reconstruction of Au(l 11). Similar structures are observed, for example, in alkanethiolate monolayers formed by self-assembly (15). Interestingly, the pits we observe tend to be of two distinct sizes, with lateral dimensions of ca. 0.1 urn and ca. 5 nm. It is possible that the smaller pits are Au vacancy islands and that the larger pits are due to a corrosion process. On the other hand, although there is a wide variation in pit diameter, the pits are all characterized by a uniform depth of 0.24 nm (i.e., the Au atomic step height). In contrast, the protrusions are much more narrowly distributed in size. Specifically, we observe a mean diameter of 5.5 nm and a mean height of 0.35 nm for these features. On the basis of our electrochemistry, AES and imaging experiments, we believe these structures to be islands of Sb. The formation of randomly distributed islands is in contrast to what is typically observed for a upd atomic layer. Most upd layers are characterized by the formation of large, well-ordered domains across the surface. Low coverage phases are characterized by a low packing density, not by island formation. The tendency of Sb to form islands on Au may be the result of the very similar work functions for the two materials and a large lattice mismatch. It is well known that the work function difference between the deposit and the substrate plays a role in the stability of a upd monolayer (16, 17). In order to test this hypothesis, we are currently investigating the formation of Sb atomic layers on Pt electrode surfaces (the work function of Pt is 5.65 eV). Underpotential deposition of Co The voltammetric response of a Au electrode immersed in 1 mM Co(CO10) 2 in NaCI/HCI supporting electrolyte is shown in Figure 5A. Two reductive waves can be seen in this voltammogram, at -0.660 V and -0.820 V. The more negative wave is assigned as the

diffusion-limited reduction of Co'*to Co.,,. Although the nature of the wave at -0.660 V has not been firmly established at present, it may correspond to the formation of a Au/Co alloy. When the upd region of this voltammogram is expanded, a voltammetric feature attributable to Co upd is observed, Figure 5B. A linear dependence of the peak current on the scan rate is evident from the data set. Stripping and AES experiments indicate, however, that this layer is not stable to emersion or to electrolyte transfer. Only when potential excursions are made into the bulk deposition region is there any evidence of Co electrodeposition from Auger spectroscopy. On the other hand, when a layer of Sb is electrodeposited on Au as described above, followed by the deposition of Co, the Co layer appears to be stable. A representative cyclic voltammogram in the upd region is shown in Figure 6. The most noteworthy feature of this voltammogram is the 180 mV positive shift of Eý in the presence of adsorbed Sb (as compared with naked Au), which suggests the formation of a stable CoSb phase tinder these experimental conditions.

CONCLUSIONS

Stable atomic layers of Sb can be formed on Au surfaces using EC-ALE. These electrodeposited monolayers consist of a random distribution of Sb islands with a mean diameter of 5.5 nm, a mean height of 0.35 nm and an apparent coverage of 0.25. In addition, there appears to be significant pitting of the Au(1 11) terraces as a result of corrosion and

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Au vacancy island formation during Sb electrodeposition. Although, attempts to deposit atomic layers of Co onto naked Au surfaces at underpotential were not successful, stable Co upd layers can be formed on the Sb/Au surface. The chemical nature of the CoSb phase formed is under investigation, and will be reported on in the near future. ACKNOWLEDGMENTS The Petroleum Research Fund (administered by the American Chemical Society), the National Science Foundation and Auburn University are gratefully acknowledged for their financial support of this work. We thank Mr. Igor Nicic for his help in the preparation of some of the samples. REFERENCES (1) G. D. Mahan, B. C. Sales and J. Sharp, Physics Today, 50, 42 (1997). (2) G. D. Mahan and J. 0. Sofo, Proc. Natl. Acad. Sci. USA, 93, 7436 (1996). (3) B. C. Sales, D. Mandrus, and R. K. Williams, Science, 272, 1325 (1996). (4) L. D. Hicks, T. C. Harman, X. Sun and M. S. Dresselhaus, Phys. Rev. B, 53, R10493 (1996). (5) J. A. Switzer, C.-J. Hung, L.-Y. Huang, E. R. Switzer, D. R. Kammler, T. D. Golden, and E. W. Bohannan, J. Am. Chem. Soc., 120, 3530 (1998). (6) B. E. Hayden, 1.S. Nandhakumar, J. Phys. Chem. B, 102, 4897 (1998). (7) L. P. Colleti, B. H. Flowers, Jr., J. L. Stickney, J. Electrochem Soc.,145, 1442 (1998). (8) M. L. Foresti, G. Pezzatini, M. Cavallini, G. Aloisi, M. Innocenti, and R. Guidelli, J. Phys. Chem., 102, 7413 (1998). (9) D. W. Suggs and J. L. Stickney, Surf. Sci., 290, 362 (1993). (10) A. Gichuhi, B. E. Boone, U. Demir, C. Shannon, J. Phys. Chem. B, 102, 6499 (1998). (11) A. Gichuhi, B. E. Boone, and C. Shannon, Langmuir, 15, 763 (1999). (12) U. Demir and C. Shannon, Langrtiuir, 10, 2794 (1994). (13) G. Jung and C. K. Rhee, J. Electroanal. Chem., 436, 277 (1997). (14) F. P. Zamborini and R. M. Crooks, Langmuir, 13, 122 (1997). (15) G. E. Poirier, Langmuir, 13, 2019 (1997). (16) D. M1.Kolb, Advances in Electrochemistry and Electrochemical Engineering, H. Gerischer and C. W. Tobias, Editors, vol. 11, p. 125, Wiley lnterscience, New York, (1978). (17) K. Juttner and W. J. Lorenz, Z. Phys.Chem. N. F., 122, 163 (1980).

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FIGURES

A

B

Ca

O

20

40 60 80 100 120 Scan rate (mV/sec)

-0.4 0.4 Potential (V vs Ag/AgCl)

Figure 1. (A) Cyclic voltammetry of an Au electrode in 0.5 mM Sb,O3 in 0.05 M HSOC supporting electrolyte. The sweep rate is 0.100 V sec-' and the electrode area is 0.09cm-. (B) Peak current as a function of sweep rate. See text for details.

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20 pA

I I -0.4 0.4 Potential (V vs Ag/AgCI)

A

2O A

B

I -0.4 0.4 Potential (V vs Ag/AgCI)

Figure 2. (A) Reduction of a monolayer of Sb 2O,. The electrode was immersed at 0.400 V and emersed at -0.150 V. Other conditions as in Figure 1. (B) Stripping of Sbhal after transfer to pure electrolyte (0.05 M HSO4 ). Experimental conditions as in Figure 1.

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AU:

Sb Sb S Subvey C 1 LSb ........ . ....... ............... ...... ...... ...... .................. ..... . .. . . . . . . ......... Au

Au

..............................

c 0

-200.66

................. 1:AES Survey 1 ML Sb As Received

t: C c

.. ... ... ... ... ... .... ... ... ... ... ..................................... -4... 08. ....... -400 .. ....

....................................

Au

206

400 Kinetic Energy

666 (eV)

Figure 3. Auger electron spectrum of a Au electrode onto which a single Sb monolayer was deposited. Experimental conditions as in Figure 2A.

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-0.1

PJM

Figure 4. STM images (0.4 pm x 0.4 pm) of a Au electrode (A) prior to and (B) after deposition of a Sb monolayer.

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B

A 25 pAI A

-.35 0 Potential (V vs Ag/AgCI)

-0.9 0.0 Potential (V vs Ag/AgC1)

Figure 5. Electrodeposition of Co. (A) Survey scan showing bulk deposition. (B) Underpotential deposition region.

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2.5p A

A

0.2 Potential (V vs Ag/AgCI)

1.B

0.2 -0.3 vs Ag/AgC1) Potential (V

Figure 5. Electrodeposition of Co on Sb/Au. (A) Underpotential deposition region. (B) Stripping in pure electrolyte.

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CdS AND ZnS DEPOSITION ON Ag(l11) BY ELECTROCHEMICAL ATOMIC LAYER EPITAXY M. Innocenti, G. Pezzatini, F. Form and M.L. Foresti* Dipartimento di Chimica, Universiti. di Firenze, Via G. Capponi, 9, 50121 Firenze, Italy

ABSTRACT

We applied the Electrochemical Atomic Layer Epitaxy (ECALE) methodology to obtain deposits of CdS and ZnS on Ag( 11), by alternate underpotential deposition of the elements forming the compound. The amount of the elements deposited, determined by their stripping, always yielded the stoichiometric 1:1 ratio. An automated electrochemical deposition system making use of a simple distribution valve is described.

Introduction

Recent work in our group is devoted to the growth of thin-film compound semiconductors on silver single crystals by Electrochemical Atomic Layer Epitaxy (ECALE). Stickney and co-workers developed this method to obtain low-cost production of structurally well-ordered 1t-VI and III-V compound semiconductors on gold [1-3]. The method is based on the alternate electrodeposition of atomic layers of both elements, making op the compound at underpotential. Underpotential deposition is a surfacelimited phenomenon, so that the resulting deposit is generally limited to an atomic layer. A monolayer of the compound is obtained by alternating the underpotential deposition of the metallic element with the underpotential deposition of the non metallic element in a cycle. The thickness of the deposit is determined by the number of cycles, thus the ECALE cycle can be repeated as many times as necessary to obtain deposits of practical importance.

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The method requires the definition of precise experimental conditions. such as potentials. reactants, concentrations, supporting electrolytes. pH, deposition times and the possible use of complexing agents. These conditions are strictly dependent on the compound one wants to fbrm and on tile substrate used. We found the conditions to grow practically all Il-VI compound semiconductors and are now beginning to study the II1-V compounds.

The substrate that has been used tIp to now is Ag(lll), namely a single

crystal to ensure the maximum probability for the epitaxial growlh. InI a previous paper we described the experimental conditions needed to obtain up to 5 sulfur layers and 4 cadmium layers of CdS. Sulfur layers were obtained by oxidative underpotential deposition fromn sulfide ion solutions [4-6], whereas cadmium layers were obtained byireductive underpotential deposition from cadmitim ion solutions [7]. Both precursors were dissolved in pyrophosphate plus sodium hydroxide of pH 12. The high pH was used to shift the hydrogen evolution towards very negative potentials. in order to evidence the whole underpotential oxidation process of sulfide ions which takes place between -1.35 and -0.8 V/SCE. A strong complexing agent such as phyrophosphate was used to keep cadmium ions ill solution at this high pH. This paper describes the growth of thicker deposits of CIdS, up to 150 deposition cycles, obtained with the use of an automated system. The morphologies of the deposits were examined by SEM. The paper also describes the conditions to obtain ZnS. The experimental conditions for CdS and ZnS growth on silver are different from those required on gold [8-10]

Experimental Nlerck analytical reagent grade 3CdSO 4 8H20, and Aldrich analytical reagent grade NaS were used without further purification. Merck analytical reagent grade lIC10

4

and

NH3 were used to prepare the p11 9.2 ammonia buffer. The water used was obtained fiom light mineral water by distilling it once and by then distilling the water so obtained fromn alkaline perinanganate while constantly discarding the heads. The solutions were freshly prepared just before the beginning of each series of measurements. The working electrodes were silver single crystal discs grown in a graphite crucible, oriented by X-rays and cut

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according to the Bridgman technique [11]. These electrodes were polished with successively finer grades of alumina powder down to 0.3 m (Buehler Micropolish II) and then annealed in a mnuffle furnace under vacuum for 30 ruin at 650'C. Before measurements, the electrode was polished chemically with Cr0 3 according to the procedure described in Ref. 12. After polishing, the electrode surface was soaked in concentrated sulfuric acid for about 20 min and then rinsed thoroughly with water. The heart of the automated deposition apparatus is the distribution system. This consists of Pyrex solution reservoirs, solenoid valves and a distribution valve. Figure I shows the distribution valve which, for simplicity, was limited to 3 solution inlets. The distribution valve is entirely made of Teflon and was designed and realized in the workshop of our Department. The solutions contained in the Pyrex reservoirs are previously deairated, and then constantly kept tinder a pressure of Argon of about 0.3 atm. The piston is tightly held by a spring to block the inlet of the solution and can be raised opening the solenoid valve and by sending compressed air at 6 atm, that is at a pressure higher than that exerted by the spring. By acting on the corresponding solenoid valves, the different solutions are pushed to the cell following the desired sequence. The pressure of 0.3 atm exerted on the solutions determines a flow-rate of about I ml s-1. All operations are carried out tinder computer control. The electrochemical flow-cell shown in Fig. 2 has been developed from a similar cell described in a previous paper [13]. The cell is a Teflon cylinder with about a 5 mm inner diameter and a 30 mmun outer diameter. The working electrode is housed in a special cavity at one end of the cylinder, and the counter electrode is a gold foil placed at the other end. The inner volume of the cell is about 0.5 ml. The whole system is clamped between two external plexiglass discs by means of three screws. Electrical contact with the working electrode was made using a silver wire, held by a silicone plug. Leakage is avoided by pressing both the working and the counter electrode against a suitable Viton® o-ring. The inlet and the outlet for the solutions are placed on the side walls: for hydrodynamic reasons, the inlet of the solution is inclined. The reference electrode is placed on the outlet tubing. All potentials are referred to the saturated calomel electrode (SCE).

Results

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The formation of a compound fromn its constituent elements is an energetically favorable process. The negative free energy change involved in the process is the principal reason for the occurrence of the UPD of Cd or Zn on the previously deposited sulfur, and vice-versa. This fact is clearly shown when comparing the underpotential deposition of zinc on a Ag(l 1I) substrate covered by the different chalcogens: the more negative the heat of formation, the more positive the potential at which UPD occurs. (Fig. 3).

yclic voltamlnograms in the figure were recorded in ammonia buffer of pH 9.2ý in

this supporting electrolyte, bulk Zn electroreduction takes place at about M-.15V and is scarcely influenced by the substrate used. Apart from the potentials of deposition, a similar trend is observed

for Cd. The choice of ammonia buffer instead of the

pyrophosphate employed previously (rif CdS) was made to standardize the supporting electrolytes used for the growth of all cadmium and zinc chalcogenides. As a matter of fact. phyrophosphate is a strong complexing agent necessary to keep meat ions in solutions when using supporting electrolytes of pH as high as 11. As a consequence, both bulk and underpotential deposition of the complexed metal are shifted towards potentials which are more negative than the potentials of deposition of the uncomplexed metal. ltowever. zinc deposition from pyrophosphate solutions takes place at more negative potentials than those required for chalcogen deposition. Thus, a weaker complexing agent. such as ammonia, has been adopted. The lower pH. 9.2. of ammonia buffer employed. simply prevents the observation of the whole UPD process of sulfur, due to the anticipated hyd rogen evolutiion. Figure 4a shoxks the oxidative sulfur underpotential deposition from Na2S in ammonia buffer solution, carried out by scanning the potential from -1.15

to -0.75 V.

Proceeding further towards more positive potentials in the presence of sulfide ions would cause bulk sulfur deposition. The large anodic peak in the figure marks the transition from a (W/3x-',3)R30° structure to a more compact I \17x 7)RI9.10 structure [6]. The charge associated Nwith the latter structure, calculated by assuming that the oxidation of oite sulfide ion involves Mto electrons, is equal to 189 [IC cm' 2. The calculated charge is in good agreement Nsith that determined by integration of the voltammetric peaks. As already stated, the use of ammonia buffer solutions partially obliterates the ITPD of sulfur: however, the charge, 55 pC cm-',. associated with the anodic peak at E=-0.83V

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coincides with the charge measured for the corresponding peak obtained in solutions of higher pH. Figure 4b shows the reductive underpotential deposition of Zn on a S-covered Ag( IlI) substrate, and Figure 4c shows the similar Cd deposition. This latter shows the beginning of a second tJPD peak. The second UPD peak cannot be completely recorded, since it overlaps sulfur deposition. However, it can be evidenced by keeping the electrode at -0.75 V to accumulate Cd on the electrode, and by then anodically stripping the deposit. The stripping peaks of Cd recorded after keeping the electrode at -0.75 V for 30, 60, 120 s have a constant height, only slightly higher than that of Fig. 4c, thus ensuring that the process is surface-lilmited. The second UPD peak cannot be ascribed to a deposition occurring on silver areas uncovered by sulfur, since the potential of the UPD of Cd on the bare Ag(1 11) substrate lies just in the middle of the two UPD's of Cd on Scovered Ag( lll). The experimental charge measured by integration of both peaks is -2

equal to 180 pLC cm , whereas the charge measured for the first UPD peak is equal to about 70 p.C cln-2 . Figure 4 exemplifies the conditions for an ECALE cycle for both ZnS and CdS formation. As a matter of fact, a single ECALE cycle restilts from the combination of the non-metallic element UPD with the IJPD of the metallic element, with an intermediate step consisting of washing the cell with the supporting electrolyte to avoid any possible chemical reaction. Thus, ZnS growth was obtained by depositing sulfur at -0.75V from a Na2 S solution, washing the cell, injecting the zinc solution while keeping the electrode at the same potential, waiting 30 s to deposit Zn underpotentially, washing the cell, and repeating this cycle as many times as desired. CdS growth was obtained in a similar way. [he amount of the elements deposited in a given number of cycles was quantitatively determined from the charge involved in the anodic stripping of the metallic element. and subsequent cathodic stripping of the non- metallic element at a sweep-rate low enough to ensure the complete dissolution. Figure 5a and 5b show the stripping peaks of I to 10 Zn layers and I to 20 Cd layers, whereas Figure 5c shows the subsequent stripping curves of sulfiur relative to both metal sulfides. Once all of the metallic element has been stripped anodically, the remaining sulfur layers, except for the first, behave like bulk sulftir: hence during the following reductive stripping they are reduced at more positive potentials than the first sulfur layer in contact with the silver substrate. Plots of

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the charges for Cd and S measured in the stripping of CdS deposits as a function of the number of cycles are linear, with a slope of 70 pC cm-2 (Fig. 6). Similarly. plots of the charges for Zn and S measured in the stripping of ZnS deposits are linear, with a slope of 67 pC cm-•2 for Zn and 75 pC cin-2 for S. Note that the peaks for both Zn and Cd strippings shift towards more positive potentials when the number of cycles increases. Curve a in Fig. 7a is the plot of the peak potentials, E,,.,,, against the charge obtained by integrating the peaks. It is interesting to compare the potential shift due to the same amount of cadmium deposited as CdS, with the potential shift due to an increasing amount of cadmium deposited as metallic Cd. This latter potential shift was determined by depositing bulk Cd on Ag( 11)

aLt E=-O.8V,

where the rate of electroreduction of cadmium ions is still low enough to produce homogeneous deposits. Then, the deposited Cd was stripped, and the potential.

E

of

the anodic peak wvas measured against the charge, Q, obtained by integrating the peak.

rhis measurement w\as repeated for Cd deposits obtained at different times of accumulation, and the E,

values were plotted against the charge Q (Fig. 7b). Apart fr-om

the different values of potentials (curve a refers to Cd underpotentially deposited on Scovered Ag(Ill), and curve b refers to bulk Cd deposited on Ag(lll)). the larger potential shift exhibited by curve a clearly shows that the formation of CdS makes the Cd deposit more stable. A similar plot for Zn shows that the potential shift observed for E,,a of zinc deposited as ZnS is significantly higher than that observed for cadniulu,

which

can be explained by the fact that the heat of formation of ZnS is more negative than that of CdS. The morphology of thicker CdS deposits was investigated by SEM. Figure 8 shows scanning electronic micrographs of different magnifications of a sample formed with 110 deposition cycles. EDAX analysis performed on the more homogeneous regions, as well as in the correspondence of the clusters observed on the deposit, always yielded CdS in the 1:1 stoichiometric ratio. These results confirm XPS studies carried out on a sample of 50 deposition cycles: the binding energy of sulfur peak, 161.2 eV. is very close to that of CdS. 161.5 eV. and the height of sulfur and cadmium peaks gives the expected 1:1 stoichiometric ratio.

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Conclusions

The linear behaviour of plots in Fig. 6 suggests a layer-by-layer growth and involves a stoichiometric ratio between the elements as was expected for the formation of the compound and as was confirmed, in the case of CdS, by EDAX and XPS measurements. The charge value of 70 ptC cm-2 , associated with each layer of Cd and S (except for the first Cd and S layers), corresponds to a coverage of 1/3 when referred to the basal plane of both wurtzite or zinc blende. This experimental charge is in good agreement with the charge. 64 ptC cmnf

associated to tile structure revealed by STM

images [7] for the second layer of sulfur, specifically the sulfur layer on top of the first cadmium layer (the first sulfur layer deposited on the bare silver substrate has a different structure with an associated charge of 189 itC cn-2). The high value. 7.6 A, for Cd-Cd and S-S distances, as deduced by STM measurements seems to rule out that this structure could correspond to the basal planes of both wurtzite or zincblende. This would also be indicated by the low coverage of CdS deposit, vhich is just I/3 of that corresponding to both basal planes. Some preliminary structural investigations by X-ray photoelectron diffraction (XPD) technique would indicate a growth along the (1 1 . 0) plane of wurtzite. The atomic density of this plane, about double that shown by STM images, and the distances Cd-Cd and S-S, about a half, could indicate that the crystallographic plane would be formed every two deposition cycles. More detailed structural investigation by XPD are now in progress. Incidentally, the (I 1 . 0) plane of CdS was indicated as one of the possible orientations of CdS grown by SILAR on such substrates as InP( I ll), GaAs(00 I ) and Ge( 110) [ 14]. Finally, it is interesting to compare our results on CdS deposition with the corresponding results obtained on Au( lll) by Demir and Shannon on tile basis of STM measurements [15]. They reported a (3x3) structure with a Cd-Cd distance of 4.3 A for the Cd layer on top of the S layer deposited on Au( 111 ). This structure is much more compact than ours, and that difference cannot be ascribed to a difference in lattice constants of Ag and Au since they are practically identical. Thus, we thought that the difference could be ascribed to the different structure of the S layer in contact with the metallic substrate. In fact the S layer on Au 111 ) forms a ('13x•i3 )R30° structure with a coverage of 1/3, whereas at the potential chosen for deposition on Ag( I1l) it forms a

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( q7x N7)R 19. 1 structure with each lattice site occupied by a triplet of sulfur atom. This latter structure corresponds to the coverage of 3/7 and is therefore much

more

compr messed, thus denoting a higher affinity of S for Ag than for An. We wondered if the different structures of S could influence differently the epitaxial growth of the subsequent Cd layer. Thus. as the (U3xV3)R30° structure is also observed for S on Ag( Ill) at more negative potentials, -0.9V. we tried to grow CdS starting from this less compact S structure. Unfortunately. when the potential is moved to more positive values for Cd deposition, the less compact structure undergoes a transformation, probably forming islands of the more compact structure. Thus, the attempt of depositing a further layer of S at E=-0.9V results in the complete dissolution of the first layer, since the more compact structure is reduced at more positive potentials.

Acknowledgments

The authors are grateful to Mr. Andrea Pozzi and Mr. Francesco (iualchieri for their contribution to the set up of the automated deposition system, and Mr. Ferdinando Capolupo for the preparation of the silver single crystal electrodes. The financial SuppOrt of the Italian CNR and of the Murst is gratefully aclknowledged.

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References

(1)

B. W. Gregory and J. L. Stickney. , Eleciroanol.('hem., 300. 543 (1991).

(2)

C K. Rhee, B. M. Huang, E. M. Wilmer, S. Thomas and J. L. Stickney, Iti. akinil. Processes. 10. 283 (1995).

(3)

B. W. Gregory, D. W. Suggs and J. L. Stickney, ,J Electrocheo,. Soc., 138, 1279 (1991).

(4)

D. W. I-latchett and H. S. White, J1.Phe.s. ('hem. 100, 9854 (1996). (I;PD DI S)

(5)

D. W. Hatchett, X. Gao, S. W. Catron and H. S. White, J. Phs. ('hemn (1996).

(6)

(i. D. Aloisi, M. Cavallini, M. Innocent, M. L. Foresti, G. Pezzatini and R. (iuidelli, .J.Phys. (hem B, 101, 4774 (1997)

(7)

M. L. Foresti, G. Pezzatini, M. Cavallini, G. Aloisi, M himocenti and R. Guidelli, J. Phys. Chem. B 102, 7413 (1998).

(8)

L. P. Colletti, D. Teklay and J. L. Stickley, ,. Electroanal.Chem., 369, 145 (1994).

(9)

L. P. Colletti, R. Slaughter and J. L. Stickney, Journal of the SID, 5/21 1997.

(10)

L. P. Colletti, S. Thomas, E. M. Wilmer and J. L. Stickney, Mater. Res. Soc. Symp. Proc., 451, 235 (1997). A. Hamelin, in Modern Aspects of Elecirochenmistiy,BE. Conway, R.E. White and J.O'M. Bockris editors, vol. 16, p. 1, Plenum Press, New York (1985).

(11)

100, 331

(12)

A. Hamelin, L. Stoicoviciu, L. Doubova and S. Trasatti, J. Electroanal. Chemn., 244, 133 (1988).

(13)

Gi. Pezzatini, S. Caporali, M. Iunocenti and M.L. Foresti, "Formation of ZnSe on Ag(l 11) by Electrochemical ALE",, Electroanal. Chem., in press.

(14)

Y. F. Nicolau, M. Dupuy and M. Brunei, .1. Electrocheno. Soc. 137, 2915 (1990).

(15)

U. Demir and C. Shannon, Langinuir 10. 2794 (1994).

(16)

B.E. Boone and C. Shainon,J. Phys. ('hem., 100, 9480 (1996).

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Figure I - Diagramn of the distribution valve. S.V. n. 1, 2 and 3 denote the solenoid \alves. A given solution is pushed to the cell when the piston is raised by the pressure exerted by compressed air, that is when the corresponding solenoid valve is opened. compressed air

ontiiI 3

Compressed sir

- *

2. v

inlte2

*plexiglass seefl

disk

ii

to the reference electrode

gl gl

one one

lcrd lcrd o -ring

soluton ntlet'/.~

solution

working electrode

peilass disk Figure 2 - Fleetroehienlical floxs-cell.

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303

C

0-

-1.2

I

I

I

I

-1

-0.8

-0.6

-0.4

-0.2

E / V(SCE) Figure 3

Cyclic voltammograms of ZntpD obtained from 0.5mM ZnSO 4 in a p1- 9.2

ammonia buffer solution on Ag( 111) covered by S (a), Se (b) and Te (c). The scan rate is 40 mV s-1.

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54A 0

a

-

-1.0

2

-0.8

-0.6 E / V(SCE)

5

-0.4

-0.2

0.0

li b

0

-1.0

-1.2

-08.8

-0.4 -0.6 E / V(SCE)

b

j

-0.2

00

S5 l.A

C

0.0 -0,2 -0.4 -0.6 E / V(SCE) Figure 4 - (a) Oxidative underpotential deposition of S on Ag(l 11) from 0.5amM Na 2 S, as -1.0

-1.2

recorded friom -1.15

-0.8

to -0.75 V. (b) Reductive underpotential deposition of Zn on a S-

covered Ag(l11) from 0.5 mM ZnSO 4 , as recorded from -0.3 to -0.75 V. (c) Reductive underpotential deposition of Cd on a S-covered Ag(1 11) from 0.5 mM CdSO 4. as recorded from -0. 15 to -0.75 V. All precursors were dissolved in a pH 9.2 anmmonia butler solution. The scan rate is 40 mV s".

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a 50 pA cm

a

2

-0'.8

-0.6

-0.8

-0.6

/

r

4

-0.2

0.0

0b

-0.4 E/V(SCE)

-0.2

0.0

I50 pA cm~

-0.8

-0.6

-0.4

-0.2

0.o

E/V(SCE) Figure 5 - Linear sweep voltammograrns for the oxidative strippings of 1.3,5. 7. 9. 10 Zn layers (a); 1,3, 5, 8, 12, 15, 20 Cd layers (b) and the reductive strippings of2, 4.6, 9. 13. 16. 21 S la) ers (c). The scan rate is 10 mnV s"'.

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4000

1

1

1

1

1 0

3000

U

2000

1000

0

20

10

30

40

60

50

number of cycles ) and the

Figure 6 - Plots of the charge involved in the oxidative stripping of Cd reductive stripping ofS ( ) as a function of the number of ECALE cycles. 0

-0.5

I

-0.55

-0.05 U

-0.15

S-0.15

-0.65

-0.7

-0.2 -0.25 0

¢

500

- L-__ 1000 Q / gC cm-2

Figure 7 - (a) Plot of the peak potential

Epa,

- .0.75 1500

for the stripping of cadmium deposited as CdS,

against the charge involved in the stripping. (b) The corresponding plot

for cadmium

deposited as metallic CU here, the different amounts of cadmium were obtained by depositing bulk cadmium at different times of accumulation.

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307

Figure 8 - SEM micrographs of different magnifications of a 110 cycle CdS deposit. Marks in the figure correspond to 20, 5, 1,0.2 m i n the order of increasing magnification.

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Culnl.xGaxSe 2-BASED PHOTOVOLTAIC CELLS FROM ELECTRODEPOSITED AND ELECTROLESS DEPOSITED PRECURSORS R. N. Bhattacharya, W. Batchelor, J. Keane, J. Alleman, A. Mason, and R. N. Noufi National Renewable Energy Laboratory, 1617 Cole Blvd., Golden, CO 80401, USA

ABSTRACT We have fabricated 15.4%- and 12.4%-efficient CuIn,.xGaxSe 2 (CIGS)based devices from electrodeposited and electroless deposited precursors. As-deposited precursors are Cu-rich films and polycrystalline or amorphous in nature. Additional In, Ga, and Se were added to the precursor films by physical evaporation to adjust the final composition to CuInl.,Ga.Se 2. Addition of In and Ga and also selenization at high temperature are very crucial to obtaining high efficiency devices. The films/devices have been characterized by inductive-coupled plasma spectrometry, Auger electron spectroscopy, X-ray diffraction, electronprobe microanalysis, current-voltage characteristics, and spectral response.

1. INTRODUCTION Photovoltaic solar cells are a very attractive source of energy. At present, the photovoltaic industry primarily uses wafers of single-crystal and polycrystalline silicon, which generally have a wafer thickness of > 150 gtm. The wafers must go through several processing steps and then be integrated into a module. The high material and processing costs make these modules relatively expensive. The modules prepared from thin-film semiconductor materials are expected to lower costs by significantly reducing the material and processing costs. The thickness of the films can be as little as a few microns. The development of photovoltaic device structures based on CuIn.Ga1_.Se 2 (CIGS) has advanced rapidly during the last few years. The direct energy gap of CIGS results in a large optical absorption coefficient,' which in turn permits the use of thin layers (1-2 [tm) of active material, and also allows the use of a material with a modest diffusion length. CIGS solar cells are also known for their long-term stability. Thin-film CIGS devices have already exhibited a performance efficiency of 18.8%.2 Several research groups 3-7 have prepared device-quality CIGS by using either one-step or multistep processes. In the one-step process, the CIGS thin film is grown by simultaneous codeposition of Cu, In, Ga, and Se. The techniques used for one-step processes are physical vapor deposition, chemical deposition, and electrodeposition. The multistep process involves, for example, the deposition of precursor films of In-GaSe in the first step, Cu-Se in the second step, and again, the deposition of In-Ga-Se in the final stage. To date, the techniques used for multistep processes are physical vapor deposition (PVD) and sputtering. The recent record-breaking high-efficiency device (18.8%) prepared in our research laboratory 2 is based on a multistep process using PVD of the elements. The PVD technique is difficult to scale up because of film non-

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309

uniformity and low material utilization. Sputtering techniques are suitable for large-area deposition, however, they require expensive vacuum equipment and sputtering targets. Therefore, non-vacuum electrodeposition (ED) and electroless deposition (EL) techniques with a potential to prepare large-area uniform precursor films using low-cost source materials and low-cost capital equipment are very attractive for the growth of CIGS layers for photovoltaic applications. The device fabricated using ED and EL CIGS precursors resulted in an efficiency of 15.4% and 12.4%, respectively. 2. EXPERIMENTAL Codepositions of Cu-In-Ga-Se by the ED and EL processes were performed from a bath containing 0.02-0.05 M CuCI 2, 0.04-0.06 M InCI3 , 0.01-0.03 M H2SeO 3, and 0.080.1 M GaC13 and 0.7-1 M LiCl dissolved in deionized water. The films were deposited in a vertical cell in which the electrodes (both working and counter) were suspended vertically from the top of the cell. The ED precursors were prepared by using a threeelectrode cell in which the reference electrode was Pt (pseudo-reference), the counter electrode was a Pt gauze, and the substrate was Mo/glass. The films were electroplated by applying a constant potential of -1.0 V. A Princeton Applied Research potentiostat/galvanostat Model 273 A with an IBM PC AT computer interface was used for the preparation of ED precursor films. The EL method is based on short-circuiting the conducting Mo substrate to an easily oxidizable redox component (e.g., Fe) in the electrolyte bath. The Mo film on glass substrate was about I gtm thick and was deposited by DC sputtering. The ED and EL deposition experiments were performed at room temperature (24QC) and without stirring. The deposited films were rinsed with deionized water and dried in flowing N2 . The as-deposited precursors are Cu-rich CIGS films. Additional In, Ga, and Se were added to the precursor films by PVD to adjust the final composition to Culnl.xGaxSe 2. The substrate (precursor film) temperature during the PVD step was 5600 ± 10°C. The films were also selenized by exposure to selenium vapor during the cool-down time (-40°C/min). Addition of In and Ga and also selenization at high temperature are very crucial to obtaining high-efficiency devices. Photovoltaic devices were completed by chemical-bath deposition of about 50 nm CdS, followed by radiofrequency (RF) sputtering of 50 nm of intrinsic ZnO, and 350 nm of A12 0 3-doped conducting ZnO. Bilayer Ni/AI top contacts were deposited in an e-beam system. The final step in the fabrication sequence is the deposition of an antireflection coating (100 nm MgF 2). The final device configuration for all devices is MgF 2/ZnO/CdS/Culnl. 0Ga 0Se 2/Mo. The films and devices were characterized by inductive-coupled plasma spectrometry (ICP), Auger electron spectroscopy (AES), X-ray diffraction, electronprobe microanalysis (EPMA), current-voltage characteristics, and spectral response.

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3. RESULTS AND DISCUSSIONS The electrodeposition of CIGS films (pH - 2) on cathode is most likely caused by the combination of electrochemical and chemical reactions as follows:

M"++ne 4-M H2 SeO 3 + 4H+ + 4e --> Se + 3H 20 xM + ySe "- MxSey

(1) (2) (3)

The electroless process for preparing CIGS precursor films is accomplished by the combination of electrochemical and chemical reactions. The counter-electrode (Fe) initiates the electrochemical reaction. The electroless deposition of CIGS is most likely caused as follows: E vs SHE Fe

Fe2+ + 2e

-0.447

[4]

Cu+ + e - Cu Cu 2÷ + 2e -- Cu In3+ + 3e -- In Ga3+ + 3e -- Ga

0.521 0.342 -0.338 -0.549

[5] [6] [7] [8] [9] [10]

--

SeO3 2 + 3H 20 + 4e -- Se + 6 OH'

Cu, In, Ga, Se

--

CuxInyGa 2 Se.

-0.366

Chemical reaction

The required reduction potential of Ga is higher than the oxidation potential of Fe electrode. The deposition potential is composed of the equilibrium reduction potentials (Eeq), the overpotential, and the ohmic potential drop (iR) in the solution. The rest potential of the deposition bath solution is about 0.3 V. The applied potential (E) during codeposition of Cu-In-Ga-Se using Fe electrode is (0.447 + rest potential), which probably make the Ga deposition possible. The composition of the as-deposited ED and EL precursors precursor as analyzed by ICP was CuIn 0.32Ga 0 01Se0 93 and CuIno.35Gao01Seo99, respectively. The thickness of the ED and EL precursor films was about 2.2 and 1.5 gim, respectively. The composition of the ED precursor firn was adjusted by adding about 3000 A Ga and 7200 A In by PVD step. The composition of the EL precursor film was adjusted by adding about the 2500 A Ga and 5800 A In by PVD step. The final compositions of the CIGS absorber films prepared from ED and EL precursors, as determined by ICP and electron-probe microanalysis, are CuIn072Ga04 7Se 2.o5 and Culn 0 83Ga022Se1 93, respectively. The Ga/(ln+Ga) ratios are 0.40 and 0.20 for the ED and EL cells, respectively.

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Fig. la. SEM photograph of the electrodeposited CIGS precursor film

Fig. 1c. SEM photoghaph of the absorber layer prepared from ED precursor film

312

Fig. lb. SEM photoghraph of the electroless CIGS precursor film

Fig. 1d. SEM photohgaph of the absorber layer prepared from EL precursor film

Electrochemical Society Proceedings Volume 99-9

Figures Ia and lb show the SEM photographs of the ED and EL precursor films, respectively. The SEM photographs reveal that EL precursor film has a much rougher surface compared with the ED precursor film. Figures lc and Id show the SEM photograph of the absorber layers prepared from ED and EL precursor films. The absorber layer prepared from the ED precursor film is relatively more dense and crystalline in nature. Figure 2 shows the AES survay scan of EL precursor films. The main purpose of the survey was to find whether the EL-deposited film is being contaminated by an Fe counter electrode. The survey does not show any Fe contamination, but does show the presence of significant amount of oxygen. Identical results are obtained from the electrodeposited precursor films. I20

20

I

,

I

,

10

SO0

Se

In

S

tu

!C

0

rSe -10

Se

Ga In

0

Se

C

-20x10 0

400

800

1200

Kinetic Energy (eV) Fig. 2. AES survey of electroless precursor film (after I-min sputter etch).

Figure 3 shows X-ray diffraction data of the absorber CIGS film prepared from ED and EL precursor films after compositional adjustment. The as-deposited films were amorphous or polycrystalline in nature. The absorber film after final film composition adjustment shows only the CIGS phase. The International Center for Diffraction Data card number used for the identification of CIGS X-ray peaks is 40-1487.8 Figures 4a and 4b show the compositional AES depth profile analysis data of the absorber films prepared from ED and EL precursor films, respectively. The AES depth profile analysis shows a non-uniform distribution of Ga concentrations in the film. The absorber layer prepared from ED precursor film has relatively more uniform distribution of Ga concentrations compared with the absorber layer prepared from the EL

Electrochemical Society Proceedings Volume 99-9

3 13

20x10 3 Mo (110) CIGS (1 2)

15 CIGS

•',

10

(220/204)CIGS (312/116)

ED-absorber

5

CIGS (2 20 / 20 4 ýIGS (312/116)

"EL-absorber

0 ... 10

20

30

40

50

60

700

2 Theta (degrees) Fig. 3. X-ray diffraction data of the absorber layers prepared from ED and EL precursor films (Y-axis for ED-absorber is offset by 10000) precursor film. The Ga hump is not helpful for the electron collection mechanism. We expect to improve the device efficiencies by optimizing Ga distribution in the absorber layers. The optimized layers should have less Ga in the front and more Ga on the back, which facilitates electron collection. The final device configuration for all devices is MgF 2/ZnO/CdS/CuInl. xGaxSe 2/Mo. Figures 5a and.5b show the current density-vs.-voltage (J-V) curves of the devices prepared from ED and EL precursor films. The I-V characterization was carried out at AMI.5 spectrum (ASTM E 892-87 Global) in which the intensity of illumination was 1000 W/m 2. The solar cells made from the ED and EL precursor materials have device efficiencies of 15.4% and 12.4%, respectively. The quantum efficiencies of the cells under illumination (1000 W/m 2) is shown in Fig. 5c (ED device) and Fig. 5d (EL device). These figures indicate the bandgaps, Eg, of the ED and EL cells are 1.20 eV [Ga/(In+Ga) = 0.4] and 1.09 eV [Ga/(In+Ga) = 0.2], respectively.

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II

I

I

I

100

80

0

Ga

a *

Se In 'Ga/(In+Ga)'

o e

I

+ Cu

60

Se

-

1.0

-

0.8

-

0.6

+ +

Io

Cu

20

"Ga/(In+Ga)---

'

0.4

In

0

_

0.2

_t

0

1

2

t

t

3

4

0.0

_

5

Sputter Depth (jim) Fig. 4a. Auger analysis data of the absorber layer prepared from ED precursor film

100

1.0 CU

80-

S

60

Se

S40-

20

0

.

_G/(In+GA)

0.8

A*SeIn 0 'Ga/(In+Ga)'

0.6

G0.4

I

0

---

0.2

•

-IIn

0.0

___________________________

0

1

n

2

3

4

5

Sputter Depth (gim)

Fig. 4b. Auger analysis data of the absorber layer prepared from EL precursor film

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315

.

14

16..

.

T-,

12 10 8

8

21

S 6

C-

4

4 2 . 0.00

.

I0.

0.00

0.50

Voltage (V)

Fig. 5a. I-V characteristics of an ED

Fig. 5b. I-V characteristics of an EL

device (Vo 0 = 0.666 V,

device (V,, = 0.565 V, I1,= 13.90 mA,

'Sc

= 12.76

mA, Jsc =30.51 mA/cm 2 , Fill Factor =

75.56%, Efflicency

=

15.4%)

Js, = 33.27 mA/cm 2, Fill Factor 66.10%, Efficiency

=

12.4%)

100

tft

100O [

0.25

0.25 0.50 Voltage (V)

80

80_

S 60

S60 •

-

40

S40

S20 .20 og

0

200

500

1000

1000

Wavelength (nm)

Wavelength (nm)

Fig. 5c. Quantum-efficiency data of an ED device

316

Fig. 5d. Quantum-efficiency data of an EL device

Electrochemical Society Proceedings Volume 99-9

CONCLUSION

The ED and EL deposition processes are simple and fast, and they can synthesize binary or multinary precursors for subsequent processing into high-quality CIGS thinfilm absorbers for solar cells. The device fabricated using ED precursor layers resulted in efficiencies as high as 15.4%. The quality of CIGS-based films and devices prepared from ED precursors is very promising. This may lead to novel, fast, and low-cost methods for solar-cell absorber fabrication.

ACKNOWLEDGMENTS This work was supported by Davis, Joseph & Negley (California Corporation, Work-forOthers Contract No. 1326) and also by the U.S. Department of Energy under contract DE-AC36-98-GO10337. REFERENCES I. 2.

A. Rockett and R. W. Birkmire, J Appl. Phys. 70, R81 (1991). M. A. Contreras, B. Egaas, K. Ramanathan, J. Hiltner, A. Swartlander, F. Hasoon, and R. Noufi, Progressin Photovoltaics,July, (1999). 3. J. R. Tuttle, J. S. Ward, A. Duda, T. A. Berens, M. A. Contreras, K. R. Ramanathan, A. L. Tennant, J. Keane, E. D. Cole, K. Emery, and R. Noufi, Mat. Res. Soc. Symp. Proc., 426, 143 (1996). 4. K. Kushiya, M. Tachiyuki, T. Kase, I. Sugiyama, Y. Nagoya, D. Okumura, M. Satoh, I. Sugiyama, 0. Yamase, H. Takeshita, Solar Energy Materialsand Solar Cells 49, 277 (1997). 5. L. Stolt, J. Heldstrom, J. Kessler, M. Ruckh, K.O. Velthaus, and H. W. Schock, Apple. Phys. Lett., 62, 597 (1993). 6. N. Kohara, T. Negami, M. Nishitani, and T. Wada, Jpn. J. Appl. Phys. 34, L 1141 (1995). 7. R. N. Bhattacharya, W. Batchelor, H. Wiesner, F. Hasoon, J. E. Granata, K. Ramanathan, J. Alleman, J. Keane, A. Mason, R. J. Matson, and R. N. Noufi, J Electrochem. Soc., 145, 3435 (1998). 8. D. Suri, K. Nagpal, and G. Chanda, J. Apple. Crystallogr., 22, 578 (1989).

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ELECTROCHEMICAL DEPOSITION OF GOLD ON N-TYPE SILICON Gerko Oskam and Peter C. Searson Department of Materials Science and Engineering The Johns Hopkins University Baltimore, MD 21218

The electrochemical deposition of gold on n-type silicon from KAu(CN) 2 solutions was investigated by performing a detailed study of the nucleation and growth kinetics. Deposition occurs by progressive nucleation and diffusion limited growth of 3-D hemispherical islands over a wide range of potentials and KAu(CN)2 concentrations. Gold films were prepared by nucleation at a potential where the nucleus density is high, followed by growth under kinetic control. The films were continuous and polycrystalline with a <111> texture, and the electrical properties of the Si/Au Schottky junctions were comparable to junctions prepared by evaporation. INTRODUCTION Semiconductor / metal junctions have wide applications in electronic devices either as a Schottky junction or an ohmic contact. In the fabrication of chips, metal layers are deposited in many production steps and is often achieved through sputtering or vapor deposition. Although the deposition of thin, continuous metal films onto semiconductor surfaces has been largely overlooked, electrochemical deposition techniques have several advantages including low cost, high deposition rate, and good conformal deposition onto structures of complex geometry. Electrochemical metal deposition onto metals and other conducting materials is used in a variety of applications, including printed circuit boards, through-hole plating, multilayer read/write heads, and copper metallization (1-6). In order to obtain continuous, adherent metal films on semiconductors or other nonmetallic layers, the influence of deposition mechanisms on the film properties must be determined in order to develop a method for the formation of high quality films. In many cases, deposition of the metal proceeds through three dimensional island nucleation and growth, which has been exploited by depositing metal islands that act as catalyst to specific charge transfer reactions (7,8). In this paper, we report on the mechanisms of nucleation and growth of gold onto ntype silicon using electrochemical techniques such as current-potential curves and current transients, and imaging techniques such as scanning electron microscopy and transmission electron microscopy. We show that knowledge of the nucleation and growth mechanisms can be applied to determine the experimental conditions for the deposition of high quality metal films onto silicon.

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EXPERIMENTAL All experiments were performed on (100) n-type silicon (Wacker Siltronic, AG) with a resistivity of 3 Q cm (ND = 1x10 15 cm-Y). Prior to experiments the samples were sequentially cleaned ultrasonically for 10 minutes in acetone, ethanol, and water. The water was distilled and deionized (Millipore) and had a resistivity of 18 MQ cm. The ohmic contact was provided by applying InGa eutectic on the back side after treatment in 48% HF for 10 s. The samples were then mounted in a clamp-on cell with an o-ring; the geometric surface area was 2.8 cm 2 in all cases. The reference electrode was Ag/AgCI in 3 M NaCI and was positioned close to the silicon sample using a Luggin capillary; the counter electrode consisted of a platinum gauze. All potentials reported in this paper are given with respect to the Ag/AgCI reference. The experiments were performed in ambient conditions. Current-potential and current transient experiments were performed using a EG&G PAR 273 potentiostat and Corrware software. Experiments on the Si/Au junctions were performed on a Solartron ECI 1286 and a FRA 1255; the experiments were done in the dark. Scanning electron microscopy was performed on an AMRAY 1860 FE at an acceleration voltage of 5 kV. The samples were flash-coated with carbon before loading into the chamber. Atomic Force Microscopy (AFM) was performed using a Topometrix Discoverer system. RESULTS AND DISCUSSION Figure 1 shows an energy band diagram for silicon in aqueous solutions at pH 14 and pH 1. The energetic position of the silicon band edges is dependent on the pH, and the two most commonly used redox couples for the deposition of gold are shown. It can be seen that the acceptor levels of AuCI 4 " have an overlap with the silicon valence band. As a consequence, gold is deposited under open circuit conditions by the displacement mechanism. However, silicon is oxidized in the process and the deposition process is self-limiting. There are various ways to circumvent these problems, however, good films have not been obtained in this solution (9). In the pH 14 solution, the flat band potential for n-Si(100) is about -1.1 V(Ag/AgCl) (10-12). The standard equilibrium potential for the Au/Au(CN)2" redox couple is considerably more negative than for AuCI 4 " at -0.82 V(Ag/AgCI) (13). Therefore, in this case gold deposition is expected to occur by charge transfer from the conduction band to the solution: Au(CN)2" + e-(CB)

The equilibrium potential,

Ueq,

-4

Au + 2 CN-

[]

is given by:

Ueq = U0 eq + 0.059 log {[Au(CN) 2- ]/[CN- ]2 }

[2]

The density of conduction band electrons at the surface is dependent on the band bending, which can be adjusted by the applied potential. Hence, the deposition rate can be controlled by means of the applied potential.

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Current - potential characteristics Figure 2 shows current - potential curves for n-type silicon (100) in 1 M KOH solutions with various concentrations of KCN, and with and without 50 mM KAu(CN) 2 . Curves (a), (b), and (c) correspond to I M, 0.2 M, and 0.008 M KCN in 1 M KOH, respectively. Curves (d) and (e) correspond to the first and third scan in 50 mM KAu(CN) 2 + I M KCN + I M KOH. In the absence of KAu(CN)Z, a large cathodic current due to hydrogen evolution is observed at potentials more negative than about - 1.9 V. The cathodic current plateau at about -1.5 mA cm-2 in the range from -1.85 V to -2 V is related to high cyanide concentrations and disappears for concentrations lower than 0.1 M KCN. Hence, the presence of cyanide results in a suppression of hydrogen evolution probably due to adsorption of cyanide. At hydrogen evolution currents smaller than I mA cm- 2 , the current - potential curves are independent of the cyanide concentration, which suggests that the silicon band edges do not shift as a function of the cyanide concentration. In all cases, a significant anodic current is not observed which is due to the rectifying properties of the n-type silicon / solution interface. In the solutions containing KAu(CN) 2 , a current corresponding to the reduction of Au(CN) 2 is observed in the first scan with an onset at about -1.25 V, and a current peak is observed at -1.30 V with a maximum of-7.2 mA cm- 2 . The observation of a peak in the current - potential curve indicates that the deposition of gold becomes diffusion limited after nucleation has occurred. At about -1.65 V the current increases again due to hydrogen evolution. In this case, hydrogen evolution occurs preferentially at the gold clusters since the curve is shifted by about 0.4 V to more positive potentials with respect to hydrogen evolution at the silicon surface. The onset of gold deposition in the third sweep is about 0.2 V more positive than in the first scan and subsequent sweeps are the same, indicating that a steady state situation is reached. The shift of the onset potential for deposition at silicon covered with gold as compared to bare silicon indicates that a nucleation overpotential is required for the nucleation of gold on the silicon surface. On the reverse sweeps, gold deposition continues to about -1.10 V and a stripping current is not observed indicating that gold deposition on n-type silicon is not reversible. This is caused by two effects: (i) in the dark, the density of holes in the valence band is very low so that the oxidation rate due to valence band holes is low and, (ii) the barrier height of the n-Si/Au contact is large, hence, gold cannot be oxidized since the energy barrier for electron transfer from the gold to the conduction band is large. The potential range where gold deposition and hydrogen evolution take place is negative with respect to the flat band potential, hence, the silicon is expected to be in accumulation and the electron density at the surface is higher than in the bulk. Note that the surface electron concentration in this case is still several orders of magnitude lower than at metal surfaces, which may have a significant effect on the deposition characteristics. Figure 3 shows current - potential curves (b-f) for 5 solutions with 2 mM KAu(CN) 2 + 1 M KOH with different concentrations of KCN, hence, with different equilibrium potentials for the Au(CN) 2 / Au redox couple. The scan rate was 10 mV s-I in all cases. The KCN concentration was varied from 2 M (curve b), corresponding to a redox potential of-l.01 V, to 0.02 M (curve e) which corresponds to a redox potential of -0.78 V. Curve a corresponds to the current - potential characteristics in 0.04 M KCN at pH 14. It can be seen that the gold deposition peak shifts to more negative potential with

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more negative redox potentials, while the maximum current is independent of the redox potential at about -0.35 mA cm-2 . The peak current is about a factor 21 smaller than in the 50 mM KAu(CN) 2 solution which shows that the current at the maximum is essentially proportional to the KAu(CN) 2 concentration Figure 4 shows the equilibrium potential, the potential at the current peak, the open circuit potential (OCP) before the first scan, and the open circuit potential after the first scan as a function of the concentration ratio [Au(CN) 2 -]/[CN-] 2 . The equilibrium potential shifts with 59 mV per decade according to equation [2] (13). The initial open circuit potential is essentially independent of the concentration ratio, indicating that the open circuit potential is not defined by the potential of the gold redox couple, but is controlled by the interaction between the silicon surface and the aqueous solution at pH 14 (10,11). This indicates that nucleation of gold does not takes place at OCP, which is consistent with the observation that a nucleation overpotential is required in order to deposit gold onto the silicon surface. The open circuit potential after the first scan, where approximately 20 equivalent monolayers gold are present on the surface, is linear with the concentration ratio with a slope of 59 mV per decade, and is close to the gold redox potential. This indicates that after gold deposition, the open circuit potential is determined by the equilibrium of the Au(CN) 2 / Au couple. Note that the reaction is not expected to be reversible since the gold is only connected to the external circuit via the silicon wafer. The potential at the current maximum is linear with the concentration ratio with a slope of about 43 mV per decade. This indicates that the current maximum represents an intermediate case where the current is not completely determined by the energetics of the redox couple but also not by the surface energetics of the silicon. Current transients The nucleation and growth mechanisms can be determined using current transient techniques. Upon applying a potential step from an initial potential where the nucleation rate is negligible to a fixed overpotential, the formation of stable nuclei and their growth can be observed directly by monitoring the current. Nucleation of a metal on a foreign substrate is generally assumed to take place at active sites on the surface, such as steps, kinks, or other surface defects (14-18). The density of active sites corresponds to the total number of possible sites for nucleation. Depending of the nature of the site, the activation energy for nucleation may vary, which can lead to a potential dependence of the number of utilized active sites, N0 . The density of nuclei as a function of time at a constant potential, N(t), is usually described in terms of a growth law with a nucleation rate constant, A: N(t) = No {1 - exp (-At)}

13]

From equation [3] two limiting cases can be identified. If A is large and At » I at short times then N(t) = No immediately after the pulse. Conversely, if A is small and At - 1 at short times then N(t) = AN 0 t, and the density of nuclei increases linearly with time. The first case corresponds to instantaneous nucleation and the second case refers to progressive nucleation.

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The growth of nuclei can be either kinetically or diffusion limited or under mixed control. In many cases, it is observed that diffusion of metal ions to the surface is rate limiting. As the growth becomes diffusion limited, the diffusion zones around individual nuclei will start to overlap, and linear diffusion to the planar surface may occur before nuclei impinge on each other. If nucleation is progressive, the development of diffusion fields may block active sites for nucleation, leading to the situation where the final nucleus density is smaller than No (18-20). Figure 5 shows the nucleus density as a function of time for deposition from 2 mM KAu(CN) 2 + 0.2 M KCN (pH 14) at a potential of -1.30 V. In order to ensure that all nuclei were observed in SEM images, samples were prepared in the following way. Gold clusters were nucleated for different times at -1.30 V followed by growth of the clusters nucleation occurs at -1.10 V. In at -1.10 V. From Figure 5 it can be seen that no further all cases, the total deposition charge was 3.0 mC cm-2 corresponding to 13.5 equivalent monolayers of gold. From Figure 3 it can be seen that at times shorter than about 0.9 s the nucleus density increases linearly with time corresponding to progressive nucleation. At longer times, the nucleus density becomes independent of time indicating that either all nucleation sites have been occupied or that remaining nucleation sites have been screened by the expanding diffusion fields around existing nuclei. The time dependent deposition current density (normalized on the geometric surface area), i(t), for progressive nucleation followed by three dimensional diffusion limited growth is (18):

i(t) =z F D ' c it"t-1/2

Norlt t2

I-exp(-2A

f8t cVmlr)

[4]

where D is the diffusion coefficient, c is the metal ion concentration in the bulk solution, and Vm is the molar volume. The current initially increases with time due to 3-D diffusion to an increasing metal surface area, and then decreases as the diffusion zones around the growing nuclei start to overlap resulting in a 1-D diffusion limited current to a planar surface. Figure 6 shows current transients for potential steps from the open circuit potential to various deposition potentials for the 2 mM KAu(CN) 2 + 0.2 M KCN (pH 14) solution. At long times, the transients in the range from -1.55 V to -1.35 V all converge on a decay curve governed by linear diffusion to a planar surface according to the Cottrell equation. At -1.65 V and -1.60 V, the current after the maximum is significantly higher which can be ascribed to the co-reduction of water to hydrogen. This interpretation is in agreement with the current - potential curve shown in Figure 3 (curve (d)) where the onset of hydrogen evolution on a partly gold-covered surface is observed at about -1.60 V. The nucleation mechanism can be determined by comparing the results to the progressive nucleation model by rewriting equation (4] in terms of the maximum current, imax, and the time at which the maximum current is observed, tnax : 2 i / i.2 ax_= 1.2254 (tmax / t)

322

-

exp

(

2.3367(t2/t~a)

[5]

Electrochemical Society Proceedings Volume 99-9

The time, t, in equations [4] and [5] represents the time with respect to the onset of the deposition current, i.e., t is corrected for the induction time, to. The induction time is usually related to the time required to form a stable nucleus. The inset in Figure 6 shows the reduced parameter plots for the transients at -1.65 V, -1.55 V, -1.45 V, and -1.29 V. The theoretical curves for progressive nucleation (solid line) and instantaneous nucleation (dotted line) and diffusion limited growth are also shown. The transient at -1.65 V agrees with the progressive nucleation model before the maximum. After the maximum, the current is increased due to simultaneous reduction of water which only becomes significant after the gold clusters have grown to a sufficient size. In the potential range from -1.55 V to -1.40 V, the plots agree very well with the progressive nucleation and growth model. At potentials more positive than -1.35 V, the experimental results deviate from the progressive nucleation and diffusion limited growth model at longer times. This is most likely due to a mixed charge transfer / mass transport control. Current transients were also recorded for solutions with 50 mM, 10 mM, and 0.5 mM KAu(CN) 2 . Analysis showed that in all cases gold deposition proceeds through progressive nucleation and diffusion limited growth. The time and current at the maximum in the current transients versus the deposition potential for various concentrations of KAu(CN) 2 were found to be exponentially dependent on the deposition potential with inverse slopes of 166 mV per decade and -325 is very weakly dependent on the mV per decade, respectively. The value for t is strongly'expendent on concentration. Both the KAu(CN) 2 concentration while i potential and the concentration nexpendence of tmax and imax indicate that the only potential dependent parameter in the nucleation process is the nucleation rate (9). For progressive nucleation, the nucleation rate can be determined through Jnuci = dN(t) / dt = AN 0 , which can be obtained from the maximum in the current transients using the following relation: AN

0 =

2 0.2898 (8TcVm)112 (zFc) ma a t,tmax .2

[6]

Figure 7 shows log(AN 0 ) versus the potential for KAu(CN)2 concentrations ranging from 0.5 mM to 50 mM. The relationship is linear between -1.4 V and -1.7 V, and essentially independent of the concentration. The inverse slope in this potential region is -78 mV per decade. In the potential range positive of -1.40 V, the inverse slope of the curve is significantly smaller at about -21 mV per decade. There are various models for the potential (i.e. supersaturation) dependence of the heterogeneous nucleation rate. According to the small cluster model developed by Walton (21) and Stoyanov (22), the formation of a cluster can be treated as a sequence of attachment and detachment steps. In equilibrium, the attachment and detachment rates are equal, whereas supersaturation leads to an increase in the attachment rate and growth of the cluster. The result of this theoretical analysis is the following expression for the nucleation rate, Jnuci (15): Jm,= A3Dexp(P eI lI/kT)exp(NcriteIl

/kT)

[7]

where Ncrit is the number of atoms required to form a critical nucleus, and Jil is the absolute overpotential; note that the overpotential is negative for bulk metal deposition.

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The pre-exponential factor A* 3 n is independent of potential as long as Ncrit is potential independent, and the factor Pdepends on the mechanism of attachment. Equation [7] reduces to a classical Volmer-Weber type model for nucleation if Ncrit >> P. The total potential dependence of the nucleation rate in an overpotential range where Ncrit is constant according to the atomistic model is thus given by:

d log(J, .o dIil

,)

e

- kTln(l0)

-

crit+

[8]

[

The value of 0 in equations [7] and [8] results from the attachment probability of one atom to a cluster, thus converting the cluster into a critical cluster. By plotting log(Jnucl) versus Irll the value of Ncrit can be determined. Note that in order to apply equation [8], the overpotential needs to be defined as a function of the applied potential. This is not straightforward, as the applied potential is partitioned over the semiconductor space charge layer and the Helmholtz layer; in addition, the partitioning may change upon deposition of a metal cluster. However, as long as the gold deposit is in equilibrium with the silicon, i.e. the Fermi energies are aligned, it may be justified to apply equation [8] using the applied potential instead of the overpotential (9,23). Figure 7 shows that between -1.4 V and -1.7 V the inverse slope is -78 mV per decade, which corresponds to Ncrit = 0 assuming that P is between 0.5 and 1. This result suggests that a gold atom adsorbed on an active site can be considered as a stable cluster (24). This explains the large potential range of more than 0.3 V where the log(AN,) versus potential curve is linear, as Ncrt cannot decrease further upon applying more negative potentials. Values for Nr. on tue order of I atom have been reported for both metal-on-metal deposition (e.g. , and for metal-on-semiconductor deposition (23,25). In the potential range positive of -1.40 V, the inverse slope of the curve is significantly smaller at about -21 mV per decade, which leads to N .t = 2 - 3. As a consequence, the nucleation process appears to be less favorable which agrees with the deviations observed in the transient analysis curves. Figure 8 shows the nucleus density as a function of the applied potential determined by SEM and AFM. The samples were prepared by deposition of 3 - 5 mC cm- 2 at each potential. At all potentials, the deposition time was larger than tmax so that the nucleus density is at the maximum value (see Figure 5). At potentials close to the onset of gold deposition, the nucleus density increases sharply with increasing negative potential, while at potentials more negative than about -1.30 V the nucleus density is constant. The nucleus density for the samples in 2 mM KAu(CN) 2 is slightly lower than for the 50 mM KAu(CN) 2 solution. The observation that the nucleus density is independent of potential at negative potentials shows that the potential dependence of the nucleation rate (Figure 7) is derived from the potential dependence of the nucleation rate constant, A. The deviation from linearity seen in Figure 7 at potentials more positive than -1.30 V is due to the decrease in the nucleus density in that potential range. This suggests that the nucleation rate constant is exponentially dependent on the applied potential with the same activation energy in the entire potential range. Preparation of gold films on n-type silicon

From analysis of the nucleation and growth mechanism, conditions for the deposition of adherent, continuous gold films can be determined. First, a nucleus density on the

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order of 1 0 10 cm- 2 was generated with a potential pulse of 30 - 60 ms at -1.50 V to -1.70 V, using a 50 mM KAu(CN) 2 solution. The short pulse ensures that the nuclei do not coalesce under diffusion control. The potential was then stepped to about -1. 1 V where the deposition current was about 0.5 mA cm- 2 , which corresponds to about 20% of the diffusion limited value. Hence, the nuclei are grown under mainly kinetic control until they coalesce to form a continuous film. The gold films deposited by this method were bright and exhibited good adhesion to the silicon substrate. X-ray measurements showed that the films were polycrystalline with a < 111 > texture, indicating that the nuclei are not epitaxial with the Si(100) surface. TEM showed that the gold films are continuous, with grain sizes on the order of 50-70 nm. The average film thickness was determined to be 90 nm, which is in good agreement with the value obtained from the charge passed. The electrical properties of the electrochemically deposited Si / Au films were characterized by measuring the barrier height and ideality of the the junctions (26). A plot of C- 2 (where C is the measured capacitance) versus the applied bias was found to be linear with an intercept at C-2 = 0 of -0.51 V, which leads to a barrier height of 0.79 eV. The forward current (corrected for the reverse bias current) versus the applied bias on a semi-logarithmic plot was also linear over about 5 orders of magnitude, and from the slope of the current - voltage curve the ideality factor was determined at 1.2 which shows that these junctions are nearly ideal. The saturation current was determined to be 2.8 x 10-7 A cm-2 from which a barrier height of 0.80 eV is obtained. The values for the barrier height determined by the two different methods are in excellent agreement indicating the absence of either an interfacial layer or electrically active surface states. These characteristics are comparable to high quality junctions obtained by sputter deposition or evaporation (26). CONCLUSIONS The deposition of gold on n-type silicon (100) occurs by progressive nucleation of 3D hemispherical islands followed by diffusion limited growth. The density of gold clusters increased linearly with time (progressive nucleation) up to about t = tmax, and saturated at longer times at about 1010 cm-2 . The nucleus density increased with potential close to the onset potential for gold deposition, while at more negative potentials the nucleus density was constant at about 1010 cm- 2 . Gold films were prepared by a two step technique. Transmission electron microscopy confirmed that the gold films were continuous and polycrystalline. The electrical properties of the electrochemically prepared n-Si(100)/Au Schottky junctions were comparable to junctions prepared by evaporation or sputtering. ACKNOWLEDGEMENTS The authors acknowledge support from the National Science Foundation under Grant No. CTS-9732782. The authors thank D. van Heerden for the help with TEM. REFERENCES 1. L.T. Romankiw, and T.A. Palumbo, in Electrodeposition Technology, Theory and Practice, eds. L.T. Romankiw and D.R. Turner, The Electrochemical Society,

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2. 3. 4. 5. 6. 7. 8. 9. 10. 11. 12. 13. 14. 15. 16. 17. 18. 19. 20. 21. 22. 23. 24. 25. 26.

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Pennington, NJ (1988) p. 13 . P.C. Searson and T.P. Moffat, "Electrochemical Surface Modification and Materials Processing", Critical Reviews in Surface Chemistry, 3, 171 (1994). D. Edelstein, J. Heidenreich, R. Goldblatt, W. Cote, C. Uzoh, N. Lustig, P. Roper, T. McDevitt, W. Motsiff, A. Simon, J. Dukovic, R. Wachnik, H. Rathore, R. Schulz, L. Su, S. Luce, and J. Slattery, Proc. IEEE-IEDM, 43, 773 (1997). J. Li, T.E. Seidel, and J.W. Mayer, MRS Bulletin, 19, 15 (1994). S.-Q. Wang, MRS Bulletin, 19, 30 (1994). G. Oskam, P.M. Vereecken, and P.C. Searson, J. Electrochem. Soc., 146, 1436 (1999). A. Heller, E. Aharon-Shalom, W.A. Bonner, and B. Miller, J. Am. Chem. Soc., 104, 6942 (1982). Y. Nakato, K. Ueda, H. Yano, and H. Tsubomura, J. Phys. Chem., 92, 2316 (1988). G. Oskam, J.G. Long, A. Natarajan, and P.C. Searson, J. Phys. D.: Appl. Phys., 31, 1927 (1998). P. Allongue, V. Costa-Kieling, and H. Gerischer, J. Electrochem. Soc., 140, 1009 (1993). P. Allongue, V. Costa-Kieling, and H. Gerischer, J. Electrochem. Soc., 140, 1021 (1993). O.J. Glembocki, R.E. Stahlbush, and M. Tomkiewicz, J. Electrochem. Soc., 132, 145 (1985). M. Beltowska-Brzezinska, E. Dutkiewicz, and W. Lawicki, J. Electroanal. Chem., 99, 341 (1979). Southampton Electrochemistry Group, Instrumental Methods in Electrochemistry, Ellis Horwood, New York, (1990). E. Budevski, G. Staikov, and W.J. Lorenz, Electrochemical Phase Formation and Growth, VCH, Wenheim, 1996. G. Gunawardena, G. Hills, and I. Montenegro, J. Electroanal. Chem., 138, 241 (1982). G. Gunawardena, G. Hills, I. Montenegro, and B. Scharifker, J. Electroanal. Chem., 138, 225 (1982). B.R. Scharifker, and G.J. Hills, Electrochim. Acta, 28, 879 (1983). G. Gunawardena, G. Hills, and I. Montenegro, J. Electroanal. Chem., 138, 241 (1982). A. Milchev,E. Vassileva, and V. Kertov, J. Electroanal. Chem., 107, 323 (1980). D. Walton, in Nucleation, ed. Zettlemoyer, Marcel Dekker, (1969). S. Stoyanov, in Current Topics in Materials Science, Vol. 3, ed. Kaldis, North Holland, Amsterdam, (1978). G. Scherb and D.M. Kolb, J. Electroanal. Chem., 396, 151 (1995). A. Milchev and E. Vassileva, J. Electroanal. Chem., 107, 337 (1980).(1997). P.M. Vereecken, K. Strubbe, and W.P. Gomes, J. Electroanal. Chem., 433, 19 (1997) E.H. Rhoderick and R.H. Williams, Metal-Semiconductor Contacts, Oxford, New York (1978).

Electrochemical Society Proceedings Vohlme 99-9

FIGURES

-U (V vs. Ag/AgCl)

-U (V vs. Ag/AgCI)

o

W(E)W(E)

...............................

e E.

ECB V

d

0

0.5

I

0-

0.5

vB

--

u-

-8

t pH 14

15

Figure 2: Current-potential curves for nSi(100) in aqueous solutions at pH 14 with: (a) I M KCN, (b) 0.2 M KCN, and (c) 0.008 M KCN. Curves (d) and (e) refer to the first and third sweeps in 50 mM KAu(CN) 2 solution with I M KCN at pH 14. The scan rate was 10 mV s-1 in all cases.

1-

....

0.2

c

--1.2•

e

-15

...........

.

"J"> ,

-I

U (V vs. Ag/AgCI)

pH 1

Figure 1: Energy band diagram for n-Si (100) in contact with aqueous solutions at pH 14 and 1, with the redox couple Au/ Au(CN)2 (the Au(CN)2 levels are shown) and Au/AuCl4-. Deposition from Au(CN)2 " can occur by electron transfer from the conduction band, while AuCl 4 can inject holes into the valence band.

-0.4

11U' -2

-1.4

-0

1o-

4

to- 3

2

t0o-

t

10

[Au(CN)"] / [CN-]2

U (V vs Ag/AgCt) Figure 3: Current - potential curves (first scan) for n-Si(100) in 2 mM KAu(CN) 2 solution at pH 14 with: (b) 2 M KCN, (c) 0.6 M KCN, (d) 0.2 M KCN, (e) 0.06 M KCN, and (f) 0.02 M KCN. Curve (a) shows the curve for silicon in 0.04 M KCN (pH 14). The scan rate was 10 mV s-1.

1o-

Figure 4: The equilibrium potential (in), the OCP before the first scan (0), the peak potential in the first scan (A), and the OCP after the first scan () for n-Si in the 2 mM KAu(CN) 2 solutions at pH 14 at the same KCN concentrations as in Figure 3 versus the concentration ratio.

Electrochemical Society Proceedings Volume 99-9

327

lolx

0

I~il

-

5-e

.'d 0E.5/

109 -

1 t/t

0 ,10, 1

108 0.1

0. 0.1

10

0.3

0.2

3

2 max 0.4

0.5

t (s)

t (s)

Figure 5: The nucleus density as a function of the pulse length for deposition at 1.30 V from 2 mM KAu(CN) 2 + 0.2 M KCN (pH 14) determined using SEM. The nuclei were grown at -1.1 V after the nucleation pulse so2 that the deposition charge was -3.0 MC cms in all cases. mC mand

Figure 6: Current transients in 2 mM KAu(CN) 2 with 0.2 M KCN at pH 14 for potential steps from the OCP to: (a) -1.65 V, (b) -1.60 V, (c) -1.55 V, (d) -1.50 V, (e) 1.45 V, (f) -1.40 V. The inset shows the dimensionless plots at: (a) -1.65 V, (b) -1.55 V, (c) -1.45 V, and (d) -1.29 V. The solid dotted lines correspond to the curves for progressive and instantaneous nucleation and diffusion limited growth, respectively.

i0I 101

I

I

0

,

10-

,

10-

3

010

00

108

5

100

oo 01

I

-1.8

I -1.6

,

I -1.4

,

U (V vs. Ag/AgCI) Figure 7: The logarithm of the nucleation rate, AN 0 , versus the applied potential for experiments in four concentrations of KAu(CN) 2 : (LI) 50 mM, ( ) 10 mM), (o) 2 mM, and (V) 0.5 mM.

328

I

i -1.2

-1.8

-1.6

-1.4

-1.2

U (V vs. Ag/AgCI) Figure 8: The nucleus density versus the applied potential for a 2 mM KAu(CN) 2 + 0.2 M KCN (pH 14) solution, determined from AFM. Also shown is the nucleus density obtained from SEM using a 50 mM KAu(CN) 2 +1 M KCN (pH 14) solution.

Electrochemical Society Proceedings Volume 99-9

CO-DEPOSITION OF AU-SN EUTECTIC SOLDER USING PULSED CURRENT ELECTROPLATING J. Doesburg and D. G. Ivey Department of Chemical and Materials Engineering University of Alberta Edmonton, Alberta, Canada T6G 2G6

ABSTRACT Au-30at.%Sn eutectic solder is used in optoelectronic applications, particularly to join InP devices to the submount. The solder can be applied using solder preforms, paste, electron-beam evaporation or electrodeposition. In this study, pulsed current electrodeposits were formed using a solution based on: 200 g/l ammonium citrate, 5 g/l KAuCI 4, 2-5 g/l SnCl2-2H 20, 60 g/l sodium sulfite, 15 g/l L-ascorbic acid, and 0.01-0.11M ethylene diamine. The effects of changing the ethylene diamine and SnCl 2-2H 20 concentrations on the structure of the deposits were observed using scanning electron microscopy and x-ray diffraction. The addition of ethylene diamine to the Au/Sn plating solution leads to a higher deposition rate, as well as a coarser grain structure. Decreasing the Sn content in the solution leads to a lower Sn content in the resulting deposit. Increasing the average current density during plating affects the homogeneity of the structure in the electroplated deposit, with a loss of preferred orientation. BACKGROUND Au-30at.%Sn eutectic solder is used in optoelectronic applications, particularly to join InP devices to the submount in a flip-chip assembly. The submount is generally CVD diamond, and the solder serves the purpose of heat dissipation, mechanical support and electrical conduction. The most commonly used solders for bonding in electronic packaging are based on the Pb-Sn system. These alloys have low melting temperatures (183 0 C - 312°C), and are characterized by high creep rates and stress relaxation, as well as surface and microstructural changes.' For optoelectronic devices, higher melting Au eutectic alloys are used, such as Au-Sn (278 0C), Au-Ge (361'C) and Au-Si (364°C). The advantages of the higher melting solders include increased thermal stability and long term reliability. 2 The Au-30at.%Sn solder has some advantages over the other Au based solders in that it has the highest strength, lowest elastic modulus and lowest melting temperature of this group of solders. The Au-Sn solder also has a high thermal conductivity compared to other solders, which makes it an attractive choice for packages which run hot, such as laser devices.

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Au-30at.%Sn solder can be applied using solder preforms (20-50grm in thickness), paste, electron-beam evaporation or electrodeposition. Solder preforms are problematic for flip-chip applications due to alignment trouble and oxidation of the solder prior to bonding. Solder paste also suffers from oxidation prior to bonding, in addition to the possibility of solder contamination during bonding from the organic binder in the paste. Electron-beam evaporation and electrodeposition are advantageous for Au-Sn solder deposition in that the oxide formation prior to bonding can be reduced and the thickness and position of the solder can be closely controlled. The sequential evaporation of Au and Sn layers to produce a deposit of desired composition has been successfully employed, 24 along with co-evaporation techniques. 5 The electrodeposition of Au-Sn solder has followed the method of plating Au and Sn layers sequentially from separate Au and Sn solutions.6 A slightly acidic solution for the co-deposition of Au-Sn solder composed of 200 g/l ammonium citrate, 5 g/l KAuCI4, 5 g/l SnCl 2-2H 2 0, 60 g/l sodium sulfite, 15 g/l L-ascorbic acid, and 1 g/l NiC12 for the co-deposition of Au-Sn solder has also been reported.7 It has been found that the addition of 0.08M ethylene diamine to the solution resulted in an increase of solution stability from 15 days to over 30 days. This paper studies the effects of the addition of ethylene diamine to the Au-Sn plating solution reported in ref.[7]. The changes in the composition and microstructure of the Au-Sn solder coating produced by pulsed current electrodeposition are noted. The electroplating solution developed for the co-deposition of Au and Sn is slightly acidic so that it can be used in conjunction with alkaline-developable photoresists. EXPERIMENTAL METHOD The test samples for the experiments were cleaved from InP wafers containing a blanket 25 nm Ti/250 nm Au metallization. The initial solutions used for this experiment contained the following: 200 g/l ammonium citrate, 5 g/l KAuCI4, 5 g/l SnCI 2-2H 20, 60 g/l sodium sulfite, 15 g/l L-ascorbic acid, and between 0 and 0.11 M ethylene diamine. Firstly, a set of cathodic polarization tests was performed on the solution and test wafers, varying the ethylene diamine content. The tests were carried out using a platinum anode, and using a saturated calomel electrode as a reference. The voltage was varied from 0 V to -1.2 V at a rate of 0.5 mV/s. Subsequent to this, plating trials lasting between 90 and 180 minutes were performed using an inert Pt anode. During electroplating, the current was pulsed using a square wave with an on time of 2 mis and an off time of 8 ms, and a2 number of tests were carried out varying the current density between 1.2 and 3.6 mA/cm for each solution. A second set of plating trials was made keeping the ethylene diamine concentration constant at 0.01-0.02M, and varying the SnCl 2 -2H 2 0 content in the solution between 2 and 5 g/l. The composition of the deposited solder was measured by energy dispersive x-ray measurements using standards in a scanning electron microscope. For each deposit, four square regions measuring 1.5 mm per side were sampled. A scanning electron microscope with a field emission source was employed for the micrographs of the samples. X-ray diffraction measurements were also made on selected samples, in order to determine the structure and orientation of the deposits.

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RESULTS AND DISCUSSION The cathodic polarization data is plotted in Figure 1. The initial, gently sloping part of each curve corresponds to the potentials at which mostly Au is plated, while the rise in the curve between 1.0 and 2.4 mA/cm 2 is related to the inclusion of Sn in the deposit . With a further increase in negative potential, the curves stay relatively flat until about -1 V, where they begin to rise sharply as hydrogen evolution becomes the dominant reaction. The curves shift to lower potentials and current densities with an increase in ethylene diamine concentration in the solution. From this data it appears that the addition of ethylene diamine decreases the range of current densities for which plating will occur. Using this information, a large number of plating runs were performed using the solution containing 0.01-0.02M ethylene diamine, since the decrease in current density range was not as great as for the solutions containing higher concentrations of ethylene diamine. Figure 1: Cathodic polarization curves for solutions with varying ethylene diamine concentrations. -0.014 ,f-' -0.012-0.010 -0.008 -0.006 .-0.004

no EDA

01-0.02M EDA

.0.002

0.05-0.06M EDA 0.11M EDA

0.000 -0.60

-0.70

-0.80

-0.90

-1.00

-1.10

Voltage vs. SCE (V) The Sn content of the deposits is given in Figure 2. At current densities between 1.0 and 2.2 mA./cm 2 , there is a trend towards an increase in Sn content between about 10 and 50at.%, although there is a large amount of variability in the data. This current range corresponds to the near vertical rise in the polarization curve in Figure 1 at -.73 V. Between 2.2 and 3.2 mA/cm 2 , the Sn content remains close to 50%, and falls off at current densities beyond 3.2 mA/cm 2, as hydrogen evolution and a 'burned' deposit are observed. Plating tests conducted at other ethylene diamine concentrations are shown in Figure 3. When no ethylene diamine is present in the solution, the 50at.%Sn plateau is reached at 2.4 mA/cm 2, while at a concentration of 0.05M-0.06M ethylene diamine, the plateau begins at 1.4 mA/cm 2. This is consistent with the shift of the plateau of the polarization curve to lower current densities at higher ethylene diamine concentrations in Figure 1.

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Figure 2: Sn content vs. average current density for 0.O1M-O.02M ethylene diamine content. 60

54050

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Average Current Density (mA/cm ) When the ethylene diamine concentration of the solution is 0.1 IM, the highest tested in this study, the Sn content in the deposits never exceeds 20at.%. and 'burned' deposits are observed at current densities greater than 1.8 mA/cm 2. This is again consistent with the polarization curve for this solution, although the correlation between the Sn content in the deposit and the polarization curve is not clear. Figure 3: Sn content vs. average current density for varying ethylene diamine content. 60,

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Ethylene Diamine

9 0.11M Ethylene Diamine

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In the next set of experiments, the SnCI2-2H 20 content of the solution was varied between 2 and 5 g/l, while keeping the ethylene diamine concentration fixed at between 0.01M and 0.02M. The effect of the solution SnC12-2H 20 content on the deposit Sn content is shown in Figure 4. Plating tests were performed between 2.0 and 2.8 mA/cm 2, which is the range for the Sn plateau. As the Sn content in solution decreases, the Sn content of the deposit also decreases. With pulse plating it is possible to match the concentrations of alloys in solution with that of the composition of the deposit, 9 although the Au concentrations in the deposits are always higher than solution concentrations in this work. The Au concentration in a solution containing 5 g/l KAuCI4 is 0.013M, while the concentration of Sn in a solution containing 5 g/l SnC12 -2H 20 is 0.022 M, which would give an atomic Sn/Au ratio of 0.63/0.37. The reason that the solution plates 50at.%Sn may be due to the manner in which it is complexed in solution. In a solution containing 5 g/I KAuCI4 and 2 g/l SnCl2-2H 20 the Sn/An ratio changes to 0.41/0.59, which is still higher than the 30-35at.% Sn deposited. Figure 4: Sn content vs. average current density for 0.O0M-0.02M ethylene diamine with varying Sn content in solution. 55

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"--5

g4 Au -4 gI Sn

-5g/IAu-2g/1Sn

Figures 5 and 6 show secondary electron SEM images of the electroplated deposits in cross section and plan view, respectively for samples plated in a solution containing 0.OIM-0.02M ethylene diamine. The deposition rate increases between 1.2 and 3.2 mA/cm2 . Note that the plating time at 1.2 mA/cm 2 is 180 minutes, 90 minutes for the samples plated at 1.8 and 2.4 mA/cm 2, and 40 minutes for the sample plated at 3.2 mA/cm 2. The grain structure of the deposits also varies with an increase in current density. The sample plated at 1.2 mA/cm (Figures 5a, 6a) is gold rich and has a smooth surface containing fine pores about 0.1 gtm in diameter, while the samples plated at 1.8 and 2.4 mA/cm 2 (Figures 5a, 5b, 6a, 6b) exhibit a columnar structure which becomes2 more coarse with an increase in current density. The deposit formed at 3.2 mA/cm appears to have a mixed structure, the bottom two-thirds having a dense, feathery appearance, while the top third has a fine columnar structure.

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a) 1.2 mA/cm 2 (12at.% Sn)

b) 1.8 mA/cm 2 (46at.%Sn)

c) 2.4 mA/cm 2 (48at.% Sn)

d) 3.2 mA/cm 2 (49at.% Sn)

Figure 5: SEM cross section images of samples plated from solutions containing 0.01M-0.02M ethylene diamine.

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t1 a) 1.2 mA/cm 2 (12at.% Sn)

b) 1.8 mA/cm 2 (46at.%Sn)

c) 2.4 mA/cm 2 (48at.% Sn)

d) 3.2 mA/cm 2 (49at.% Sn)

Figure 6: SEM plan view images of samples plated from solutions containing 0.01M-0.02M ethylene diamine.

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a) No ethylene diamine (49at.% Sn)

b) 0.01M-0.02M ethylene diamine (48at.%Sn)

c) 0.05M-0.06M ethylene diamine (52at.% Sn)

d) 0.11 M ethylene diamine (17at.% Sn)

Figure 7: SEM cross section images of samples plated at 2.4 mA/cm 2 from solutions containing varying concentrations of ethylene diamine.

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a) No ethylene diamine (49at.% Sn)

b) 0.01M-0.02M ethylene diamine (48at.%Sn)

c) 0.05M-0.06M ethylene diamine (52at.% Sn)

d) 0.11 M ethylene diamine (17at.% Sn)

Figure 8: SEM plan view images of samples plated at 2.4 mA/cm 2 from solutions containing varying concentrations of ethylene diamine.

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Figures 7 and 8 show secondary electron images of deposits in cross section and plan view, respectively, for deposits plated at 2.4 mA/cm 2 for 90 minutes from solutions containing varying amounts of ethylene diamine. The deposit formed from the solution containing no ethylene diamine (Figures 7a, 8a), is columnar, as is the deposit plated from the solution containing 0.01M-0.02M ethylene diamine (Figures 7b, 8b). There is little difference in thickness in these two deposits, but the grain size of the deposit plated from the solution containing 0.01M-0.02M ethylene diamine is larger. The deposit formed in the solution containing 0.05M-0.06M ethylene diamine is thicker and has a dense, feathery appearance resulting in needle-shaped grains (Figures 7c, 8c). Finally, the solder deposit electroplated in the solution containing 0.1 IM ethylene diamine is thinner and coarser than the other deposits (Figures 7d, 8d). From these micrographs it can be observed that increasing the ethylene diamine concentration of the electroplating solution up to 0.05-0.06M increases the deposition rate, and increases the roughness of the deposit. Table I: X-ray diffraction data for Au/Sn solder deposits. Average Current Density (mA/cm 2 ) 1.4 1.6 1.8 2.0 2.4 2.8 3.2 3.6

Average Sn Content (at.%) 16.4 46.4 32.1 37.4 46.5 45.5 48.2 40.1

Major Phase Present Au5 Sn AuSn AuSn AuSn AuSn AuSn AuSn AuSn

Preferred Orientation

001 110 110 110 110 -------------

X-ray diffraction was carried out on selected samples deposited from the solution containing 0.01M-0.02M ethylene diamine, and the results are given in Table I. The deposit formed at 1.4 mA/cm 2, which has a low Sn content was found to be mostly Au 5 Sn, oriented with the (001 ) planes parallel to the wafer surface. The electrodeposits formed at current densities ranging between 1.6 and 3.6 mA/cm 2 all have AuSn as the dominant phase, which would be expected since the Sn content of these coatings is close to 50at.%. The deposits plated between 1.6 and 2.4 mA/cm 2 also have a preferred orientation, with the AuSn (110) planes parallel to the wafer surface, while preferred orientation is lost at current densities higher than 2.4 mA/cm 2 . It is believed that the structure of a deposit depends on the relative rates of formation of crystal nuclei versus the growth of existing crystals. 10 As current density increases, the rate of nucleation rate increases, which is consistent with the loss of preferred orientation observed in the x-ray diffraction results. These results can be related to the observed microstructures, as the micrographs for the deposits plated at 1.8 and 2.4 mA/cm 2 (Figures 5b, 5c) show a columnar structure, matching the preferred orientation found in the x-ray data for these current The deposit 3.2 mA/cm2 oriented,densities. which is also reflectedplated in theatx-ray data. (Figure 5d) is much less columnar or

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CONCLUSIONS The addition of between 0.01M and 0.06M ethylene diamine to a chloride salt-based Au/Sn plating solution affects the microstructure of the electroplated deposits, as an increase in ethylene diamine concentration leads to a higher deposition rate, and a resulting coarser grain structure. An ethylene diamine content of 0.11M is detrimental to Au/Sn alloy plating. Decreasing the Sn content in the solution leads to a lower Sn content in the resulting electrodeposit. Lastly, the average current density during plating affects the homogeneity of the structure in the electroplated deposit, with a loss of preferred orientation as the current density exceeds 2.4 mA/cm 2 . ACKNOWLEDGMENTS

The authors would like to thank Nortel Networks and the Natural Sciences and Engineering Council (NSERC) of Canada for funding this project. REFERENCES 1. W. J. Plumbridge, Journalof MaterialsScience, 31, 2501-2514 (1996). 2. A. Katz, C. H. Lee and K. L. Tai, Materials Chemistry and Physics, 37, 304-307 (1994). 3. C. C. Lee, C. Y. Wang and G. Matijasevic, IEEE TransactionsComp. Hybrids, Manufacturing Technology, 14, 407 (1991). 4. L. Buene, H. Falkenberg-Areil and J.Tafto, Thin Solid Films, 65, 248 (1980). 5. D. G. Ivey, Micron, 29, 251 (1998). 6. C. Kallmayer, H. Oppermann, G. Engelmann, E. Zakel and H. Reichl, 1996 IEEE/CPMTInt'l Electronics ManufacturingSymposium, (1996) p. 20. 7. W. Sun and D. G. Ivey, Materials Science and EngineeringB, accepted June 1999, 29 manuscript pages. 8. W. Sun, MSc Thesis, University of Alberta (1998) pp. 77-81, 85. 9. H. Leidheiser Jr. & A. R. P. Ghuman, J Electrochem. Soc., 120, 486 (1973). 10. W. H. Safranek, Plating & Surface Finishing,75, 10 (June 1988).

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ZINCATION TREATMENTS FOR ELECTROLESS NICKEL UNDER-BUMP METALLURGY IN THE FLIP-CHIP PACKAGING 2 Tze-Man Ko'*, Wei-Chin Ng', William T. Chen 'National University of Singapore, Chemical & Environmental Engineering Department, 2 10 Kent Ridge Crescent, Singapore 119260 Institute of Materials Research and Engineering, Blk S7, Level 3, Lower Kent Ridge Road, Singapore 119260 *Contact person. E-mail: [email protected], Tel: (65) 8745004, Fax: (65) 7791936

ABSTRACT One of the methods to mount a flip chip is by solder bumping that utilizes Ni/Au metallurgy as the under-bump material. Experiments were carried out to determine the optimum conditions of the aluminum surface for nickel adhesion, through the studies of surface morphology and transformation during pretreatment. Zincation baths were used to condition the aluminum surfaces for nickel plating. The effects of the period and the number of times of the zincation process to the mechanical strength of the electroless nickel deposits were investigated. From the SEM and AFM characterization, transitions of zinc grain size and surface roughness were observed. Grains were large with distinct grain boundaries for immersion time of 5 s but decreased in size and lost their characteristic shapes as the zincation time increased. A double zincation produced a more compact deposit with smaller size grains compared to single zincation. Length of immersion time during the second zincation also affected the physical properties such as shear strength after 1 h of electroless nickel plating on the 80 [tm x 80 Pjm Al bond-pads of a commercial bare microchip. By using SEM-EDX and XPS, the elemental composition transitions of the zinc deposits formed by different zincation time and bath compositions are also investigated. INTRODUCTION Flip chip technology is a simple idea of 'flipping a chip' to connect its device I/Os downside directly on the printed circuit boards. The apparent advantages are shorter electron pathways, increased number of I/Os per unit area for increased speed and power, cost reduction, and increased package density [1]. The mounting of flip-chip by utilizing UBM (under-bump metallurgy) forms the basis of our study in this paper (Fig. 1). Nickel bumps act as adhesive layers for stable and reliable contacts to the Al bond-pads, protect Al from oxidation, and form a diffusion barrier for subsequent layers or contacts. The process of Ni bumps mounting engages wet chemistry through an electroless plating bath, avoiding the more expensive photomasking since the reaction is selective and autocatalytic [2]: Oxidation: Zn -+ Zn2+ + 2e' H2PO2" + H2 0 -- H2PO3 + 2H+ + e'

E 0 = 0.76 V E0 = 0.50 V

Reduction:

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Ni 2÷ + 2e - Ni0 Overall: Zn + 2H 2PO 2 + 2Ni 2+ + 2H 20

E0 = -0.25 V -4

Zn2+ + 2H 2PO3" + 2Ni + 4H+

E0 = 1.26 V

Typically, before Ni coating on Al, a zincation pretreatment of the Al is essential to enhance the Al-Ni interfacial contact, acting as a sacrificial layer during the autocatalytic electroless nickel plating process [3]. This paper focuses on the zincation treatments for electroless nickel plating by analyzing the surface morphology and the deposited Ni properties. EXPERIMENTAL Zinc pretreatment baths are prepared by varying the amount of zinc oxide in a strong alkaline bath. A commercial zincation bath is also analyzed for the purpose of comparison. Three different types of substrates are used: CMOS wafer chips with multiple Al bond pads, sputtered silicon wafers, and silicon wafers coated with e-beam evaporated Al. Morphologies of the 3 types of substrates vary in terms of grain size and roughness (Fig. 2). Thickness of the Al films ranges from 5000 A to 1 Pim. Experiment I A commercial zincation bath is used. Single zincation time is varied between 030 s, and a second zincation time of 5-30 s. CMOS wafer chip samples are retained after each designed stage. Process steps like degreasing, soak clean and rinsing is the same for all experiments. The following outlines the typical zincation process for electroless nickel plating: Step 1: Degrease, 5 min at 60'C. Step 2: Soak clean, 5 min at 60'C. Step 3: NaOH etch for 15 s at room temperature. Step 4: 1st zincation at room temperature. Step 5: Nitric acid etching for 10 s at room temperature. Step 6: 2 "dzincation at room temperature. Step 7: Electroless nickel plating at 90'C for 1 h (only for CMOS chips) Experiment 2: Solution I (100g/l of ZnO) is used (Table 1). Samples are retained at each individual step. Run 1 sample is just after NaOH etch. Run 2 is just after nitric acid etch, but without any zincation. All 3 types of substrates are used. Only CMOS wafer chips are plated with electroless Ni for 1 h after each run. Table 1. Experiment 2 Runs 1-9. Run Samples I NaOH etch and rinsed 2 Nitric acid etch and rinsed 3 5 s single zincation 4 10 s single zincation 5 20 s single zincation 6 30 s single zincation 7 30 s for 1st and 5 s for 2" zincation

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8 9

30 s for I st and 20 s for 2"d zincation 30 s for 1st and 30 s for 2" zincation

Experiment 3: Solutions 1-5 are used (Table 2). Samples at 30 s single zincation and 30/30 s double zincation are retained [4]. SEM-EDX is done on single zincation whereas XPS done only for double zincation. CMOS wafer chip and sputtered Al silicon wafer are zincated but only CMOS wafer chips are electroless nickel plated for 1 hour. Table 2. Experiment 3 zincation solutions 1-5. 2 3 1 Solution 50 75 100 ZnO (g/1) 500 500 500 NaOH (g/l)

4 125 500

5 150 500

RESULTS AND DISCUSSION Degrease and soak clean Commercial cleaning solutions are used in the pre-clean step. From optical microscopy and AFM results, both steps do not adversely affect the surface of the aluminum bond pads for all 3 types of substrates. Cleaning is done at 60'C for 5 min. NaOH etch Aluminum etching takes place in the NaOH bath. Dissolution rate of aluminum during NaOH etch can be determined [5]. From the AFM scans, surfaces of the aluminum are roughened slightly during the 15 s bath time. Nitric acid etch Aluminum etching also takes place during the 10 s nitric acid dip. Being a stronger etching bath than the NaOH bath, aluminum surfaces are more adversely etched but roughened evenly. Following the I" zincation, nitric acid further roughens the aluminum surface with the deposited zinc grains. Removal of the deposited zinc is possible during the acid etching; however, the purpose of homogenizing the zinc layer is also achieved after the nitric acid etch. First zincation For all 3 types of substrates, the distinct feature of 1st zincation after a period of 5 to 30 s immersion time is the extreme roughness of the surfaces (Fig. 5). From SEM/EDX analysis, large grains of zinc form the major bulk of the deposition. Coverage by these grains is neither homogeneous nor extensive. Aluminum is still detected on the uncovered areas. However, dissolution of the large grains into smaller and finer grains proceeds as immersion time lengthens. From 5 s immersion, both AFM and SEM show large hexagonal shaped deposits of sizes up to 2 jim [6]. As immersion time is increased to 20 s, coverage of the area increases but the average particle size is decreased to less than 1 Vim. By the 3 0 th second, the surface is extensively covered by small, singular pieces of zinc, with gaps of aluminum among the covered areas.

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Second zincation Before the 2 zincation takes place, nitric acid is used to homogenize the prezincated surface in roughness and coverage. After the 2 nd zincation, from optical microscopy, the surface is lighter in color and shade compared to the surface after the I"s zincation which is much darker and rougher. From the SEM and AFM results (Fig. 6), grain size of zinc is markedly reduced even after only 5 s immersion, with the I` zincation fixed at 30 s for all samples. Particles are minute and in submicron range throughout the covered region. AFM results show that the film coverage develops as immersion time increases. There are no distinguishable grain boundaries similar to those after the 1st zincation. As the zincated film is too thin for SEM/EDX analysis, XPS is performed for all doubly zincated films with a spot size of 150 [Lm x 150 ýum. For all zincation solutions 1-5, aluminum is not detected on the surface by XPS after a double zincation of 30 s. This same trend is observed when using the commercial zincation solution on the CMOS wafer chips. Zincation solutions 1-5 Zincation solutions I to 5 are strong alkali solutions containing 500 g/l of NaOH each (Table 2) [7], with varying amounts of zinc oxide added. The lowest ZnO concentration is solution 2 (50 g/l); the highest is solution 5 (150 g/l). Solution 1 is the chosen standard solution at 100 g/l. Zincation experiments are performed for all 5 solutions on sputtered Al substrates. Single zincation is done at 30 s immersion time whereas double zincation is done at 30/30s. After single zincation, samples reveal large particles of deposited Zn. SEM and SEM/EDX results (Fig. 7) show that the distribution of the particles on the Al bond pads is random with varying grain sizes. However, SEM/EDX results also reveal that the dark regions on the SEM micrographs are not covered by Zn. Strong Al signals are depicted after 30 s of single zincation immersion for all 5 types of zincation solutions on these dark areas. There is no distinguishable difference for all 5 types of solutions after single zincation on SEM. After double zincation, sizes of the Zn grains are markedly reduced. Basically, a thin film of Zn is coated on the Al. XPS results (Fig. 8) do not show a proportional relationship between the ZnO concentration in the zincation baths vs Zn concentrations or grain sizes in the deposited zincation films. Electroless nickel plating Runs 1-9 A controlled set of experiment is performed to determine the shear force properties of Ni-P bumps plated by electroless method on the Al bond pads of the CMOS chips. A commercial electroless nickel bath, with hypophosphite as the reducing agent in the solution, is used throughout for consistency. Zincation solution 1 is chosen for the zincation bath. The Al bond pads of the CMOS chips are coated with electroless Ni and sheared [8]. At least 5 bond pads in the same region of the chip are sheared in order to obtain an average for statistical comparison. Samples of Runs I and 2, which are only cleaned and etched by NaOH and HNO 3, show poor adhesion or no adhesion of the Ni bumps on the Al bond pads (Figs. 9a and b). On some Al bond pads, Ni does not even form on the surfaces after I h of electroless nickel plating. In general, the electroless nickel formed in Runs 1 and 2 are not uniform and cannot be controlled. For Runs 3-9, SEM micrographs (Figs. 9c and d) show that uniform Ni bumps with good surfaces are formed after 1 hour of electroless nickel plating. Although the zincation time is varied in these runs, homogeneously formed electroless Ni is found on all Al bond pads even after just 5 s single zincation dipping. Comparing Runs 3 to 9, there is no significant

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difference in the appearance of the deposited electroless Ni bumps although the surfaces of those treated by double zincation appear to be smoother and more uniformly coated than those treated by single zincation. Shear force tests are performed for samples of Runs 3-9 using the DAGE series 4000 shearing machine (Fig. 10). All of the measured shear strength of the nickel bumps formed on the 80 lim x 80 Rtm Al bond pads exceeds 100 g force. The average is about 140 ± 20 gf. A slight decrease in shear strength is recorded for samples of Run 6, which is a single zincation for 30 s. The highest shear strength is measured for samples of double zincation at 30/30 s of about 158 gf. Electroless nickel plating for zincation solutions 1-5 The shear forces of all electroless nickel bumps formed from zincation solutions 1-5 exceed 100 g. The lowest shear forces recorded are samples from zincation solution 2 at single zincation and the highest values are those from zincation solution 1 at double zincation. SEM micrographs depict smooth and uniform nickel plating on the Al bond pads for all the zincation solutions except zincation solution 2 which shows a more 'bumpy' morphology than the others (Fig. 11). The overall plating rate of the nickel bumps is approximately 15 [um/h obtained by measuring the cross-sectional thickness after 1 h electroless nickel deposition. Fig. 12 also shows that the shear forces of the nickel bumps on the Al bond pads are generally slightly higher by a double zincation treatment than a single zincation treatment. CONCLUSION Zincation treatment is applied on Al bond pads in order to activate the Al surfaces for the adhesion of electroless Ni bumps. Large particles of Zn are deposited on the Al bond pad surfaces within the first few seconds of zincation. As immersion time proceeds, the size of the particles gets smaller but the coverage of the substrate by Zn particles increases. By SEM/EDX analysis, the dark regions between the deposited particles are shown to remain as untreated Al. Grain boundaries are distinctly observed. Variation of the ZnO content in the zincation baths does not have a visible impact to the deposition during first zincation. Nitric acid etch after the Ist zincation homogenizes the surface before deposition by the 2 nd zincation takes place. SEM and AFM results show that the doubly zincated films are much more compact than the singly zincated films. XPS shows extensive coverage of a thin layer of Zn on the doubly zincated Al surfaces. Reduction of grain size takes place when the zincation time increases while the coverage of the surface increases. The same trends of the zincation effects are observed on all 3 types of Al substrates and of all 5 types of zincation solutions as well as the commercial zincation bath solution. Shear force test results show good mechanical properties of the deposited electroless Ni bumps with an average of 140 gf on the 80 pum x 80 prm Al bond pads, with the highest of zincation solution 1 after a double zincation treatment. In contrast, samples without zincation treatments show poor adhesion characteristics or no nickel formation at all. Therefore, a zincation pretreatment of the Al substrates is essential for good electroless nickel bump formation.

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ACKNOWLEDGMENTS 1. Plaschem Co. kindly supplies the soak cleaning, zincation and electroless nickel solutions for the experiments. 2. Millice Co. is greatly appreciated for allowing us to use their DAGE series 4000 shear force testing machine. 3. The Department of Physics at the National University of Singapore provides tremendous support for the use of the AFM, XPS and sputtering equipment. 4. XPS data are obtained with the kind assistance of Dr. Li Kun from the Institute of Materials Research and Engineering. 5. The e-beam evaporated Al films are deposited by Mr. Walter Lim in the Microelectronics Laboratory of the Department of Electrical Engineering at the National University of Singapore. REFERENCES I. J.H. Lau, Flip Chip Technologies, McGraw-Hill, New York (1995). 2. G.O. Mallory, Electroless plating: Fundamentals and Applications, ASM International, Ohio (1991). 3. W. Riedel, Electroless Nickel Plating,American Electroplaters and Surface Finishers Society (1990). 4. C.C. Tsui, T.B. Lim, Y.C Teo, and C.Q. Cui, "Low cost underbump metallization by electroless Ni/Au plating," EEP-Vol. 19-1, Advances in Electronic Packaging, 119123, ASME (1997). 5. S.G. Robertson, I.M. Ritchie, and D.M. Druskovich, "A kinetic and electrochemical study of the zincate immersion process for aluminum," J Appl. Electrochem., 25, 659-666 (1995). 6. X.G. Zhang, Corrosion and Electrochemistry of Zinc, Plenum Press, New York (1996). 7. J.I. Han, S.I. Hong, "Nickel electroless plating process for solder bump chip on glass technology," Jpn. J Appl. Phys., Vol. 36, 2091-2095 (1997). 8. G. Motulla and K. Heinricht, "A low cost bumping service based on electroless nickel and solder printing," Advances in Electronic Packaging,19(1), 57 (1997).

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Fig. 1. UBM - Nickel bump on Al bond pad.

Ni paissivation

w ;:fIr

SI Al bondpad Si wafor

"

Fig. 2. a and b: AFM (- 8000 A) and XPS of CMOS wafer chip; c and d: AFM (- 1 pm) and XPS of sputtered Al on silicon wafer; e and f: AFM (5000 A) and XPS of e-beam evaporated Al on silicon wafer.

(b()

(d

Fig. 3. AFM scans after (a) NaOH etch and (b) nitric acid etch for CMOS chip.

Vat

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Fig. 4. SEM micrographs after (a) NaOH etch and (b) nitric acid etch for CMOS chip.

a)

(~b):=,

Fig. 5. AFM of CMOS wafer chip after single zincation of (a) 5 s, (b) 20 s, and (c) 30 s; AFM of sputtered Al after single zincation of (d) 5 s and (e) 30 s; AFM of e-beam evaporated Al after single zincation of (f) 30 s.

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Fig. 6. AFM of CMOS wafer chip after a double zincation of (a) 30/5 s, (b) 30/20 s, and (c) 30/30 s; AFM of sputtered Al after a double zincation of (d) 30/5 s, (e) 30/30 s; AFM of e-beam evaporated Al after a double zincation of(f) 30/30 s.

(I)

(C)

i(d)

(Cc

]I)I

Fig. 7. (a) SEM of 30 s zincated surface by zincation solution 2. (b) SEM/EDX on a grain of the 30 s zincated surface by zincation solution 2 showing that the grain is predominantly zinc. (c) SEM of 30/30 s zincated surface by zincation solution 1. (d) XPS of 30/30 s zincated surface by zincation solution I showing no Al on surface.

'V6

(a)

(c)

348

At

(b)

(d)

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Fig. 8. A typical XPS surface survey scan of detectable elements after double zincation at 30/30 s on sputtered Al substrates.

14-

Peak Baground

(

12C ---

1C

Zn so 600

Zn 40i I II

1200

S

li 1000

,i

600

600 Binding Energy (WY)

400

71

i0 200

Fig. 9. SEM of electroless nickel plated Al bond pads on CMOS chips of (a) Run 1, (b) Run 2, (c) Run 3, and (d) Run 9.

(c)

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Fig. 10. Shear force results for samples of Runs 3-9.

S180

30/30s

C.)

c

30/15 140

0)

gge

2

Double

Zincation

.Zincatdon

100

3

6 Run Number

9

Fig. 11. SEM of electroless Ni bumps on Al bond pads formed from (a) zincation solution 2 and (b) zincation solution 5 by double zincation treatments.

(a)3oSoV

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Fig. 12. Shear forces of electroless nickel bumps formed on Al bond pads after treatment by different zincation solutions: (a) single zincation treatment and (b) double zincation treatment.

Single zincation 160.00

S(

140.00

120.00 50

100 ZnO concentration (g/l)

150

(a) Double zincation 160.00

140.00

120.00 50

100 ZnO concentration (g/l)

150

(b)

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MICROFABRICATION OF MICRODEVICES BY ELECTROLESS DEPOSITION T.N.Khoperia Institute of Physics, Georgian Academy of Sciences 6 Tamarashvili st., 380077, Tbilisi, Georgia Fax:(995 32)536937 E-m ail: tek_! phy i.s.ce•. 4..p.g

1. INTRODUCTION

At present, metallization of dielectrics and semiconductors is carried out either by means of high-temperature, long fusing of metal-containing pastes, or by means of sputtering, condensation at vacuum-thermal evaporation, deposition from vapor-gas mixtures, electroless metallization with preliminary activation by the salts of noble metals, etc. (1-32). Among disadvantages

of the existed methods of metallization are:

large

consume and lose of noble metals, long time for making devices, complexity and expensiveness of equipment for vacuum or steam-gas metallization, high energy consumption, the difficulty of obtaining the coatings of uniform thickness on the articles having complex profiles, in some cases, impossibility of plating the inner, hardly accessible

surface, especially of small hollow articles, difficulty of continuous metallization of three-dimensional articles, difficulty of alloy deposition of the given chemical and phase compositions and given structures, difficulty of obtaining of thin selective, pore-free coating or thick coating with low internal stress and with high adhesion to the substrate by electroless method metallization on polished dielectrics. Many of these disadvantages of the existing methods of metallization are excluded when

integrating electroless deposition and electroplating with vacuum-

thermal evaporation and deposition from vapour-gas mixtures (1-6,13,18,28-31). According to the results of the proposed investigations disadvantages

are excluded

all above mentioned

and coatings with predetermined

properties are obtained, in particular, on the basis of nickel

physical-chemical

alloys with different

metalloids and metals (1-6,13,18,29-31). The department headed by the author of the article, the thorough investigations of electroless plating by pure metals and alloys of dielectric, semiconducting and metallic materials began thirty years ago (5,6). The developed technological processes were widely introduced into microelectronics, radioelectronics, piezoengineering, computing and aerospace techniques of Commonwealth of Independent States (1-7, 0, !3, 15, 18,29-31).

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2. EXPERIMENTAL

The results of investigations of adsorption and desorption of tin and palladium ions obtained by the methods of radioactive isotopes, XPS and photometry under different experimental conditions (1-4, 13, 15, 18, 25, 30). The glass and quartz plates were immersed into the solution containing 113 Sn and 103 Pd radioactive isotopes introduced as chlorides. Radioactivity of samples relative to 13-radiation was measured

by

gas-flow

counter, MCT-17. Measurement precision was ± 5% and the data reproducibility 30%. The sensitization

and subsequent activation of samples, with the exception of

specific cases, were carried out in the following solutions: SnCI 2 2H 2 0 - 20 g/l, HCI conc.- 40 ml/l, pH 0.5 for 10min and PdCI 2 2H 2 0 -1.5 g/l, pH 2, respectively. For

investigating

the

adsorbed

ion

states,

serial

X-ray

photoelectron

spectrometer ES-100 was used. The samples

were attached to holders and were placed in the spectrometer

chamber, which was evacuated to - 6 • 10 -5 Pa at -100 0 C. Surface concentrations were determined by measurement of intensity relative to Si2p intensity. Precision of E bonding determination was ± 0,2 eV, precision of surface concentration determination was -20%. Atomic ratios were determined according to the following equation (1): Me Si

I'A cs, As, I,

0

2

C Akl Am

where Me/Si is the atomic ratio of metal and Si, IMe/ISi intensity of Me and Si, o Me and aSi

is the measured ratio of

are the sections of

photoionization of

corresponding levels for metal and silicon; XMe and XSi are the depths of free leakage of photoelectrons with the given kinetic energies; in the first approximation X was supposed to be proportional to E 1 /2 kin (1).

3.RESULTS AND DISCUSSION

When the glass had not been sensitized in advance but

only activated, the

number of the adsorbed palladium ions is several times less under the same conditions (1-4,25).

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The number of palladium adsorbed on the glass appeared to be greater, than that of tin ions. It is shown that the existence of adsorbed tin ions ensures not only a greater amount of palladium on the glass, but also a greater strength of bonding palladium to the surface. Reduction of the adsorbed Pd (II) ions up to the metallic state at sensitization or without it takes place at the subsequent treatment of activated glass in the hypophosphite solution. On the one hand, the surface pretreatment in the SnCI 2 .2H 2 0 solution increases the adsorption of Pd ions, on the other hand tin and palladium ions, as well as reduced palladium atoms exist on the surface after sensitization and activation. Thus, we can conclude, that the sensitization stimulates the adsorption of palladium ions and part of non-reduced palladium ions is reduced by hypophosphite. This is confirmed by the fact that, after surface activation and its hypophosphite treatment, i.e. when the process is carried out without sensitization, palladium atoms presented on the surface. It is established that a part of palladium ions, not reduced by sensitization. Sn (II) + Pd (1I) = Sn (IV) + Pd [2] appears to be partially reduced at subsequent interaction with hypophosphite according to reaction 2 [3] PdCI4 - + H2 PO2- + H2 0 = Pd + H2 PO 3 - + 2H ++ 4C1 The developed methods of metallization of different materials are widely used in the enterprises of the Commonwealth of Independent States (CIS) for production of quartz resonators and filters (several tens of mln. were produced), monolithic piezoquartz filters, photomasks, piezoceramic devices for hydroacoustics and delay lines of colour TV sets (several hundreds of min. were produced), casings of integrated circuits and semiconducting apparatus, ceramic microplates, precise microwire resistors and other devices. With this method: -the use of gold and silver is excluded in the process of metallization, and the technology is significantly simplified; - time of the technological cycle of metallization is reduced 10 times and labor intensity of the process decreases sharply; -the production volume per square meter of the production increases 8 times as compared to the metallization by fusing silver paste; -maintenance, quality and operational characteristics of photomasks increase; -the reliability of quartz resonators is increased 1.8 times and dynamic resistance is decreased by 30%, as compared to the resonators with silver plated piezoelements; -the accuracy of fixing precise microwire resistors is increased 10 times.

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The integration of the vacuum-thermal and the electroless methods of metallization gave the possibility to carry out microfabrication (microminiaturization) of selectively semitransparent masking elements of photomasks. Semitransparency (semitransparency in visible and non-transparency in ultraviolet range of the spectrum) of masking edges (with about 3 micron dimensions) of elements in the lower Si layer (deposited by vacuum-thermal method) were obtained under non-transparent masking elements of the upper layer of nickel - phosphorous alloy. This alloy was deposited by electroless method. In the given case a new technology, and a new design for the production of two-layer selectively semitransparent photomask with semitransparent edges (of silicon) were proposed based on application of high-productive, single contact photolithography (1,3,4,13,29). The semitransparency of such photomasks is reached by the shape identity of the elements of electroless plated upper NiP layer and of the vacuum, plated lower Si layer. Symmetry of the elements in upper and lower layers coincides. However, the area of upper NiP elements is less than that of elements of the lower silicon layer. By our technology two-layer film is obtained, the lower semitransparent layer is inert to the etchant, dissolving the upper layer. The lower film is etched by the solution subetching the upper layer as well. The magnitude of undercutting is regulated (depending on the circuit complexity) by the component ratio of the solution for etching the lower semitransparent film. The dimensions and smoothness of the edges are determined by elements produced in the lower layer of the semitransparent film (base film). The selectively semitransparent double-layer photomasks produced on the basis of the given invention have the following advantages as compared to conventional chromic photomasks: 1) Application of such photomask with semitransparent edges of masking elements significantly simplifying and increasing one of the most important operational characteristics - the precision of photomask alignment. Simplification and increase of alignment precision is induced by the fact that through the semitransparent edges of masking elements in the visible region of spectrum the operator can visually observe the whole IC under the photomask in the process of alignment of the photomask and IC pictures. 2) Significantly low defectiveness as compared to one-layer photomasks (porefree films are obtained) since as a rule, the centers of lower Si layer crystallization do not coincide with the centers of upper Ni-P alloy layer crystallization; transparent defects, pin holes and holes in the upper layer of Ni-P alloy are not continuation of transparent defects, pin holes and holes in the lower layer of Si.

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As a result of mutual lapping of transparent defects in different layers (due to mismatch of transparent defects, and of crystallization centers in upper and lower layers of photomask) almost defect-free photomask is obtained. 3) High wear-resistance obtained as a result of annealing of Ni-P alloy and formation of hard intermetallic (Ni 3 P) substance. In the given case it should be noted, that the edges of the lower layer elements defining the picture (topology) of photomask are not subjected to friction at contact photolithography (as they are protected by the elements of the upper layer), that increases percentage of IC output. 4) The existence of gaps between transparent sections of the photomask substrate and the surface of exposing photoresist, as well as the of channels between the upper elements of the photomask, solving the problems of contact photolithography (1,3). At the contact photolithography the common problem is the capture photoresist of a by photomask and the swelling of the photoresist. At the contact photolithography in which quinonediazide resists are widely used unforeseen separation of photomask from IC plate is observed in some cases due to pressure of nitrogen evolved during resist exposure. By means of the given photomask design of the surface of the masking elements being in contact with photoresist is decreased (as in the given case only upper masking elements are connected with photoresist at contact printing), photoresist adhesion to the photomask and photoresist capture by photomask are also decreased. Besides, the existence of gaps and channels between upper masking elements simplifies the removal of gases evolved at the photoresist exposure and the eliminates unforeseen separation of photomask from IC plate at contact photolithography. On the basis of our invention practically pore-free, wear-resistant, selectively semitransparent double-layer (Si-NiP) precision photomasks were produced and introduced into radioelectronic industry with large technical-economic effect (1,3,4,13,29). The new competitive methods of making photomasks with semitransparent submicron size elements on the basis of contact, single photolithography or of the modified resistless (maskless) technology are proposed (4,13,18, 29-3 1). The new proposed competitive method solves one of the main problem in modern microelectronics. The invention allows us to manufacture photomasks with semitransparent submicron size elements by high-productive, group method of exposure of the whole substrate (29). The proposed method is much more advantageous and simple than other expensive and complicated method such as e-beam, X-ray lithography, or the

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production of photomasks with light phase shift. The new method allows us to avoid the application of e-beam exposure equipment costing more than $4 000 000 and other complicated equipment, as well as X-ray masks with gold masking elements. It also increases the output of production. The invention prevents the existance of irreparable radiation defects of devices, since the application of high-energy e-beam and X-rays used in e-beam and X-ray lithographies for the production of submicron size elements is excluded. Disadvantages of photomasks used in contact photolithography are induced (from the point of view of submicron technology) by the limitations imposed by geometrical and wave optics fundamental laws. The limitations mentioned above, consist, in particular, in parasitic intensive reflection of masking elements resulting in multiple reflection of exposing radiation, in decrease of resolution. The above disadvantages are induced, in particular, by the wave nature of the light and are manifested in undesirable diffraction of actinic radiation. The technology developed by us is based on the possibility of elimination of the acuity of the results of limiting fundamental laws of geometrical and wave optics. On the basis of the new technological principles proposed for manufacturing working copies of submicron photomasks, an inexpensive photomask with elements larger than 1 micron size can be used as a master photomask (4,13,29-3 1). The above mentioned possibility is due to the fact, that the suggested fabrication method of submicron elements on working copy of photomask is not based on transmission of exposing radiation through the similar transparent sections of submicron dimensions or nontransmission of exposing radiation through the submicron opaque masking elements on the master photomask. For realization of the invention the transparent sections of photomask are made by selective etching of modified submicron size boundaries between opaque masking elements (on fabricating photomask). The size of both opaque masking elements and transparent sections on the master photomask can be much more than a submicron. The invention allows us to obtain more wear-resistant photomask as compared to chromic ones, to increase the alignment precision due to semitransparency of the masking elements in the visible region of the spectrum, to reduce the reflection coefficient of the masking elements and to provide the sharp contours of the obtained circuit. This new submicron technology allows us to produce devices with adjacent elements made of various materials of different thickness by single lithography. These advantages increase the possibilities for device design and simplify the removal of undesirable gases and heat dissipation.

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The developed construction and new technological processes of making photomasks withh submicron size elements solve problems of contact photolithography and have a number of advantages over the technologies existing so far. 1. Selective semitransparency of submicron masking elements in the visible region of the spectrum that guarantees the high alignment precision and better application conditions (better performance characteristics). 2. High percentage of production output and simplification of the process, significantly cheap price of the manufacture technology. The scientific basis of the new method of making photomask with submicron size elements consists in that the technological processes carried out in such a way that the difference between the boundary properties of materials and bulk properties of the same materials are revealed to the utmost. The given achievement enables us to increase considerably the information capacity of the memory banks, to increase the speed of operation and working range of the frequencies of UHF transducers of surface-acoustic-waves and, besides to decrease sharply the consumed power of computer technique. The invention simplifies and makes cheaper the technology of fabrication of photomasks with submicron size elements. Besides, the application of expensive and complex equipment is eliminated, the output is increased, alignment precision and resolution, as well as wear-resistance, are also increased. A competitive, patentable , true additive method of formation of multiple conducting, dielectric layers, contact filling materials and pads on Si, GaAs, or other substrate for ULSI is developed. This method differs from analogues in that it entirely excludes the etching of conducting and dielectric films deposited on different levels, as well as cutting in dielectric layers and reactive ion etching.

ACKNOWLEDGEMENTS

The author is indebted to International Scientific and technology Center, the Indivisible State Fund of Social Maintenance and Medical Insurance of Georgia for the support of this work.

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REFERENCES 1. T.N. Khoperia, Electroless Nickel Plating of Nonmetallic Materials (in Russian), Moscow, ed. "Metalurgia", 144 (1982), Monograph. 2. T.N. Khoperia, Proceeding of the

1 0 th

World Congress of Metal Finishing, Kyoto,

147-151 (1980). 3.

T.N. Khoperia, T.J. Tabatadze, T.I. Zedginidze, Electrochim. Acta, . 42, 3049-3055 (1997).

4. T.N. Khoperia, T.J. Tabatadze, T.I. Zedginidze, Proceedings of the International Conference Micro Materials, Berlin, April, 818-823 (1997). 5. T.N. Khoperia and R.G. Kharaty, Plating, 59, 3, 232-235 (1972). 6. TN. Khoperia,Russ. Journal Priborostroenie, Moscow N9, 29-31 (1961). Chem. Abstr., 56, 6825g (1962). 7. V.V. Sviridov, TN. Vorobjeva, T.V. Gaevskaya and L.I. Stepanova, Electroless Metal Deposition in Agueous Solution (in Russian), Belarussian State University, Minsk, 270 (1987). 8. K.M. Gorbunova, A.A. Nikiforova, G.A. Sadakov, V.P. Moiseev, M.V. Ivanov, Physical-Chemical Bases of the Process of Electroless Cobalt Plating (in Russian), Moscow, ed. "Nauka", 219 (1974). 9. Gavrilov, Chemishe (Stromlose) Vernicklung, 239, Saulgau, WMrttenberg (1974). 10. T.N. Khoperia, G.I. Jishkariani, R.G. Kharati, Extended Abstracts, 33th Meeting of the International Society of Electrochemistry, Lyon, France, 1, 401-403 (1982). 11. Kh.B. Petrov, Galvanizirune na Plastmasi, 247, Technika, Sofia (1982). 12. M. Shalkauskas, A. Vashkialis, Electroless Metallization of Plastics (in Russian),

Leningrad, ed. "Khimia", 144 (1985). 13. T.N.Khoperia, The 193rd Meeting of the Electrochremical Society, San Diego, Abstract N 261 (1998). 14. C.H. Ting, M. Paunovic, P.L. Pai, G. Chiu, J. Electrochem. Soc., 136, 462 (1989). 15. T.N. Khoperia and A.V. Ulanova, Extended Abstracts,

4 0 th

Meeting, of the

International Society of Electrochemistry, Kyoto, 2, 1297-1298 (1989). 16. L.T.

Romankiw,

Abstracts,

4 2 nd

Meting

of the

International

Society

of

Electrochemistry, Montreux, Switzerland, Abstract PL 2 (1991). 17. T. Osaka, Abstracts,

4 2 nd

Meeting of the International Society of electrochemistry,

Montreux, Switzerland, Abstract K.L. 2-1 (1991). 18. T.N. Khoperia, T.J. Tabatadze, T.I. Zedginidze, N.T.Khoperia, Abstracts, Meeting of the Electrochemical Society, Los Angeles, California, May 5-10, 375 (1996). 19. L.T. Romankiw, Electrochim. Acta, 42, 2985-3005 (1997).

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20. C.J. Sambusetti, E.O. Sullivan, J. Marino, C. Uzoh, Abstracts, The 1997 Joint Meeting of the Electrochemical Society and of the International Society of Electrochemistry, Paris, France, 535 (1997). 21. T. Osaka, J. Kawaguchi, in Electrochemical Technology: Innovation and New Developments (Edited by N. Masuko, T. Osaka and Y. Ito) 3-17, Kodansha &Gordon and Breach, Tokyo and Amsterdam (1996). 22. C.J.Sambusetti, in Electrochemical Technology: Innovation and New Developments (Edited by N. Masuko, T. Osaka and Y. Ito) 69-91, Kodansha & Gordon and Breach, Tokyo and Amsterdam (1996). 23. Electroless Deposition of Metals and Alloys, Edited by M.Paunovic and I.Ohno, PV 88-12, The Electrochemical Society Softbound Proceedings Series, Pennington, NJ, 306 (1989). 24. T.N. Khoperia, Z.Sh. Glonty, Russ. Journal Fisichescoi Chimii, Moscow, 49, 3, 702-705 (1975). 25. T.N. Khoperia, N.A. Balashova, M.I. Kuleznova and B.V. Pailodze, Russ.J. Zashita Metallov, Izdatelstvo "Nauka", 13, 6, 741-744 (1977). 26. T.N. Khoperia, A.V. Ulanova and V.V. Jdanov, Russ.J. Electrokhimia, 16, 17351738 (1980). 27. T.N. Khoperia, Abstract, International Conference, Progress in Electrocatalysis, Ferrara, Italy, 281-282 (1993). 28. T.N. Khoperia, T.J. Tabatadze, T.I. Zedginidze, Proceeding of the International Symposium Surface Electrochemistry, Alicante, Spain, 95-96 (1997). 29. T.N.Khoperia, International Simposium on Electrodeposition and Corrosion Science at Kyushu Institute of Technology, Kitakyushu, Japan, 17-19, September (1998). 30. T.N.Khoperia, The 195t" Meeting of the Electrochemical Society, Seattle, Abstracts #308 and # 475 (1999). 31. T.N.Khoperia, Replacement of Au and Ag by Ni Alloys and New Competitive Submicron, LIGA and Resistless Technologies, Monograph in preparation. 32. GO.Mallory and J.B.Hajdu, Editors, Electroless Plating: Fundamentals and Applications, AESF, Orlando (1990).

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NOTCH- AND FOOT-FREE DUAL POLYSILICON GATE ETCH Seung-joon Kim, Hong-seub Kim, Kwan-ju Koh Kae-hoon Lee and Jung-wook Shin Etch Engineering Team, Anam Semiconductor Industrial 222, Dodang-dong, Wonmi-gu, Buchon Kyunggl-do, Korea 420-130 e-mail: [email protected] ABSTRACT Vertical gate profile Is the most desirable and can be controlled /obtained by using directionally reactive ion etch for the uniformly doped polysilcon. For the CMOS devices, on the other hand, same profile of NMOS gate and PMOS gate are difficult to achieve simultaneously. Instead, either notched and footed profiles will be obtained for one type of gate while the other having desired profile. This Is attributed to the different etch rate and etch characteristics resulting from the different doping levels and species existing in NMOS gate material and PMOS gate material. In this study, we find that by using longer breakthrough etch step, we can Improve the etch profiles to close to vertical. INTRODUCTION The notch and foot formed during dual polysilicon gate etch need to be eliminated, since these Influence the effective gate channel length. The notch in the undoped polysilicon (p-type) forms due to etch rate differences resulting from polysilicon doping effects(l). The foot In the n-type polysilicon (n-type) forms as a result of polymer formation on the polysilicon sidewall. In order to eliminate the aforementioned issues, a new dual polysilicon gate etch process is proposed in this paper. Excellent gate etch profiles have also been successfully demonstrated. EXPERIMENTAL P-type(100) Si wafers with a resistivity of 8-10 "cm were used. The isolation regions were defined by the shallow trench isolation (STI) technique. A gate oxide film of 5.4nm was grown, and then the polysilicon gate electrode was deposited upto 250nm. An n-type region was formed in the polysilicon by implanting P+ ions at 40KeV with 1.5E15 Ions/cm 2. This was followed by a 20min anneal at 900°C in a N2

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ambient. The polysilicon was patterned using a photoresist mask defined by an Iline stepper and then etched using the dual gate etch process on a magnetically enhanced reactive ion etcher (MERLE).

RESULTS AND DISCUSSION Fig.1-a & 1-b show the notch and the foot in the polysilicon gate profiles, etched with the conventional etch process. In this process, at the end of the main etch (M.E) step, the oxide Is exposed in the n-type region but some polysilicon remains in the p-type region. During the first few seconds of the over etch (O.E) step, the n-type gets a uniform layer of polymer added on top of the polymer from the M.E. In the p-type, however, only the portion of the polysilicon exposed during the M.E step gets a similar added polymer layer. The unexposed portion gets a much thinner layer of polymer, resulting from the O.E step only. At the end of the first few seconds into the O.E step, the oxide under the p-type polysilicon is also exposed. From this point on, for the remaining time in the O.E step, the ions are reflected off the oxide surface which attack the thin polymer at the foot of the ptype, thus eventually creating a notch. The n-type, however, is well protected from the reflected ions, by the added layers of polymer from the M.E and O.E chemistries. This results In the formation of a foot In the n-type region after gate etch. To eliminate the notch in the p-type, we considered, a) increasing the etch time in the breakthrough (B.T) step, b) delaying the end point (EP) in the M.E step and/or c) Improving the ion directionality during the O.E step. The third case brings with it the risk of leaving polysilicon stringers in regions sensitive to shadowing from the etch species. To eliminate the foot in the n-type polysilicon, we considered reducing the amount of polymer in the M.E step by increasing the chlorine partial pressure. This, however, also reduces the polysilicon to oxide selectivity(2). Hence, it was decided that the optimum process to achieve a notchand foot-free profile Is a combination of increasing the etch time In the SF6 based B.T step and delaying the EP in the M.E step. Since doping affects the etch rate of polysilicon, we investigated the etch rate characteristics of each gas used in the etch process (Table 1). We discovered that, the polysilicon etch rate with SF6 was Independent of doping effects. To minimize the isotropic etch characteristics of SF6 in the B.T step(3), we used HBr, which Is a well known polymer forming gas, with a SF6:HBr ratio of 1:0.75. With this new process, vertical profiles were obtained after the B.T step, in both types of polysilicon. At the end of the B.T step, the remaining polysilicon thickness in the ntype was comparable to the p-type and was less than the amount of polysilicon after the B.T step in the conventional process (Fig. 2-a & 2-b). Also, the later the EP in the M.E step, the thinner was the remaining polysilicon in the p-type, thus

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increasing the probability of reducing the notch. Similarly, the foot in the n-type was also greatly reduced by the combination of longer B.T step time and delayed EP in the M.E step. Thus, notch and foot-free profiles were obtained by increasing the probability of endpolnting on the oxide simultaneously in both types of polysilicon (Fig. 3-a & 3-b).

CONCLUSION The phenomenon of notch and foot formation in the polysilicon has been studied in this work. We found that the lesser the remaining polysilicon thickness after B.T step and the lesser the remaining polysilicon thickness difference between the n-type and p-type polysilicon after B.T and M.E steps, the higher is the possibility of eliminating the notch and the foot. We also found that increasing the etch time of an optimized B.T process is the dominant factor in reducing the notch and the foot.

ACKNOWLEDGEMENTS The authors would like to thank Mr. Vidyasagar Jayaraman (Kilby Center, Texas Instruments, Inc.) for his many useful discussions. REFERENCES 1. Dennis M. Manos and Daniel L. Flamm, Plasma Etching, p148, Academic Press, Inc(1989) 2. L Y. Tsou, Highly Selective Reactive Ion Etching of Polysilicon with Hydrogen Bromide, J. Electrochem. Soc., 136, 3003(1989). 3. C. J. Mogab and H. J. Levinstein, Anisotropic Plasma Etching of Polysilicon, J. Vac. Scd. Technol., 17, 721 (1980).

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(a) Notch in the p-type polysilcon

(b) Foot in the n-type polysilicon

Fig.1 SEM images using the conventional etch process Table 1 Etch rate characteristics of different as ratios Gas Etch rate Chemistry Mixing Ratio Ratio (n/p) 1.00 1: 0.00 SF6: IBr 1 : 0.75 1.00 1.17 1: 0.00 C12:HBr 1 : 0.50 1.16 1 : 0.00 1.06 1 : 0.10 1.31

(a) Notch-free in the p-type polysilicon

(b) Foot-free in the n-type polysilicon

Fig.2 SEM images using the new etch process

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(a) Notch-free in the p-type polysilicon

(b) Foot-free in the n-type polysilicon

Fig.3 SEM images using the new etch process

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INTERFACIAL STRUCTURE OF Si/SiO2 STUDIED BY ANDIC CURRENTS IN HF SOLUTION Naomi Mizuta, Hirokazu Fukidome, and Michio Matsumura Research Center for Photoenergetics of Organic Materials, Osaka University 1-3 Machikaneyama, Toyonaka, Osaka 560-8531, Japan When n-Si(ltl)/SiO2 electrodes were

immersed in HF solution at

concentrations under anodic bias, a current peak appeared.

The total

2

charge of the current was about 5 x 10.' C/cm , which is a little below the value expected based on the model for the ideal interface.

The value was

lower for the samples prepared by the wet-oxidation than those did by the dry-oxidation.

The value for the samples prepared by wet-oxidation,

however, increased by annealing.

These tendencies of the change in the

charge agree with the change in quality of the Si/SiO2 interfaces.

The

anodic current is therefore considered to be a useful measure of the quality of the Si/SiO2 interfacial structure.

INTRODUCTION The quality of the Si/SiO, interface is crucial in MOS devices.

The interracial

structure or the flatness on the atomic scale becomes very important as the demands for very thin oxide increases.

The Si/SiO 2 interfacial structure has been studied by TEM,

and by AFM/STM for the surfaces after the oxide layer is removed by chemical etching. Here, we report a novel electrochemical method for the evaluation of the interracial structure, which can be applicable to a wide range of the thickness of the oxide layers. The unique properties of Si/SiO 2 electrodes in HF solution have been known in the field of electrochemistry [1-3].

Namely, an anodic peak current appears just when

the Si/SiO2 interface is exposed to the solution. Si surface is hydrogen-terminated.

Following the anodic current peak, the

The aim of our present study is to correlate the

anodic current peak to the structure of the Si/SiO 2 interface.

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EXPERIMENTAL The n-type Si(l 1I) wafers with resistivity of 10 .Qcm were cut into 10 x 10 2

mm pieces, and oxidized under several conditions to make samples with different Si/SiO2 structures.

The anodic current flowing at the Si/solution interface was

measured using a Pt counter electrode and an Ag/AgCI reference electrode.

The

potential of the Si working electrode was adjusted to +0.5V vs. the Ag/AgCI electrode. For some measurements, we used Si(100) wafers.

RESULTS AND DISCUSSION Figure 1 shows the typical anodic current profile observed when a Si( Il )/SiO2 electrode is immersed in a HF solution.

The oxide layer dissolves into the solution in

the time period before the anodic current starts. proportional to the thickness of the oxide layer.

This time period is almost

When the Si surface layer existing

under the oxide layer is exposed to the solution, the restructure of the surface takes place.

During the period, some Si atoms are dissolved into the solution as SiF62 ,

releasing electrons.

This process causes the anodic current.

the surface, the surface is terminated with Si-HI bonds [3].

After the restructuring of The whole process is

schematically shown in Fig. 2. In the solutions with relatively high ItF concentrations, the interfacial surface forming Si-O bonds is converted to Si-F bonds, as the result of the replacement of OH with F.

The surface is, then, converted to the hydrogen-

terminated one through the cleavage of the back Si-Si bonds. We define the amount of charge passed during the anodic peak current as

QP,

which we consider to have useful information about the Si/SiO2 interfacial structure. We started with the studies on the dependence of Q, on the HF concentration and on the properties of the oxides. Figure 3 shows the dependence of Qp, on the HF concentration for the Si(OtI )/Si0 2(1 7 nm) electrodes.

The QP is almost constant at concentrations above

1.5%, but becomes larger at lower concentrations. OH may not fully converted to Si-F.

At low HF concentrations, the Si-

This can lead to a different process for the

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cleavage of the Si-Si back bonds, and, therefore, different Q, values.

In the following

studies, we used 2% HF for the measurements. It is proposed that the oxidation of the Si(l 11) surface proceeds in the layer-bylayer fusion [41.

It is also known that the Si(I II) surface is flattened on an atomic

scale after the wet treatments with ammonium fluoride solutions or with pure water. Figure 4 gives the restructuring process of the interface, which is drawn by combining these pictures. By taking the atomic density of 7.8 x 10' 4/cm 2 for the Si(ll I) surface, the amount of charge released during the process is calculated to be 7.5 x 10.4 C/cm2 . The experimentally obtained values for the Si(l I l)/SiO 2 were normally in the range from 4.5 x 10' C/cm2 to 5.5 x 10' C/cm2 , as shown in Fig. 5. obtained was 6.8 x

10-4

The highest value so far

2

C/cm . Generally, these values are in good agreement with the

value expected from the interfacial model.

The lower Q., values obtained by the

experiments than the prediction is probably due to the deviation of the Si/SiO, interface from the ideal one. It is known that the Si(1I1l)/SiO2 interracial structure is improved by annealing, especially for those of the wet-oxidation [5].

The results shown in Fig. 6 indicate that

the QP value approaches the ideal value by the annealing. The QP value for the Si(100)/Si0 2 interface was about 3.5 x 10- C/cm 2 . It is reasonable that Si(100)/SiO 2 interface has lower Qp than the Si(lll)/SiO2 interface, considering the interracial structures. If the Si(100)/SI0 2 interface is supposed to have /0/H ./H the Si\ structure and it changes to Si,, the Q., becomes null. However, the Sh, 1 surface is too crowded to form stable surface.

To avoid this hindrance, the dissolution

of the lower level layer follows to form the stable surface. anodic current, which was observed experimentally.

This process produces the

However, we have not made the

correlation between the QP and the model, because the structure of the stabilized surface is still controversial. ACKNOWLEGDEMENTS We thank to Dr. Watanane of Fujitsu Research Co. for allowing us to use the oxidation furnace at his laboratory.

This study was supported by Grants-in-Aid for

Scientific Research from Japanese Ministry of Education, Science, Sports, and Culture (No. 09875211 and No. 10131245).

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REFERENCES [1]

M. Matsumura and S. R. Morrison, J. Electroanal. Chem., 147, 157 (1983).

[2]

M. Matsumura and H. Fukidome, J. Electrochem. Soc., 143, 2683 (1996).

[3] J. Rappich and H.J. Leverenz, J. Electrochem. Soc., 142, 1233 (1995). [4] A. Omura, H. Sekikawa, and T. Hattori, Appl. Surf. Sci., 117/118, 127 (1997). [5]

P.O. Hahn, S. Yokohama, and M. Henzler, Surf. Sci., 142, 545 (1984).

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70 60 +0.5V vs Ag / AgCI 0

5

• 40

*

O

1% HF

3nm

30

a) 2 20 C

= 10 100 " 10

0

30 20 Time / s

40

50

Figure 1. Anodic peak current observed by immersing an n-Si(1 I 1)/SiO 2(3 nm) electrode in 1% HF solution at 0.5 V vs. Ag/AgCI.

SiO 2 Si

H

FFFFFFF!E.

Si

HHHHHH

Si

Figure 2. Changes in the structure of Si/SiO 2 in HF solution.

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30 25

E 20 •b15

to

5

0

1

2

3

4

HF concentration (%)

Figure 3.

Dependence ofQ, on the concentration of HF.

0: Si atom 0 atom 0:

H atom Si F62

Figure 4.

Y-

- -

Restructuring of Si(l I l)/SiO2 interface in HF solution.

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5.2

5.0Dry 02

5.0

E4.8

%

r4.6 0

Wet 02

-4.4

4.2 4.0

0

20

40 Si0

2

60

80

thickness / nm

Figure 5. Q., values obtained for the Si(11 l)/SiO 2 electrodes with as a function of the SiO2 thickness.

5.4 5.3 .

5.2

E 5.1 -

g 4.9 4.6474"82"

Wet

02

20nm

4.5 0

50 100 annealing time! min

150

Figure 6. Effect of annealing at 900 on the QP for the Si(1 I 1)/SiO 2(20 nm) prepared by wetoxidation.

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EFECT OF DISSOLVED OXYGEN ON SURFACE MORPHOLOGY OF Si(l11) IMMERSED IN NH 4F AND NH 4OH SOLUTIONS Hirokazu Fukidome and Michio Matsumura Research Center for Photoenergetics of Organic Materials, Osaka University, 1-3 Machikaneyama, Toyonaka, Osaka 560-8531, Japan Dissolution processes of n- and p-type Si(1 11) surfaces in 40% NH 4F and 2.5% NH 4 OH solutions were investigated. Usually, monohydride steps appeared on the surface when flattened on the atomic scale. However, straight dihydride steps were formed on p-type Si(I 11) slightly misoriented in the direction of [112], when it was treated with 40% NH4F solution containing dissolved oxygen. This was in contrast to the appearance of monohydride steps by the treatment of the surface with 40% NH 4F solution without dissolved oxygen. For n-type Si(l 11) slightly misoriented in the direction of [112], monohydride steps appeared regardless of the existence of dissolved oxygen. In alkaline solutions containing dissolved oxygen, Si( 11l) surface was not flattened, while it was atomically flattened if oxygen was removed from the solution. From the measurements of the rate of dissolution of Si(l 11) surface and anodic current, oxygen dissolved in the soluitons were concluded to have the passivation effect of the Si( 11) surface. INTRODUCTION It is well known that the Si(l 11) surface can be atomically flattened and hydrogen terminated by the treatment with NH 4 F solution [1]. It is also reported that the surface can be flattened in alkaline solution when an n-Si wafer is polarized cathodically[2]. We have studied the electrochemical properties of n-Si in fluoride-containing solutions [3, 4], and found that dissolved oxygen has a strong influence on the properties [5]. We also found that sulfite ions are very efficient deoxygenator for the NH 4F solution and affect the electrochemical properties of Si electrodes [5] and also the flattening process in the solution [51. EXPERIMENTAL Samples were firstly cleaned by the RCA method, followed by the removal of the oxide by HF

treatment. Then, sampleas were immersed in 40% NH4 F or NH4OH solutions. Dissolved oxygen was purged by bubbling high-purity nitrogen-gas into the slutions or by addition of sulfite ion into solutions. The concentration of sulfite is 0.05 mol/l. The surfaces of the samples were imaged with a tapping mode AFM (Digital Instruments, Nanoscope I11a). Amounts of H2 evolved from solutions as the result of the dissolution of Si was quantitatively determined using a gas chromatograph (Shimadzu, GC-14B).

RESULTS AND DISCUSSION When the Si( 111) surface with a misorientation in the [112] direction was treated with 40% NH 4F with and without oxygen, straight and parallel steps were formed on the surface[5]. These steps are assigned to the monohydride steps. Monohydride silicon is considered to be more stable than dihydrode and trihydride silicon on the surface. As the

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result, the steps formed on the flattened n- and p-Si( 11) surfaces in the solution are monohydride steps[6]. However, we found that when the p-Si(III) surface slightly misoriented in the (112] direction was treated with 40% NH 4F with dissolved oxygen, dihydride steps appeared on the surface. Figure 1 (a) shows the AFM image of such a surface with dihydride steps. Interestingly, however, when the surface was treated with 40% NH4F without oxygen, zigzag steps were observed on the surface, as shown in Fig. 1 (b). These steps are assigned to monohydride steps. Hence, it is concluded that oxygen dissolved in the solution affects the surface morphology of the flattened p-Si(1 11) surface. In addition, it was found that the oxygen dissolved in the solution slows down the flattening rate of n- and p-Si(1 11) surfaces. The result that the dihydride stpes appear only on the p-Si( 111) surface suggests that holes accelerates the dissolution of the step edges or kinks on the dihydride steps. Although alikaline solutions are also good etchant of Si, it is difficult to get flat Si(1 11) surface on the atomic scale by the treatment with these solutions [2]. The formation of flattened Si(1 11) surface by the treatment with alkaline solution has only been reported under the application of cathodic bias[2]. However, we found that the surface can be easily flattened if oxygen is removed from the alkaline solution. Figure 2 shows the AFM images of the n-Si(1 11) surfaces after treatment with 2.5% NH14OH with different concentrations of dissolved oxygen. When the content of oxygen is high, or the solution equilibrated with air, flattened surface cannot be obtained even after a treatment for a long period (Fig. 2a). In contrast, atomically smooth terraces and monohydride steps appeared on the surface by lowering the content of oxygen. Figure 2b shows the surface after the treatment with the 2.5% NH-4OH solution bubbled with nitrogen gas; the concentration of oxygen was about 0.1 ppm. The surface treated with the solution from which oxygen was removed by sulfite ions show atomically smooth terraces and very straight steps, as seen in Fig. 2c. The concentration of oxygen in this solution was estimated to be lower than 5 ppb. Such flattend surfaces were also obtained using pSi(1 11) wafers. On the flattened Si(I 11) surface formed by the treatment with alkaline solutions without dissolved oxygen, only mono-hydride steps are formed. We tried to elucidate the reasons for the specific effect of dissolved oxygen on the morphology of Si(1 11) surface after the wet processes. Although further studies have to be done, we found two results relating to the effect of oxygen on the wet-etching of Si(1 11). First, we found that the etching rate of Si(l 11) is lowered by the oxygen dissolved in solutions. The rates can be determined by monitoring hydrogen, which evolves with the dissolution of Si into the solution. For example, the rate of the dissolution of Si( 1111) into the 2.5% NH 4 OH solution fell almost 50% by the dissolved oxygen at the concentration of 9 ppm. Second, the anodic current of n-Si(1 11) electrode, which relates to the etching and flattening process [5], is lowered by the presence of oxygen in the solution, as shown in Fig. 3. These two results suggest that oxygen dissolved in the solution has the effect to passivate the Si(I11) surface. The appearance of dihydride steps by the treatment with oxygen-containing 40% NH 4F suggests that dihydride steps are preferentially passivated by oxygen. ACKNOWLEGDEMENTS This study was supported by Grants-in-Aid for Scientific Research from Japanese Ministry of Education, Science, Sports, and Culture (No. 09875211 and No. 10131245).

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REFERENCES 1. G. S. Higashi, Y. J. Chabal, G. W. Trucks, and K. Raghavachari, Appl. Phys. Lett. 56 (1990) 656. 2. P. Allongue, V. Kieling, H. Gerischer, J. Electrochem.Soc., 140, 1008 (1993) 3. M. Matsumura and H. Fukidome, J. Electrochem.Soc., 143, 2683 (1996) 4. H. Fukidome and M. Matsunura, J. Electrochem.Soc., 144, 679 (1997) 5. H. Fukidome and M. Matsumura, Appl. Surf Sc., 130-132, 146 (1998)

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(a)

(b) Fig. 1 AFM images of p-type Si(l 11) slightly misoriented in the direction of [-1-12] treated with 40% NH4F, with oxygen (a), without oxygen (b) where oxygen was removed by sulfite ions. Scan areas areS00 x 500 nm2 .

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(b)

(a)

(c) Fig. 2 AFM images of n-type Si(l l1) slightly misoriented in the direction of [1121 treated with 40% NH 4F, with oxygen (a), without oxygen by bubbling high-purity nitrogen gas (b), without oxygen by addition of sulfite ions (c). Scan areas are 1000 x 1000 nm2.

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377

. .. . . . : ........... . ............. . ........... " ' " .......... 7 0 ......... 70. i

t

"4j

4 70

-................. ........ ................... 60 i!!i .=................... .t..............

i .

:

]. Without oxygen

... ............. .. I.............. .................. i ................... ............... Il Wi t Ox g

-- 3 0 50i 40 .

.......... S/ .. .... ....... ............................ ....................

10

..

.... :,-"E,...........•-t:-'

WthOxygen ....... iI ......... ......... .................

........ ......... ... . .............................. "''., .....

, o

..

..........-

''-i 0

_

L~~

0

50

100

150

200

250

300

Time (s) Fig. 3 Anodic current of n-Si(I11) in 40% NH 4F solutions with and without oxygen.

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POROSITY AND SURFACE ENRICHMENT BY TELLURIUM OF ANODIZED p-Cd0 .g5Zn 0.osTe B.H. Ern6, J. Vigneron, C. Mathieu, C. Debiemme-Chouvy, and A. Etcheberry Institute Lavoisier (IREM) UMR CNRS CO1 73, Universitj de Versailles St-Quentin-enYvelines, 45 Avenue des Etats-Unis,F-78035 Versailles, France ABSTRACT By anodic treatment in acidic solution, p-Cd 0 .95Zn0 .05 Te becomes porous. Coulometry and chemical analysis by X-ray photoelectron spectroscopy indicate that the pore walls are covered by a more or less homogeneous layer of elemental tellurium. A passivating effect of this layer could explain why anodic etching of the p-type material yields a porous morphology, and the layer could also be responsible for changes observed in the photoelectrochemical properties.

INTRODUCTION Present-day infrared detector technology is based on semiconducting materials from the (Hg,Cd,Zn)(Se,Te) family. Two important examples are the infrared-absorber Hg 1 -xCdjTe and the material on which it is usually epitaxially grown, p-Cdo. 95 Zno.0 5Te. As these materials are mechanically fragile and cannot be heated much above room temperature, their industrial surface preparation relies heavily on (electro)chemical treatments, for polishing, surface passivation, etc. A major complication is that almost any wet surface treatment will cause the surface to become enriched with the II or the VI element [1]. The processes which lead to these changes in surface stoichiometry often involve charge transfer between the semiconductor and the electrolyte solution, as when CdTe is exposed to Ce4+ etching solutions [2]. Electrochemical studies are therefore crucial in order to improve the understanding of the wet (electro)chemical behavior of II-VI materials. In the present work, we investigate surface changes at p-Cdo. 95Zn 0 .05Te by cyclic voltammetry, coupled with surface analysis by X-ray photoelectron spectroscopy (XPS). We reveal that after anodic treatment in acidic solution, p-Cdo. 95Zno. 05 Te is porous, with elemental tellurium on the pore walls. The role of the tellurium layer in the etching mechanism and the effect of the layer on the photoelectrochemical properties are discussed.

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EXPERIMENTAL Experiments were carried out at room temperature on (100)-oriented p-CdO. 95Zno.05 Te with a dopant density ofrl0 cm" . Gold ohmic contacts were obtained at room temperature by electroless deposition. A classical three-electrode setup was used, with a p-Cdo. 95Zno.05Te working electrode, a platinum counter electrode, and a saturated mercurous sulphate reference electrode (MSE = +0.64 V vs SHE). XPS surface analysis was carried out using a VG ESCALAB 220i-XL (5 10"9 Torr pressure, monochromatic Al K. X-ray radiation). Air exposure was avoided during transfers by using an argon-filled glove box.

SURFACE CHEMISTRY Cyclic voltammograms were recorded for p-CdO.q 5Zno. 05Te in 0.5 M H2SO4. Potential cycling was interrupted repeatedly for surface analysis of the electrode by XPS. The transfers to ultrahigh vacuum did not appear to have an effect on electrochemical behavior. A voltammogram is shown in Fig. 1 and the corresponding XPS spectra in Fig. 2. The Cd5/2 signals are not shown, since for all the experiments, the only cadmium atoms detected were those present inside the p-CdO. 9 5ZnO.05Te crystal. In contrast, the shape of the Te5 /2 signal did change, due to variations in surface coverage by elementary tellurium (Te'). Initially (a), a polished p-CdO. 95Zno.05Te surface (treated with Br 2/CH 3OH, followed by 0. 1 M KOH) is only

3.0-

Te 3dS1 2

ii)

' 2.01.0-

al

'.

Z'.

b

Q 0.0-1.0-

b

Aa

-2.0-1.0

-0.5 00 0,5 ElVvsIVISE

10

Figure 1. Cyclic voltammogram for p-Cdo. 9 5Zno.0 5 Te in 0.5 M H2 S0 4 under illumination; (a), (b), and (c) refer to points where measurement of the voltammogram was interrupted for XPS analysis (see Fig. 2).

380

574

573

572

Binding Energy/eV

Figure 2. XPS spectra of the 3d5/2 tellurium level recorded after prolonged polarization at different points of the cyclic voltammogram (Fig. 1). Spectral shape changes because the ratio of elemental tellurium to tellurium inside p- Cdo.9 5Zn0 .05 Te changes, from 0.5 (a) to 2.0 (b) and 1.4 (c).

Electrochemical Society Proceedings Volume 99-9

slightly enriched with elemental tellurium (Te°) at pH 0. Anodic treatment (b) causes anodic dissolution and growth of a thicker Te' layer. Cathodic treatment removes Te°. This is clear for Te° produced by etching in a Br 2 solution, but Te° obtained anodically is removed less completely (c). Coulometric analysis of the cathodic peak related to the removal of Te" suggests that the longer the anodic treatment, the more Te' is obtained at the surface of the electrode. The amount of Te° is more or less linear with the etching time. After prolonged anodic treatment, the amount of Te' detected coulometrically corresponds to a layer which is several microns thick. In contrast, the XPS signals continue to have a strong contribution from p-Cdo. 95 Zno.0 5Te, suggesting that the Teo layer thickness is only a few nanometers.

POROUS MORPHOLOGY The apparent discrepancy between coulometry and XPS analysis is explained by the porous morphology of the anodized material, with a uniform layer of Te' at the surface of the pore walls. A cross section of anodized p-Cdo.95Zno.05Te is examined in Fig. 3. The porous layer is obtained below the initial surface, which remains largely unaffected (constant zposition, Fig. 3a). Porous features are observed on the scale of several microns and on the submicron scale (Fig. 3b). Coulometry detects all Te° on the porous surface, in electrical contact with the non-porous substrate. However, XPS analysis probes only the first 10 nm of the sample, the retrieval depth of electrons. This is illustrated schematically in Fig. 4.

probe depth

4

-

Figure 3. Scanning electron micrographs of the porous layer (PL) revealed by a cross section of p-Cd0. 95Zno.0 5Te after prolonged anodic etching (total anodic charge 66 C cm 2).

N

Figure 4. Schematic illustration of the porous layer etched into pCdo.95Zno. 05Te. Te° is present on the pore walls.

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The observation in Fig. 3a of a porous layer with a largely unchanged initial surface is important information about the dissolution mechanism. It implies that three requirements are fulfilled: (1) the etching rate is kinetically determined and anisotropic, since etching starts at selected "weak spots" of the initial surface, such as at dislocations; (2) the etching rate is highest where the electric field is highest, so that pores propagate once initiated, due to geometrical enhancement of the electric field at the pore tips; and (3) pores stop to widen once they have been created, else the boundary of the porous layer would not remain at the same z-position as at the start of porous etching. The third condition means that the dissolution rate is very low at the pore walls. This condition is not generally fulfilled with p-type electrodes, at least when the dissolution products dissolve easily in the electrolyte solution. For instance, p-type GaAs does not become porous during anodic etching at pH 0 [3]. The reason is that for a p-type material, holes are abundant-they are the majority electrical carriers-so that etching occurs across the entire surface and pore walls are not stable. The result is electropolishing. The situation is different under conditions where the dissolution products are not very soluble. When the surface is partially passivated by an oxide layer, etching may just occur at sites where the electric field is sufficiently high to break through the oxide (i.e., at pore tips), while the rest of the surface remains passivated (i.e., the pore walls). In this way, porous etching of p-type GaAs has been observed at pH values where surface oxides are present [3]. The porous etching of p-CdO. 95ZnO.0 5Te could therefore be related to a partial surface passivation process occurring at the same time as anodic etching. Examination of the microscopic dissolution mechanism suggests what this partial passivation process could be. At pH 0, the CdTe-like material dissolves in two steps, with elemental tellurium as an intermediate [4]: 2+ CdTe + 2h -->Cd 2+(q) +Te' (1) Te' + H20 + 4 h+ --* HTeO 2+(aq) + 3 Ht (aq) (2) A Te' phase is known to accumulate at the CdTe surface during anodic etching [5]. It was observed during photoanodic etching of n-type CdTe, which does not become porous [5]. Etching can thus clearly stop at Te', indicating that step (2) is slower than step (1). It therefore seems plausible that the etching rate of p-Cd 0 .95ZnO.0 5 Te could locally decrease as the local thickness of the Te' layer increases, thus passivating the surface of the pore walls. An alternative explanation was proposed by Wehrspohn et al.[6] for the porous etching of p-type materials under conditions where the resistivity of the semiconductor material exceeds that of the electrolyte solution; under those conditions, an instability in the spatial distribution of the electric field can lead to macroporous etching. Conditions for that mechanism are fulfilled in our case, as the p-Cdo. 95Zn0 .05 Te has a resistivity of 2000 0) cm, much higher than that of the electrolyte solution, 5 0 cm for 0.5 M H2 SO 4 [7].

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PHOTOELECTROCHEMICAL PROPERTIES

Porous etching of semiconductors often leads to fundamental changes in the optoelectrical properties. Nanoporous etching of silicon causes the change from weak luminescence in the infrared range to strong luminescence in the visible range [8]. Microporous etching of gallium phosphide was recently shown to lead to strong photonic effects 19]. Here, we will focus on the effect of porosity on the photoelectrochemical properties. With gallium phosphide, it was demonstrated that porous etching can cause an enormous increase in the subgap photocurrent quantum yield [10,11]. The effect of porous etching on the photoelectrochemical properties of p-Cd0.95Zn0 .05Te is shown in Fig. 5 (uncorrected for the lamp spectrum). The photocurrent yield drops across the entire spectral range, but a peak is observed at about 810 nm, close to the direct bandgap of the material. The decrease in photocurrent is probably due to the appearance of Te' at the surface. It was demonstrated with n-CdTe that a planar Te' layer at the surface of CdTe decreases the photocurrent by absorbance of the light, especially at low wavelengths [5]; but in that case, CdTe is not porous and no photocurrent peak as that in Fig. 5 is observed. A partial explanation could be that the peak in Fig. 5 results from two opposing effects, the photocurrent-lowering effect of absorbance by Te° at low wavelengths and the photocurrent-enhancing effect of porosity at high wavelengths [10,111. Further study is required in order to conclude on the exact cause of the photocurrent peak.

Cathodic photocurrent Figure 5. spectra of p-Cd0. 95Zn0.05Te in 0.5 M H2 S0 4 at -1 V vs MSE (hydrogen evolution) (a) before anodic etching, and (b,c,d) after respectively 4, 30, and 60 seconds at + 1 V vs MSE porousb

a0.2

etching). A weak light intensity was used so that the total cathodic charge during spectral recording corresponded to less than 1 mC per cm initial surface (detection using a chopper and a lock-in at 60 Hz).

0.1

C

d _00 I

I

700 500 wa velength / nm

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900

383

CONCLUSIONS Anodization makes low-doped p-Cd0.95Zn0.05Te become macroporous, and the surface of the porous network appears to be covered everywhere by about the same thickness of elemental tellurium. Porous etching affects the opto-electrical properties, leading to a peak in the cathodic photocurrent spectrum at a wavelength close to the direct bandgap. A passivating effect of the tellurium layer on the pore walls could be largely responsible for obtaining a porous morphology, the layer stabilizing pore walls against further dissolution.

ACKNOWLEDGEMENT We thank A. Million (LETI/CEA, Grenoble, France) for the p-Cdo 9sZno o5Te.

REFERENCES 1. A. Etcheberry, F. Iranzo-Marin, E. Novakovic, R. Triboulet, and C. Debiemme-Chouvy, J. Cryst. Growth, 184/185, 213 (1998). 2. F. Iranzo-Marin, J. Vigneron, D. Lincot, A. Etcheberry, and C. Debiemme-Chouvy, J. Phys. Chem., 99, 15198 (1995). 3. P. Schmuki, J. Fraser, C.M. Vitus, M.J. Graham, and H.S. Isaacs, J. Electrochem. Soc., 143, 3316(1996). 4. D. Lincot and J. Vedel, J. Electroanal.Chem., 220, 179 (1987). 5. F. Iranzo-Marin, C. Debiemme-Chouvy, I. Gdrard, J. Vigneron, R. Triboulet, and A. Etcheberry, Electrochim. Acta, 42, 211 (1997). 6. R.B. Wehrspohn, J.-N. Chazalviel, and F. Ozanam, J. Electrochem. Soc., 145, 2958 (1998). 7. R. Pointeau, in Nouveau Traitj de Chimie Minirale, Vol. 13-2, P. Pascal Editor, p. 1358, Masson, Paris (1961). 8. A.G. Cullis and L.T. Canham, Nature, 353, 335 (1991). 9. F.J.P. Schuurmans, D. Vanmaekelbergh, J. van de Lagemaat, and A. Lagendijk, Science, 284, 141 (1999). 10. B.H. Erad, D. Vanmaekelbergh, and J.J. Kelly, Adv. Mater., 7, 739 (1995). 11. B.H. Ernm, D. Vanmaekelbergh, and J.J. Kelly, J1 Electrochem. Soc., 143, 305 (1996).

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Passivation Processes of Hg 0 .7 9 Cd 0 .2 1 Te by Oxydation in Basic Media. Frank Lefevrea, Dominique Loransa, C, Debiemme-Chouvyb, A. Etcheberry, Dominique Ballutaudc and Robert Tribouletc, aSA GEM SA, 26 avenue des Hauts-de-la-Chaume,86281, St-Benoit Cedex, France. bIREM-UVSQ,45 Avenue des Etats-Unis, 78035 Versailles Cedex, France.CLaboratoirede Physique des solides de Bellevue, CNRS, I place Aristide Briand92195 Meudon Cedex, France.

ABSTRACT Mercury cadmium telluride (HgCdTe) is a direct bandgap semiconductor widely used as a material for infrared detectors due to his narrow variable band gap. The achievement of high-performance detectors depends critically on a low surface recombination velocity of the minority carriers. The chemical growth of a passivation oxidized superficial layer in an aqueous Fe(CN) 6 3- basic solution is studied in this work. The depth profiles of the different elements in the oxidized layer superficial layer and its thickness are studied by Xray photoelectron spectroscopy. The electrical properties of the interface are evaluated from MIS devices. The conditions of oxidation have been optimized. INTRODUCTION In Hg0. 7 9 Cd 0 .2 1 Te, the band bending due to the surface potential is of the same order as the narrow gap energy (2.5 eV at 300 K) itself and may give rise to charge depletion, accumulation or inversion. Consequently the properties of the passivation layer/Hg0. 7 9 Cd 0 .2 1 Te interface has an important effect on the CdHgTe detector performances. The oxidized layer has to be processed at low temperature (<380 'C), to passivate the surface defects, to be reproducible, to lead to a stable interface, and to present good mechanical properties (adhesion). By oxydation process the surface is removed. But the conditions of oxidation may affect the microstructure of the oxide/Hg 0 .7 9 Cd 0 .21Te interface and the underlayer electronic properties. Several oxidation techniques may be considered, such as oxygen plasma treatments, electrochemical anodic oxidation or chemical oxidation. The plasma treatment leads to a degraded interface and the anodic oxidation should require a modification of the detector achievement process. The chemical oxidation process of

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Hg0. 79 Cd 0 .2 1 in an aqueous Fe(CN) 6 3 - basic solution is presented in this work and an oxidation mechanism is proposed. EXPERIMENTAL The investigated Hg 0 . 79 Cd0 .2lTe samples were single crystals grown by the Travelling Heater Method (THM) technique [1]. The n-type doping level of Hg0. 79 Cd 0 .2 1 Te was 2.7 1015 cm-3 . They were cut into wafers and the prepared surface (Hg-Cd face) was orientated following the <111> direction. The crystals were mechanically polished, then etched by a bromine-ethylene glycol solution. The oxides were grown at room temperature using a Fe(CN) 63 basic (KOH, pH about 11) aqueous solution under various stirring conditions (rotation). The XPS analyses performed to determine the chemical composition and the thickness of the oxidized superficial layer on Hg. 79 Cd 0 .2 1 Te were carried out on a Leybold Heraus XPS spectrometer with a hemispherical analyser. Photoelectrons were excited by the MgK• radiation. After the oxidation treatment, the samples were transferred into the analysis chamber. Sputter profiling of the surface was performed with Ar+ ions (3kV, 10 mA, 5.10-6 mbar). Due to the different sputtering rates observed on HgCdTe ternary compounds [2], the atomic sensivity factors used for the element concentration calibration were empirically obtained from a Hg0. 79 Cd 0 .2 1 Te reference sample prealably etched by a bromine-ethylene glycol solution and sputtered ten minutes with the same ion beam parameters with the assumption that the values were the same in the oxidized layer and in the sample bulk. These profiling results provide a qualitative understanding of the oxidized layer stoichiometry. The sputter depth calibration was obtained by measuring the step on the edge with a TENCOR profilometer. The different types of oxides grown on Hg 0 .79 Cd 0 .21 Te were analysed as a function of the stirring rotation speed. Sample etching occuring simultaneously with oxide deposition, some samples were partly masked in order to measure separatly the etching rate and the oxide growth. The etched depth was measured with a TENCOR profilometer. The electrical properties of the oxide layer/Hg0. 79 Cd0 .21Te interface were analysed in the dark by C(V) measurements at 1MHz. The MIS structure was achieved by a gold grid. For comparison, a MIS structure was performed by deposition of ZnS directly on Hg0 . 79 Cd 0 .2 1 Te.

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RESULTS Effects of the stirring speed during oxidation The results concerning the influence of the Hg0. 79 Cd 0 .21 Te oxidation are presented in table I.

rotation speed

on

Table 1: Etched thickness and oxidized layer thickness as a function of the rotationspeed (treatmentduring 4 min).

Stirring Rotation Speed rot/min

Etched Thickness nm

Oxide Layer Thickness nm

0

70

50

66

120

100

84

200

180

129

210

200

168

240

160

The results show that for all rotation speeds the etched thickness is higher than the oxide layer thickness. For speeds higher than 168 rot/min the thickness of the oxide layer is not homogeneous and it does not stick. The combination of etching and oxide growth during the same process step allows to perform in the same time decontamination of the surface and growth of the passivation layer. XPS results Figure 1 and 2 show the concentration profiles of tellurium, cadmium, mercurium and oxygen in the same sample calculated from the XPS spectra of Te3d5/2, Cd3d5/2, Hg 4 f-/2 and 0 Is levels obtained after oxidation without stirring (figure 1) and with stirring (150 s, 66 rot/min) (figure 2). The thickness of the oxidized layer obtained is about 100 A in the first case and 700 A in the second case. The error on XPS profiles comes mainly from roughness and layers mixing. It can be observed that the oxidized layer is highly depleted with mercurium and tellurium, and that it presents a large excess of cadmium. The XPS Cd3d5/2 spectra corresponding to figure 2, obtained for a 400 A sputter depth, is reported on figure 3, curve a. It exhibits a peak maximum at 405.7 eV, with a full width at half maximum (FWHM) of 1.10 eV, while for a 900 A sputter depth,

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387

-Ols -HgMf 4 0. - Te 3d (ox) Te 3d - - =Cd 3d

0.6

-

S0.5-

4H

CL0.4 0.3 - "-

•

"

" -

-

S0 .2 -. 0 0

100

30

200

Obepth A 400

Figure 1: Depth profiles of the elements in the oxide layer (oxidation without stirring) O"-7

-

S.......

Ols 3d52 Te 3d5/2 (ox)

..............

- - --

0.3 Q2

Te 3d 52 f....H4f7/2

.- .. 0 ,- - -.. 0

..

200

. .•40

600

thA 1000

Figure 2: Depth profiles of the elements in the oxide layer (oxidation with stirring,66 rot/min)).

3100 2680 2114 600

588

586

564

582

580

578

576

574

572

570

568

,V

Figure 3: XPS analysis of the core level Te3dS/2 in the oxide layer; (a) at the surface; (b) in the oxide layer; (c) in the bulk.

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the maximum of this peak is at 405.2 eV with a FWHM of 0.8 eV (figure 3, curve b), values generally found in the CdTe bulk after sputtering [3]. Besides, it must be pointed out that the oxygen profile follows roughly the cadmium one (figure 2). Except for a few monolayers at the surface, (figure 3, curve a) the tellurium, the concentration of which is about 10 % at 400 A deep in the oxidized layer, is mainly elementary tellurium Te 0 , as shown by the Te3d5/2 XPS spectrum (figure 3, curve b) which presents a peak maximum at 573.1 eV. Elementary tellurium has been previously evidenced by some of the authors at the surface of CdTe oxidized in a C4+ or H2 SO 4 solution [3][4]. This elementary tellurium does not seem to be the result of argon sputtering, since it was not detected in sputtered CdTeO 3 [3]. In the Hg0 , 79 Cd 0 .2 1 Te bulk (900 A sputter depth), the Te(-II) bonds XPS signal appears at 572.6 eV (figure 3, curve c), this same binding energy being observed in CdTe [4]. Considering the low mercurium concentration, and the absence of oxidized tellurium, it may be assumed that the cadmium in the oxidized layer is mainly in the form of oxide CdO, and perhaps partly in the form of Cd(OH) 2 [4]. Previous studies performed on CdTe by Etcheberry et al [4] allow to assume that the oxidation mechanism occurs through hole injection in the valence band when Fe(CN) 6 3 - is used as oxidizing agent, as suggested by the relative positions of the electronic levels. The first step is a dissolution by oxidation of the Hg0. 79 Cd 0 .2 1 Te species, then, when the species solubility limits are reached, the second step, precipitation, occurs. Varying the stirring speed modifies the competiton between these two mechanisms, which explains the very different thicknesses of the oxide layers that are observed without and with stirring (figure 1 and 2). The fact that the composition of the oxidized layer is mainly governed by cadmium and oxygen can be explained by the different solubilities of oxidized cadmium, tellurium and mercurium in basic media. For pH values about 11, the ionic solubility of Cd 2 + is much lower than the Hg2 + or Te 4 + one. Aspnes et al [5] have shown that at a pH of 11, a fraction of the oxide formed on HgCdTe in basic media is highly soluble leading to a porous layer. By stirring the solution during the oxidation process, the more soluble TeO 2 and HgO are removed from the sample surface, while the least soluble CdO is forming the most part of the oxidized layer on the Hg 0 . 79 Cd 0 .21 Te. The oxidation of HgTe in a Fe(CN) 6 3 basic aqueous solution confirms this mechanism, as no oxide layer growth is observed on pure HgTe, except the native oxide. Electrical properties of the interface oxidized layer/Hg 0 .79 Cd 0 . 21 Te The oxidized layer charge densities and interface state densities are reported in table I1.

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Table II: Charge densities in the oxide layer and interface state densitiesJor the oxide layer growth with stirringand without stirring(during 150 s). MIS

Steady Charge Density (cm- 2 )

Mobile Charge Density (cm-)

Interface State Density (cm- 2 )

ZnS

1.8 1011

4.4 1011

8 1011

Oxide formed without stirring

1.2 1012

5.3 1011

1.7 1011

5.1 1011

1.7 1011

2.8 1011

Oxide formed with stirring (66 rot/min) Oxidation with two different successive stirring speeds

1 1012

not detectable

4 1010

By combining the two modes - oxidation with stirring and without stirring - the interface state density is strongly decreased. The increase of the steady charge density in the oxide layer should lead to an improvement of the photoconductor device. The lifetime value of the minority carriers at the interface is about 5 10-8 s, (bulk value: 10- 7 s). The control of the kinetics of etching of the Hg 0 .79 Cd0 .21Te surface and deposition of the passivation oxide layer should allow to improve the electrical properties of the interface and the oxide layer and consequently the photodetector performances. References [1] R. Triboulet, T. Nguyen Duy and A Durand, J. Vac. Sci. Technol. A3 (1985) 95. [2] U. Solzbach and H. J. Richter, Surface Science, 97 (1980) 191. C. Debiemme-Chouvy, F. Iranzo Marin, U. Roll, M. Bujor and A. [3] Etcheberry, Surface Science 352-354 (1996) 495. [4] F. Iranzo Marin, J. Vigneron, D. Lincot A. Etcheberry and C. DebiemmeChouvy, J. Phys. Chem. 99 (1995) 15198. [5] D. E. Aspnes and H. Arwin, J. Vac. Sci. Technolog. A2(3) (1984) 1309.

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AUTHOR INDEX

Acosta, Eddie Agarwala, B. Alieman, J. AIlongue, P. Andricacos, P.C.

103 1 309 160, 177 1, 52, 111

Baker, Brett C. Ballutaud, Dominique Barkey, D. Barnes, Peter A. Batchelor, W. Beaunier, L. Bizetto, F.C. Bhattacharya, R.N. Boldo, E.M. Bozack, Michael J.

103 385 134 282 309 263 221 309 221 282

Cabral, C. Cachet, H. Carnell, C. Chen, L. Chen, Michelle Chen, William Chiu, Shao-Yu Chowdhury, Rina Chung, D. Contolini, R.J. Cooney III, E. Cote, W. Cunningham, Tim

111 263 1 71, 122 25 340 256 103 1, 111 83

Dal, Bau-Tong Dawson, Dean J. Debiemme-Chouvy, C. Delatorre, R.G. Deligianni, H. de Oliveira, L.S. Diaz, R. Doesburg, J. Dordi, Yezdl Dukovic, J.O. Duquette, David J.

256 238 379, 385 221 52, 83 221 160 329 25 52, 83 61, 212

Electrochemical Society Proceedings Volume 99-9

1 1 238

391

D'Urso, John

25

Edelstein, Daniel C. Elbahnasawy, R.F. Ern•, B.H. Etcheberry, A.

1 242 379 231, 379, 385

Feng, Ming-Shiann Flori, M.A. Flowers, Jr., Billy H. Fluegel, J. Forni, F. Foresti, M.L. Froment, M. Fukidome, Hirokazu Fung, H.P.

256 221 272 111 294 294 263 366, 373 194

Ge, Larry M. Geffken, R. Gighuhi, Anthony Gignac, L. Gill, William, N. Goh, Wang Ling Gomes, W.P. Gorostiza, P. Grebs, T. Cumbo, J.

238 111 282 111 61 168 156 160 185 185

Hamilton, Greg Happek, Uwe Herrick, Matthew Hey, Peter Heyns, M.M. Hoffmann, Peter M. Horkans, J. Hsu, Jyh-Wel

103 272 103 25 156 149 111 256

Inman, M.E. Innocenti, M. Ivey, D.G.

201 294 329

Keane, J. Kelly, James J. Khoperla, T.N. Kim, Hong-seub

309 16 352 361

392

Electrochemical Society Proceedings Volume 99-9

361 340 361 212

Kim, Seung-joon Ko, Tze-Man Koh, Kwna-ju Krishnamoorthy, Ahila Kwietniak, K. Lauffer, J. Landau, Uziel Lee, Charles Y. Lee, Kae-hoon Lee, YI-Fon Leedy, K.D. Lefevre, Frank Lipin, Andrew Liu, Kai Yu Locke, P. Long, John G. Lopatin, Sergey Lorans, Dominique Luce, S.

111 185 25 61 361 96 201 385 25 168 1,111 149 9 385 1

Malhotra, S. Malik, Atif Martins, L.F.O. Mason, A. Mathieu, C. Matsumura, M. Maurin, G. McHugh, P.R. Mclnerney Megivern, C. Mertens, P.W. Mizuta, Naomi Moffat, T.P. Morante, J.R. Munford, M.L. Murarka, Shyam P.

111 25 221 309 379 366, 373 263 71 242 1 156 366 41 150 221 212

Ng, Wei-Chin Noufl, R.N.

340 309

O'Keefe, M.J. Oskam, Gerko

318

Papapanaylotou, Demetrius

96

Electrochemical Society Proceedings Volume 99-9

201

393

Pasa, A.A. Parks, C. Patton, E. Pena, David Pezzatini, G. Pillier, F.

221 ill 83 103 294 177

Radisic, Aleksandar Reid, J. Ridley, Sr., R.S. Rltzdorf, T. Rodbell, K.P.

149 83 185 122 ill

Sanz, F. Sartorelli, M.L. Schwarzacher, W. Searson, Peter C. Seligman, L. Shannon, Curtis Shih, Han-C Shin, Jung-wook Simpson, Cindy R. Spindler, J. Stickney, John L. Strubbe, K. Sun, J.J. Sutter, E.M.M.

160 221 221 149, 318 221 282 256 361 103 185 272 156 201 231

Taylor, E.J. Teerlinck, I. Ting, Chiu H. Triboulet, Robert Tsai, Ming-Shih Tsai, R. Tse, Man Siu Tung, I-Chung

201 156 96 385 256 111 168 256

Uzoh, C.

111

Varadarajan, Desikan Via, G.D. Vigneron, J.

61 201 231,379

Wachnik, R. Wade, Travis L.

1, 111 272

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Electrochemical Society Proceedings Volume 99-9

Walton, E.G. Wan, C.C. West, Alan C. Wilson, G.J. Wu, Q.

1,52, 83, 111 194 16 71 134

Zambelli, T. Zanchi, 0. Zhou, C.D. Zhu, Mel

177 221 201 96

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395

SUBJECT INDEX Additives

Atomic Force Profllometry Au AuSn Automatic Bath Replenishment

16, 52, 103 111 9, 16, 41 242 294 272, 282, 294 294 256 168 242 242 9 272, 282, 294 134, 168, 242 272, 340, 373 238 282, 318, 340 328 96

Backmetal Backside Metallization Bath Aging Bis-(3-sulfopropyl)-disulfide (SPS) Binding Energy Bromide

185 185 96, 111 16 231 41

CdSe CdTe CdZnTe CMP Cobalt Copper 41

263 272 379 238, 256 221, 282 1, 9, 16, 25,

Adsorption AES Ag ALE Alternate Underpotential Deposition Aluminum Annealing Anodic Characterization Anodic Properties Aspect Ratio Atomic Layer Epitaxy (ALE) Atomic Force Microscopy (AFM)

52, 61, 71, 83 96, 103, 111, 122, 134, 149 156, 168, 177 185, 194, 201

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Electrochemical Society Proceedings Volume 99-9

Copper Alloy Copper Indium Gallium Selenide

221,231,238 212,309 309

Copper - Zinc

212

CoSb Chloride CMOS Computational Fluid Dynamics Conduction Band Current Distribution Cu(100) Cu(110) Cu(111) Cup Plater

282 25,41, 134 1 71 156, 160 25,52 41, 134 41, 134 41 83

Damascene Defect Deposit Thickness Depth Profiling Dopants Doping Effect Double Layer

1,52, 83, 122 1 25 242 111 361 9

ECD Seed Layer Electrochemical Atomic Layer Epitaxy (ECALE) Electroless Copper Electroless Deposition Electroless Nickel Electrolyte Conductivity Electron Capture Endpoint Energy Band Diagram Eutectic

122 272, 282, 294 168 168, 309, 340 352 340 25,83 156 361 318 329

Faceting Flip-Chip Foot Flux

134 340 361 52

GaAs

231,242, 263

Electrochemical Society Proceedings Volume 99-9

397

GaAs (100) Gap Filling Gate

242 96 361

HF HgCdTe Holefiil Hole Injection

156, 366 385 1 156, 160

Impurities Infrared Detector Inhibition Inlaid Metallization InAs InP InP (100) Interconnect

103, 111 379 52 122 272 242, 263, 329 242 1, 9, 25

Janus Green B (JGB)

16

Kerr Effect

221

Leveling Limiting Current

16, 25 16, 25, 71

Macroprofile Manufacturing Mass Transport 111 Microprofile Modulated Reverse Current

201 1 25, 61,

71,

201 201

Mott - Schottky Plot

221

Nickel Notch n-type Si

160, 221,340 361 156, 160, 177 221, 318, 366 373

398

Electrochemical Society Proceedings Volume 99-9

Nucleation

149, 318

Passivation PEG Photovoltaic Device Platinum Polysilicon Porosity Power Devices Precursor p-type GaAs p-type Si Pulse 212

242 16 309 160 361 379 185 309 231 156, 160, 373 9, 61, 201,

Pulse Reverse Pyrophosphate

329 9, 103, 201 149

RBS Resistive Seed Resistivity Transients Roughening Roughness

221, 263 25, 83 103, 111 134 242

Scaling Analysis Schottky Parameters Self Annealing Semiconductor Manufacturing Shape Evolution Sheet Conductance Si/Au Schottky Junction Si/S1O 2 Interface SIMS

25,83 177, 318 96, 103, 111 1, 71 52, 61 83 318 366 103, 111, 242

Simulation Solder SPC SPS Scanning Tunneling Microscopy (STM) Sequential Underpotential Deposition Stress Sulfidation

16, 25, 52, 83 329 1 16 41 282 103 242

Electrochemical Society Proceedings Volume 99-9

399

Superfllling

1, 52, 111

Tantalum Tellurium Terminal Effect Thermodynamics Thermoelectric TIN

185 379 25,83 134 282 149, 194

Underpotential Deposition

282, 294

Valence Band

156, 160

Wafer

1, 25, 83

XPS

231, 242, 340 379, 385

Zincation ZnS

340 294

200 mm

83

300 mm

83

400

Electrochemical Society Proceedings Volume 99-9

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