Instabilities in Silicon Devices : New Insulators Devices and Radiation Effects

INSTABILITIES IN SILICON DEVICES New Insulators, Devices and Radiation Effects

INSTABILITIES IN SILICON DEVICES New Insulators, Devices and Radiation Effects

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INSTABILITIES IN SILICON DEVICES New Insulators, Devices and Radiation Effects

Edited by

Gerard BARBOTTIN Aerospatiale Les Mureaux France and

Andre VAPAILLE Universite de Paris 11 Faculte des Sciences d'Orsay Orsay France

VOLUME 3

m 1999

ELSEVIER AMSTERDAM - LAUSANNE - NEW YORK - OXFORD - SHANNON - SINGAPORE - TOKYO

ELSEVIER SCIENCE B.V. Sara Burgerhartstraat 25 P.O. Box 211, 1000 AE Amsterdam, The Netherlands © 1999 Elsevier Science B.V. All rights reserved. This work and the individual contributions contained in it are protected under copyright by Elsevier Science B.V., and the following terms and conditions apply to its use: Photocopying Single photocopies of single chapters may be made for personal use as allowed by national copyright laws. Permission of the publisher and payment of a fee is required for all other photocopying, including multiple or systematic copying, copying for advertising or promotional purposes, resale, and all forms of document delivery. Special rates are available for educational institutions that wish to make photocopies for non-profit educational classroom use. Permissions may be sought directly from Elsevier Science Rights & Permissions Department, PO Box 800, Oxford OX5 IDX, UK; phone: (+44) 1865 843830, fax: (+44) 1865 853333, e-mail: [email protected]. Yott may also contact Rights & Permissions directly through Elsevier's home page (http://www.elsevier.nl), selecting first 'Customer Support', then 'General Information', then 'Permissions Query Form'. In the USA, users may clear permissions and make payments through the Copyright Clearance Center, Inc., 222 Rosewood Drive, Danvers, MA 01923, USA; phone: (978) 7508400, fax: (978) 7504744, and in the UK through the Copyright Licensing Agency Rapid Clearance Service (CLARCS), 90 Tottenham Court Road, London WIP OLP, UK; phone: (+44) 171 436 5931; fax: (+44) 171 436 3986. Other countries may have a local reprographic rights agency for payments. Derivative Works Subscribers may reproduce tables of contents for internal circulation within their institutions. Permission of the publisher is required for resale or distribution of such material outside the institution. Permission of the publisher is required for all other derivative works, including compilations and translations. Electronic Storage or Usage Permission of the publisher is required to store or use electronically any material contained in this work, including any chapter or part of a chapter. Contact the publisher at the address indicated. Except as outlined above, no part of this work may be reproduced, stored in a retrieval system or transmitted in any form or by any means, electronic, mechanical, photocopying, recording or otherwise, without prior written permission of the publisher. Address permissions requests to: Elsevier Science Rights & Permissions Department, at the mail, fax and e-mail addresses noted above. Notice No responsibility is assumed by the Publisher for any injury and/or damage to persons or property as a matter of products liability, negligence or otherwise, or from any use or operation of any methods, products, instructions or ideas contained in the material herein. Because of rapid advances in the medical sciences, in particular, independent verification of diagnoses and drug dosages should be made.

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"There are more things on heaven and earth, Horatio, than are dreamt of in your philosophy ". Shakespeare, Hamlet [1, 5]

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AEROSPATIALE ESPACE Gi D E F E N S E

This project was made possible thanks, in part, to the Defense and Space division of the Aerospatiale Cie, France.

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THE EDITORS

Gerard BARBOTTIN was bom in Orleans (France) in 1946. He obtained his "Ingenieur" degree from the Institut National des Sciences Appliquees of Lyons (Fr.) in 1969, and was awarded an MS degree from the Materials Science department of Northwestern University (111. USA) in 1973 for his work on composition-modulated thin films. He worked for Texas Instruments from 1974 to 1979 (first as a process engineer in the assembly of integrated circuits, then as a failure analysis and reliability specialist). He worked for IBM France from 1979 to 1989 (first as a failure analysis specialist, then as a process engineer for an advanced CMOS process). During his time with IBM he coordinated the writing of Volumes 1 and 2 of this series, and co-edited their content. He joined the Aerospatiale Cie in 1989. He has since that date carried out specific studies related to the use of electronic components in space launchers and strategic missiles. He currently heads a team in charge of drafting "components and technology policies" for military and space programs. He was named "Senior Expert" with Aerospatiale in 1998. He recently co-chaired the program committee of the RADECS 97 international conference on the effects of radiation on components and systems and edited the proceedings of that conference.

Andre VAPAILLE was bom in St-Leu-La-Foret (France) in 1933 and graduated from the Universite de Paris (Fr.) in 1955. He first carried out research work with Fr. Grivet in the Electronics department of the Universite de Paris from 1958 to 1966. He was awarded the degree of "Docteur d'Etat" from the Universite d'Orsay (Fr.) in 1966 for his work on the deep levels in the silicon band gap introduced by irradiation and impurities. From 1966 to 1972 he pursued research work with R. Castagne on the interface states of the Si-Si02 structure and on impurity-related deep levels in silicon. From 1972 to 1982 his research work focused on the metal-semiconductor structure (using Si and 3-5 compounds). Since 1982 he has been working on the epitaxial growth of Si in high vacuum (MBE and CBE). He teaches at the Institut Universitaire de Technologic of the Universite d'Orsay since 1972 and has been head of the Departement de Mesures Physiques of that institute from 1980 to 1986. Besides the co-editing of the three volumes of this series, he has also authored two other books entitled: "Electronique du silicium homogene" (Masson, 1970) and "Dispositifs et circuits semiconducteurs" (Dunod, 1989), the latter with R. Castagne.

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FOREWORD By the year 2000, sales of semiconductor integrated circuits will reach approximately 150 billion dollars. The most critical technology supporting this industry is control of the SiSi02 interface. Silicon dioxide is used to passivate all of the critical silicon semiconductor regions which form the heart of the devices. It is also universally used in all of the integrated circuits to form insulating layers and the gate insulator in most MOS devices. The use of silicon dioxide as a passivation layer, gate oxide or insulating layer provides a very stable surface with very low surface recombination velocity. No other semiconductors have been able to match silicon because it has not been possible to achieve a surface passivation layer on them which can compete with the silicon dioxide layer over silicon with respect to stability and low surface recombination velocity. Silicon dioxide possesses other unique capabilities including the ease with which it can be photolithographically patterned and its ability to serve as a barrier against unwanted diffusion. This book addresses the instabilities present when silicon dioxide is used to passivate silicon. Even though a properly prepared Si-Si02 interface is very stable, it is essential to understand the instabilities that inevitably remain and to understand the technology used to reduce them to their present very acceptable state. Many integrated circuits are used in satellite systems where they are subject to high energy radiation from the Van Allen belts, from cosmic radiation and from solar flares. They are also used in military equipment where they must withstand specified levels of high energy radiation from nuclear weapons. High energy radiation can severely degrade the electrical properties of the Si-Si02 interface. A properly manufactured SiSi02 interface can be designed to minimize the adverse effects of high energy radiation, and this technology is thoroughly discussed The most serious radiation problem is the permanent degradation produced by ionizing dose in the Si02 and at the Si-Si02 interface. In hardened devices, failure can occur at ionizing dose levels as low as 500 Rads (Si). However, using special device hardening manufacturing processes, threshold failure levels can easily be increased to a minimum of 10^ Rads (Si), and with more attention to special processes, failure level thresholds can be increased to 10^ Rads (Si). The ionizing dose rate ejfects in Si and Si02 have been explained by defining the hole electron pair generation constants and relating the carriers so generated to the transient current which result in the silicon devices. Permanent damage from neutron and proton irradiation have been well characterized by determining the crystalline defects in terms of their density and energy levels and relating them to changes in current gain in bipolar devices and to leakage currents in MOS devices.

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Foreword

The production of logic upset and, in rare cases, device failure caused by cosmic rays is also reasonably well understood in terms of the charge collected from the ionization at critical device nodes and its consequent effects on currents and voltage in semiconductor devices. Progress in stabilizing the Si'Si02 interface has resulted from two major efforts. It was necessary to process Si and Si02 through very clean steps; free from chemical impurities, especially electrically active impurities. The alkali ions, especially sodium, had to be eliminated from the silicon dioxide. Other ions such as hydrogen and ammonia had to be reduced. The addition of phosphorus glass was found to be helpful in some cases. It was also necessary to reduce the defect density in the silicon dioxide that resulted from thermal stresses. This was particularly important to minimize the degradation that results from high energy radiation. So special manufacturing processes were developed which reduced the temperatures used in the high temperature oxidation and diffusion processes. Understanding of the Si-Si02 interface is in no way complete at this time. The effort to improve the stability of the oxide continues as does the research and development to minimize the effects of high energy radiation. This work goes on in parallel with the continuing effort to reduce the feature size of the individual devices within the integrated circuits. Feature size is now approaching the incredibly small length of 0.1 micron and may even go lower. High energy radiation seems to activate electrically neutral defects in the oxide and at the interface providing damaging shifts in the threshold voltage ofMOS transistors and increases in the surface recombination velocity that degrades the gain of bipolar transistors. The postulated nature of these defects is discussed thoroughly in this book, but what is lacking is a way to quantitatively measure them. Unfortunately, it still remains true at this time that there is no measurement or combination of measurements, electrical, chemical or physical, which can define a device's susceptibility to damage by high energy radiation. It is therefore necessary to evaluate the radiation hardness of an integrated circuit manufacturing process by sample testing the devices thus fabricated in an actual high energy radiation environment and then, by statistical extrapolation, defining the radiation hardness of the rest of the lot. It remains a primary goal of the ongoing research and development activities to discover a test method capable of predicting an integrated circuit's radiation tolerance by direct measurements. This book is the result of cooperation between a group of experts from several countries and is an up-to-date summary of the instabilities present in the Si-Si02 interface which forms the surface of nearly all commercially important integrated circuits. It is a comprehensive summary of the process technologies used to stabilize the interface both for terrestrial and space applications.

George C. MESSENGER

Foreword

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George MESSENGER was bom in Bellows Falls, Ver. (USA) in 1930. He obtained a B. S. degree in physics from Worcester Polytechnic University (USA) in 1951, an M. S. degree in electrical engineering from the University of Pensylvania (USA) in 1957, and a Ph. D degree in engineering from California Coast University (USA) in 1986. He has worked as a research scientist for numerous companies (Philco Corp., Hughes Semicond., Transitron Corp., Northrop Corp., etc.) and has made many significant contributions to the fields of radiation effects and nuclear engineering. He, in particular, developed a simplified "neutron energy-versus-displacement" curve which allowed the development of the 1 MeV equivalent standard. He also discovered the Kirk effect in bipolar transistors and co-discovered the Messenger-Spratt equation for damage in bipolar semiconductor devices. During the course of his long carreer, he has contributed numerous articles to technical journals, was granted several patents and has received many awards for his contributions in the fields of radiation effects and device and system hardening. He has co-authored two books entitled: "The Effects of Radiation on Electronic Systems" (Von Nostrand, 1992) and "Single Event Phenomena" (Chapman & Hall, 1997). He has been an IEEE fellow since 1976.

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INTRODUCTION TO VOLUME 3 An ambitious European effort This book is the third of three volumes devoted to silicon passivation and to passivationrelated instability phenomena affecting modem silicon devices. This study, which should be of great interest to circuit manufacturers and circuit users alike, is the result of an ambitious European effort which began in 1981. Twenty five specialists have collaborated on this project, all of them engineers of the semiconductor industry, university professors or research scientists working in fields related to microelectronics. Electrical instabilities, an ever-present problem A device is said to be unstable when its electrical characteristics are modified in a (fully or partially) reversible manner once a stress is applied. The stress may be thermal, electrical or due to radiation. Unlike hard (irreversible) defects, which are usually due to physical modifications of the materials, soft (reversible) defects are due to "charges" moving about in the insulating layers or at the insulator/silicon interface (A more complete definition of instability phenomena can be found in Chap. 14 of Vol. 2). Far from disappearing with progress in process control and materials characterization, the problem of instabilities remains very acute because of three current trends in microelectronics. • Greater device integration subjects insulating layers and gate oxides to ever-increasing thermal and electrical stresses. • Silicon devices are more frequently used in hostile environments (military, nuclear, space). • "Agressive" new fabrication processes (e.g. ion implantation, electrolithography, plasmas, etc.) substitute for traditional ones and introduce new sources of instabilities. There is thus a need for a complete, didactic and up-to-date manual, aimed at specialists and students in the field. This 2200-page study, published in three volumes, should answer this need. Contents of Volume 1 (published in 1986) Part I of Vol. 1 deals with the physics of silicon passivation from the point of view of material science. We describe the various theories which attempt to explain how silica grows on silicon during thermal oxidation. We look at the imperfections of vitreous silica and at the impurities it contains. We also describe some often overlooked side-effects of silicon passivation, namely those taking place in the silicon substrate itself. In part n we look at the electrical properties and characteristics of the MIS structure, in general terms. We oppose ideal and actual MOS structures and show how any deviation from ideality affects the C(V) curve. We examine the complex nature of electronic conduction in thin insulators and see how and why the application of large electric fields leads to oxide breakdown. We finally render the reader familiar with the concept of electrical noise and with its applications to surface noise.

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Introduction to Volume 3

In Part HI, we review the electrical phenomena occurring in the bulk of silicon oxide (Part in is made up of three chapters: Chaps. 8 and 9 belong to Vol. 1 whereas Chap. 10 belongs to Vol. 2). We re-examine the perennial problem associated with mobile ions, which, in spite of process improvements, remains a potential threat to bipolar and MOS processes alike. We then look at the many aspects of hot carrier injection into silicon dioxide, whether this injection is intentional, for study purposes, or takes place while the device operates. Contents of Volume 2 (published in 1989) Part in ends with Chap. 10 in which we describe at length two phenomena associated with carrier injection, namely carrier trapping and detrapping, and in which we review the many electrical techniques used to characterize carrier traps in silica. In Part IV we take a look at the electrical phenomena taking place at the Si-Si02 interface. We show that imperfections give rise to so-called "intrinsic" surface states, whereas the presence of impurities in the interfacial zone generates "extrinsic" surface states. We examine their properties, their impact on electrical characteristics and the models currently proposed to explain their origin. We review in detail the techniques used to measure them and how these can be used for diagnosis purposes. Practical examples of passivation-related instabilities in silicon devices are reviewed in Part V. Since the basic physics of instabilities has been given in the earlier parts, these chapters should give the engineer quick ways of solving practical instability problems encountered in bipolar as well as in MOS devices. The peculiarities of structures possessing a double insulating layer are also examined and their application to MNOS non-volatile memory cells detailed. We end Vol. 2 by surveying in Part VI the effects of radiation on the Si-Si02 structure and how these effects impact the normal functioning of silicon devices. We show that, once again, most effects occur because of the presence of passivation layers and that only in the particular case of large doses and energetic particles do the upper layers of the silicon substrate play a part in instability phenomena. Contents of Volume 3 (to be published in 1998) Volume 3, the present book, comprises two parts. Part I is made up of seven chapters. Each chapter is either an update of a chapter found in Vols. 1 or 2, or an extension of it. These additions proved necessary due to the fast evolution of new fabrication processes, to the emergence of new insulating materials (such as silicon nitrides, silicon oxynitrides and buried oxides) and to the advent of multilayer dielectrics. The race to decrease the feature size of highly integrated circuits has made it necessary to better understand conduction and breakdown in thin silica films as well as injection phenomena in submicrometer devices. It has also furthered the implementation of new and powerful physical and electrical characterization techniques, of which two are thoroughly described: charge pumping and isotopic tracing.

Introduction to Volume 3 Part n contains four chapters and is entirely devoted to instabilities occurring in radiation environments, with special emphasis on space applications. The (natural) radiation environment encountered in space, around the earth is described and the basic terms and definitions used in the field of radiation-matter interactions are introduced. To understand why and how radiation affects the functioning of semiconductor devices, we review the main radiation-matter interactions and their underlying physics. We show how the electrical characteristics of irradiated devices get degraded either by ionization phenomena or by displacement damage or by both. Finally, two effects, most frequently encountered in space, are thoroughly described: the ionizing dose effect and single event phenomena. Scope of this project and intended audience In this study, we look at instability phenomena from the dual point of view of material science and electronics and we examine how these phenomena affect the functioning of practical devices. These three volumes should thus help circuit manufacturers and circuit users to relate unstable parameters and characteristics to the physical defects and impurities which caused them. The topics treated in these volumes are easily accessible provided the reader is familiar with the basics of physics and electronics. It should prove useful to: • Engineers and technicians working in the semiconductor industry in such fields as: circuit design, manufacturing engineering, material and process characterization, quality and reliability assurance, failure analysis, and hardening assurance. • Graduate students and research scientists in material science, electrical engineering and nuclear engineering, interested in insulator physics, semiconductor physics, device physics, radiation-device interactions and electronics. • Application engineers working in the military, nuclear and space industries. How to use this book The entire study is divided into 30 chapters. Although the chapters follow each other in a logical order, they can be read independently. Each one contains an abstract in English, French and German, a table of contents, a list of symbols, units and abbreviations used and a list of references. An Author Index and a Subject Index can be found at the end of each volume and easily refer the reader to the relevant chapter, section or paragraph. Since a great deal of effort has been devoted to unifying not only symbols, units and abbreviations but also styles and approaches, reading should be easier than in usual multi-author books. However, English being the mother tongue of none of the contributors, we ask the reader to show leniency for style and granmiatical errors which might have escaped our editing.

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Introduction to Volume 3

Acknowledgements We would like to thank the 15 authors who have contributed a text to Vol. 3 and who have shown great patience both with our demanding editing rules and with the delayed publication of their work. We are grateful to Dr. George MESSENGER, a pioneer in the field of radiation effects in silicon devices, who volunteered to read all chapters and contributed many useful comments an suggestions. We are glad he agreed to write a foreword to this volume. Special thanks go to the typing pool of the AEROSPATIALE plant in Les Mureaux (France) and to the typists of ART VIDEO in Poissy (France) who handled the typing (or retyping) of the 950 pages of this volume. Finally, we would like to thank the Defense and Space Division of the AEROSPATIALE Cie (France) who gave us logistical support and financial help and who trusted us throughout this six-year-long project.

The editors

CONTENTS OF VOLUME 3 Introduction to Volume 3 List of contributors

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PART I - Updates and additions to Volumes 1 and 2 Chapter 1 : Silica, silicon nitride and oxynitride thin films - An overview of fabrication techniques, properties and appKcations 3 by B. Balland and A. Glachant Chapter 2 : A review of buried oxide structures and SOI technologies 145 by J.L. Leray Chapter 3 : Dielectric breakdown in siUca - A survey of test methods 233 by D.R, Walters, J,F. Verwey and T.A. Zegers - Van Duijnhoven Chapter 4 : Hot carrier injections in siUca and related instabilities in submicrometer MOS transistors 265 byD, Vuillaume Chapter 5 : Multilayer dielectrics for memory appUcations 341 by P, Gentil Chapter 6 : Charge pumping techniques - Their use for diagnosis and interface state 405 studies in MOS transistors by J,L. Autran, B. Balland and G, Barbottin Chapter 7 : The study of thermal nitridation and reoxidation mechanisms using isotopic tracing methods 495 by J J. Ganem andLJ,R. Baumvol

PART II - Silicon devices in radiation environments Chapter 8 : The space radiation environment by D. Brdunig Chapter 9 : An overview of radiation-matter interactions by W.R, Fahrner Chapter 10 : Radiation effects in electronic components by D. Brdunig and F. Wulf Chapter 11 : Defects and radiation-induced charge trapping phenomena in sihca by P. Paillet and J.L. Leray Chapter 12 : The effects of cosmic ions on electronic components by O. Musseau Author index Subject index Errata of Vol.1

525 553 639 723 781

891 917 935

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LIST OF CONTRIBUTORS Editors G. BARBOTTIN Service YY/ST AEROSPATIALE Route de Vemeuil 78130 Les Mureaux France

Pr.A.VAPAILLE Institut d'Electronique Batiment 220 Universite de Paris Sud 91405 Orsay Cedex France

Authors and co-authors Dr. J.L. AUTRAN LPM Batiment 502 INSA 20, Avenue A. Einstein 69621 Villeurbanne France

Pr. W. FAHRNER Femuniversitat Gesamthochschule Bauelemente der Elektrotechnik Haldener Strasse 182 D-58084 Hagen 1 AUemagne (Germany)

Pr. B. BALLAND LPM Batiment 502 INSA 20, Avenue A. Einstein 69621 Villeurbanne France

Dr.J.J.GANEM Universite de Paris VI GPS Tour 23/3eme etage. 2, Place Jussieu 75251 Paris France

G. BARBOTTIN Service YY/ST AEROSPATIALE Route de Vemeuil 78130 Les Mureaux France

Pr. A. GLACHANT CRMC2 Campus de Luminy Universite de Marseille Case 913 13288 Marseille Cedex 9 France

Pr. I. BAUMVOL Instituto de fisica UFRGS Avenida Bento Gongalves 9500 Porto Alegre - RS 91540-000-Bresil (Brazil)

Pr. P. GENTIL CIUME 46, Avenue Felix Viallet 38031 Grenoble France

Pr.D.BRAUNIG Department AT Hahn Meitner Institut Glienicker Strasse 100 D-14109 Berlin AUemagne (Germany)

Dr.J.L.LERAY CEA-DAM Service Electronique BP12 91680 Bruyeres-Le-Chatel France

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List of Contributors

Authors and co-authors (continued)

Foreword by

Dr. O. MUSSEAU CEA-DAM Service Electronique BP12 91680 Bruyeres-Le-Chatel France

Dr. G. MESSENGER Messenger & Associates 3111 Bel Air Drive 7F Las Vegas NV 89114 USA

Dr.P.PAILLET CEA-DAM Service Electronique BP12 91680 Bruyeres-Le-Chatel France

First Printer

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Larbi KHORDJ APTEL BP513 77304 Fontainebleau France Second Printer ART VIDEO INTERACTIVE 7, boulevard de la Paix 78300 POISSY France

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Publisher

Dr.D.WOLTERS Philips Research Lab. WAG 1-1-18 5656 AA Eindhoven Pays has (The Netherlands)

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AEROSPATIALE Branche Espace et Defense Centre Operationnel Systemes Route de Vemeuil 78130 LesMureaux France

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THE AUTHORS Jean-Luc AUTRAN was bom in Antibes (France) in 1969. He graduated in Materials Science and Engineering from the Institut National des Sciences Appliquees de Lyon (INSA) in Lyons (Fr.) in 1992. He was awarded a Doctorate Degree in 1994 for his study of interface traps by charge pumping techniques, carried out with IBM-Siemens in CorbeilEssonnes (Fr.). From 1994 to 1996, he worked on technology hardening and radiation effects at the Commissariat a l*Energie Atomique (CEA) in Bruyeres-LeChatel (Fr.). In 1996, he joined the Laboratoire de Physique de la Matiere (LPM, laboratory associated with the Centre National de la Recherche Scientifique) at INS A in Lyons (Fr.). He is currently an Assistant Professor of physics at INSA where his research interests include MOS device physics and characterization, advanced dielectrics and defects and reliability in integrated devices. He has authored or co-authored more than 50 publications, has served as guest editor of the Journal of Non-Crystalline Solids, and co-organized the series of symposia on "Si02 and its defects" in Caen (Fr.) in 1995, Agelonde (Fr.) in 1996 and LAquila (It.) in 1998. He is a member of the IEEE. Bernard BALLAND was bom in Nancy (France) in 1939. He studied physics and chemistry at the Universite de Nancy (Fr.) and was named assistant professor at that same university in 1963. In 1969, he joined the Institut National des Sciences Appliquees de Lyon (Fr.) where he carried out research work in the Materials Science department and taught thin film and device physics. He was awarded the degree of "Docteur d'Etat" from the Universite de Lyon (Fr.) in 1975 for his work on the physical mechanisms responsible for the instabilities of MOS devices, and was named university professor in 1980. He presently heads a research group at the Laboratoire de Physique de la Matifere (LPM, laboratory associated with the Centre National de la Recherche Scientifique) at INSA in Lyons (Fr). His research interests include material and device characterization and processing technologies. His current responsabilities include the development and characterization of new dielectric and semiconductor materials for optoelectronics, VLSI and ULSI microelectronics, and microtechnologies. He is a member of the GCIS (Groupement des Circuits Integres sur Silicium), of the SFP (Societe Fran9aise de Physique), of the European and American branches of the MRS (Materials Research Society) and of the EEA (Electronique, Electrotechnique et Automatique) club of France. He has authored or co-authored over 200 publications or review papers on thin films, device characterization techniques and device reliability. Gerard BARBOTTIN (see Editors).

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The Authors Israel J.R. BAUMVOL was bom in Sao Gabriel (Brazil) in 1947. He graduated from the Federal University of Rio Grande do Sul in Porto Alegre (Br.). He received an M. S. degree from the University of Sao Paulo (Br.) in 1974, and a Ph. D degree from the Federal University of Rio Grande do Sul in Porto Alegre (Br.) in 1977, for his work on the submicroscopic structure and local electric field in ferroelectric materials.

From 1979 to 1981, he worked as a postdoctoral fellow at the Atomic Energy Research Establishment, at Hartwell (England) in the field of ion implantation and radiation-enhanced diffusion. From 1984 to 1986 he spent several periods as Visiting Professor at the IBM-Research laboratory in Yorktown Heights (N.Y., USA), working in such different research projects as: multilayers of metallic thin films, the rapid thermal annealing of defects in Si, and the production of thin films of transition metal silicides. He teaches physics at the Federal University of Rio Grande do Sul in Porto Alegre (Br.) since 1985, and conducts research in the field of very thin dielectric films for present and future large scale integrated silicon devices. From 1993 to 1996 he was also a Visiting Professor at the Universite de Paris Vn (Fr.), working in the Groupe de Physique des Solides, in the research team of Professor Serge Rigo. He is a research fellow of the Brazilian National Research Council (CNPq), a member of the Groupement de Recherche-86 (GDR-86) of the Centre National de la Recherche Scientifique (CNRS)- France, and a member of the Scientific Committee of the Groupement Architecture Physique du Silicium (GDR-GAPS) of the CNRS-France. He is also associate editor for the Brazilian Journal of Physics.

Dietrich BRAUNIG was bom in Berlin (Germany) in 1938. He received the degree of "Diplom-Ingenieur" in electrical engineering in 1968 from the Technical University of Berlin (Ger.). He was awarded the degree of "Doktor Ingenieur" in 1974 from the same university for his work on the nonequilibrium behaviour of MOS structures. In 1993, he was appointed to a professorship in the field of semiconductor devices at the Technical University of Berlin (Ger.). He joined the Hahn-Meitner Institut of Berlin (Ger.) in 1968 and has been, since 1976 head of the department of Irradiation Effects on Semiconductor Devices, (now the department of Technology and Reliability). He spent a sabbatical year at IBM East Fishkill/Yorktown Heights (N.Y., USA) from 1983 to 1984. His activities range from basic research to applied physics in the field of semiconductors and semiconductor devices. He lectures on that subject at the Technical University of Berlin and has done so for several years. He is a member of the IEEE.

The Authors

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Wolfgang R. FAHRNER was bom in Hohenpeissenberg, Bavaria (Germany), in 1945. He studied physics in Darmstadt (Germany) and Montpellier (France) He graduated from the University of Freiburg (Ger.) in 1970 and was awarded a Ph.D. from that same university in 1972. He studied and pursued research work at the Fraunhofer Institute of Applied Solid State Physics in Freiburg (Ger.) from 1968 to 1977 except for a sabbatical year which he spent, in 1973 and 1974, with IBM East Fishkill (N.Y., USA). From 1977 to 1988 he worked at the Hahn-Meitner Institute in Berlin (Ger.) on basic MOS research, radiation assurance, and high-energy ion implantation. This period was interrupted by a second sabbatical year spent at IBM East Fishkill in 1984 and 1985. In 1988, he was appointed professor at the University of Hagen (Ger.) and now holds a chair of electronic devices in the school of electronic engineering. He has authored or co-authored more than 200 papers and holds several patents on power, MOS, and diamond-based electronic devices. He is a member of the Electrochemical Society and of the German Physical Society.

Jean-Jacques GANEM was bom in Tunis (Tunisia) in 1961. He graduated from the Universite de Paris VII (France) in 1988. He joined the Groupe de Physique des Solides (GPS) laboratory of that same university and was awarded a Doctorate Degree in 1992 for his study of the initial stages of silicon oxidation. For this work, he conceived a setup specially designed for Rapid Thermal Treatments in controlled atmospheres and for isotopic tracing experiments. He extended his research to the growth mechanisms of thin nitrogen-based dielectrics required for future Ultra-Large Scale Integrated devices. He is currently an assistant professor in Applied Physics at the Universite de Paris VI (Fr) and his research interests, at the GPS laboratory, include Nuclear Reaction Analyses for physical characterization and the relations between structural film defects and their electrical properties. He has authored or co-authored more than 30 publications and is currently a member of the Electronique, Electrotechnique et Automatique (EEA) club of France.

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The Authors

Pierre GENTIL was bom in Rouen (France) in 1945. He obtained the degree of "Ingenieur" from the Ecole Nationale Superieure d'Electronique de Grenoble (ENSERG) (Fr) in 1969. He was awarded the degree of "Docteur d'Etat" from the Universite Scientifique et Medicale de Grenoble (Fr.) in 1979 for his work on interface states in MOS devices, carried out at the Institut National Polytechnique de Grenoble (INFO). He performed his first research work at the Laboratoire d'Electronique, de Technologies et d'Instrumentation (LETT) of Grenoble (Fr.) on MOS and MNOS memories, from 1969 to 1972, and then worked on MOS technology in the CIEA del INF, Mexico D.F. (Mex.) from 1972 to 1974. He joined the Laboratory of semiconductor device physics (LPCS-CNRS) of Grenoble (Fr.) in 1974 where he has worked, since then, on MOS noise, SOI devices, MNOS memories and short-channel MOS transistor degradation. He also headed the Centre Inter-universitaire de Micro-Electronique (CIME) of Grenoble (Fr.) from 1981 to 1994. Besides his current interest for the physics of ultra short channel MOS transistors, he teaches microelectronics at the ENSERG in Grenoble (Fr.) and is responsible for the doctorate in microelectronics at the Grenoble universities. He also acts as an expert for the French Ministry in charge of higher education and research, and for the French Ministry in charge of industry. He is vice-president of a national action committee on microelectronics initial training (CNFM) and is in charge, for France, of a European program on ASIC technology transfer. He is a member of the URSI society. Alain GLACHANT was bom in Conakry (Guinee) in 1946. He first studied physics at the Universite de Provence in Marseille (France), where he was awarded a Doctorate Degree in Crystallography in 1973. In 1974, he joined the Universite d*Aix-Marseille in Luminy (Fr.), where he taught as assistant professor and carried out research work in the Centre de Recherche sur les Mecanismes de la Croissance Cristalline (CRMC2). He was awarded the degree of "Docteur d'Etat- Sciences" from the same university in 1981. He then worked as a postdoctoral fellow at the "Istituto di Scienze Fisiche dell'Universita" of Genoa (Italy) on helium diffraction by rare gas monolayers physisorbed on the basal plane of graphite. In 1983, he became "maitre de conferences" and began to study the physics of silicon nitride growth and that of oxynitride thin films on silicon. Since 1991, he is professor at the Institut universitaire de formation des maitres ae Nice - Centre de Toulon (Fr.). His current research focuses on the low-temperature process-assisted formation of insulating thin films (including electron and photon-enhanced growth or deposition), molecular - scale electronics and the development of new techniques to characterize the surfaces and interfaces of ultrathin films. He was a member of the GCIS (Groupement des Circuits Integres sur Silicium) of the SFV (Societe Frangaise du Vide, Fr.) and is currently a member of the SEP (Societe Fran9aise de Physique, Fr.).

The Authors

XXV

Jean-Luc LERAY was bom in Paris (France) in 1955. He graduated in Physics from the Ecole Centrale de Paris (Fr.) in 1978 and was awarded the degree of "Docteur d'Etat es Sciences Physiques" in 1989 from the Universite d'Orsay (Fr.). Dr. Leray has been with the Commissariat a I'Energie Atomique (CEA) in Bruyeres-Le-Chatel (France) since 1978, where he has worked mostly on radiation effects, technology developments, and hardening. Since 1985, he has been heading a "radiation-hardening" group in charge of developing hardened electronic components for military, space, and high-energy physics environments. He was named Senior Expert with the CEA in 1998. Dr. Leray has authored or co-authored over 120 technical publications, and has written an additional 100 technical articles. He has held numerous teaching and lecturing assignments. He is a senior member of the SEE (Societe des Electriciens et des Electroniciens, Paris, Fr.) and received in 1994 the General Ferrie award for "important contributions to the progress of electronics and its applications". Olivier MUSSEAU was bom in Nantes (France) in 1962. He graduated from the Ecole Superieure d'EIectricite in 1985. In 1986, he joined the Commissariat a I'Energie Atomique (CEA) in the Centre d'Etudes de Bruyeres-Le-Chatel (Fr.), and carried out research work on radiation effects on microelectronic devices. He was awarded the degree of "Docteur en Sciences" from the Universite de Paris XI (Fr.) for his work on heavy ion effects in integrated devices. His current research activities include the study of the physical mechanisms which explain the interaction of radiation with insulating and semiconducting materials, and the development of hardened microelectronic technologies. He has authored or co-authored over 30 publications in this field and has lectured on that topic during the short courses of the RADECS conferences of 1991 and 1995. In 1995, he received the General Ferrie award from the SEE (Societe des Electriciens et des Electroniciens, Paris, Fr.) for "important contributions to the progress of electronics and its applications". Philippe PAILLET was bom in Digne (France) in 1966. He obtained his M.S. degree from the Universite de Aix-Marseille (Fr.) in 1989 and was awarded a doctorate degree from the Universite de Montpellier II (Fr.) for his work on radiation-induced ionization effects in insulators used in microelectronic technologies. He currently works for the Commissariat a FEnergie Atomique in Bruyeres-Le-Chatel (Fr.) where he is in charge of radiation studies on new classes of dielectrics. His research interests include the study of physical mechanisms involved in charge-trapping phenomena and the modeling of these effects in MOS devices. He has authored or co-authored over 30 publications and has co-organized the series of symposia on "Si02 and its defects" in Caen (1995), Agelonde (1996) and L'Aquila (1998).

XXVI

The Authors

Dominique VUILLAUME was bom in Paris (France) in 1956. He received the "Ingenieur en electronique" degree in 1981 from the Institut Superieur d*Electronique du Nord (ISEN, Lille, Fr.) and a doctorate degree in Solid State Physics in 1984 from the Universite de Lille (Fr.). His PhD thesis dealt with the DLTS characterization of electrically active defects in MIS devices. Since 1982, he has been with the Solid State Physics research group at the Laboratoire d'Etude des Surfaces et Interfaces (LESI), laboratory associated with the Centre National de la Recherche Scientifique (CNRS) at ISEN. In 1988, he joined the CNRS as "charge de recherche" (research scientist). From 1988 to 1990, he served as scientific advisor at the "Direction des technologies avancees" (Advanced technologies division) of the BULL R&D laboratory (Les Clayes sous Bois, Fr.). In 1991, he joined the newly created Institut d'Electronique et de Microelectronique du Nord (lEMN) in Lille (Fr.) (this institute is associated with the CNRS, the Universite de Lille, the Universite de Valenciennes and ISEN). His research interests include the physics and the characterization of point defects in semiconductors and MIS devices, the physics and the reliability of thin insulating films on semiconductors, and hotcarrier effects in MOSFETs. He presently works in the field of "molecular electronics", on the physical and electrical properties of self-assembled organic monomolecular films, organic materials, and molecular devices. He is the author or co-author of more than 60 technical papers. Dr. Vuillaume is a member of the French Physical Society, the Material Research Society, the IEEE Electron Device Society and the International Society of Molecular Electronics and Biocomputing.

Jan F. VERWEY was bom in Benschop (The Netheriands). He studied solid state chemistry at the University of Utrecht (The Netherlands) where he obtained a PhD in 1967 for his work on photochemical processes in lead halides. From 1967 to 1990 he was with PHILIPS ELECTRONICS (Hoi.) in several functions, firstly in research where he carried out investigations on hot carrier injection into Si02 and on other reliability-related properties of silicon oxide. Lastly, he was heading a department working on the reliability of integrated circuits. Dr. Verwey was extraordinary professor in applied physics at the University of Groningen (Hoi.) from 1976 to 1985, and had a similar position in electronic engineering at Twente University (Hoi.) from 1990 to 1995. He has authored or coauthored more than 80 technical papers.

The Authors

xxvii

Donald K. WOLTERS was bom in Eindhoven (The Netherlands) in 1939 and graduated from the University of Eindhoven (The Netherlands). He joined the technical staff of Philips Research Laboratories (Hoi.) in 1963. His research interests focus on topics as different as: fuel cells, semi-permeable membranes, magnetic tapes, silicon oxidation and the incorporation of water in alkali glasses. Since 1979, he has been particularly active in the field of conduction and breakdown phenomena in thin dielectric films and was awarded a PhD from the University of Eindhoven (Hoi.) in 1985 for his work on breakdown in Si02. He co-edited, in 1983, the book entitled "Insulating films on Semiconductors", published by North Holland. From 1989 to 1993, he developed and published a new purely electrochemical theory on the oxidation of silicon. This theory gives answers to the peculiar 2-D growth at silicon comers, boxes and trenches. Since 1993, he has been working on 1/f noise. He showed that 1/f noise is a phenomenon which can be easily understood by accounting for power dissipation and its effect on electronic transport.

Friedrich WULF, was bom in Leek (Germany) in 1946. He received the degree of "Diplom Ingenieur (FH)" in micro-electronics in 1972 from the Technische Fachhochschule Berlin (Ger.) and the "Diplom Ingenieur (TU)" degree in high frequency engineering from the Technische Universitat Berlin (Ger.) in 1975. He was awarded the degree of "Doktor Ingenieur" from that same university in 1989 for his work entitled" Einheitliches Modell zur Beschreibung der Generations- und Ausheilprozesse von Oxidlagungen Q^^ und Grenzflachenzustanden Dj^ im Siliziumdioxid durch stress". He joined the Hahn-Meitner-Institut Berlin GmbH in 1975. Until 1978, he ' developed electronic equipment for the control system of the heavy ion accelerator VICKSI. Since then, he has been working in the group of semiconductor devices and radiation tests. He spent one year (1990/91) as an adviser at the Inter-university Microelectronics Center (IMEC, Bel.) on the radiation hardening of MOS devices, especially CDD's. He was in the organization team of the European Committee for the Future Accelerators (EFCA) 1990 and in the program committee of RADECS 1993. His activities include basic research on irradiation effects in semiconductor devices, device simulation, hydrogen profiling in thin Si02 layers, and irradiation qualification tests of semiconductor devices for space applications. He heads the Department of experimental systems at the Hahn-Meitner-Institut in Berlin (Ger.), since January 1994.

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PARTI UPDATES AND ADDITIONS TO VOLUMES 1 AND 2

FOREWORD Part I of this volume contains seven chapters. Each of these chapters is either an update of a chapter found in Vols. 1 and 2 or an extension of it. In Chap. 1, we give an overview of the fabrication techniques, properties and applications of the newest thin dielectric films used in semiconductor devices, namely: silica, silicon nitride and silicon oxynitride. Whereas in the previous volumes, we were mostly interested in the physics of thermal oxidation (Chap. 1 of Vol. 1), we now describe in detail the (thermal or assisted) nitridation of silicon and of silica, and also mention some deposition techniques. In Chap. 2, we review the techniques currently used to fabricate buried oxides. Devices based on buried oxide (BOX) structures possess such advantages as: an increased integration, a reduction in coupling effects, a better radiation hardness and low leakage currents. This gives BOX technologies a promising future, not only in microelectronics but also in buried optics and micromachines. Dielectric breakdown, studied in previous volumes (Chap. 6 of Vol. 1) is reassessed in Chap. 3 by means of the "charge to breakdown" model. The basic principles of hot carrier injection had been given in Chap. 9 of Vol. 1 and its consequences on short-channel devices examined in Chap. 15 of Vol. 2. In Chap. 4 of this volume, we examine in detail the consequences of channel hot electron injection and drain avalanche hot carrier injection in submicrometer devices and we show how these phenomena can be modeled. The physics and the possible applications of two-layer insulators had been explained in Chap. 6 of Vol. 2. In Chap. 5 of this volume, we describe recent improvements brought to MNOS structures for memory applications and show the advantages of introducing a third insulating layer in the structure. In Chap. 6, we detail the two-level and three-level charge pumping (CP) techniques and their many variants (CP techniques had been briefly described in Chap. 12 of Vol. 2). As dimensions of elementary devices keep shrinking, we show why these techniques are virtually unchallenged to study the channel area in small-size transistors. We show in Chap. 7 how the growth of films (oxides, nitrides, oxynitrides) in wellcontrolled ambients (altematively natural and isotopically-enriched) combined with highresolution profiling techniques, enable us to describe, on an atomic scale, the transport and exchange mechanisms taking place during thermal nitridation and reoxidation. (The use of isotopic tracing techniques, to study the physics of thermal oxidation, had been only briefly mentioned in Chap. 1 of Vol. 1). These seven chapters should allow engineers and researchers alike, to understand the latest developments in the physics and characterization of thin dielectric films and how these developments affect current highly integrated devices.

INSTABILITIES IN SILICON DEVICES Silicon Passivation and Related Instabilities G. Barbottin and A. Vapaille (Editors) © 1999 Elsevier Science B.V. All rights reserved.

CHAPTER 1

SILICA, SILICON NITRIDE AND OXYNITRIDE THIN FILMS An overview of fabrication techniques, properties and applications by B. BALLAND (D and A. GLACHANT (2)

Key items Thin dielectric films Thermal oxidation of silicon Thermal nitridation of silicon Self-limited growth of silicon nitride Thermal nitridation of silica Physical properties of oxynitride films Electrical properties of oxynitride films The role of hydrogen Rapid Thermal Processes (RTP) ReOxidized Nitrided Oxide (RONO) films Nitridation in N2O Nitridation in NO Assisted deposition techniques Assisted growth techniques Applications of oxynitride films

(I) Laboratoire de Physique de la Matiere (CNRS-UMR5511) Institut National des Sciences Appliquees de Lyon 20, avenue Albert Einstein 69621 Villeurbanne - France E-mail: bbaland@insa. insa-lyon.fr

(2) Centre de Recherche sur les Mecanismes de la Croissance Cristalline (CNRS - LP 7251) Campus de Luminy - Case 913 12288 Marseille Cedex 09 - France E-mail: glachant@crmc2. univ.mrs.fr

B. Balland and A, Glachant Abstract of Chapter 1 - Silica, silicon nitride and oxynitride thin films - An overview of fabrication techniques, properties and applications. Although thermal oxide remains an insulator of choice for silicon-based microelectronic devices, thin nitride and oxynitride films possess superior qualities for specific applications. In this chapter we describe both the main techniques used to manufacture thin nitrided insulator films and the main physical and electrical properties of the obtained films. The direct nitridation of silicon in ammonia, by thern^al means, is difficult because it requires high temperatures (> 950°C) and the obtained films are very thin (<10 nm) because of the self limiting nature of the growth process. Since the network of amorphous silicon nitride is denser than that of silica, it resists chemical etching (by HF solutions) better and behaves as a better barrier against diffusion. These properties are exploited in the LOCOS process. Unlike the oxide defects, the defects contained in nitrides behave mostly as electron traps. Thin oxynitride films can be fabricated by nitriding thin silica films in ammonia at high temperature (> SOO^C). Nitridation may be performed at low pressure (P(NHs) < 1 mbar) or at "high" pressure (P(NHs) ^ 1 bar). In either case, the ensuing nitrogen concentration below the surface and at the Si02'Si interface is greater than in the bulk. The introduction of nitrogen atoms in silica, their concentration and their distribution modify in a complex fashion the physical and electrical properties of this material. The presence of nitrogen increases the dielectric strength of silica but increases the density of electron traps and introduces a hole conduction mode. It is also possible to fabricate thin oxide or nitride films, or to nitride thin silica films by using Rapid high Temperature Processes (based on the lamp heating of single wafers). The short process times used allow one to fabricate films whose properties are superior to those grown in furnace processes. To minimize the problems associated with the presence of hydrogen atoms introduced in nitrides during processing in ammonia, one can reoxidize these nitrided films. It is also possible to obtain virtually hydrogenfree nitride films by processing silicon surfaces directly in gaseous N2O or NO. The films thus obtained possess electrical properties which are superior to those of usual nitride films, and especially a greater dielectric strength and a better resistance to electrical stresses. It is also possible to fabricate nitride and oxynitride films at lower temperatures (and even at room temperature) by enhancing the reactivity of the species involved, by non-thermal means. These processes, briefly reviewed, use photons, electrons, ions or plasmas as an enhancement method, which allows one to reduce considerably the "thermal budget". Thin nitride and oxynitride films have found numerous applications in microelectronic devices. Resume du chapitre 1 - Les films minces de silice, de nitrure et d*oxynitrure de silicium - Une revue de leurs procedes de fabrication, de leurs proprietes et de leurs applications. Bien que I 'oxyde thermique reste un isolant de choix pour les composants micro-electroniques sur silicium, les nitrures et les oxynitrures minces se montrent superieurs pour certaines applications. Nous decrivons dans ce chapitre les principales techniques utilisees pour fabriquer des isolants nitrures minces ainsi que les principales proprietes physiques et electriques des films obtenus. La nitruration directe du silicium dans I 'ammoniac par voie thermique est difficile car elle necessite de hautes temperatures (> 950 °C) et les films obtenus sont tres minces (< JO nm) du fait que la croissance est auto-limitee. Compte tenu de la compacite de leur reseau, les films de nitrure resistent mieux que les films d'oxyde a la gravure chimique par I 'acide fiuorhydrique, et constituent une barriere a la diffusion, plus efficace. Ces proprietes sont exploitees dans le procede LOCOS. Sur le plan electrique et contrairement aux oxydes, les defauts presents dans les nitrures se comportent principalement comme des pieges a electrons. Des films minces d'oxynitrure peuvent etre obtenus en nitrurant des films minces d'oxyde thermique, dans de I 'ammoniac a haute temperature (> 800 °Q. La nitruration peut s 'effectuer a basse pression (P(NHs) < 1 mbar) ou a haute pression (P(NHs) ^ I bar). Dans tous les cas, la concentration d'azote sous la surface et a I'interface Si02-Si est plus grande que dans le volume. L 'introduction d 'azote dans la silice, sa concentration et sa distribution modifient de maniere complexe les proprietes physiques et electriques de ce materiau. La presence d'azote accroit la rigidite dielectrique. Elle accroit egalement la densite de pieges a electron et introduit un mode de conduction par trous.

Silica, Silicon Nitride and Oxynitride Thin Films II est egalement possible de faire croitre des films minces d'oxyde ou de nitrure ou de nitrurer des fdms d'oxyde en utilisant des precedes rapides a haute temperature (par chauffage unitaire des tranches, par lampe). Les faibles temps de traitement permettent d'obtenir des fdms qui ont des proprietes electriques superieures a celles des films fabriques dans des fours classiques. Pour minimiser les problemes associes a la presence de I 'hydrogene introduit dans les oxydes nitrures par les traitements thermiques dans Vammoniac, on peut reoxyder ces films. On peut egalement obtenir des films d'oxynitrure sans aucun hydrogene en traitant directement le silicium dans N2O ou NO. Les films ainsi obtenus presentent des proprietes electriques superieures a celles des oxydes ou des nitrures classiques; en particulier, ils presentent une meilleure rigidite dielectrique et une tres bonne resistance aux contraintes electriques. II est egalement possible de fabriquer des nitrures classiques et des oxynitrures a plus basse temperature (voire a temperature ambiante) en activant les especes reagissantes par des procedes non thermiques. Ces procedes, passes brievement en revue, utilisent des photons, des electrons, des ions ou des plasmas comme methode deactivation, ce quipermet de reduire considerablement le "budget thermique". Les films minces de nitrure et d'oxynitrure de silicium ont trouve de nombreuses applications dans les composants microelectroniques. Zusammenfassung zu Kapitel 1 - Siliziumoxyd,-nitrid and-oxinitrid Diinnschichten - Ein Uberblick iiber ihre Herstellungsprozesse, ihre Eigenschaften und Anwendungen, Obwohl thermisches Oxyd hervorragende Isolatoren fUr die mikroelektronischen Siliziumbauelemente abgibt, werden Nitride und Oxinitride fUr bestimmte Anwendungen bevorzugt. In diesem Kapitel werden die wichtigsten Herstellungstechniken von isolierenden Nitriddtinnschichten und deren physikalischen und elektrischen Eigenschaften erldutert. Die direkte, thermische Nitridation von Silizium in Ammoniak erweist sich als schwierig, da sie hoher Temperaturen (>950^C) bedarf und die Filmschichten sind diinn ( 800°C) von thermischem Oxyd in Ammoniak hergestellt werden. Die Nitridation kann entweder bei niedrigem (P(NH^ < Imbar) oder hohem Druck (P(NHs) ^ Ibar) erfolgen. In beiden Fallen ist die Stickstofflconzentration hoher unter derfidche und an der Si02'Si Grenzfidche als im Volumen. Das Einbringen von Stickstoff in Siliziumoxyd, seine Konzentration und seine Verteilung dndern die Materialeigenschaften in komplizierter Weise. Das Vorhandensein von Stickstoff verstdrkt die dielektrische Eigenschaften, aber auch die Dichte der Elektronenfallen undfuhrt zu einer Loch-Leitung. Man kann auch durch schnelle Hochtemperaturprozesse (basierend auf dem Aufheitzen durch Lampen von einzelnen Wafern) Oxid- oder Nitridschichten herzustellen oder Oxydschichten zu nitridieren. Durch die kurze Prozefidauer, sind diese Schichten in ihren elektrischen Eigenshaften den in klassischen Ofen erzeugten Schichten Uberlegen. Um die Probleme, die mit dem Vorhandensein von Wasserstoff in nitridierten Oxyden verbunden sind, zu minimieren, kann man die Schichten erneut oxidieren. Oxinitridschichten ohne jeglichen Wasserstoff konnen auch durch unmittelbares Behandeln von Silizium mit N2O oder NO erhalten werden. Die dadurch erzeugten Schichten zeigen bessere elektrische Eigenschaften als klassische Oxyde oder Nitride, insbesondere stdrkere dielektrische Eigenschaften und einen besseren Widerstand zu elektrischen Randbedingungen. Es ist auch moglich Nitride und Oxinitride bei niedrigen Temperaturen (sogar bei Raumtemperatur) herzustellen, indem man die Reaktionspartner durch nicht-thermische Mechanismen aktiviert. Diese Prozesse werden kurz beschrieben; sie verwenden Photonen, Elektronen, lonen oder Plasmen zur Aktivierung, was das thermische "Budget" (thermischen Aufivand) wesentlich reduziert. Siliziumnitrid- und -oxinitriddiinnschichten haben in mikroelektronischen Bauelementen zahlreiche Anwendungen gefunden.

B. Balland and A, Glachant Chapter 1: Silica, silicon nitride and oxynitride thin films - An overview of fabrication techniques, properties and applications. Table of contents List of symbols and abbreviations used 1. Introduction 2. An overview of some thin insulators used in VLSI devices 2.1. Why use thin insulators? 2.2. Some basic requirements 2.2.1. Physical and chemical requirements 2.2.2. Electrical requirements 2.2.3. Application-dependent requirements 2.3. The manufacturing of thin oxide films 2.3.1. The thermal growth of thin oxides 2.3.2. Properties of thin thermal oxides 2.3.3. Limitations of traditional thermal growth for very thin films 2.3.4. Thin oxides obtained by chemical vapor deposition 2.4. The manufacturing of thin silicon nitride films 2.4.1. The advantages of silicon nitride 2.4.2. Direct nitridation 2.4.3. Deposited nitrides 2.5. The use of other dielectric materials 2.5.1. High-permittivity materials 2.5.2. Silicon oxynitrides 3. Thermally-grown silicon nitride thin films 3.1. Low-pressure (LP) thermal nitridation 3.1.1. Principle 3.1.2. Experimental evidence of nitride growth 3.1.3. Some experimental growth curves 3.1.4. Growth modeling 3.1.5. Proposed growth mechanisms 3.1.6. Film structure 3.2. High-pressure (HP) thermal nitridation 3.2.1. Principle of non-assisted thermal HP growth 3.2.2. Principle of plasma-assisted thermal HP growth 3.2.3. The kinetics of HP nitride growth 3.2.4. Growth mechanisms 4. Properties of thin thermal nitride films 4.1. Structure 4.2. Optical refractive index 4.3. Etching characteristics 4.4. Resistance to oxidation 4.4.1. Resistance to dry oxidation 4.4.2. Resistance to wet oxidation 4.4.3. The LOCOS process 4.5. Resistance to irradiation

Silica, Silicon Nitride and Oxynitride Thin Films 4.6. Resistance to impurity diffusion 4.7. The main imperfections of the sihcon nitride-siUcon system 4.7.1. Defects associated with non-stoichiometry 4.7.2. Defects associated with hydrogen 4.7.3. Defects and introduced energy levels 4.7.4. Impact on electrical properties 4.7.5. Defects induced in the silicon substrate 4.8. Electrical properties of nitride films in MNS structures 4.8.1. Dielectric constant 4.8.2. Dielectric charges 4.8.3. Breakdown voltage 4.8.4. Electrical conduction 4.8.5. Characteristics of short-channel MNSFETs 4.9. Conclusion 5. Silicon oxide films thermally nitrided in ammonia 5.1. The nitridation methods 5.2. The high-pressure (HP) nitridation process 5.2.1. A phenomenological description 5.2.2. Main features of the nitridation process 5.2.3 Proposed nitridation mechanisms 5.3. The main physical properties of HP-NO films 5.3.1. Etching characteristics 5.3.2. Resistance to oxidation 5.3.3. Resistance to irradiation 5.3.4. Resistance to impurity diffusion 5.4. The low-pressure (LP) nitridation process 5.4.1. The various LP processes 5.4.2. Composition of LP-NO films 5.4.3. Proposed nitridation mechanisms 5.5. The main physical properties of LP-NO films 5.5.1. Optical refractive index 5.5.2. Etching behavior 5.5.3. Resistance to oxidation 5.5.4. Resistance to irradiation 5.5.5. Resistance to impurity diffusion 5.6. Defects introduced by the nitridation process 5.6.1. Defects induced in the silicon substrate 5.6.2. Defects introduced in the silica film 5.7. The electrical properties of NO films 5.7.1. Dielectric constant. 5.7.2. Flat-band shift 5.7.3. Impact of nitridation on interface states 5.7.4. Impact of nitridation on conduction mechanisms 5.7.5. The trapping and detrapping properties of NO films 5.7.6. Dielectric breakdown in NO films 5.7.7. Enhanced saturation transconductance of p-channel MOSFETs 5.8. Conclusion and application to VLSI circuits

B. Balland and A, Glachant 6. Thermally reoxidized nitrided oxide films 6.1. Processes used 6.2. Film composition 6.2.1. Zones of interest 6.2.2. Nitrogen content 6.2.3. Hydrogen content 6.2.4. Boron diffusion 6.3. The electrical properties of RONO films 6.3.1. Electrical conduction 6.3.2. Interfacial charges 6.4. Instabilities in (RONO) films under stress 6.4.1. Capacitance-voltage curves after stress 6.4.2. Interface state generation under stress 6.4.3. Electron trapping 6.5. Conclusion 7. Thin dielectric films fabricated by rapid thermal processes 7.1. Principle 7.2. Apparatus 7.3. Rapid thermal cleaning 7.4. Rapid thermal oxidation of silicon 7.4.1. Basic process 7.4.2. Thickness uniformity 7.4.3. Growth kinetics 7.5. Compared electrical properties of RT and FG oxide films 7.5.1. Conduction properties 7.5.2. Interface trap density 7.5.3. Dielectric strength 7.5.4. Role of annealings 7.6. Rapid thermal nitridation of thin oxides in ammonia. 7.6.1. Basic process 7.6.2. Composition of RTNO films 7.6.3. Optical refractive index 7.7. Electrical properties of RTNO films 7.7.1. C-V characteristics 7.7.2. Dielectric constant 7.7.3. Fixed charge and interface states 7.7.4. Behavior of RTNO films under electric stress 7.8. Conclusion 8. Thin oxynitride films grown in N2O and NO ambients 8.1. The major processes 8.2. Oxynitridation in N2O 8.2.1. Growth kinetics 8.2.2. Growth mechanisms 8.2.3. Film composition

Silica, Silicon Nitride and Oxynitride Thin Films 8.2.4. Trapping properties 8.2.5. Dielectric breakdown 8.2.6. Reliability 8.3. Tliin oxynitride films grown in NO 8.3.1. Principle and growth kinetics 8.3.2. X-ray assisted growth at room temperature 8.3.3. Electron beam-assisted growth at moderate temperature 8.3.4. Film composition 8.3.5. Electrical properties 8.4. Conclusion 9. A brief review of low-temperature assisted processes 9.1. Photon-enhanced processes 9.1.1. Basic equipment 9.1.2. Photon-enhanced nitride growth 9.1.3. Photon-enhanced nitride deposition 9.1.4. Composition and properties of LT-PE nitride films 9.1.5. Photon-enhanced oxynitridation processes 9.1.6. Composition and properties of LT-PE oxynitride films 9.2. Electron-enhanced processes 9.2.1. Electron-enhanced nitride growth 9.2.2. Electron-enhanced nitridation of silica tilms 9.2.3. Composition and properties of LT-EE oxynitride films 9.3. Ion-enhanced deposition processes 9.3.1. Nitride deposition by RF-sputtering 9.3.2. Composition and properties of deposited nitride films 9.3.3. Oxynitride deposition by RF-sputtering 9.4. Plasma-Enhanced (PE) processes 9.4.1. Principle 9.4.2. Plasma-enhanced nitridation of silicon 9.4.3. Plasma-enhanced nitridation of silica 9.4.4. Plasma-enhanced nitride deposition 9.4.5. Composition and properties of PECVD nitrides 9.4.6. Plasma-enhanced oxynitride deposition 9.4.7. Applications 10. Summary and conclusion Acknowledgements List of References

10

B. Balland and A. Glachant

LIST OF SYMBOLS AND ABBREVIATIONS USED* A Cox Cn(Cp)

Dit

en(ep) E EQX

Ec Ei,bulk EG

f h k Leff NA(ND)

n q

cm2 F.cm-2 m-3.s-^ eV-t.cm-2 s-l

V.cm-i V.cm-i eV eV eV Hz J.s J.K-l cm cm-3 -

C C.cm-2 Qf C.cm-2 Qinj C.cm-2 Qit C.cm-2 Qm C.cm-2 Qot C.cm-2 Qox C.cm-2 QBD s tor s tnit s tBD nm tin, N s tstress T K VpB, A V F B V V Vth V VG V Vox V s,Vs V ^B cm2 On («5p)

Space charge layer (device) area Gate oxide capacitance, expressed per unit area Capture coefficient for electrons (for holes) Density of interface states Emission coefficient for electrons (for holes) Electric field Electric field in the oxide Lower edge of the conduction band (of Si or Si02) Intrinsic Fermi level in the semiconductor bulk Energy band gap Frequency Planck constant (h = 6.62 10-34 J.s = 4.14 10-15 eV.s) Boltzmann constant (k = 1.38 10-23 j.R-l = 8.63 10-5 eV.K-1) Effective channel length Concentration of acceptor (donor) atoms Optical refractive index Absolute value of the electronic charge (q = 1.6 10-1^ C) Density of fixed charge Density of injected charge Density of interface-trapped charge Density of mobile ions Density of oxide-trapped charge Density of oxide charge Charge-to-breakdown, expressed per unit area Time measuring resistance to oxidation Nitridation time Mean time to breakdown Insulator thickness, nitride thickness Stress time Absolute temperature Flat band voltage, flat band voltage shift Threshold voltage Applied gate voltage Voltage drop across the oxide Surface potential in the silicon substrate Barrier height Capture cross section for electrons (for holes)

* Only those symbols which appear more than once in the text have been listed.

Silica, Silicon Nitride and Oxynitride Thin Films 80 ^0X9 ^Si AES APCVD ARXPS at.% a-u CB CMOS C-V CVD DLTS DRAM EAROM EPROM EEPROM FTIR FN FG HF etching HP ... HRTEM HT... IC IR I-V LEED LOCOS LP... LPCVD LT... MIS MNS MOS MOSFET MNSFET NDB NO NO

F.cm-1 F.cm-1

Permittivity of vacuum Permittivity of silica, of silicon Auger Electron Spectroscopy Atmospheric Pressure Chemical Vapor Deposition Angle-Resolved X-Ray Photoelectron Spectroscopy Atomic concentration expressed in % Arbitrary unit Conduction band Complementary MOS device Capacitance-Voltage characteristics (of a MOS structure) Chemical Vapor Deposition Deep Level Transient Spectroscopy Dynamic Random Access Memory Electrically Alterable Read Only Memory Electrically Programmable Read Only Memory. Electrically Erasable Progranmiable Read Only Memory Fourier Transform Infra-Red Spectroscopy Fowler-Nordheim (injection or current) Forming gas (10% H2, 90% N2) Etching using hydrofluoric acid High Pressure (nitridation process) High-Resolution Transmission Electron Microscopy High Temperature (nitridation process) Integrated Circuit Infra-Red Current-Voltage characteristics (of a MOS structure) Low Energy Electron Diffraction Local Oxidation of Silicon Low Pressure (nitridation process) Chemical Vapor Deposition at Low gas Pressure Low Temperature (nitridation process) Metal-Insulator-Semiconductor (structure) Metal-Nitride-Silicon (structure) Metal-Oxide-Semiconductor (structure) MOS Field Effect Transistor MIS Field Effect Transistor using nitride as a gate insulator Nitrogen Dangling Bond (= N*) Nitrided Oxide or nitrided silicon dioxide or NitrOxide Nitric oxide gas molecule

11

12 NRA PE... PECVD PEN QSM RBS REELS RF plasma RONO RS RT... RTA RTP RTN RTO RTON RTONO SDB SHB SMS SSB TDDB IDS TED TEM TZDB UHV ULSI VB VLSI VTGI XPS [N]/([N]+[0]) [ ]

B. Balland and A. Glachant Nuclear Reaction Analysis Photon-Enhanced (process) Plasma-Enhanced Chemical Vapor Deposition Plasma-Enhanced Nitridation Quasi Static Method (or Measurements) Rutherford Backscattering Spectroscopy Reflection Electron Energy Loss Spectroscopy Radio Frequency Plasma Re-Oxidized NitrOxide (film) Raman Spectroscopy Rapid Thermal (process) Rapid Thermal Annealing Rapid Thermal Processing Rapid Thermal Nitridation (RTP of silicon or of Si02 in NH3) Rapid Thermal Oxidation (RTP of silicon in O2) Rapid Thermal OxyNiti-idation (RTP of sihcon in N2O) Rapid Thermal re-Oxidation of (NH3)-Nitrided Oxide Silicon Dangling Bond {= Si») Silicon-Hydrogen Bond (= Si-H) Secondary Ion Mass Spectroscopy Silicon-Silicon bond or group (= Si-Si =) Time-Dependent Dielectric Breakdown at constant field Thermal Desorption Spectroscopy Transmission Electron Diffraction Transmission Electron Microscopy Time-Zero Dielectric Breakdown Ultra-High-Vacuum techniques Ultra Large Scale Integration Valence Band Very Large Scale Integration Very Thin Gate Insulator X-ray Photoelectron Spectroscopy Composition parameter of an oxynitride film Concentration, usually expressed in at.%

Silica, Silicon Nitride and Oxynitride Thin Films

13

1. INTRODUCTION Thin dielectric films play vital roles in modem Integrated Circuit (IC) technologies. They are mostly used in three types of application: as gate insulators, as field insulators, and as tunnel dielectrics. Gate insulators To function properly, field-effect devices manufactured in the MOS technology, such as Field-Effect Transistors (MOSFETs) and Electrically Erasable and Programmable Read Only Memories (EEPROMs), must possess a thin dielectric layer isolating the transistor channel from the gate electrode, as illustrated in Fig. 1.01. Modem Very Large Scale Integrated (VLSI) circuits make an extensive use of short-channel transistors and electrically-erasable non-volatile memories. These two types of device require that the dimensions of the insulator layer be reduced (both vertically and horizontally). Gate insulator thicknesses of less than 15 nm (150 A) are nowadays (1996) routinely required. The defect density of such layers must be extremely small and their quality and reliability, excellent. Field insulators Dielectric layers are also used in ICs to isolate transistors from one another and to isolate connecting lines from other active parts of the circuit as illustrated in Fig. 1.01. The increasing integration of ICs requires that the thickness of these field insulators be reduced, although less so than gate insulators. Word line gate

Tunnel Oxide

Floating Gate N+ doped polyslllcon 1

\^-\^^j^—A:^EJ< Gate Oxide Select transistor

Field Oxide

Control Gate Sense transistor

Fig. 1.01 - Schematic cross section of a dynamic memory structure based on a floating gate and using a very low programming voltage. Typical oxide thicknesses are 30 nm for the regular gate oxide of the Word line transistor, 6 nmfor the tunnel oxide and ~ 400 nmfor the field oxide.

Tunnel oxides Thin tunnel oxides are used in such devices as Dynamic Random Access Memories (DRAMs). The write operation as well as the erase operation are done electrically using electron tunnel emission. A charge, representing an information, is stored on the floating gate. Electrons are injected through the tunnel oxide. Figure 1.01 is a schematic cross section of a DRAM which shows the three types of insulator used in such a device.

14

B, Balland and A, Glachant

Thermal silicon dioxide has been the first insulator used to passivate the silicon surface [1,2] and for a long time has been the only dielectric material usable both for gate and field oxides [3-9]. The physics of its thermal growth has been thoroughly described in Vol. 1 of this book series [10]. Silicon dioxide has remained the dielectric of choice because it has close to ideal properties: its dielectric strength is large and the Si02-Si interface contains very few defects. Thermal oxide does have some drawbacks, however. It is, for example, a poor barrier against atomic diffusion because of its fairly loose network. This explains why silicon nitride, which possesses a tighter network, has been proposed and used as a substitute insulator. However, both the thermal oxidation and the thermal nitridation of silicon require large "thermal budgets". Since the current trend is to reduce these budgets, especially for multi-layer structures, other dielectric materials and other ways of fabricating oxides and nitrides have been developed. This chapter reviews the many ways which now exist to fabricate Very Thin Gate Insulators (VTGI) and the properties required of these films for the current generation of VLSI devices. In Section 2, we give a first overview of the thin insulators used in microelectronics and the reasons behind their use. These films must meet many requirements, which limits the number of available candidates. We recall that thermal oxide remains, in many aspects, the best possible material for thin films but that silicon nitride is preferred in some specific applications. Both silicon oxide and silicon nitride can be either thermally grown or deposited and we quickly review the main features of these fabrication techniques. Oxynitride films combine some advantages of the oxide and nitride films, which explains why they are increasingly used. Both their properties and their fabrication techniques are extensively described in further sections. In Section 3, we review the basic aspects of thermal nitride growth. We show that the growth of a thin thermal nitride layer on top of a silicon surface is only possible at high temperature (T > 950''C) in a pure nitriding gas (N2 or NH3), either at "high" (atmospheric) pressure or at "low" pressure (in an ultra-high-vacuum chamber). Because of the compactness of the nitride network thus formed, the growth process is self-limiting, and the maximum thickness reached never exceeds 10 nm. To grow thicker films, the nitridation gas must be somehow activated (using e.g. a plasma). We indicate some experimentally-found growth laws and we propose a growth model. Some of the chemical reactions and mechanisms thought to be responsible for the nitride formation are also given. The basic physical, chemical and electrical properties of thin thermal silicon nitride films are reviewed in Section 4. We see that the structure (amorphous or polycrystalline) of these films, as well as the optical refractive index, are highly dependent on the fabrication conditions and on the degree of cleanliness (i.e. on the purity of the nitriding gas ambient, and cleanliness of the silicon surface prior to nitridation). We show that thermal nitrides resist chemical etching better than thermal oxides do and also resist dry oxidation well. The latter resistance depends on the fabrication conditions of the nitride film and on its residual nitrogen content once oxidation has started.

Silica, Silicon Nitride and Oxynitride Thin Films

15

The fact that thin nitride films resist oxidation is the basis of the LOCOS process. We also examine the resistance to irradiation and to impurity diffusion of such films. We next review the major electrically active defects encountered in thermal nitrides and the role they play in conduction and trapping mechanisms. We end this section by taking a look at the electrical properties of nitrides, measured by means of MIS structures, namely: dielectric constant, dielectric "charges", dielectric strength and leakage current. Oxynitride films are also widely used in microelectronics. We describe in Section 5 one of the techniques used to produce such films, namely the nitridation of silica in gaseous ammonia (NH3), and we examine the properties of the obtained Nitrided Oxide (NO) films. The basic mechanism behind the nitridation of silica is the substitution of O atoms by N atoms. This exchange is fueled by the diffusion of NHx species ( 0 < x < 3 ) coming from the gaseous ambient through the silica film. The top silica layer gets thoroughly nitrided (even more so using the low-pressure process) but nitrogen piles up also at the Si02-Si interface. Nitrided oxide films possess properties similar to those of nitride films regarding resistance to: dry oxidation, irradiation, and impurity diffusion. They can thus be used to fabricate very stable gate insulators for field-effect transistors. Due to the presence of nitrogen, the electrical properties of NO films differ from those of silica films. Nitridation modifies the flat-band voltage, the fixed oxide charge and the density of interface states in a complex manner which depends on the nitrogen concentration at the Si02-Si interface. Conduction properties are also modified. Nitridation increases the possibilities of electron trapping and can give rise to hole conduction (of the Poole Frenkel type). It also improves the dielectric strength of the film. Oxide films nitrided in NH3 are often reoxidized. We show in Section 6 that this reoxidation yields insulating films whose properties are half-way between those of silica and those of NO films. During reoxidation, the top nitrided layer is quickly reoxidized while a thin oxide layer grows undemeath the interfacial oxynitride layer, and the hydrogen content in the film is much reduced. ReOxidized Nitrided Oxide (RONO) films display less electron trapping than NO films and their main conduction mechanism involves electrons (and not holes). Rapid Thermal Processes (RTP) are promising altematives to furnace processes. They combine lamp heating and reactive processing in a chamber where temperature and gas ambient can be rapidly changed. In Section 7 we examine two particular RT processes, namely: RT Oxidation (RTO) and RT Nitridation (RTN) and we describe some of the properties of the films thus obtained. As measured through I-V and C-V curves, RTO films display electrical characteristics which are better than those of fumace-grown oxide films: higher dielectric strength, lower defect density and lower density of interface states. Oxides nitrided through an RT process possess properties which are similar to those of oxides nitrided in a furnace. However, RT nitridation makes it possible to minimize the duration of the nitridation step and thus permits one to reduce both strain and impurity redistribution at the Si02-Si interface.

16

B, Balland and A. Glachant

One of the drawbacks of nitridation in NH3 is the inevitable formation of hydrogenated species in the film, which leads to high densities of electron traps. We show in Section 8 that oxynitride films can be grown directly by submitting a Si substrate, or a Si02 film, to a gaseous N2O or NO ambient. This process permits a better control of the nitridation step and minimizes the amount of incorporated hydrogenated species. The obtained films display a greater resistance to high-field stresses (especially to carrier injection) and possess a greater resistance to dielectric breakdown. Although data about oxynitrides grown in NO is still scarce, the electrical properties of such films appear to be even better than those of N20-grown films. Moreover, the "thermal budget" required to incorporate the same amount of nitrogen in the film is much lower. Because of their reduced dimensions, current Ultra Large Scale Integration (ULSI) devices require ever-lower process temperatures to minimize parasitic diffusions and the growth of stacking faults. The fabrication of high-quality VTGIs at low temperature will be required to produce the highly integrated devices of the future. In Section 9 we describe this new interest for non-thermal ways of growing thin insulating films (including silicon oxide, nitride, nitroxide and oxynitride) at "low" temperature, i.e. near room temperature. We describe the principle of each method, discuss the growth process and mechanisms, and sununarize the main physical, chemical and electrical properties of the resulting VTGIs. Thin nitride and oxynitride films have found already numerous applications in microelectronic devices and will be increasingly used. 2. AN OVERVIEW OF SOME THIN INSULATORS USED IN VLSI DEVICES Before we describe in detail the processes used to fabricate thin insulator films for VLSI devices, let us first review the general features of these films and the reasons behind their use. 2.1. W H Y USE THIN INSULATORS?

In active NMOS or CMOS devices, the thickness of the gate insulator (tox) has been scaled down from 100 nm (in the early 70's) to less than 10 nm for current (1996) submicrometer devices [11-14]. This thickness will, however, be further reduced. Transistors with an effective channel length (Leff) of 0.25 |im require gate oxide thicknesses ranging from 6 nm to 10 nm while when Leff is reduced to 0.1 |Lim, tox will have to be brought down to 3.5 nm [15-17]. Likewise, in EEPROMs, the reduction in programming voltage requires that thin tunneling insulating (dielectric) films be used and thicknesses as low as 10 nm have become common [12a]. These very thin insulators are either thin thermal oxides or dual structures made up of thermal oxide + silicon nitride [18-21]. The quality and the reliability of these films condition the performances of the ICs which use them [20 b-c, 22-23]. Basically, thin dielectrics can be divided into two groups: "native" dielectrics and "deposited" dielectrics. The term "native" designates films which are formed by means of a chemical reaction (e.g. oxidation, nitridation, etc.) of the semiconductor substrate while "deposited" means that the dielectric has been formed without any chemical reaction with the semiconductor.

Silica, Silicon Nitride and Oxynitride Thin Films

17

2.2. SOME BASIC REQUIREMENTS

To be used effectively as a VTGI, a dielectric material must meet some basic physical, chemical and electrical requirements which we review next. 2.2.1. Physical and chemical requirements • An homogeneous structure To make sure that the fabrication yield of integrated circuits remains high in spite of the ever-increasing chip size, the dielectric films must be homogeneous and uniform and must retain a low defect density throughout the entire fabrication sequence. The as-grown films must be free of localized defects, pin-holes and microcracks and these defects should neither appear during the subsequent manufacturing steps nor appear while the complete device is operating. • An efficient barrier against diffusion and parasitic effects The dielectric films should, ideally, prevent all foreign species from diffusing into active parts of the device since this diffusion can greatly alter the threshold voltage. These foreign species can be: doping atoms (e.g. boron atoms coming from the polysilicon gate electrode), ions introduced during plasma etching or diffusing from a metal gate electrode, or any type of contaminant introduced during the fabrication process. Moreover the films should also minimize other parasitic effects taking place in the substrate such as: - growth-induced crystal defects, due to thermal stresses generated in the semiconductor when the dielectric is fabricated (see e.g. Chap. 3 of Vol. 1, [10 c]). - impurity segregation, - dopant redistribution at the substrate-insulator interface. For the thin films to be homogeneous and constitute an efficient barrier, two more requirements related to the fabrication process must be met. • A well-controlled growth rate The growth rate should be well controlled to minimize interfacial defects and to ensure the desired composition, both of the bulk dielectric and of the transition layer (when such a layer exists). Let us note, however, that after more than 20 years of research, the first stages (< 5 nm) of the thermal growth of silica on silicon are not yet fully understood and the Deal & Grove model is still opposed to the viscous flow model (see e.g. Chap. 1 of Vol. 1, [10 a] and [25]). • A well-controlled surface quality Cleanliness is essential to obtain a well-controlled growth or deposition and to obtain a good step coverage (for deposited layers). For instance, the thermal oxidation of silicon induces the formation of Si+, Si2+ and Si3+ intermediate oxidation states, which extend « 4 nm from the silica film into the underlying silicon substrate and the width of this interfacial layer depends on the oxidation conditions and on the initial quality of the Si surface. The existence of such a transition region can, of course, be critical for ULSI products.

B. Balland and A, Glachant

18

2.2.2. Electrical requirements To produce high-quality and reliable submicrometer VLSI devices, thin dielectrics should have near-ideal electronic properties. • A large band gap A large band gap is desirable since it provides a large energy barrier at the interfaces, which minimizes hot carrier injection (see e.g. Chap. 9 of Vol. 1 of this book series [10 e]). It also ensures a lower sensitivity to radiation (as explained in Part 2 of this volume). The band diagrams of three typical Metal-Insulator-Silicon (MIS) structures are given in Fig. 1.02. Let us note that it is not appropriate to use the values indicated in Fig. 1.02 for very thin films due to the presence of a proportionally larger transition region whose composition and properties differ from those of the bulk. For example, for thin SiOx oxides, the value of x may decrease from 2 to 1 and the band gap decreases accordingly.

r^

k T2.2

i

2.0 1.1

51

L [[2.0

Al

SiOg

Si

Al

AI2O3

Si

Al

Si^N^

Si

Fig. 1.02 - Energy-band diagrams of ideal unbiased MIS structures (energies are expressed in eV). (After [26] slightly modified)

• A suitable dielectric constant A high dielectric constant (or permittivity) is important when a good capacitive coupling is required (which is the case for the gate of MOS devices). On the other hand, the field insulator deposited between the interconnecting layers of an IC must possess a low permittivity to minimize the values of the parasitic capacitor coupling the active zones of the device with these interconnecting lines. • A large breakdown voltage Dielectric layers in modem ICs must sustain large electric fields without displaying sizeable leakage currents. They thus must exhibit a uniform and high dielectric strength (a high breakdown voltage) as well as an extended wear-out time (these concepts have been defined in Chap. 6 of Vol. 1 [10 d] and are again reviewed in Chap. 3 of this volume). The films must also be able to sustain an injection of hot carriers triggered by high fields (which is the case of EEPROMs and short-channel MOSFETs).

Silica, Silicon Nitride and Oxynitride Thin Films

19

• A low dielectric charge To obtain high-performance MOSFETs with fast turn-on characteristics and high carrier mobility, the electrically active defects encountered in the gate insulator and at its interfaces, and the associated charge, must be minimized. Traditionally four basic types of charge are distinguished in dielectrics: • The mobile ionic charge, mostly made up of sodium ions mobile at room temperature or slightly above it (charge Qm, density Nm). • The trapped charge, whose sign depends on the nature of the trapped carriers (mostly holes in the case of silica and mostly electrons in the case of silicon nitride) distributed in the bulk of the insulator (charge Qot, density Not). • The interface-trapped charge, which is made up of carriers trapped on those interface defects which, depending on bias, can exchange carriers with the semiconductor (charge Qjt, density Nit). • The fixed insulator charge which is the sum of all the other charges which are impervious to changes in bias conditions (charge Qf, density Nf). All the electrically active defects which have a significant impact on device performances (i.e. on MOS threshold voltage, carrier mobility, surface leakage, etc.) have been described at length in the previous two volumes of this series. Since the thickness of the gate insulator is much reduced in modem submicrometer devices, the effects of Qm and Qot are also reduced but Qf and Qit still play a major role. 2.2.3. Application-dependent requirements Depending on how the thin dielectric layer will be used and in which type of device, some of the above-mentioned requirements are more important than others. We have listed in Table 1.01 the qualities required from thin dielectric films in four types of application. • For traditional MOSFETs with n-type polysilicon gate electrodes and without buried contacts, silicon dioxide is still an appropriate gate dielectric because of its superior electrical properties [27-28]. • If buried contacts are required or if p-type polysilicon is used as a gate electrode material, nitrided silica is more suitable as a gate dielectric because of its enhanced resistance: to etching and to the diffusion of doping (boron) atoms [28-29]. • If the dielectric film is used to manufacture the storage capacitors of DRAMs, some of its electrical characteristics are not too critical but the films must have a high dielectric constant and a very low leakage current [30-32]. • Finally, in the case of EEPROMs, the most important feature of the thin dielectric is that its trapping properties be low and its resistance to wear-out be high [33-35].

20

B. Balland and A. Glachant

DEVICES

-^

MOSFETwith n+poly and no buried contact

MOSFET with p+poly or with buried contact

DRAM

EEPROM

TYPE OF INSULATOR

~>

Gate insulator

Gate insulator

Storage capacitor

Tunneling dielectric

He He

•p *l* 'P *r

He He He

****

•p n^ 'F •p

He He He He

High sensitivity to HF etching

• «

He He He He

He He

H: He

Good diffusion barrier

• *

^^ ^ ^

He He

He He

1 REQUIRED PROPERTIES ^

High dielectric constant Low defect density

Low leakage current

He

*

^^ ^ ^

He :(c 4 : si:

He He He He

He He He He

He He He He

** *

He He He

He He He He

He He He He

Good resistance to wear-out

He He •

^^ ^

He He He He

****

Very low density of bulk traps

He He He

He He He

He

****

****

He

He He He

****

He

He He He

He He He He

He

He He

High breakdown field

Very low interface charge

^

Very low density of interface traps

m Hn iti

High carrier mobility

He He He He

^ ili ^

j

*

Table 1.01 - Properties required from the dielectric films for various applications: (* (***) very critical (* *) fairly critical f*; not critical (After [18] slightly modified).

•; most important factor,

2.3. THE MANUFACTURING OF THIN OXIDE FILMS

For VLSI devices, silica films with a thickness ranging from 5 to 20 nm must be fabricated in a repeatable manner [36-39]. There basically exist two methods to grow such thin films: - Thermal growth, - Chemical Vapor Deposition (CVD). Let us review in some detail the most important features of these two methods and those of the produced films. 2.3.1. The thermal growth of thin oxides Thermal growth is by far the method most widely used to prepare thin (gate) oxides because the electrical properties of the films thus produced are vastly superior to those of CVD silica films. (The thermal growth of thick oxides has been extensively described in Chap. 1 of Vol. 1 of this series [10 a] and will not be described here). From a practical point of view, the growth rate of thin oxides must be slow enough to obtain a uniform and reproducible thickness [41]. It should not exceed 1 nm/min in the linear region and about 5 nm/min in the parabolic region.

Silica, Silicon Nitride and Oxynitride Thin Films

21

• Dry oxidation versus wet oxidation Dry oxidation is performed in pure O2 with P(02) - 1 bar and 900°C < T < 1150°C. It yields good quality oxides. The experimental data of Fig. 1.03 demonstrate that a set of time and temperature parameters can be chosen to grow thin oxides with a reasonable control of the thickness. In the wet oxidation process, water vapor is introduced in the oxidizing ambient. "Wet" films grow faster than "dry" films and at somewhat lower temperatures (900°C < T< 1000°C) [42-46]. • High-pressure oxidation In the high-pressure (HP) oxidation process, P(02) may vary from 5 to 20 bar with 800 < T < 1000°C. This method can be used to increase the growth rate while using a lower processing temperature to reduce impurity diffusion and to decrease the quantity of oxidation-induced stacking faults. However, due to the faster growth rate, the suitability of this technique to fabricate thin gate dielectrics is questionable [47-50]. 10

1

1

U I

E c <0 (0

1 1 11

1

« '

r

[

fi

u

^

.^

M ^'

1

1 1 11

1 1 11

10°

f""^nr|

\

^ ^ 2 ^'m.''AT'

*

*

*

*

r-n

1

?^

1

*

1

*

*

1 SOCC 2 850°C

0' r ML-' .a » * » ^ ^ / y ' • -' ^ c< ^ ' * '

r

10

'

/' —^' ^'' * '' *^

s

r L \L

' ' 1

.-

M

1

o

'

^'

r\

h —

2 o

i

<100> Silicon Dry Oxygen

1

c o

'1

10^

1

1

L.xJI

J

j 1 \

SOCC 950°C 1000°C •]

3

XI

—4

iJ

1 L.

1

10^ 10^ Oxidation time (min)

Fig. 1.03 - Oxidation rate of a lightly doped <100> silicon substrate in dry oxygen in the 800-1000°C range. (After [44 a] modified).

i_J

10'

• Low-pressure oxidation Low-pressure (LP) oxidation offers an attractive way of growing thin oxides in a controllable manner [25 a]. Oxide thicknesses between 3 nm and 14 nm have been grown this way at temperatures ranging from 900 to 1000°C using an oxygen pressure of 0.2 to 2.0 mbar. With this method, the growdi rate is slower, which makes the method attractive if controlling the oxide thickness is very critical. The observed growth rate is parabolic, and the growth rate constants agree with the values extrapolated from those of atmospheric pressure growth. The LP oxides are very uniform, homogeneous, and similar to thicker oxides prepared at atmospheric pressure [56]. • Two-step process A two-step oxidation process has also been proposed to obtain thin oxides [57-58]: 1/ The first step is carried out at a moderate temperature (T < 1000°C) in a dry 02-HC^ ambient and leads to the formation of a uniform oxide with a small defect density. 2/ The second step consists in a heat treatment in N2, O2 and HC£ at 1150°C to bring the oxide to the desired thickness. ECi (or HF) ambients are typically used to passivate ionic sodium, to improve the breakdown voltage, and to reduce the amount of impurities and defects in silica.

22

B. Balland and A. Glachant

Such a sequence takes advantage of the beneficial effects brought both by the lower and the higher temperatures. • High'pressure and low-temperature steam oxidation A 30-nm-thick oxide can be grown in 30 min using an oxidizing pressure of 5 bar < P < 10 bar and a temperature of TOO^'C < T < lOOO^'C. Pressure, temperature and time can be changed to obtain the desired thickness. Such a technique has been successfully applied to the growth of thin gate oxides for MOS dynamic RAMs. The properties of the obtained thin films depend more on the oxidation temperature than on the oxidation pressure. To reduce the density of electrically active defects in the oxide film, oxidation is often followed by an anneal at oxidation temperature in an inert ambient followed by an anneal in forming gas (FG: 10% H2 and 90% N2 or Ar), at 450°C, once the device has been fabricated. • Others To reduce the oxidation temperature, several beam technologies are also being investigated. For example a scanning CW argon laser beam (488-514 nm) with an incident power of 2.5 W has been used to grow a 5-nm-thick siUca film [20]. 2.3.2. Properties of thin thermal oxides The duration, the temperature and the conditions of oxidation, all influence the structure and the properties of the resulting oxide film. It is therefore important to gain a good insight into this relationship to obtain thin oxides with reproducible parameters [56-60]. • Transition region It has been experimentally shown that thin thermal oxides are strained in a zone which extends 1.5 to 3 nm away from the silicon/oxide interface and which differs from bulk Si02 [58]. It appears also that oxidation processes carried out at high-temperature lead to an increase in thermal stresses in the underlying semiconductor and to a degradation of its properties. • Excellent interface Thermal oxide films exhibit an excellent interface with the Si substrate and a low trap density. The trap density is further reduced by annealing in hydrogenated ambients at low temperature, i.e. in FG at 450°C (hydrogen passivates the traps). At higher temperatures, hydrogen can desorb, which increases the trap density. For this reason, the annealing is performed after all other high-temperature process steps, and is usually the last fabrication step. In spite of this excellent interface, the leakage current in thin oxides increases when the thickness decreases, because of tunneling effects. For a 10-nm-thick oxide, the leakage current is sizeable above five volts due to Fowler-Nordheim tunneling. • Dielectric strength The amount of micro-defects propagating from the Si substrate into silicon dioxide during oxidation decreases for thin oxides. Thus, contrary to earlier predictions, thin oxides display in fact a better reliability than thick oxides and their breakdown field is higher. • Mask against diffusion A thermal oxide can also act as a (more or less efficient) diffusion barrier. The values of the diffusion constants for various dopants in Si02 depend on the density and the structure of Si02. Table 1.02 lists diffusion constants for several common dopants. Not surprisingly, quoted values may vary significantly [23, 59].

Silica, Silicon Nitride and Oxynitride Thin Films

Dopants B Ga P As Sb

Diffusion constants at 1100°C (cmVs) from 3.4x10-17 to 2.0x10-14 5.3x10-11 from 2.9 x 10-16 to 2.0 x 10-13 from 1.2x10-16 to 3.5x10-15 9.9x10-17

23

Table 1.02 - Diffusion constants of various dopants in SiO . (After [60])

• Impurity segregation As thermal oxidation proceeds, the Si02-Si interface moves into the siUcon substrate. A doping atom initially present in silicon will redistribute at the interface until its chemical potential is the same on each side of the interface. This redistribution may result in an abrupt change in doping concentration across the interface. 2.3.3. Limitations of traditional thermal growth for very thin films Very thin thermal oxides can presently be fabricated using a low oxidation temperature, a diluted O2 gas (e.g. diluted in N2) and a reduced gas pressure in the fumace. However, the dielectric properties of the thin films thus prepared often suffer from these oxidation conditions. Moreover, the early stages of oxide growth should not be perturbed if one wants to obtain the desired oxide thickness. Finally, a considerable amount of water vapor is incorporated into the film during the loading and unloading steps. Unless water is fully removed from the silica film, the residual hydrogen atoms form electron trapping centers which degrade the oxide quality. For all these reasons, traditional thermal growth will be increasingly difficult to rely upon, to manufacture very thin oxide films. The important features of thermal oxidation as well as the characteristics of thermal oxides are summarized in Table 1.03 [25]. 2.3.4. Thin oxides obtained by chemical vapor deposition Deposited oxides are also widely used in the IC industry as field oxides [23]. The methods used for their fabrication and the main properties of CVD-oxides are listed in Table 1.03. The most commonly used deposition techniques are based on: - the reaction of silane (SiH4) and oxygen; - the thermal decomposition of tetra-ortho-silicate (TEOS = (C2H20)4 Si); - the reaction of SiCl2H4 and oxygen. Unfortunately not much is known about the reliability of thin silica films grown by techniques other than thermal oxidation. Silica layers enriched in silicon (with 13% excess Si) can be produced by depositing a 10 to 20-nm-thick Si-rich Si02 layer by CVD on top of a 10-nm-thick thermal oxide. Such dual dielectrics have found applications in memory and logic circuits [66].

24

B. Balland and A. Glachant

Fabrication mode

Growth

Deposition

Reacting species

Si + 02

SiH4 + 02

Deposition TEOS*

Pressure Temperature (°C) Deposition rate (nm/min) Composition

Ibar 900-1000 -

Ibar 300-450 43-52

Ibar 500-800 12

Si02

Si02(H)

Si02

Si02(C^)

Thermal stability

very stable

densifies

stable

looses a

Density (g/cm^)

2.2

2.1

2.2

2.2

Refractive index (for X = 546.1 nm) Dielectric constant Residual film stress (109dyne/cm2)

1.46

1.44

1.46

1.46

3.9

3.6 3 (tensile)

3.7 1 (compressive)

3.6 3 (compressive)

Dielectric strength

8-10

8-10

10

10

60

highly process1 dependent

highly processdependent

highly processdependent

Deposition

|

SiC€2H4 + 02** 1 15-60 mbar

850-1000

1

low

1 1

1 (MV/cm) lEtch rate in buffered* 1 HF (10-1 nm/min)

Table 1.03 - Characteristics of the major oxide fabrication techniques and properties of the produced films f* thermal decomposition of tetraethylorthosilicate (C2H20)4Si - ** low partial pressure of reactants • 100:1 = NH4:HF). (After [25] modified). 2.4. THE MANUFACTURING OF THIN SILICON NITRIDE FILMS

Silicon nitride is the second most widely used insulator. 2.4.I. The advantages of silicon nitride Silicon nitride (Si3N4) has distinct advantages over silicon oxide [61-62]. It has a higher dielectric constant (ei. = 7.5) than silica (ei. = 3.9) and has a denser structure. This denser structure makes it a better barrier against the diffusion of various species [63-67]. • Barrier against oxygen The fact that silicon nitride is a good barrier against the diffusion of oxygen has given birth to the LOCOS technique (LOcal Oxidation of Silicon) described in § 4.4.3 [68-70] and to self-aligned processes [70-72]. • Barrier against doping atoms This property is particularly important when boron-doped polysilicon gate electrodes are used, boron having a tendency to migrate through the oxide and contaminate the underlying silicon substrate. • Barrier against mobile ions, moisture and other impurities This property has led to use silicon nitride as a passivation and protection layer [64-65].

Silica, Silicon Nitride and Oxynitride Thin Films

25

• Resistance to etching Silicon nitride resists etching in hydrofluoric acid (HF) better than silicon oxide. A variety of methods may be used to fabricate silicon nitride films either through growth or through deposition [73-78]. These methods can be classified according to the temperature used (i.e. high temperature (HT) versus low temperature (LT)) or depending on whether nitridation takes place directly or is somehow "assisted" or "enhanced". These methods are briefly described next, and will be described in detail in further sections. 2A.2. Direct nitridation • Thermal nitridation Thin silicon nitride films can be grown by exposing a silicon surface to N2 or NH3 at high temperature (950°-1300''C). This method gives a film which is less than 10 nm thick because growth is quickly limited by the difficult diffusion of the reacting species through the formed film. The process will be fully described in Section 3. • Enhanced nitridation Silicon nitride films thicker than 10 nm can be grown at a lower temperature if the nitridation process is "enhanced". The enhancement techniques can rely on plasma or RF glow discharge [79-85], photons [78, 86-87], electrons [88-89] and ions [90-91]. Another enhancement technique is based on the introduction of a variety of components in the nitriding ambient to act as catalysts. This includes fluorinated compounds such as SFg, NF3, CF4, [92-95] or alkali metals [96-97]. • Ion implantation The low-energy implantation of nitrogen ions (N+ or N2'^) has also been investigated [98-101] to produce nitride films on silicon. Nitrogen ions are implanted beneath the surface of the silicon wafer and Si3N4 forms [102-104]. The implantation can be followed by an HT anneal. The thickness of the nitride film is controlled by the implantation voltage, the ion mass, and the ion dose. Since the implantation profile is of the Gaussian type, an abrupt interface with the Si substrate cannot be achieved, which results in poor interfacial properties. 2.4.3. Deposited nitrides In the IC industry, most nitrides are deposited using Chemical Vapor Deposition (CVD) processes [74-77, 105-124]. There exist basically two processes to accomplish deposition: - by letting silane (SiH4) react with anmionia (NH3) at high temperature (700-900°C) and high pressure (P(NH3) > 1 bar), - by letting dichlorosilane (SiCl2H2) react with NH3 at low pressures (P(NH3): 15-60 mbar) and high temperature (700-900''C) and at high pressure (P(NH3) > 1 bar). Chemical vapor deposition may be performed either at Atmospheric Pressure (APCVD), at Low Pressure (LPCVD) or may be Plasma-Enhanced (PECVD). The composition of the deposited films depends to a large extent on the deposition conditions and their electrical behavior can vary from conducting to insulating, depending on the silane-to-ammonia ratio. Let us note that deposited films usually contain a high density of bulk traps, interface states and hydrogen. Silicon nitride films may also be obtained by high-rate reactive sputtering, performed at low temperatures [125-126].

26

5 . Balland and A.

Glachant

2.5. THE USE OF OTHER DIELECTRIC MATERIALS

To substitute for pure silica or pure nitride, other insulating materials have been tried. 2.5.1. High-permittivity materials Several insulator materials with high-permittivity (high dielectric constant) have been envisaged to substitute for thermal oxides. They are listed in Table 1.04. Thermal silica films have a dielectric constant of 3.9. Dielectric constants between 4.5 and 5.5 have been reported for silicon oxynitrides [18, 20, 21, 74], the dielectric constant increasing with the nitrogen content. Silicon nitride has a dielectric constant ranging from 6.0 to 7.5.* Deposited dielectrics possessing a high dielectric constant are interesting to manufacture the storage capacitors of DRAMs. Deposited dielectrics like Ta205, Nb205, Ti02, Zr02, etc. have a high dielectric constant in the 11-100 range. Among the insulators listed in Table 1.04, titanium oxide has the highest dielectric constant, but because of a strong dispersion in the MHz frequency range, it is ruled out for high-speed write-erase devices. Tantalum oxide seems attractive because of its high dielectric constant (22, i.e. 5.6 times larger than £ox) which varies little with frequency. However, the structure of the film deposited by the chemical reaction of tantalum chloride and oxygen does not stay amorphous during subsequent heat treatments and easily changes to polycrystalline. The polycrystalline structure sometimes leads to a non-uniform trap distribution within a film plane, which has a negative effect on the memory performance. A mixture of tantalum oxide and aluminium oxide has been proposed as an insulator for MIOS memory [128]. In a certain range of concentration ratio, the film remains amorphous. A one-transistor one-capacitor DRAM cell structure consisting of a MOSFET with a Ta205 storage capacitor stacked on it has also been described [129-130]. Ta205 is a material of choice for future generations of DRAMs [131]. Si02

Si3N4

M2O3

Ti02

Ta205

Nb205

8.9

5.1

8-9.5

3.0

4.2

3.5

Refractive index (for X = 546.1 nm)

1.5

2.0

1.7

2.0

2-2.3

2.2

Dielectric constant

3.9

6-7.5

8

20-50

19-22

11

3

2

10

100

100

100

8-10

5-10

7-8

0.5

5

5

Insulating material 1 Energy gap (eV)

Loss tangent (at 100 kHz) (lO'"*) Dielectric strength (MV/cm)

Table 1.04 - Properties of some thin dielectric materials. * The 7.5 value corresponds to a silicon-rich CVD nitride film deposited on a 10-nm-thick thermal oxide and is due to the 13% excess Si (8Si« 11.8) existing in that nitride film.

Silica, Silicon Nitride and Oxynitride Thin Films

27

2.S.2. Silicon oxynitrides Because they retain favourable features of both silica and silicon nitride while minimizing their drawbacks, oxynitride films are of great interest. For example, silica deposited on silicon is under compressive stress, while nitride is under (an even greater) tensile stress. It is thus possible to tailor a SiOxNy (x = 1.75, y = 0.25) film, which will leave film and substrate stress free [132]. Likewise, the band gap energy of SiOxNy can be adjusted between 5 eV and 9 eV depending on the [0]/[N] ratio, which gives rise to potential applications for heterostructures. The methods most conmionly used to fabricate oxynitrides are the LPCVD and the PECVD processes. • The LPCVD process is generally performed at 800 < T < 850°C using various gas mixtures (NO-NH3-SiH4, SiH2Cl2-N20-NH3 or ND3, SiH4-C02-NH3-H2) and very low pressures (P = 0. 2 to 0.3 X 10-3 mbar). The composition of the nitride films thus obtained is uniform across their thickness. N-H bonds have been observed with a total concentration of hydrogen atoms of about 5 x 10^^ cm-^. Excellent dielectric breakdown distributions have been found for layer thicknesses as low as 7.5 nm and midgap interface state densities of about 5 x lO^O cm'^ eV-l have been found. For non-volatile memories, most of the experiments performed in the past used an LPCVD nitride. • The PECVD process is generally performed at 300 < T < 430°C using various gas mixtures (SiH4-NH3, SiH4-N20, SiF4-SiH4-N20-NH3-Ar, SiH4-N20-NH3-H2, etc.) and low pressures (P = 2.0-2.6 mbar). The resulting films contain generally up to 10^^ hydrogen atoms per cm^ and have an excellent uniformity. In addition to the homogeneous silicon oxynitride films mentioned above, there exist other nitrogen-rich oxide films which can be produced but whose nitrogen concentration is not homogeneous. The most commonly encountered ones are: - the nitrided silicon dioxide (NO) film, obtained by nitriding a thin silica film in gaseous N2 or NH3 (as explained in Sect. 5), - the re-oxidized nitroxide film (RONO), obtained by oxidizing an NO film (as explained in Sect. 6), - the ultra-thin oxynitride film produced by rapid thermal oxynitridation (RTON) technologies, (as explained in Sect. 8). Compared to oxides, oxynitrides have advantages which are reviewed in the relevant sections. 3. THERMALLY-GROWN SILICON NITRIDE THIN FILMS Since they provide a promising solution to obtain thin gate insulators for VLSIs, silicon nitride films grown directly on silicon substrates have been extensively studied [133-135]. Thermal growth is possible by exposing a silicon surface to a nitriding ambient (i.e. containing highly purified nitrogen (N2) [133] or ammonia (NH3) gases [134]) at high temperature.

28

B. Balland and A. Glachant

Thermal growth can be carried out at High Pressure (typical parameters P > 1 bar, 900 < T < 1300°C) or at Low Pressure (with 10-7 < P < 10-5 mbar and 800 < T < 1050°C) depending on the desired result. We describe these two types of process in the present section. Thermal growth is unfortunately a naturally self-limiting process and the thickness of the obtained films does not exceed 10 nm. Thermal growth is also possible in a highly purified anmionia plasma (plasma generated by RF power) in a lower temperature range (250°C < T < 1200'^C). Films thicker than 10 nm can be produced within a reasonable reaction time only by using plasma-assisted processes. This altemative technique is also briefly described in this section. 3.1. LOW-PRESSURE (LP) THERMAL NITRIDATION

Low-pressure thermal nitridation is not an industrial process but it is a useful tool to study the nitridation process itself. 3.1.1. Principle Nitride films can be grown at high temperature and low pressure. This Low-Pressure (LP) process must be carried out in an Ultra High Vacuum (UHV) chamber where residual pressures as low as 10-^^ mbar can routinely be obtained. Only a UHV apparatus permits excellent control: - of the purity of the reacting gases, - of the cleanliness of the silicon surface. The nitriding species can be atomic nitrogen [136-141], or NH3 [140-141]. The pressure of the reacting gas usually never exceeds lO""^ mbar while the temperature remains below llOOX. The thickness of the nitride film can be monitored in-situ by using Auger Electron Spectroscopy (AES) [136-141], X-ray Photoelectron Spectroscopy (XPS) [132, 140] and Thermal Desorption Spectroscopy (TDS) [141]. It can also be measured ex-situ by means of Nuclear Reaction Analysis techniques (using for instance the I'^N (d, a) ^^C nuclear reaction to measure the amount of ^^N in the film) [141] as explained in Chap. 7 of this volume. The structure of the film can be monitored by means of Low Energy Electron Diffraction (LEED) [136-141]. Compared to the HP process described in § 3.2, the LP process allows a much better control of the growth rate. 3.1.2. Experimental evidence of nitride growth How thermal nitride layers grow is not fully understood yet, especially for the first stages, i.e. for a film thickness tN < 5 nm (see Chap. 7 for more detail). The early stages can however be followed by means of AES. Since the Si(lOO) substrate orientation is the most widely used in microelectronics, we shall next limit our discussion to this case. Figure 1.04 shows the evolution of the Si(L23VV) and N(KLL) Auger transitions of silicon and nitrogen respectively, when a clean Si(lOO) surface is exposed to an anmionia ambient (P(NH3) = 3x10-7 mbar) at T = 950°C.

Silica, Silicon Nitride and Oxynitride Thin Films

Si(L23VV)

29

N(KLL)

x50 42.5

^\.^\

x20 x20 x20 x20 71 I 90 61

82,7

1 . I . I . t • I . I . t • r

40

60

360

80

t J

3 8

100350

Energy

2 J

Fig. 1,04 - Evolution of the Si(L23W) and N(KLL) Auger transitions upon nitridation of a silicon substrate (T = 950°C - P(NH3) = 3x 10'^ mbar): (a) clean Si(100)-2 x 1 substrate (b) t = 0.5 h (one nitride monolayer) (c) t = 2 h (two nitride monolayers) (d) t = 3 h (three nitride monolayers) (e) t = 16 h (five nitride monolayers) (monolayer thickness = 0.35 nm). (After [88] modified).

L_

450

(eV)

The AES spectram (recorded in the derivative mode) of the clean Si(lOO) surface is visible in Fig. L04, curve a, while its LEED pattern, characteristic of a 2 x 1 superstructure, is shown in Fig. 1.08 a. When the nitridation time increases, a new AES peak develops at 82.7 eV. This peak is due to the presence of Si-N bonds. It develops at a much lower kinetic energy than the main Auger transition located at 91.5 eV. The latter is characteristic of Si-Si bonds while the former indicates the presence of Si-N bonds in a Si3N4 matrix. The presence of three peaks (at 61, 71 and 82.7 eV) constitutes the "signature" of Si3N4. Since these transitions are observed only after the first full monolayer has completely grown on the substrate, it has been concluded that the silicon/silicon nitride interface is abrupt [141]. This contradicts, however, previous results indicating the presence of at least two nitride compounds in the layer [140]. By "flashing" (i.e. by quickly heating) the nitride monolayer in vacuum at T = 1215°C in front of a quadrupole mass spectrometer, one [136, 141] is able: to identify the thermal desorption products (H2 and Si2N), and to monitor thickness tN, by using the integrated intensity of the Si2N thermal desorption peak. Thickness t^ can also be deduced from the intensity of the N(KLL) AES peak (e.g. one can find from Fig. 1.04 that after 16 hours, tn = 1.8 nm, assuming a layer-by-layer mode of growth [141]). The residual hydrogen content of the grown film can be measured by means of NRA (using reaction (D(3He, a)p as explained in Chap. 7) whose sensitivity limit is 2 x 10^2 atom/cm^ [141]. In the case illustrated by Fig. 1.04, no trace of hydrogen contamination could be found [88].

B, Balland and A. Glachant

30

3J.3. Some experimental growth curves Several growth curves are illustrated next. The thickness of the nitride film (assessed by means of the AES N-peak or by means of the TDS Si2N-peak) is plotted as a function of nitridation time. Several isothermal growth curves are shown in Figs. 1.05 and 1.06. All growth curves reveal an initially fast regime which is linear with time, until the first monolayer is formed (one nitride monolayer contains « 3 x lO^^ N atoms/cm^ and its thickness is « 0.35 nm [136]). During this first step, the growth rate does not appreciably depend on T (in the temperature range investigated) as visible in Fig. 1.05, but it varies strongly with P(NH3) as shown in Fig. 1.06. The growth rate slows down once the first monolayer is completed. This translates into a sharp break in the growth curves (i.e. an abrupt change in slope) quite visible in Figs. 1.05 and 1.06. Growth slows down further as more monolayers are formed. 3.1.4. Growth modeling These experimental results clearly show, as previously assumed [143, 144], that the thermal growth of silicon nitride is diffusion-limited.The abrupt reduction in growth rate suggests [141] that: 1/ the first monolayer covers entirely the silicon surface, 2/ the reacting species needs to diffuse through the first layer to fuel further nitride growth. This has led to propose a layer-by-layer growth model [141] in which one layer is completed before the next one begins to grow over it. The arrows of Figs. 1.05 and 1.06 indicate the completion of the successive layers according to this model.

1 "ii [-• 3 » 'ayer

3 (0

---r

R-aSlayer

0>

1 KJ-

.--o-

• o

"^

"^

°

•<>•

N

O) 3

i> 1

<

p K

b [• 2^ CO

3 r

Q.

L

o

Q . k-

1

1

1

1

1

1

t

1

1

1

• .-X-""

---'^—

u

,.)c::-5

1

• ---X-

.--x--"

0

r ,^-

1

^"

'^'

^

'>'0 0

•o o 1 •z c

X...950X 1

•

Lb 1

-1

60

1

1

120

I

1

180

1

„ ^,^-7 ^ i

1

240

Nitridation

time

1

1

300 (min)

U

360

Fig. 1.05 - Growth curves of an LP thermal nitride on a Si(lOO) substrate for two growth temperatures (835°C (O) and 950''C (x)) at PiNHs) = i jc 10'^ mbar. The nitride thickness is monitored by AES and TDS. (After [136, 141] slightly modified).

Silica, Silicon Nitride and Oxynitride Thin Films

31

l h

.»--"•*

Fig. 1.06 - Growth curves of an LP thermal nitride on a Si(IOO) substrate at 950°C for four ammonia pressures: P(NH3) = 10-^mbar (X); P(NH3) = 3x 10-^ mbar (m); P(NHs) = 1.3 x 10'^ mbar (o); P(NH3) = 5x 10'^ mbar (A). Nitride thickness is monitored by AES. (After [141] modified).

03 O Q.

<

^A'' JL^-

..*r

4-^

^- - 0 - ' --0" ^'*"

if'

O 3

4H

- A--^

1 t-«h

4 a

••

4—

th .

4 = layer rd .

3 = layer 2 = layer

• ^

-^•x--

0.5

St ,

xy

h' , k^ •

1 = layer

•

•

/.^

_i

L 1 1 1

50

1 11

J

1

L

100 Nitridation

. i . 150

1

time

j_lJ

L_

200 (min)

The growth curves of the LP process can neither be fitted by a logarithmic law [132] nor by a power law [21 a] (unlike the growth curves of the HP process studied in § 3. 2). The best fit of the growth data, in the case illustrated by Fig. 1.05, is obtained if one assumes that: 1/ the nitriding species are ionized and travel across the growing (ultra thin) film in the presence of a high electric field, i.e. that diffusion is opposed by drift (as previously proposed for the initial rapid regime of oxidation [51-56]); 2/ each growing monolayer can start at many points and the total area (or coverage) 0\ of the ith layer is the sum of all patches it occupies over the (i-l)th layer (ai is normalized to the available substrate area, i.e. Oo = 1). The above result means that thermal nitridation obeys in fact a pseudo layer-by-layer mode of growth, illustrated by Fig. 1.07 [141, 147], in which layer i can start even though the completion of layers (i-1), (i-2),..., 1 is not achieved. These conclusions have been confirmed by the NRA analysis of films grown consecutively with I^N and l^N ammonia [148-149]. Such a growth model requires the transport of N ions across the film in the presence of high electric fields, while some re-arrangements of Si atoms may take place [147]. This pseudo layer-by-layer growth mode is however difficult to observe, even with opposing electric forces, when ion transport is too fast (i.e. when higher pressures of reacting gas and higher temperatures are used). This may explain why even careful studies [55] have failed to reveal such a growth mode for higher pressures. 3.1.5. Proposed growth mechanisms Let us now consider the mechanisms at work during the growth, in NH3, of the first nitride layer. Careful XPS studies [150-152] have mainly shown that: - the dangling bonds of the silicon surface are saturated by various nitrogen or hydrogen species; - the nitridation of Si(lOO) is heterogeneous and proceeds via island growth.

32

B. Balland and A. Glachant

^)

|^a3-[..|—[ \A P

L H L

11

n^

H

IA2

1

_L_kl

ll

A

^ "^

\! '® 1 o r ' 5^2 0. . ' o > o 1

w\

(Yi n = 1

,

WA

k

¥\

81(100) F/g. 7.07 - Illustration of the layer-by-layer mode of growth of ultra thin nitride films on a Si(lOO) 2x1 substrate: C) a) Schematic cross section of the growing film; b) Evolution with time of the individual coverage of the first six layers, assuming that ion transport across the film takes place in the presence of a high electric field; c) Theoretical curve (—) deduced from b) and experimental data points (*) (T=950''Q P(NH3) = 3 x W'^ mbarUAfter [141]).

• ^

y^^

\

<^'

/ 1

•! '•• • • ' ~ l " ~Fl

^1 ^^ 0

1.0

b)

|a4|

y

"^

'

f

'

'

®,-''

'

o

^-'

^^

^ ^^ "

^^

^^

^12

16

(0 o ^

A

(0

3 2 L/91** o I f 1 E f«

I

I

\r

hie

8 1 2 16 Nitridation time (h)

Two situations arise depending on whether P(NH3) is greater or smaller than a critical pressure PQ: • if P > Pc, i.e. in the so-called "passivating mode", the growth rate is quite fast. The mean distance between islands is smaller than the diffusion length of the chemisorbed species, thus leading to a rapid incorporation of the chemisorbed atoms in the islands. The resulting coverage increases rapidly. • if P < Pc, i.e. in the so-called "burning mode", the growth rate is slow. The mean distance between islands (whose density is relatively small) is larger than the diffusion length of the chemisorbed species. This leads to a desorption of the nitriding species before reaction can take place along the island edges (where the species could be stabilized). Taking into account the above experimental results, a model explaining how the first reacted nitride layer is formed has recently been proposed [153] based on a thermodynamical and structural approach of the problem. This model proposes five steps: 1/ the chemisorption of NH3 molecules at the surface of Si( 100)2 x 1, which leads to the formation of s Si-NH2 and s Si-H species, 2/ the beginning of H2 desorption, leading to the breaking of = Si-H and = Si-NH2 bonds, 3/ the dimerization of = Si-H and Si-NH2 groups, leading to the formation of = Si-NH-Si = groups, 4/ the total desorption of H2 and the formation of = SisN groups (in which nitrogen has an sp^ hybridation), 5/ the formation of = Si3N2 groups (in which nitrogen has an sp^ hybridation) which is the basis for the formation of Si3N4.

Silica, Silicon Nitride and Oxynitride Thin Films

33

Fig. 1.08 ' LEED patterns corresponding to the LP nitridation of a Si(100) surface (energy of the primary electrons = 80 eV): (left) pattern of a clean Si(lOO) surface, (middle) pattern of a nitride monolayer 50% complete, (right) pattern obtained when close to one monolayer is formed. (After [136]).

3.1.6. Film structure Figure 1.08 shows typical LEED patterns corresponding to various stages of the reaction of NH3 on Si(lOO) at 800°C, leading to the formation of the first reacted monolayer [136]. Once a full monolayer is completed, a very faint 1x1 structure can be observed while the 2 x 1 spots have disappeared (Fig. 1.08 c). The disappearance of the diffraction features corresponds to the abrupt change in slope, observed in the top curve of Fig. 1.05, and which occurs after - 30 min of reaction, the silicon dangling bonds being saturated. Above this coverage, the LEED pattern vanishes showing that a layer with no long-range order has been formed [136, 141]. 3.2. HIGH-PRESSURE (HP) THERMAL NITRIDATION

Thermal silicon nitride films can also be obtained by letting a silicon substrate react at high temperature (T > 900°C) and at high pressure (P « 1 bar) in N2 or NH3 [20, 21, 63, 73]. Since below 1200°C the thermal nitridation process is self-limiting, thick films cannot be obtained unless an "enhancement" method is used. 3.2.1. Principle of non-assisted thermal HP growth Figure 1.09 shows a schematic cross section of a typical HP (High Pressure) reactor used for thermal nitridation. Chemically-cleaned silicon wafers are placed in the reaction chamber and react with highly purified N2 or NH3 or other nitrogen-rich ambients at a pressure of « 1 bar and at temperatures ranging from 900°C to 1300°C [20, 134]. This reaction yields a thin amorphous nitride film (nitride films of about 5 nm can be obtained within 200 min at 1200°C). Due to the self-limiting growth process, the obtained nitride thickness t^ cannot exceed 10 nm unless high temperatures (T > 1200°C), unacceptable for a regular fabrication process, are used [73,142-144]. From Arrhenius plots, the activation energy for the reaction between silicon and ammonia is found to be 0.2 eV. This low value makes it impossible to obtain films much thicker than 5 nm, unless either the substrate temperature is raised much above 1200°C, or the nitridation reaction is "enhanced", as explained next.

34

B. Balland and A. Glachant Quartz Tube

Pressure Vessel

Fig. 1.09 - Schematic cross section of a high-pressure nitridation chamber. (After [154] slightly modified).

Front Door

End Cop I Cooling Jacket

Gas Inlet N 2 NH 3 Main Heater

HP thermal nitrides are amorphous although some researchers have found [155-159] that thermal nitridation may produce crystalline (a-Si3N4 or p-Si3N4) or polycrystalline films. The discontinuous structure of polycrystalline films makes them unsuitable for use in microelectronics. --200 E c d100 Fig. 1.10 - Growth curve of a nitride film grown in a non-actived ammonia gas at 1200°C (A) and in an RF-actived ammonia plasma at lOSO^C (O). (After ho [134] slightly modified).

T

• I » ' "I Activated NH3 1050^CN

o 50 c

NH3 1200^C Deal-Grove Diff. Model

I u.

10

II i I

10

I

I

I I II

50 Nitridation

III

100 time

500 (min)

3.2.2. Principle of plasma-assisted thermal HP growth In this process, chemically-cleaned silicon wafers are mounted on SiC-coated susceptors and loaded inside a horizontal quartz tube. A highly purified NH3 gas is introduced in the tube at a somewhat reduced pressure (10-1
* This plasma nitridation process is much different from that process in which the substrate is biased to collect the plasma (anodic plasma nitridation).

Silica, Silicon Nitride and Oxynitride Thin Films

35

Figure 1.10 shows two growth curves. The lower one corresponds to an unassisted growth in purified NH3 at 1200''C at a background pressure of 1.33 mbar. Thickness i^ has been measured by ellipsometry. The curve shows that tj^ does not exceed 5 nm even after a reaction time of 200 min. The upper curve shows that the use of an RP-activated NH3 plasma clearly enhances the growth rate and makes it possible to decrease the nitridation temperature. Films thicker than 10 nm can be obtained within a reasonable reaction time although the growth rate remains much lower than that of thermal oxide films. This lower growth rate allows, however, a much better control over the nitride thickness (reproducibility is better than ± 0.5 nm). 3.2.3. The kinetics of HP nitride growth Thermodynamic considerations Except for a few reported results, dealing with the direct thermal nitridation of Si in N2 at T > 1150°C, using reaction times ranging from 1 min to 18 h, unassisted thermal nitridation is a self-limiting process which yields a maximum film thickness of « 7 to 10 nm [19, 20, 136-141]. Three reasons explain why it is difficult to cause silicon to thermally react with nitrogen in a direct manner: - the binding energy of nitrogen molecules is fairly high, - the diffusion of nitrogen atoms in silicon or silicon nitride is very slow, - the standard free energy of the reaction between silicon and nitrogen is low. It is worth noting that the thermal nitridation of Si cannot be achieved if the residual oxygen concentration (in the form of water or oxygen) in the nitriding ambient is above 1 ppm or if a native oxide layer remains on top of the substrate [160-163]: traces of oxygen have in fact a strong inhibiting effect on the nitridation reaction. For example. Fig. 1.11 illustrates a case where pure NH3 has been used on a silicon wafer whose natural oxide had not been previously removed. The film obtained is an oxynitride and not a nitride. This is due to the fact that the reaction of silicon oxidation is thermodynamically more favorable than silicon 1 • (N) nitridation, assuming standard equilibrium . / (N) + (O) 60 conditions [138]. 1 '-'•* • •D

50

u 40 F^

1 \

E 3

s

8

1 1

,

^^s

X V

Fig. 1.11 ' In-depth composition profiles of a thin nitride film grown on a wafer, whose natural oxide has not been removed prior to nitridation, in pure NH3 for 40 min at T^llOO^'C. (After [137]).

30 V V

\

s a

o o

20 10 r'

interface

"*.

''-

-^^

3

<

' 0

^^^>>.

1

\

1 u.-4—1 20

40

1

1

U

60 80 Depth (0.1 nm)

The top curve shows the variations of the composition parameter with depth, while the other two curves illustrate the variations of the [N] and [O] concentrations with depth.

36

B, Balland and A. Glachant

Indeed, thermodynamic calculations [19] have shown that the partial pressure of oxygen should not exceed 10-23 atm (i.e. 1 ppm) to let P-Si3N4 form in an otherwise pure ammonia ambient at T = 1200°C. The calculated stability field diagram for the Si-O-N system is shown in Fig. 1.12. Non-assisted thermal growth Unassisted isothermal HP growth curves for T > 1200''C and P(NH3) = 1.01 bar [143] are shown in Fig. 1.13. Large thicknesses (> 10.0 nm) can be obtained using HP and HT conditions. In this case the growth curves, as illustrated in Fig. 1.13, follow a law of the form: tN=107(k/d)log(t+l)

(1.1)

where k is the rate constant of the reaction, in g/(cm2.min), d is the density of silicon nitride (3.18 g/cm3), tN is the layer thickness in nm and t is the nitridation time in min. The k values deduced from the experimental results increase from k (1200°C) = 3.60 x 10-6 g/(cm2.min) up to k (1350°C) = 22.70 x 10-6 g/(cm2.min). To explain such a logarithmic-like growth, a model has been proposed in which the nitriding species are supposed to diffuse through microcracks or faults in the growing film [142]. Finally, a law of the following form, where a and b vary with T, has also been deduced [21]: tM=aJ^

(1.2)

-21.0

160 h E c (/) o c o

120 h

80

40

15

-27.Oh

30

60

Nitridation -6.0

-5.0 -4.0 -3.0 Log Equilibrium P N ^

180 time (min)

-2.0 (atm)

Fig. 1.12 - Calculated stability field diagram for the Si-O-N system. In the diagram P(N2) varies fr-om 10'^ to 10'^ atm while P(02) varies fi-om 10'^'^ atm to 10'^^ atm. (After [24] modified). Fig. 1.13 - The thickness of silicon nitride layers thermally grown (unassisted) in NHs is plotted versus log(t + l)for the following growth conditions: T = 1200 CP, 1250 ®, 1300 (3)orl350°C ®andP(NH3) = 101 bar. (After [143] modified).

Silica, Silicon Nitride and Oxynitride TItin Films

37

Assisted growth During the later stages of plasma-enhanced nitridation in NH3, growth appears to follow a diffusion-limited process in which the active nitrogen from the plasma plays an important role. It seems that a diffusion model of the Deal & Grove type [10a] fits well the experimental results [93, 144]. A characteristic diffusion length L of the nitriding species is defined in order to explain the observed saturation effects. If the film thickness tN is less than L (L « 1.0 nm at 1200''C), a Deal & Grove-like model is valid, whereas saturation occurs if tN exceeds L [144]. In the case of anodic plasma-nitridation, substrate bias plays an important part. In this case the growth rate of nitride films is found to be quite independent of the partial pressure of the nitriding gas. A linear growth model has been proposed for growth in N2 plasma [47] and a diffusion-limited model has been proposed for growth in NH3 plasma [119]. The introduction of a fluorine-based catalyst (e.g. SFg, CF4, NF3) inside the reactor is found to enhance the growth rate [92-95]. Film thicknesses of about 100 nm have thus been grown after 4 h at 600°C (N2 plasma) using such a catalyst [93]. 3.2.4. Growth mechanisms How thin (< 10.0 nm) HP nitride layers grow is not fully understood yet. During the early stages, both for "natural" and plasma-enhanced growth, film growth seems to follow a reaction-limited process up to a thickness of 3 nm, since it is rapid and uncontrollable. During nitridation, nitrogen atoms are thought to saturate the voids in the silicon lattice [173] giving rise to a distortion of the crystalline array of Si (which, in turn, eventually contributes to the diffusion of Si atoms from the substrate up to the nitride layer). Nitride growth in NH3 is observed to be faster and better controlled than when using molecular nitrogen. The hydrogen produced by the reaction is assumed to eliminate oxygen contaminants from the substrate [19] via the following reaction. Si02 + H2 (g) -^ SiO (g) + H2O (g)

(1.3)

Under thermodynamic equilibrium conditions, the most favorable nitridation reaction of Si with NH3 should be [154, 189-190] 3Si + 4NH3(g)'^Si3N4

+ 6H2(g)

(1.4)

the standard free-energy changes for this reaction being given by [132] AGO = -126-3.2

X 10-^ T (in kcal/mole)

(1.5)

More detail about the transport and exchange mechanisms at work during the HP nitridation of Si in gaseous NH3 can be found in Chap. 7 of this volume. Although the nitride films thus produced are thin, isotopic tracing techniques have shown that nitridation proceeds via the transport of NHx species through the growing film. This transport is accompanied by complex exchange mechanisms affecting both N and H atoms. In the case of plasma nitridation studies, the characterization of the plasma itself is practically never reported. How the charged particles from the plasma interact with the growing film has not been (to our knowledge) studied up to now. The saturation effect observed when the plasma-assisted thermal nitridation of silicon is carried out over a long period, is attributed [81] to sputtering artifacts in the growing film.

38

B. Balland and A, Glachant

4. PROPERTIES OF TfflN THERMAL NITRIDE FILMS Thin thermal nitride films possess physical, chemical and electrical properties which are strongly affected by the presence of impurities and defects. We next review some of these properties. 4.1. STRUCTURE

In microelectronics, insulating layers cannot be used unless they are amorphous. Thermal nitride films are amorphous provided: - that the substrate is perfectly clean before growth, - that the growth ambient is perfectly controlled (i.e. that the amount of water vapor and oxygen is extremely reduced), - that the nitridation time is not too long. If all these growth conditions are met, uniform and amorphous films can be obtained by thermal growth [20] with properties which are superior to those of CVD nitrides. Figure 1.14 summarizes the conditions under which either a crystalline or an amorphous thermal nitride film is obtained. Let us note, however, that if the growth process is plasmaassisted, amorphous films can be obtained at much lower temperatures (T<900''C) [99, 153]). 1000

I , *

0)

o

^ L

100

-

s

Smooth

"

flC

1

. S m a l l Spots ^ ^ i ^ ^ ^ * •..

^ 0

°\

1

1

-e 1

1200

1250

1300

^

10

O

—

j ^

Fig, 1.14 - Illustration of the structure of nitride films grown in N2 at different temperatures and for different nitridation times: in a "dry" ambient ([H2O] < I ppm, [O2] < 0,1 ppm). Experimental data points are indicated

[ 0 ^ <0.1 ppm

: 8\i Js^**

S E c o

[H 2O] < 1 ppm

Crystalline

^

1

(0, A, *). The continuous line f—j separates the process conditions which yield amorphous films from those which yield crystalline films, (After 20 b] slightly modified).

Temperature f'C)

If the reaction environment contains substantial concentrations of impurities (e.g. water or oxygen) [20], the obtained thermal films are neither uniform nor amorphous but usually possess the following features [142-143]: - the films appear highly faulted and faceted under the microscope, - their polycrystalline nature is revealed by sharp IR absorption peaks, characteristic of the a and p forms of Si3N4 (as visible in Fig. 1.15), - their physical appearance is dark but transparent with some interference colors, - their optical refractive index exceeds that of amorphous nitride films (i.e. n > 1.9).

Silica, Silicon Nitride and Oxynitride Thin Films

39

60 h

Fig. 1.15 - IR transmission spectra of thermal silicon nitride films prepared under different conditions: P(NH3) = 1.01 bar; (Z t) = (1350''Q 18 min) (Z>, (1350''C, 60 min) ® or (ISSO^'Q 180 min) 0. (After [143] modified).

I 40

20 r 500

1000 \/X (cm-1)

1500

4.2. OPTICAL REFRACTIVE INDEX

The optical refractive index of silicon nitride films depends on the nitrogen content [75a] and index values in the 1.5-1.9 range have been reported [81]. For thermal and for plasmaenhanced nitrides, the index value is unaffected by the anmionia pressure (as illustrated in Fig. 1.16) and depends very little on the nitridation temperature (Fig. 1.17). The index values are very close to that of stoichiometric Si3N4 (i.e. n = 1.9). The highest values have been measured for films formed at the highest temperatures or for the longest nitridation times.

2.0

~*-

..^

*--

C

I

1.5

Fig. 1.16 - Optical refractive index versus pressure for thermal nitridation in NH3 at lOSO^'Cfor 100 minutes. (After [20 b] modified).

NH3

o 2

.1050°C 1n —1 0.1

1—

1.0

1 1

10

Pressure (mbar)

Refractive indexes ranging from 2.0 to 2.3 have also been reported [79, 85, 92], but could be due, as discussed before, to an excess of Si in the film [163]. This is not the case for films thinner than 10 nm. Figure 1.17 b shows how the refractive index, and film structural properties (such as density and [N]/[Si] ratio), typically vary with the substrate temperature and with the RF power density.

40

B, Balland and A, Glachant 2.2

P J-^

n X

2.9

KA,,

2.1

CO

E

c 2.0 o > o 1.9

2.5

/ ^

CO

o Q:

^

1.8

i N/Si

Temp 350°C . 1.

1.7 250

300

Temperature

350

1ii

c o o

J 2.1

i

0.5

1-5 Power

(^'C)

J

(0

(W/cm^)

Fig. 1.17 - The optical refractive index (n), density (p) and composition ([N]/[Si] ratio) of thermal nitride films are plotted: (left), as a function of substrate temperature during growth, (right) as a function of RF power density during growth. (After [163] slightly modified). 4.3. ETCHING CHARACTERISTICS

Nitride films display a better resistance to chemical etching than thermal oxide films do. Using a buffered HF solution (7:1 HFiNH^F at 24°C), the following etch-rates* have been reported: 2.5 nnfi/min for a (microwave) plasma-assisted thermal nitride grown at 800°C [92]), 2-3 nm/min for a "non-assisted" thermal film grown a 1200°C [137] and 1 nm/min for a plasma-assisted (RF) nitride grown at 1050°C [80]). These values should be compared to etch rates of 60 nm/min typically found for thermal silica [164]. As illustrated in Fig. 1.18, resistance to etching increases rapidly when the nitridation temperature exceeds 600°C and becomes then constant for Tnit > 800°C. When nitridation is carried out below 800''C, such films probably consist of oxynitrides, whose oxygen ratio increases as the nitridation temperature falls. 60

E 40

I

h Fig 1.18 ' Etching rates of thermal nitride films (in a solution of 7:1 HF:NH4F at 24''C) are plotted versus nitridation temperature. (After [20 d]).

c

s

20

H

CO

cc JZ

o

ill

*

300 600 900 Nitridation Temperature {°C)

1200

The etch rate was determined by dividing the initial film thickness by the time required to complete etching.

Silica, Silicon Nitride and Oxynitride Tliin Films

41

4.4. RESISTANCE TO OXIDATION

The resistance to oxidation of nitride films has been particularly studied because these films are used as masks to perform local oxidations (see the LOCOS process). Amorphous nitride films exhibit oxidation rates which are generally much less than those reported for thermal silica films [20, 98, 144, 154, 165]. The oxidation of a nitride features an initial stage during which the growth rate of the oxide is very small, followed by a second stage during which the growth rate reaches that of Si02 on Si [137]. When the oxide thickness is plotted versus oxidation time, the duration of the initial stage (tor) serves as a characteristic parameter used to measure how well the nitride film resists oxidation. This resistance depends both on the previous conditions of nitride growth (in pure NH3 ambient or not), on the oxidation conditions (dry or wet) and on the oxidation temperature.

E

1

^'<''

,x y

c 0)

c

I— 100h

1 ^jxr

L

10h u.

^

,-*

.x'-""'

«

®->: ;

i

--140 1 E 1 T = HOO^C / £3 ^ P ! S 100 "

s '

n

i ; i \

1

4)

(

1

c

£ 60

t 1

E

1 1

' /

p

^

20 1 1 10

I 1 100 1000 Oxidation time (min )

r

0.5

1

i

1.5

i

1

2.5

1

1

\

3.5

Oxidation time (h)

Fig. 1.19 - (left) Resistance to oxidation (m) of a film obtained by the nitridation of Si under various NH3 partial pressures (1 to 5.10^ mbar). Oxidation was carried out at 1000°C in an O2 ambient. The reference line (-X-) corresponds to the oxidation of pure silicon. (After [154] slightly modified). Fig. 1.20 - (right) Illustration of the oxidation rate (in dry O2 at llOO^C) of two thermal nitride films: one grown in 5% NHs-95% Ar (a) and one grown in 100% NH^ (m) (in identical nitridation conditions (time, T)). (After [137] slightly modified).

4.4.1. Resistance to dry oxidation Values of 10^ min have been observed for tor before oxidation talces place, as illustrated in Fig. 1.19 [154]. This value has been found to be independent of P(NH3) in the 1 to 5.10^ mbar range. This result does not however confirm a previous analysis [137] showing that resistance to oxidation strongly increases when the thermal nitriding step is achieved using a 100% NH3 ambient father than a 5% NH3 - 95% Ar ambient (Fig. 1.20). Moreover, in this previous work, it was shown that the oxidation resistance increases also with nitridation time (Fig. 1.21 a) and temperature (Fig. 1.21 b).

42

B. Balland and A, Glachant 20

/

10

/

^

virgin Si wafer

16

_/ • /

(0

in

/

^ 1 2u o

4

r"

E iZ

./^ '^ /

8 r/

/ /

/

/

y

/

/

/

/ f

/

/

/

/

/

i

^16

w -. ^

•

/

1

0) 1 2

/

0

c

^

0

'f

•c •' 1 1 1

1 1

E

/

Oxidation in O2 at T = 1100*^0

i

J1 4

], - ^ - ' - ' ' - ' : 1

k: ' ^ ^ 0.4

* - - ^ 1... 1

1.2

/V

I

I

I

2.0

I

^

i

l;

'

/

4

;

^ V

''L^'<^1,'-^

!

2.8

0.4

Oxidation time (h)

1

'

/ /

'

- / "

4

.° '

1

-t^/ /i

;

/ /

//

''^

8

1

1/

^

/ / / / '^ ^ / ^''^ / ^ / ' / ' / / ,/ ' /' /

c

•

/ «

/

virgin ^ Si wafer—^' ^^

,^- /^ 1

^

/ d

A 1

/ /

240

/

''

,0

/

•

-

/

/

10

4,0

/ /

Oxidation in 0 2 at T=1100°C

1.2 2.0 2.8 Oxidation time (h)

Fig. 1.21- (left) Illustration of the resistance to dry oxidation of nitride films grown at the same temperature for various lengths of time, in a 5% NHs-95% Ar ambient, for 10 min (A), for 40 min (O), for 240 min (O). (right) Illustration of the resistance to dry oxidation of nitride films grown at different temperatures for the same time (40 min) in a 5% NHs-95% Ar ambient: at 900°C (m), 1000°C (A), llOO^'C (O), 1190°C. (O). (After [137] slightly modified). 1

1

I

•

1 —

1 Dry O2 Oxidation

1 ^* •

[

iooq;,G--

••

1 4 k [ ,----•

1

^ * **

1

\,

'^ll«.-—""r050°C

2 h

h

1154^0 1

—

.

5

—

—

1

6 Nitride

1

7 thicl
. J

8 (nm)

1

1

9

10

Fig. 1.22 - The resistance to oxidation, measured through tor* of a thermal nitride film is plotted as a function of film thickness for various (dry) oxidation temperatures. (After [144] slightly modified).

The value of tor varies also linearly with the initial thickness of the nitride layer [144] as illustrated in Fig. 1.22. It strongly decreases when the oxidation temperature increases from 1050X to 1154X as illustrated in Fig. 1.23. It has been proposed [144, 164] that the oxidation kinetics of a nitride film obeys a linear parabolic law of the Deal & Grove type [10 a].

Silica, Silicon Nitride and Oxynitride Thin Films

43

\ 40

^

-

30

q

% \

SI

\

t 20 o •^

-

Fig. 1.23 - Dependence of tor ^^ the oxidation temperature The nitride film has originally been obtained by exposure of Si to 100% NH3 for 90 minutes at llOO^'C. (After [137] slightly modified).

\

\

N

\ "o

V

10

"""-^ •

900

1000

^ - T > - 0 |

1100

1200

Temperature of oxidation (^C) Si3N4 + 302 -^ 3 S i 0 2 + 2 N 2

€0 O

>. - 3 0 0 0)

Fig. 1.24 ' Free energy is plotted as a function of temperature for three types of conversion of silicon nitride into silicon dioxide. (After [164] slightly modified).

S i 3 N 4 + 6 H 2 0 - > 3 S i 0 2 + 6 H 2 + 2N2

c

S -200 CO

I -100

Si3N4+6H20->

3Si02+4NH3

CO

JL

1000

1200

1400

1600

1800

Temperature

(K)

Figure 1.24 shows the reactions of conversion which are effective at high temperature. The conversion of silicon nitride into silicon dioxide has been carefully studied [137] and has revealed that: - the film is homogeneously oxidized, although oxidation tends to be more thorough at the surface; - three different modes of oxygen incorporation in the nitride film can be defined before tor is reached, depending on the value of the composition parameter ([N]/ ([N]+[0]) of the film as illustrated in Fig. 1.25: 1/ For a composition parameter greater than or equal to 0.2, a quick substitution of N atoms by O atoms takes place and the nitrogen atoms are removed from the film. This substitution process takes place homogeneously throughout the film thickness and the oxygen is practically completely consumed during this process.

44

B, Balland and A, Glachant

II For a composition parameter below 0.2, the N -> O substitution slows down. Between 0.1 and 0.2, the film composition is modified very slowly and oxide growth begins due to a slow diffusion of oxygen through the film up to the nitride/silicon interface, where oxygen atoms react with the silicon substrate. 3/ A fast oxidation regime appears when the composition parameters is less than 0.1. The lowering of the nitrogen concentration could then be the result of either a loss of nitrogen or a simple dilution. The remaining nitrogen fraction is estimated at less than 0.01 for t = tor-

o

o 4 - 100% NH3, 90 mn (5 nm)

?

60 •4— 100% NH3. 40 mn (4 nm)

X

O 1*

z

^^—

5 % NHo. 60 mn (4 nm)

\ V0J6.I nm) 2 0 - \ ^ ^->~~.^(6.7 nm) X ( 9 nni)

- - Bi-..

^-----.^^ 1

0 0

1

•

40

y

(35 nm) T~ - A

60

1

1

^ - , ( 2 0 nm) 1

1

1

1

80 100 Oxidation time (mn)

Fig, 1.25 - Composition parameter [N]/([N] + [O]) is plotted vs oxidation time for various thermally-grown nitride films when oxidation is carried out in dry O2 at llOO'^C. As discussed in the text, three stages of oxidation are distinguishable. (After [137] slightly modified).

4.4.2. Resistance to wet oxidation As illustrated in Fig. 1.26, the resistance of a nitride to wet oxidation is considerably less than that observed for dry oxidation [137, 164]. At 1050°C or above, the nitrided siHcon wafers do not show any measurable resistance [137]. Even for strongly nitrided films (Fig. 1.26 a), the tor value for wet oxidation is only 0.5 h at lOOOX and about 3 h at 900°C, which is considerably less than for dry oxidation (see Fig. 1.22). 4.4.3. The LOCOS process The LOCOS (LOCal Oxidation of Silicon) process is based on the selective oxidation of silicon using a silicon nitride mask as illustrated in Fig. 1.27 [71]. One of the problems encountered in the selective oxidation of silicon for the production of an embedded field oxide (EFOX), as illustrated in Fig. 1.28, is the unintentional oxidation of silicon under the nitride mask. The transition region from thick to thin oxide (also called bird's beak) consumes about 1 |Lim of space, sideways.

Silica, Silicon Nitride and Oxynitride Thin Films 120

T

T

IT *? 253 nm

I 100

r

r o 11 1190*0 1 ^ 1 1 OO'^C OOO'C I o 10

1 at 5h

^ 80

Fig. 1.26 - Illustration of the resistance to oxidation of thermal nitride films. Comparison of dry and wet oxidation characteristics for nitride films grown in pure NH3. (After [137] slightly modified).

900°C

I 60 40

J !

I

I 20 v> k^^/^rrr-'^r^^'i-

4

6

8

10

12

45

14

16

a) Resistance to dry oxidation at various oxidation temperatures of nitride films grown in pure NHj for 90 min at 1100°C.

Oxidation time (h)

E 120 c 100

1 |224 nm 1 1000°C ] ^ in O2 gas through ' boiling water

(0

o c o

80 -

60

20

'

-2-^-.^-.. 0.4

b) Resistance to wet oxidation at two oxidation temperatures of nitride films grown in pure NHs for 16 h at llOO^'C.

9oo°c ; in O2 gas through-^/ boiling water /'

'

40

1 / <

_-^

1.2

----2.0

^ 2.8

3.6

Oxidation time (h) Si3N4

KOH etch t^WkViiVywWWVVVVWkVaiVW : .

Fig. 1.27 - Illustration of the LOCOS process: (upper) preferential etching of silicon using KOH, (lower) formation of the field oxide. (featuring the bird's beak effect). (After [71] modified).

-^—SiO.

Si Si3N4

SiO.

bird's beak

Figure 1.28 shows the cross-section of an EFOX structure fabricated using a 7-nm-thick thermal silicon nitride as the oxidation mask. The substrate has been oxidized in wet oxygen (H2O; 80°C) at 1000°C to obtain an EFOX thickness of 0.75 |xm.

46

B. Balland and A, Glachant Thermal nitride 7nm Poly-Si Fig. 1.28 - Schematic cross-section of an EFOX pattern fabricated by means of a thermal nitride mask (After [161] slightly modified).

The problems related to the growth of field oxides are lateral oxide encroachment (field oxide loss, stress), the generation of stress-induced defects in silicon (dislocation generated in the substrate under the mask), poorly controlled impurity redistribution, the Kooi-effect and surface planarity [72]. Moreover, it has been shown experimentally that the high level of stress induced during the oxidation process results in a higher defect density and thus in higher leakage current, as well as oxide integrity problems. A good knowledge of the stress level is therefore a prerequisite to the development of a reliable technology. Stresses arise during oxidation because of the volume expansion accompanying the oxidation process. When the nitride layer is placed directly on the silicon substrate the shape of the bird's beak not only depends on the orientation of the wafer, but also on the orientation of the nitride mask. Si02 (field oxide)

Si^Nj

1.2

Lbb tfox

a)

® ® q '\

1.1

b) X'4 Fig. 1.29 - Bird's beak configuration: a) typical cross section of a bird's beak - b) the ratio of removed silicon thickness (tsi) to field oxide thickness (tfox) ^^ plotted as a function ofx c) the ratio of the bird's beak length (Li^ij) to the field oxide thickness (tfox) ^^ plotted as a function of the oxidation temperature for several wafer orientations and oxidation pressures: (DP = lOatm, orientation = (100) c) ®P = 1 atm, orientation = (100) (S)P = lOatm, orientation = (111) ®P = 1 atm, orientation = (111) (After [74] slightly modified).

1.0

0.9 \-

920

960

1000

Temperature (X)

Silica, Silicon Nitride and Oxynitride Thin Films

Al

To releave stress and to prevent the direct contact of Si3N4 with Si, a buffer oxide is used, as illustrated in Fig. 1.30. However this buffer oxide furthers oxide encroachment. In addition, nitrogen species due to the reaction of the top nitride layer with the H2O ambient, diffuse through the buffer oxide to form Si3N4 at the Si02-Si interface (Kooi-effect). Si O 2 (field oxide)

^i 3 N 4 (nitride patcli)

Al

P+

i^^

Bird's beak

^ SI P substrate

Si0 2 (buffer oxide)

Si (field Implant)

Fig. 1.30 - Illustration of how the growth of the field oxide is masked by the nitride patch. The buffer oxide under the nitride helps lower the stress on the silicon surface. The nitride is removed after this step. (After [71] modified).

The ideal buffer dielectric (or masking dielectric) is a material which can prevent the diffusion of NHx species, resist oxidation and can easily be removed to leave a virgin surface. By using nitride films produced by PECVD or by implantation of nitrogen ions, the problem of lateral oxidation has been considerably reduced. A comparison of the local resistance to oxidation of ni{ride films formed by means of LPCVD, PECVD and nitrogen can be found in [166]. 4.5. RESISTANCE TO IRRADIATION

The irradiation of amorphous dielectric materials has two consequences: the creation of structural defects (displacement damage) and ionization phenomena. Numerous studies ([167] and references therein, [162, 168]) have been devoted to the surface damage produced by an ion, or an electron beam, in amorphous thin films. Si02 has been shown to offer a resistance to ion or electron bombardment, which differs from that of Si3N4 or silicon oxynitrides. When the energy of impinging Ar ions increases from 1 to 5 keV, the surface damage of Si02 increases, but that of Si3N4 diminishes. On the other hand, increasing the electron fluence up to 5 x 10^^ cm-^ (electron energy = 2 keV) [167] results in both cases in an increased surface damage. The damage produced is measured by detecting the uptake of the Si(LVV) Auger transition (kinetic energy E = 89 eV) characteristic of the formation of Si-Si bonds in the irradiated insulator. The irradiation of A^/Si3N4/Ti MIS structures with 10-keV electrons [168] has shown that the electron-induced current in the nitride saturates at relatively low electric fields, while similar investigations performed on MOS devices have concluded that the corresponding current in the oxide never completely saturates even at fields of 5 x 10^ V/cm. These results suggest that a strong electron-hole pair recombination mechanism (of the geminate and/or of the columnar type) takes place in silicon nitride [168].

48

B, Balland and A, Glachant

MIS structures using very thin nitride films have also been found to offer a good resistance to high doses of photons and/or heavy ions [169]. The flat band voltage shift remains below 500 mV, for applied electric fields in the -1 to +1 MV/cm range, and, irradiation doses of 2 Mrad. Under irradiation, the C-V curves shift without deforming, thereby indicating that the interface state density does not change appreciably. 4.6. RESISTANCE TO IMPURITY DIFFUSION

Silicon nitride films exhibit a much better resistance to the diffusion of impurities, than thin silica films do. Figure 1.31 shows an example of the masking effect of thermal nitride films. The concentration of phosphorus atoms which have diffused through the thin (< 10 nm) nitride layer is found to be four orders of magnitude smaller than that obtained for silica [20]. A thermal nitride film, only 4 nm-thick, covering the gate insulator of an IGFET is also an effective barrier against the doping impurities diffusing from the gate electrode into the channel region.

Fig. 1.31 - Illustration of the masking properties of silicon nitride films. The concentration profile of phosphorous atoms diffusing from a PSG film (and measured through the concentration of free carriers as a function of depth) is given in four cases: when silicon is not protected, and when silicon is protected either by a thin silica layer (6.6 nm) or by a thin nitride layer (3.4 and 9.2 nm). (After [20 b] slightly modified).

0.2

0.4

0.6

Depth from surface (mm ) 4.7. THE MAIN IMPERFECTIONS OF THE SILICON NITRIDE-SILICON SYSTEM

In a near-perfect stoichiometric amorphous nitride, the Si atoms are linked to four N atoms in a distorted tetrahedral arrangement while the N atoms are linked to three Si atoms in a nearly planar trigonal arrangement. The structure is amorphous when the interatomic distances and the bond angles are randomly distributed around the values encountered for the crystalline structure [170-172]. 4.7.1. Defects associated with non-stoichiometry When silicon nitride is non-stoichiometric, two kinds of dangling bonds appear: the silicon dangling bond (abbr: SDB, symb: =Si*), and the nitrogen dangling bond (abbr: NDB, symb: = N*). Moreover, when Si is in excess, = Si-Si = bonds are also encountered.

Silica, Silicon Nitride and Oxynitride Thin Films

49

4.7.2. Defects associated with hydrogen Just like in amorphous silicon, hydrogen may passivate dangling bond by forming = Si-H and = N-H groups, but an excess of hydrogen can also create defects by distorting existing bonds. The concentration of chemically bonded hydrogen varies, depending on the nitridation process: from 4-10 at. % for HT thermal nitrides to 30 at. % for LT plasma-assisted thermal nitrides. Nitrogen dangling bonds are more readily hydrogenated since the bonding energy of N-H is larger than that of Si-H. The annealing of silicon nitride in N2 at 700°C [124] causes dehydrogenation. This treatment gives birth to dangling bonds (by breaking the H bonds) and induces a densification at the same time. The out-diffusion of hydrogen leads to a degradation of the electrical properties. Conversely, annealing in hydrogen can, to a certain extent, reintroduce hydrogen atoms in the nitride and thus reduce the concentration of SDBs and NDBs. 4.7.3. Defects and introduced energy levels To sunmiarize, the following defects have been identified in silicon nitride: = Si% = N*, = Si-Si =, =Si-H and =N-H. The concentration of these various defects depends, along with stoichiometry, on the growth process used. The presence of these defects influences the electrical properties of the nitride depending on the type of energy level and state they introduce in the gap. If the level is close to a band edge, or to a band edge tail, it contributes to the conduction mechanism. If the level introduced is deep in the gap, the defect contributes to the memory effect. A large concentration (1018 to 1019 cm-3) of carrier traps associated with these defects is usually found distributed throughout the nitride bulk. • SDB The SDB possesses one unpaired electron. It can either lose this electron or capture another one of opposite spin. Therefore it exists under two forms: = Si" and =Si^. The = Sidefect is responsible for a peak in the distribution of states near midgap, at Ey + 3.6 eV. It possesses two possible charge states (0, -) and traps electrons. The = Si^ defect introduces states in the gap at Ey + 3.1 eV. It possesses two possible states of charge (0, +) and acts as a hole trap because it lies energetically close to the valence band tail. The distribution of states introduced by SDB's is illustrated in Fig. 1.32. • NDB Likewise, the NDB exists under two forms labelled: = N~ and = N°. The = N"" defect gives birth to a state located at the top of the valence band. The = N" defect is responsible for a valence band tail about 1.5 eV wide, visible in Fig. 1.32. The =N" defect possesses two possible charge states (-, 0) and acts as a hole trap. It is charged when empty. • = Si-Si = The a bonding state of the = Si-Si = defect is found to lie in the gap, at about Ey + O.l eV while the a* anti-bonding state is in the conduction band. Consequently this defect only gives rise to a narrow valence band tail, about 1.5 eV wide.

B, Balland and A, Glachant

50

The neutral = Si-Si = centers play an important part in the hole conduction mechanisms. • s Si-H The a (bonding) and a* (anti-bonding) Si-H states lie outside the gap, which explains the passivating action of hydrogen. • = N-H The states corresponding to this defect also lie outside the gap. • Si-N bond Due to stresses existing in the random network of silicon nitride, the Si-N bond is strained. It can lead to a more complex situation than the simple creation of a couple of one SDB (= Si*) and one NDB (= N*).

rio^^ E

u « 10^°

-

0) ft

^ 10

.-'

\Si-Si

'

V

A A

'<0

§ 16 Q 1 0

/

1

18

—

' =N-\

1

1

u

1

V 1 2

Ny .\ 3

4

5

i

• Ev

Energy

(eV)

Ec

Fig. 1.32 - Distribution of energy states introduced in the band gap of silicon nitride by bulk defects. (After [170] slightly modified).

AHA. Impact on electrical properties • On electrical conduction Hole conduction dominates in silicon nitride (while electron conduction dominates in silica). For low electric fields, conduction in silicon nitride is due to holes hopping from shallow traps (energetically located in the valence band tail), while electrons are trapped in very deep = Si" centers. (= Si* centers also act as traps in Si02 and should hamper electronic conduction, but their density in silica - typically IQl^ cm-3 - is much smaller than that in silicon nitride - typically 10^9 cm-^). • On memory effects SDBs and NDBs are the defects most likely to contribute to the memory effects, although authors disagree on their respective role (see Chap. 5 of this volume). Because of its amphoteric nature the SDB acts in MNOS devices as a long term (memory) trap. It is located deep in the nitride gap and is energetically aligned with the gap of Si. SDBs trap either electrons or holes during the writing phase and release them during the reading phase [34].

Silica, Silicon Nitride and Oxynitride Thin Films

51

4.7.5. Defects induced in the silicon substrate The concentration of stacking faults in the silicon substrate is found to decrease during the thermal nitridation of silicon [173, 175]. It decreases linearly with nitridation time at a speed which increases with the NH3 pressure in the reactor. This effect could be due to a reduction in the concentration of Si interstitials close to the silicon surface, caused by a diffusion of Si atoms from the Si3N4-Si interface towards the nitride surface. The diffusion of P and B atoms in the bulk of silicon is found to be retarded during the nitridation of Si because of the depletion in Si interstitials which takes place [174, 176] (see § 5.6 and Fig. 1.52). 4.8. ELECTRICAL PROPERTIES OF NITRIDE FILMS IN M N S STRUCTURES

The electrical characteristics of nitride films presented next are derived from studies of the MNS (Metal-Nitride-Silicon) structure. They include the properties of the Si3N4-Si interface, the breakdown voltage, the dielectric constant and the electrical conductance. Correlations between electrical characteristics and growth conditions are also discussed. 4.8.1. Dielectric constant The dielectric constant of Si3N4 usually quoted is £r = 7.5 (see Table 1.04), but this value depends on the preparation conditions (i.e. cleanliness of the Si wafer before nitridation and purity of the nitriding gas, temperature, composition, etc.). The presence of silicon inclusions in the film increases 8r and brings it closer to the dielectric constant of silicon (£51 = 12). 4.8.2. Dielectric charges The C-V characteristics of MNS structures are very stable and show no hysteresis loop even when submitted to voltage stresses of ± 5MV/cm. Dielectric "charges" nethertheless exist in the Si-Sic^N4 system. E 10

\\

12

1

- 1 N = 7.5 nm

® -- - 1 N = 9.4 nm > 0

10

joA

*f/ i Ji h P

11

m

I

10

. *•* • • • • J * ' * ' ' " " •

10 •

•0.2

1

1

0.0

0.2

1

1

0.4

1

I

I

0.6 Surface potential (V)

0.8

Fig. 133 ' The density Dit of interface states in the band gap of silicon nitride is plotted versus surface potential as determined from quasistatic C-V measurements. (After [20 a, 172] slightly modified).

B, Balland and A, Glachant

52

• Interface states caused by the discontinuity of the silicon lattice at the interface have been reported with a density in excess of IQl^ cm^/eV as illustrated in Fig. 1.33 [20, 172]. • Fixed positive charges caused by the non-stoichiometric [Si]/[N] ratio at the interface, have been reported with densities of about 5 x 10^ cm-2 [21, 171]. Although this value is relatively high, its contribution to the threshold voltage is rather small, due to a very large gate capacitance. • Bulk trap densities of about 10^ ^ cm-2 have been measured [21, 171]. • Mobile ions such as Na+, K+ and H+ have little impact [66-67] in a nitride layer because of the blocking effect of the nitride network. 4.8.3. Breakdown voltage The breakdown voltage of the nitride films can be measured by biasing the MNS structure in the accumulation mode. Breakdown occurs when the leakage current reaches an abnormally large value. Breakdown fields ranging from 6.5 MV/cm [85] to 20 MV/cm have thus been measured [27, 146]. The dielectric strength is found to increase with increasing substrate temperature and RF power density during nitride growth. When as-grown films are annealed at 700°C in N2 the dielectric strength decreases and the leakage current increases 50 to 100 times. Before final breakdown to destruction, the film allows a large current, of density 10 mA/cm^, to flow. 4.8.4. Electrical conduction Electrical conduction in thin nitride films has been studied using I-V recordings (see Chap. 5 of Vol. 1 for more details on I-V techniques). Since the gap width of Si3N4 is smaller than that of Si02, one expects and observes higher leakage currents in MNS devices than in MOS devices. Figure 1.34 shows the typical leakage current characteristics of a thin nitride layer [135].

Fig, 1.34 ' Leakage current flowing at room temperature through a IS-nm-thick plasmagrown nitride film. (After [135] slightly modified).

10

11

12

13

14

Applied voltage (V)

Silica, Silicon Nitride and Oxynitride Thin Films

53

The linear parts of the Log J(A/E ) characteristics observed at high electric fields (see Figs. 1.35) shift rightwards for samples produced at increasing substrate temperatures (as shown in Fig. 1.35 a) and RF power densities (Fig. 1.35 b) [124]. The linear relationship observed between Log J and V E in the higher field region suggests that electronic conduction in nitride films is either controlled by Poole-Frenkel emission or by Schottky emission (see Chap. 9 of Vol. 1 [lOe]) whose equations are recalled next: J Pf = CEexp

(Poole-Frenkel emission)

kT

^^o^d 1/2

/ ^ = AT exp

kT [ ^

(Schottky emission)

ne^Sd

where: C is a constant which depends on the trap density, A is the Richardson coefficient, O B is the Poole-Frenkel barrier height (obtained from an Arrhenius plot of the leakage current for a constant electric field strength such as that of Fig. 1.36 a), O'B is the Schottky barrier height, E is the electric field and 8o and £d are respectively the permittivity of free space and the dynamic dielectric constant of the nitride (calculated using I-V characteristics).

E o <

/

F(b)

(a)

-^ -^ Ao 1

;

10

/ ' / ," A A / / /

in

.'^

c o

A

X3

K

/ / / / / /

l

/

J

• Temp. C*C) as-grown/ annealed 250 a 300 ^ 350 o «

•

/

1 1

L

i1 1 1

1

,

I

,

,

,

1

1 I 1

' 1

ni

/ a

L

/1

1 '

f

1

'

0

1

i y» A.'

1

L.

I

t

i 1

3

t

P A% ^

7

[•

L A

.^•°

^

4k

c 10 8 o O

,°AiA^

/ /

' 1

1

1

I 1

'

'

1 1 '

1

M. I 1

•A ^*'Power (W/cm ^ ) ^ * as-grown/annealed

n -A • Q ''^ Jk -J

0.51 0.85 1.19 1

n -^ 0 1

• 1

1

(Fleld)^ ^2 po ^(V/cm) ^ '^ \ Fig. 1.35 ' The current density flowing through thin nitride films is plotted as a fiinction of the electric field strength for several samples: (a) samples grown and annealed at various temperatures and (b) samples grown and annealed at 350°C for various RF power densities. (After [177] slightly modified).

The Arrhenius plot of the leakage current is illustred in Fig. 1.36 a and indicates that electronic conduction in nitride films follows the Poole-Frenkel emission in regions both below and above 80°C. The change in slope, not fully understood, could correspond to a change in material structure. Constant 8^ decreases from 4.5 to 3.6 with increasing measurement temperature.

54

B, Balland and A, Glachant Temperature 150 100 -5

10

h

50 .^''

(""C) 25 H4.5 c ••H4.0 c(0

E o

o o

E -6 o1 0

\

<

\

C

o 35 1 0 c o ^

-8

3

o

-9

10


E

[- Temp = 350°C P = 10 W/cm2

o

C

1 h o

rff2.5

3.0

3.5 0.5

(a)

10 ^ /T (K ^)

( b)

1.0

Power density (W/cm

)

Fig. 1,36 (a) - Arrhenius plot of the leakage current flowing through a thin plasma-grown nitride layer for a constant electric field strength (E = 3.7 x l(PV/cm) (bottom) variation of the dynamic dielectric constant with measurement temperature (top), (b) - The dielectric strength of a thin plasma-grown nitride film is plotted as a function of power density, (after [134] modified).

4.8.5 Characteristics of short-channel MNSFETs • In the example given next, a nitride film with a thickness of 7 nm or 9.5 nm has been used in a "silicon gate" technology to fabricate n-channel MNS field-effect transistors (MNSFET) with higher performances. The resulting structure is shown in Fig. 1.37 a. The poly-Si gate electrode deposited on top of the nitride film can be fully doped since the thin nitride film acts as a perfect mask against diffusion. The channel length and width of the MNSFET are respectively 0.8 and 20 |Lim. The depth of the source and drain junctions is 0.4 |im, (junctions are obtained by a phosphorus diffusion from a PSG film). The resulting ID(VD) characteristics are shown in Fig. 1.37 b. (The negative threshold voltage of - 0.15 V is due to the relatively low acceptor concentration (3 1015 cm-3) of the substrate and to a film thickness of 9.5 nm. However, an enhanced mode of operation could easily be achieved). • A very large transconductance of about 2 |imho (2 juSiemens), calculated for a gate voltage of 1 V, and a drain voltage of 4 V, yields an effective electron mobility above 800 cmW.s. This practical application could be useful as a short-channel FET because a thinner gate insulator film, with a larger dielectric constant, is effective in eliminating the so-called shortchannel effects, and since it is thin, minimizes electron trapping. • The leakage current flowing through the gate insulator may be as small as that of a pn junction (see Fig. 1.38). Such acceptably small values of leakage current make these thin nitride films usable as DRAM capacitors.

Silica, Silicon Nitride and Oxynitride Thin Films

55

poly-Si Gate

Source

y///////A

Thermal Nitride As"*" Implanted p-Si{IOO) Fig. 1.37 - a) Cross-section of an FETwith an effective channel length of 0.8 fjm and using a thin nitride film as gate insulator, b) IDS (^DS) characteristics of the corresporuiing MNSFET (see text). (After [134]). 10

•8

I <

-10

r 10 S 0

10

10

-12

L = 3 |Lim

L W = 20 ^im L tN = 7.3nm r

-14

/•-VG<0

Fig. 1,38 - Typical gate leakage current of an MNSFET (After [134] slightly modified).

VG>0-Hh/^ 1

O

1

\

I

\ Z ±5

\

\ \

\1 ±10

Gate voltage (V) A.9. CONCLUSION

Good quality ultra thin (< 10 nm) nitride films can be thermally grown on silicon using a pure nitriding ambient. These films have a high mass density and display a good uniformity. Although their thickness is limited, their physical, chemical and electrical properties are of great interest. They are moreover free from instabilities caused by carrier trapping at the Si3N4-Si interface which are encountered with other types of nitride. Compared to other thin insulator films, thermal nitrides have attractive properties: • they have a large dielectric constant (which allows for a larger capacitance per unit area), • they behave as electrically stable chemical passivators, • they are good diffusion barriers (which is the basis of the LOCOS process). These unique properties have led to the production of a large variety of new devices of which we list a few below: • capacitors for RAM structures, using 20-nm-thick thermal nitrides [135], • MIS transistors with L^ff values of 0.5 |am, using a 5.3 nm-thick plasma-assisted thermallygrown silicon nitride film [20], • MIS switching devices, using a 3.5-nm-thick thermal nitride [144], • Si-FETs used in the address matrices of liquid-crystal display panels [111].

56

B. Balland and A, Glachant

5. SILICON OXIDE FILMS THERMALLY NITRIDED IN AMMONIA In order to take advantage of the passivating and masking properties of Si3N4, while retaining the excellent electrical properties of the Si-Si02 interface, several ways of nitriding silica have been developed. The idea is to convert the top (surface) layer of the oxide into a nitride-like structure while keeping the almost perfect Si02-Si interface. The obtained films display unique properties which we present next. 5.1. THE NITRIDATION METHODS

Silica layers can be nitrided by direct exposure to gaseous NH3 at high temperature (800X"1200°C) using high or low pressures of anmionia (HP: P(NH3)« 1 bar, [19-21, 152, 178-214], LP: 10-6 mbar < P < 10-1 mbar [215-221, 231-233]). The plasma-assisted nitridation (in N2 or NH3) of thin silica films is also possible [229]; typical process parameters being then: P - 10-2 mbar, RF power ~ 600 W, T - 950°C. By using either process, the top (surface) layer of the oxide turns into a more or less perfect silicon nitride. The film thus obtained is called a nitrided-oxide film (abbr. NO film). Finally, the nitridation of thin silica films is also possible using a Rapid Thermal Nitridation (RTN) process. This technique is described in Sect. 7. 5.2. THE HIGH-PRESSURE (HP) NITRIDATION PROCESS

For all practical purposes, the only ambient that allows the easy and controllable nitridation of an oxide is gaseous NH3. Gaseous N2 does react, to a slight extent, with silicon at the oxide silicon interface, but high temperatures (> 1000°C) and long nitridation times (several days) must be used to obtain a sizeable result. To study nitridation in NH3, long nitridation times associated with high temperature have often been used. For example, Pan [234] and Moshlehi and Saraswat [216] showed the characterization of nitrogen concentration in a 10-nm oxide film after a nitridation time of 2 h at 1200 X . Hayafuji and Kajiwara [85] worked at 1100 °C for 5 h and Chang [180] studied a 17-nm oxide film after a treatment at 1150 °C for 6 h. All these results show that with this Idnd of treatment, the nitrogen concentration is constant throughout the film thickness and ratio [N]/[N + O] is around 40%. From these many results, it is possible to find evidence that such parameters as ammonia pressure, nitridation time, and nitridation temperature have an influence on the nitrogen concentration in the oxide layer, but it is difficult to deduce the quantitative relationship between the preparation conditions and the nitrogen concentration. 5.2.I. A phenomenological description The thermal nitridation of Si02 leads to the substitution of oxygen atoms by nitrogen atoms coming from the nitriding gas. The nitriding species diffuse through and react with the silica film following complex mechanisms which we attempt to clarify below. The obtained results depend on the nitridation time and temperature and on the initial oxide thickness.

Silica, Silicon Nitride and Oxynitride Thin Films

*»

57

O(KLL) Si(LVV) »*

Fig, 1.39 - Auger in-depth profiles (arbitrary units) of NO films fabricated using different experimental conditions (oxide thickness = 20 nm). (After [177]y slightly modified) (1) Illustration of the influence of nitridation time tfor: T = 1000°C, P(NHs) = I bar. (a)t= 10 min, (b) t = 90 min

J=_ Sputter

time

(h)

Si

Si

.-••K

13

(b)

V-

s.-./ Fig. 1.39 (cont'd) (2) Illustration of the influence of nitridation temperature Tfor: t = 60 min, P(NH3)= 1 bar. (a) T = 800°Q (b) T = 7i(50°C

interface—t>l *

interface-

•J/

o

N

T /1\

\

• I•

t

# #

<

:^j^

0 (a)

!k:i 6 Sputter

•^•^*.

0

2

time

(h)

(b)

Figure 1.39 illustrates the influence of nitridation time and temperature. The in-depth concentration profiles of oxygen, nitrogen and siUca have been measured by Auger electron spectroscopy. Figure 1.39 (top) shows that for a short nitridation time (t = 10 min) and a thin oxide (t^x = 20 nm) nitrogen is encountered both at the silica surface and at the Si02-Si interface. As nitridation proceeds, [N] increases not only at the surface but also in the bulk, while [O] decreases accordingly. Figure 1.39 (below) shows that nitridation is more thorough when nitridation is carried out at higher temperature for similar nitridation time (which was to be expected). Figures 1.40 (1) and (2) illustrate the influence of oxide thickness. The in-depth profiles of oxygen, nitrogen and silicon show that the thicker the oxide, the smaller the amount of interfacial nitrogen. Figure 1.40 (3) illustrates that even a prolonged (6.5 days !) nitridation in pure N2 only leads to the incorporation of a small amount of nitrogen at the Si02-Si interface, which explains why, for practical reasons, NH3 is being used instead of N2.

58

5. Balland and A. Glachant

i^^)

^ 0

1 .-^"

interface->

^#-••"1 *'

"^

(3)

•••.^

^

• •

0

^

1

• ^>

3

•

• § • • • • aM •

%

•

1 1

11

.\ % %

SL

•

.- • • • • • •ta• • • # ^ •

1 V,.L?>t4.'-r—r 2 0 .2

8

(2)

,

V'

3

<

10

O Si i:*'

:v..•f--\

12 14 16

• 1 • •• 11 •'

•

,<

X. I \

1

!

interface\-H •*

N

'-•—»^

1 .•

interface«->| •

U«B*a««ai

1 •

1 v/

•1--I 1 J - ..-'ll--.*-1 i-^'*«-i""r' 24 30 Sputter time (h) ^

Fig. 1.40 - Auger in-depth profiles (arbitrary units) of NO films fabricated using different experimental conditions. These profiles reveal the influence of the initial oxide thickness: (1) 45 nm, (2) 119 nm (T= 1160°C, P(NHs) =1 bar); and the influence of the nitriding gas ambient (3): P(N2) = 1 bar (T=1000''Q t = 6.5 days, oxide thickness = 10 nm). (After [177] slightly modified).

5.2.2. Main features of the nitridation process A careful study [198] of how the [N] in-depth profile varies with short nitridation times (0.5-120 min) has yielded (see Fig. 1.41) the following information: (i) At the oxide surface The reaction is very fast leading to values of [N] « 6 x 1015 cm-2 for nitridation times below 15 min and, simultaneously, to a depletion of oxygen. (ii) In the oxide bulk [N] continuously increases with time, while simultaneously [O] decreases (thus confirming that an exchange reaction between O atoms coming from the oxide film and N atoms coming from ammonia indeed takes place [173]). (iii) At the SiOz-Si interface The nitrogen-rich species first react with interfacial silicon and form the nitrogen pile up. This step occurs well before any nitrogen is incorporated in the bulk oxide. The maximum of the nitrogen pile up is observed to shift towards the bulk oxide as nitridation proceeds. This shift has been attributed to a re-oxidation of the silicon surface (Si (100)) in the interfacial region by the oxidizing species produced upon reaction in the oxide bulk. Up to - 30% of these oxygen species could participate in the interfacial reoxidation.The remaining species are thought to diffuse through the insulator up to the surface where they escape in the reactor.

Silica, Silicon Nitride and Oxynitride Thin Films

59

I [N]

[O]

[Si]

0 Depth

Fig. 1.41 - Auger in-depth concentration profiles of [N], [O] and [Si] obtained for various nitridation times. (T= llOO^'C, PiNHs) = 1 bar, oxide thickness = 10-40 nm) (Dt = 30s ®t = 60s (E>t = 15 min ®t = 30min ®t- 60min @t= nOmin (After [198] slightly modified).

-20 (nm)

The nitridation of bulk Si02 is believed to be unaffected by the existence of macroscopic stresses which are intrinsic to the Si02-Si system [202], whereas the nitrogen pile up has been attributed to a preferential reaction of NH3 with the interfacial oxide layer under tensile stress [192]. The fact that [N] at the Si02/Si interface is reduced for thicker oxide layers [177], indicates that the nitridation process in NH3 is limited by the diffusion of the NH^ species through both the oxide layer and the oxynitride layer being formed. Nitrogen in-depth profiles have been fitted using the solution of the classical diffusion equation (erfc) from the surface down to the interface, while taking into account the reflection and back scattering of the nitriding species [189]. The diffusion coefficient has been estimated to be « 10-16 cm2 s-l, regardless of the nitridation temperature and film thickness. 5.2.3. Proposed nitridation mechanisms Nitridation in pure N2 is found to be nearly impossible. This is confirmed by the fact that a direct reaction between Si02 and N2 is not thermodynamically favorable [177, 188] and that an implantation of N atoms into Si02, followed by an annealing at 1100 °C, only leads to the nitridation of the silicon substrate. The fact that nitridation is possible with NH3 while nearly impossible with N2 seems to indicate that hydrogen plays a role in breaking the Si-O bonds.

60

5. Balland and A. Glachant Two models for such a bond-breaking mechanism have been proposed:

First model It has been proposed [20d] that the nitridation of Si02 proceeds via the following reaction: 3 Si02 (s) + 4 NHs (g) - ^ Si3N4 (s) + 6 H2O (g)

(1.6)

More precisely, the following reactions are expected to take place [177]: NHs^NH^ + Hs.x

(l<x<3)

(1.7)

NHjc + ^ Si'O'Si = ^ = Si-NHx - 0-Si = ^ = Si-NHjc-ySi = + HyO

(1 <x <3)

(1.8)

Since water can easily escape into the anmionia ambient, a surface reaction is expected to be more favorable than a bulk reaction. Likewise, at the interface, the oxidizing species resulting from the nitridation reactions may be consumed by the subsequent oxidation of the silicon substrate. Other reasons behind the increased reactivity encountered at the Si02/Si interface may be due to the capture of hydrogen, originating from the decomposition of anmionia, by the SDBs and by the strained Si-Si bonds present in that region [177]. In the 1000-1160°C temperature range, the reaction could be limited by the (difficult) diffusion of NHx species through the top oxynitride layer, while at lower temperature it might be limited by the activation energy necessary to convert oxide into nitride. Figure 1.39 b clearly shows that [N] depends indeed on T. Second model A nitridation mechanism in two steps has also been proposed [20 d, 134, 187]. It includes: (i) the diffusion of NHx species to interstitial sites which are all uniformly occupied, followed by (ii) the migration of the NHx species from interstitial sites to substitutional sites. Nitridation could proceed via the following reaction, more likely to occur than (1.6). 2 Si02 (s) + 2 NH3 (g) - ^ Si2N20 (s) + 3 H2O (g)

(1.9)

5.3. THE MAIN PHYSICAL PROPERTIES OF HP-NO FILMS Let us now review some of the physical properties of the thin NO films produced by the HP process. 5.3.1. Etching characteristics The (chemical) etching rate of NO films is found to depend on the nitrogen content. This rate approaches that of pure silicon nitride when the NO layer contains a large concentration of nitrogen. Figure 1.42 shows the etching characteristics of NO films obtained by reaction at 1000°C of thermal Si02 films with anmionia for respectively 5 h and 17 h. No difference is observed in the slope of the etching characteristics between the two NO samples. This indicates that chemically passive layers of different thickness, but both having a very small etching rate have been formed at the surface [20d, 228].

Silicay Silicon Nitride and Oxynitride Thin Films

61

Using an HF solution, precise chemical etching depth profiles have been recorded [21c]. These profiles have been related to the [N] depth profile of the NO film, in good agreement with the results of classical Auger in-depth profiUng technique. 200 HF/NH4F = 1/10 150 0)

18 100 c

* £

• -

\

\

50 I-

17h \

5h \ 4

\

Fig. 1.42 - Etching characteristics of two NO films in a solution of NH4.HF = 10:1 (a) reference Si02film (b) NO film (lOOO^'C, 5h in NH3) (c)NOfilm(1000°CJ7h in NH3) (After [21 c] slightly modified)

SiO. Nitroxide -J-

200

400 600 Etching time (s)

5.3.2. Resistance to oxidation Thin NO films, just like nitride films, display lower oxidation rates than thermal oxide films do. Resistance to oxidation in dry O2 increases with nitridation time and temperature. Typically, a 1-nm-thick oxide layer is formed when an NO film, resulting from the nitridation of an Si02 film at 1150°C during 1 h in NH3 [235] is re-oxidized in dry O2 at 925°C. The oxidation rate of NO samples whose surface has been partially etched in HF is found to be practically the same as that of the non-etched samples. This shows that the nitrogen-rich interfacial layer is the most likely contributor to the oxidation resistance [185]. Just like nitride films, NO films display a much smaller resistance against wet oxidation, than against dry oxidation [164]. 5.3.3. Resistance to irradiation The irradiation of a MOS structure by y rays, using a 6OC0 source, generally leads to the build-up of a positive space charge at the Si02-Si interface. This phenomenon is due to the generation of electron-hole pairs and to subsequent hole trapping on electrically active defects of the Si02-Si interface. The resistance of NO films to y-in-adiation is observed to be two to three times greater than that of conventional oxides [187]. This could be due to a passivation of the interface defects, existing prior to nitridation in the oxide film, by nitrogen species diffusing during nitridation. The small number of remaining interface traps is thus insufficient to capture the irradiation-induced holes. For MIS transistors using a 10-nm-thick NO film as gate insulator, bombarded by energetic electrons (dose = 1 Mrad), only a small Vx shift (< 0.03V) and a small reduction in carrier mobility (< 16%) have been measured [236].

B, Balland and A, Glachant

62

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5 10 20 40 100 Dose

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Fig. 1.43 - Illustration of the effects of irradiation (using 1.5 MeV electrons) on 500-nm-thick pure and nitrided oxide films and on their electrical properties: (a) Normalized High-frequency C-V curves (oxide film: —; NO film: —), dose = 10 krad(Si), gate bias during irradiation = +12V, Arrows point from non-irradiated to irradiated curves; (b) Positive fixed oxide charge versus dose; (c) Interface state density measured at mid-gap versus dose (oxide • ,
Moreover, 500-nm-thick NO samples, irradiated by 1.5 MeV electrons [186-187], exhibit Dit values which are two orders of magnitude less than those measured on the reference oxide film, as illustrated in Figs. 1.43a and c. The evolution of the fixed charge density is comparable to that of the oxide (Fig. 1.43 b), while the MISFET with the NO film exhibits a shift in Vth which is smaller than that measured for the reference oxide (see Fig. 1.43 d). The same behaviour has been observed for 10-nm thick NO films exposed to an electron flux depositing a dose of 10 Mrad [236].

Silica, Silicon Nitride and Oxynitride Thin Films

63

5.3.4. Resistance to impurity diffusion Compared to conventional thermal Si02 films, NO films constitute a good barrier against impurity diffusion. For example no boron diffusion can be detected in MISFETs possessing an NO gate insulator after an annealing at 250''C (Ih) of the boron-doped polysilicon gate electrode [235] and even after an annealing at 1100°C (0.5h) [20 f]. 5.4. THE LOW-PRESSURE (LP) NITRIDATION PROCESS

5.4.1. The various LP processes The HP nitridation technique (carried out in NH3 at atmospheric pressure or above, using long nitridation times), which we reviewed in § 5.3, suffers from an inability to control the spatial distribution of nitrogen in the oxides and, consequently, the defect density in the bulk oxide and at the Si02-Si interface. Low pressure (LP) processes have also been studied and used. Although nitridation times are longer, LP processes allow a good control over nitrogen incorporation into silica. There exist basically two processes to accomplish the LP nitridation of silica: in a low-pressure NH3 ambient (abbr. LP) or in a low-pressure NH3 plasma ambient (abbr. LP-PE). • LP thermal nitridation with or without plasma The furnace depicted in Fig. L44 can be used both for nitriding the Si02 films at low pressure (unassisted) and for plasma-enhanced thermal nitridation. Two electrodes are used to capacitively couple the RF power and the plasma discharge, if desired. Quartz

RF generator (13.56 MHz) Heater elements Q Q Q g Q 0 Q

0 0 0 0 0

Heater elements RF Discharge plates

Wafers on quartz boat

¥

Vacuum door

To mechanical vacuum pump

Fig, 1.44 - Schematic cross section of a furnace used for nitriding oxide films: a typical nitridation is carried out at 950°C in NH3 (P(NH^) = 1 mbar) or in a NH3 plasma ambient for 2 hours. (After [22] slightly modified.)

• LP thermal nitridation in a UHV environment Ultra High Vacuum is mostly used to study the nitridation process itself. For example, the nitridation of 13-nm-thick thermal Si02 samples has been studied in an UHV environment as a function of: temperature (850-1 ISO'^C), ammonia pressure (IQ-^-lO-l mbar) and nitridation time (t < 15 h), using AES, XPS, SIMS, Raman and IR spectroscopies [215-220, 223, 237].

64

B, Balland and A. Glachant

• LP plasma-enhanced thermal nitridation The nitridation of thin silica films can be performed in a N2 or NH3 plasma at temperatures ranging from 300 to 700°C [232]. The plasma is ignited by a 90-450 kHz RF generator. The frequency range is chosen well below the ion transit frequency (« 4 MHz [229]), to maximize the ion bombardment of the film. The RF power can be chosen between 400 to 1100 W. The [N] and [O] in-depth profiles measured by AES (as illustrated in Fig. 1.45), reveal: an enhanced nitridation at the surface of the oxide, little nitrogen incorporation in the oxide bulk, and the existence of a small nitrogen pile up at the Si02-Si interface, when NH3 is used, or the formation of a near-homogeneous oxygen-rich oxynitride, when N2 is used [232]. The ion bombardment of the substrate is found to enhance the nitridation process. These profiles have been confirmed by etch rate measurements [232]. 100 ^80 c60 o

1

S 40

u c

o

^20

4 6 Sputter time (min)

0

8 12 16 Sputter time (min)

(b) (a) Fig. 1.45 - In-depth concentration profiles (based on Auger Electron Spectroscopy) of nitrogen and oxygen measured in a 10-nm-thick plasma-enhanced nitrided oxide, (a) For a nitridation performed at 925°C for 2 hours, (b) For different nitridation times (Ih, 3h, 6h). (After [18] and [232] slightly modified).

5.4.2. Composition of LP-NO films In the case of LP and LP-PE thermal nitridation in ammonia, [N] and [O] concentration profiles are shown to be complementary* . This fact could indicate that in the nitridation process nitrogen simply replaces oxygen in the silica matrix. However, all the trends conceming the evolution of the nitrogen concentration which we describe in the following, remain accurate whatever the mechanism involved in LP nitridation may be. In particular, this approach demonstrates that the nitridation of an oxide leads to the formation of three distinct zones: surface, bulk and interface. • Below the oxide surface The composition parameter of the region undemeath the surface of the NO film can be assessed by using the INAIN + lo) ^^^tio of the Auger N and O peaks. This ratio measures the extent of nitridation in this region. For a nitridation at T = 1100°C and * When the ratio of the AES sensitivity factors between O(KLL) and N(KLL) is taken to be 1.6 as in an oxynitride.

Silica, Silicon Nitride and Oxynitride Thin Films

65

P(NH3) =10-1 mbar, it has been observed that the composition parameter first increases rapidly and then saturates, while simultaneously, the main Si(L23VV) Auger transition shifts from the Si02 energy location up to a position which is near that expected of Si3N4 (see Fig. 1.46 a). Hence, the LP nitridation of Si02 in pure ammonia leads to the formation of a nitrogen-rich oxynitride layer in the surface region of the oxide sample. The surface peak is found to be independent of film thickness and increases at a rate which depends on the square root of time. This is characteristic of a process limited by the diffusion of the reactive species. The peak reaches its maximum when nitrogen replaces about 80% of the oxygen atoms. Then, the nitrided surface layer spreads over about 5 nm. The surface reaction is found to be weakly thermally activated. In the case of LP-PE nitridation, the surface reaction is not affected by a further increase in the RF power beyond 600 W. The evolution of the composition parameter with time for different T values at P(NH3) = 10-1 nibar and for different P(NH3) values at T = lOOOX is shown in Figs. 1.46 b, c respectively. For sufficiently large nitridation times, a substantial nitridation of the surface region of the oxide can be achieved for P(NH3) > 10-3 mbar. For T = SSO^'C, the composition parameter remains appreciably smaller than the mean value measured for T > 950°C. The XPS peaks for Si (Si 2pi/2 3/2) reveal that the chemical environment of Si atoms is more varied in the case of oxynitrides than in the case of nitride or oxide [141c, 219].

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66

B. Balland and A. Glachant

100

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Fig. 1.46 - Illustration of the LP-nitridation kinetics of a set of 13-nm-thick Si02 samples placed in a pure NHj ambient: (a) Variation of the composition parameter with nitridation time (top) and shift of the corresponding Auger Si(L23W) energy peak (below) with t for T= 1100''CandP(NHs) = lO-l mbar; (b) Variation of the composition parameter with t for P(NHs) = 10-i mbar and various T>850°C (c) Variation of the composition parameter with t for T=1000°C and P(NH3) = 10-^ (0), 10-3 (o) and lO-i mbar (o). (After [219] slightly modified).

ARXPS (Angle-Resolved X-Ray Photoelectron Spectroscopy) experiments reveal in fact that NH^ species (together with SiN species) exist near the nitrided oxide surface. IR absorption spectra from the same samples confirm the existence of N-H bonds which have been assigned to amine (NH^) groups, as expected [199]. • SIMS analysis of the hydrogen content (not shown in Fig. 1.47 b.) reveals the existence in the surface region of a concentration of ~ 10^1 - 10^^ H atoms/cm^. The in-depth [H] profile is similar to that of [N] but with no evidence of an H pile up at the Si02/Si interface [217-219]. These last results confirm previous NRA measurements [190], showing that the hydrogen content of NO thin films, using the LP process, amounts to 1-3 at. %. • In the bulk In-depth [N] profiles can be measured both by AES in conjunction with Ar+ sputtering (see Fig. 1.47 a) and by SIMS (see Fig. 1.47 b). These profiles reveal a nitrogen enrichment and an oxygen depletion below the surface region of the NO samples, where a thin inhomogeneous oxynitride layer has been formed. The nitrogen content is found to decrease rapidly with depth. • At the interface A very small nitrogen pile-up, concentrated within a few monolayers from the interface is generally found near the Si02-Si interface, as shown in Fig. 1.45. The [N] concentration at the interface is found to be independent of the film thickness and to increase linearly with time. It is smaller than in the case of HP processes. The pile-up is only governed by the interface reaction. The temperature has no influence on the interface reaction. The increase in plasma power induces a linear increase in the nitrogen concentration at the interface. These results are of great interest for technological applications. It is possible to tailor the nitrogen distribution in the oxide layer by varying the experimental conditions. The physical and electrical characteristics strongly depend on the type of nitridation process used. For example, plasma nitridation furthers a surface nitridation with very few nitrogen atoms in the oxide bulk or at the interface. The resulting NO samples thus exhibit minimum interface states.

Silica, Silicon Nitride and Oxynitride Thin Films

67

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Fig, 1.47 (a) - AES depth profiles of nitrogen (in arbitrary units) recorded in NO films, obtained in conjunction with Ar'^ sputtering (two sputtering rates have been chosen in order to check for sputtering artifacts (1 nm/min (0) and 0.2 nm/min (O)); nitridation conditions: P(NHs) = 10'^ mbar, T = 1024''C t = 10 h). (b) ' SIMS profiles (in number of counts per second) recorded in NO films, of Si-N and N-O groups (nitridation conditions: P(NH^) = 10-^ mbar, T = 1045''C, t = 4 h). (After [141c] slighty modified), (c) - Auger profiles and simulated nitrogen concentration of an LP-PE nitrided oxide (16 nm thick). It shows that plama nitridation mainly transforms the surface region [219].

B. Balland and A, Glachant

68

5 A3. Proposed nitridation mechanisms The fact that the increase in [N] is accompanied by a simultaneous reduction in [O] in the same probed region, as shown by AES, reveals that during the nitridation process nitrogen atoms replace oxygen atoms. As previously discussed (in § 5.2.1), amine NHx groups are essential in the nitridation of Si02. It has been proposed [238-239] that higher-order amine groups (x < 3), and eventually nitride species form at the expense of amine groups while oxygen is lost in the form of water. ARXPS analyses [141c] confirm this prediction. Experimental results are consistent with a reaction of NHx groups with the oxide film, this reaction being limited by the diffusion of nitriding species through the nitrided layer and by water elimination: water must be eliminated from the system to maximize the amount of nitrogen incorporated in the film. At the surface, the reacting nitrogen species are nitride, amine, and molecularly adsorbed ammonia groups. In the bulk, the concentration of nitride groups vanishes while a relatively larger concentration of amine groups is observed with increasing depth. Compared to the HP process, the LP process clearly leads to an enhanced superficial nitridation of Si02 while the nitrogen pile-up at the Si02-Si interface is very small (very often undetectable (see Fig. 1.47 a)). The enhanced nitridation in the surface region can be attributed to various complementary factors listed below: 1/ Water is more easily eliminated in a particularly dry and low-pressure anmionia ambient than in the bulk of the insulator. This furthers the reaction between NH3 and Si02 (see Fig. 1.48 a). 2/ The diffusion length of the reacting species is smaller at LP than at HP. 60 at(%)

ou 1

^40

o

s

v. 0 40 \ c

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-- 40 c o o c -

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at(%)

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20 30 H 2p Percentage

a>

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^ ^ 1

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:

: ^ J 0 3 4 Depth (nm)

8

Fig. 1.48(a) - Superficial nitrogen concentration vs. H2O percentage in the gas phase for two nitridation times: t = 2h(m)and7h (o) (T = 1050°C, PiNHs) = IQ-^ mbar); (b) Corrected [N] in-depth profile (o) deduced from a measured AES depth profile (*) (T = 1050°C, P(NHs) = IQ-' mbar, f « 7 /i). (After [219]).

Silica, Silicon Nitride and Oxynitride Thin Films

69

3/ The diffusion coefficient of NHx decreases rapidly in the reacted layer due to the N enrichment, as previously proposed [177] (the diffusion coefficient of nitrogen in Si3N4 is only « 10-2^ cm^ s"! at 550°C). This implies that the diffusion coefficient of the observed amine groups, diffusing through the reacted layer, decreases with increasing [N] and consequently decrease with nitridation time. An apparent diffusion coefficient for various [N] values has been roughly estimated using the [N] in-depth profile corrected for experimental artifacts (see Fig. 1.48 b). At 1050°C this coefficient has been found to decrease from « 10"l^ cm^ s'l down to « lO-^^cm^ s"^ when the superficial [N], expressed in atomic concentration, increases from 15 up to 56 at %, i.e. practically the [N] value expected for Si3N4 [141c, 219]. 5.5. T H E MAIN PHYSICAL PROPERTIES OF L P - N O FILMS

No significant difference in physical properties is observed between LP and LP-PE nitrided oxides. The specificity of plasma-enhanced nitridation, is that nitrogen can be incorporated below the oxide surface while minimizing its amount in the oxide bulk and at the interface. This explains the excellent transport properties encountered in both n and p-channel devices using LP-PE nitrided gate oxide films as shown further on. 5.5.1. Optical refractive index The refractive index moves to higher values when nitridation time increases. The mean index values are 1.47, L57, 1.64 and 1.69 for the different treatment times of 0, 1, 3, and 6 h, respectively. The largest part of this modification occurs at the beginning of nitridation [232].

ior

r® 33n

c /

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\

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a 6 1

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\/ \» *

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f

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f

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0 1

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^

J, ^ y

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:

4 6 8 Etching time (min)

Fig, 1.49 - Effect of nitridation time on the etch rate of lO-nm-thick silicon dioxide films dipped in a buffered HF solution: ® as grown; ® nitrided for I h; d) nitrided for 3 h; ® nitrided for 6 h. (After [232-233] slightly modified).

70

B, Balland and A, Glachant

5.5.2. Etching behavior The etching behavior of LP-NO films dipped in buffered HF solution (100: 1 = NH4 F: HF) agrees with the Auger analysis. Three distinct nitrided zones are observed: the surface, the interface and the bulk. The resistance to etching observed at the surface and at the interface is due to the presence of nitrogen in both regions. The major portion of nitrogen is concentrated at the surface and the nitrogen content, in every region, increases with the nitridation time. A precise determination of the thicknesses of the three zones can be deduced from the large difference in the etch rate observed between the nitrided and the non-nitrided region, as visible on Fig. 1.49. 5.5.3. Resistance to oxidation NO samples grown at low pressure exhibit a good resistance to oxidation. Authors have reported that two 13-nm-thick films: an NO film (nitridation conditions: T = 1075°C, P(NH3) = 10-1 mbar, [N] « 56 at. %) and its SiOi reference were simultaneously oxidized (oxidation conditions: T = 1000°C, P(02) = 10^ mbar, t = 45 min) [240]. The resistance to oxidation was assessed by measuring the increase in film thickness, taking place upon oxidation, using the AES in-depth profiling method. The oxide sample was found to be « 50 nm thicker than the NO sample (in which nitrogen was hardly detectable after oxidation). 5.5.4. Resistance to irradiation The effect of bombarding, with 3-keV electrons (electron flux = 2 x 10^^ cm-^s"!), Si02 films before or after nitridation (T = 1050°C, P(NH3) = 10"! mbar, t = 6 h) has been studied [240], as a function of irradiation time (tin- < 13 h). For the pure Si02 film, a chemical reduction of the surface region of the oxide film (characterized by the breaking of Si-0 bonds followed by the migration and/or the desorption of O atoms) is found to occur for tin- « 1 h, i.e. for an electron fluence of « lO^^ cm"^ (as expected [241]). The reduction rate increases continuously with tin- until saturation is reached, i.e. after tirr - 4 h. The NO films reveals the same behaviour as the oxide film during the first hour of irradiation, but, its reduction rate reaches first a maximum value, which is one order of magnitude less than that of the oxide (1 h < tin- ^ 1-5 h), and then decreases down to zero (tin^ « 3 h). During the same period, [N] in the surface region decreases from « 46 at. % (tin= 0) to a constant value of ~ 15 at. % (for tin= 6 h), while [O] increases first and then saturates (for tin = 6 h). This behaviour has been explained by the electromigration, in a nonuniform electric field [227], of O and N ionized species resulting from the electron-induced breaking of the Si-0 and Si-N bonds. 5.5.5. Resistance to impurity diffusion An LP-NO film, just like a nitride film, constitutes a good barrier against the diffusion of impurity and doping atoms. The ability of NO films to prevent boron diffusion has therefore been investigated.

Silica, Silicon Nitride and Oxynitride Thin Films

71

Boron profiles in the Si substrate, resulting from boron atoms diffusing from a borondoped poly-Si electrode through the gate oxide, can be analyzed by combining a spreading resistance profiling (SRP) technique and SIMS. As illustrated in Fig. 1.50, NO films are effective in slowing down boron diffusion. 0

"iio^^ \ N. >-^ c o

® \

\

Fig. 1.50 - Boron profilesy measured in a p-type substrate, resulting from the diffusion of B atoms through a J-nm-thick film during 6 h at 970°C (D nonnitrided oxide; ® oxide nitrided in an NH^ plasma during 10 min at 900''C. (After [231]).

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In the example illustrated in Fig. 1.51, MOS and MNOS capacitors have been fabricated using either aluminium or boron-doped polysilicon gate electrode material. After an annealing in H2 at 450°C (30 min or 1 h), no boron diffusion can be detected in the MNOS structures, neither through the measurement of AVth nor by measuring the distortion of the C-V curves in the depletion region. The exact nature and location of the diffusion barrier have not been identified. Even if boron atoms have diffused to some extent into the dielectric, their presence has not been reported to degrade the dielectric quality [231]. u.

Q.

>—' .^ 4 0 0) 0

~ ~* -V: ""^"V^ N^'^v

c

r

30

^

20

0 CQ

y^

\

,'x^ / \ \

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^ — ®

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0 . -2.5 (a)

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Gate voltage (V)

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Fig. 1.51 - Quasi-static C-V plots of capacitors fabricated (a) with a pure silica film, (b) with an NO film: curve (D: with an A/gate, curve ® with a P* polysilicon gate [231].

72

B. Balland and A, Glachant 5.6. DEFECTS INTRODUCED BY THE NITRIDATION PROCESS

5.6.1. Defects induced in the silicon substrate During the nitridation of an oxide film, stacking faults of the silicon substrate are found to grow [175]. This phenomenon depends on the partial pressure of anmionia in the reactor. As indicated in Fig. 1.52, the diffusion of phosphorus and boron is accelerated during the nitridation of the oxide, due to the injection of interstitials in Si leading to a distortion of the crystal array [173, 176]. This result is the opposite of what is observed during the direct thermal nitridation of Si (see § 3.2.). Similar results regarding impurity out-diffusion and the growth of stacking faults during the nitridation of Si02 and Si [189] have been mentioned in Chap. 3 of Vol. 1 [10 c].

(a)

(b)

Fig, 1.52 - Illustration of the effect of thermal nitridation on the diffusion of doping atoms (a) Cross section of the test structure used, (b) Cross section after direct exposure to NHj ambient at elevated temperatures showing the diffusion zones: in zone B, B and P atoms have diffused less during nitridation. In zone C, diffusion has been enhanced compared to both zones A and B. (After [173] slightly modified).

A model based on an equilibrium between point defects (vacancies and interstitials) has been proposed [173] in order to describe this phenomenon: 1/ A thermal equilibrium exists between interstitials and vacancies in Si at high temperature. If we call [I] and [V] the concentration of interstitials and vacancies respectively, we can write: [I] + [V] <=> 0. It follows that when [I] increases (resp. decreases) then [V] decreases (resp. increases) while product [I] x [V] remains constant (at a given temperature). 2/ An interstitial supersaturation and a vacancy undersaturation appear simultaneously at the Si02/Si interface during the nitridation process. 3/ The diffusion of B, P, Ai and Ga in Si is associated with a migration of interstitials. Following this model, the enhanced diffusion of B and P, observed during the nitridation of a thermal oxide in NH3 should be due to a supersaturation of interstitials and an undersaturation of vacancies.

Silica, Silicon Nitride and Oxynitride Thin Films

73

5.6.2. Defects introduced in the silica film Nitridation introduces in silica several new defects which are not always easy to tell from regular defects introduced during oxidation. • Intrinsic defects Intrinsic defects, similar to those found in silica, are found in NO films, namely: strained and broken Si-O bonds, oxygen vacancies, non-bridging oxygen atoms, etc. (see Chap. 2 in Vol. 1 [10 b] for a more complete description). Depending on the nitridation process used, the effective density of oxygen-related carrier traps is found to be between lO^ and 1013 cm-3 [173]. • Extrinsic defects The dissociation of ammonia is a source of hydrogen contamination during the nitridation process. Hydrogen atoms and H+ ions are very mobile in an NO film. Various atoms or radicals (especially H, OH, N, N-H...) enter the silica network during the thermal nitridation process, and combine with it. If the = Si-O-Si = bond is broken because of thermal treatments, the non-bridging oxygen atoms thus generated are very mobile and combine with foreign atoms. The O atoms of the network tend to retain these impurities to form complex defects. Just like in regular nitrides, such groups as = N-H, and = N*(Nitrogen Dangling Bond) are encountered in NO films. = Si-N groups are also found (due to the substitution of an O atom by a N atom in the = Si-O bond). The nitridation of Si02 at T > 900°C in an NH3 ambient induces the generation of hole traps at the Si02/Si interface due to the presence of = Si-O groups, resulting from the Si + Si02 reaction (see Chap. 2 of Vol. 1). Power = 600 W I

10 -

s 8

• Ns

^

* Ni

V ^

Nitridation time ^-^

•


s 0 tS «n

3h

- • Ns * Nl

8

T-^

0

6 C O

1 o

4

-

2

/ /•

0 c ^0

6

''S 2 4^

4

C

^


g 2

0

/

0

n- \'-*^''^ 0 (a)

\

\

1

i-^"'"'""^

1 400

Time (h)

(b)

800 Power (W)

Fig. 1.53. - Evolution with time (a) and plasma power (b) of the nitrogen content at the surface (N,) and at the interface Ni), in a 16-nm-thick oxide nitrided in an ammonia plasma at 950°C and P(NHi) = 0.3 mbar (After [232]).

74

B, Balland and A. Glachant 5.1. THE ELECTRICAL PROPERTIES OF NO FILMS

We have seen that the HP nitridation of an oxide leads to the incorporation of nitrogen at the surface (Ng), in the bulk (Nb) and at the Si02-Si interface (Ni) and that the amount of incorporated nitrogen increases with nitridation temperature and time and with plasma power. On the other hand, the LP process leads mostly to the incorporation of nitrogen underneath the top surface of the oxide. The evolution of nitrogen concentrations (Ns and Ni expressed in atoms/cm^) with time and power is shown in Fig. 1.53. The presence of nitrogen in Si02 leads of course to somewhat modified electrical properties, which we review next. Moreover a difference in electrical behavior is expected between HP and LP nitrided oxides. 5.7.1. Dielectric constant High frequency C-V curves reveal that a nitrided film behaves like the original (nonnitrided) oxide film (as can be seen from Fig. 1.54) except for its capacitance value in the accumulation mode (Cacc) and for its flat-band voltage (VFB)- An enhancement of Cacc is systematically observed. This enhancement is explained by the increased (effective) permittivity of the NO film. As nitrogen is incorporated into the oxide, the dielectric constant of the film Er may increase from 3.9 (Er value for Si02) to 7.5 (Ef value for Si3N4).

Fig. 1.54 - High frequency (HF) and Low frequency (LF) quasistatic C(V) curves measured on a MOS structure made up of a IS-nm-thick oxide, pure or nitrided for 3 hours, an n^ polysilicon electrode and a p' doped Si substrate with an electrode area = 0.38 mm^. (After [223] modified).

-3

-2

-1

0 Voltage

+1 (V)

5.7.2. Flat-band shift A correlation between the amount and direction (negative or positive) of the flat-band voltage shift AVpB and the nitrogen distribution has been observed: AVpB depends on the nitridation methods and parameters (nitridation time t^it, T and P(NH3)) [182, 194-195]. In Fig. 1.55 a, AVpB has been plotted as a function of t^^^ (for a continuous HT LP nitridation process). We note that at first VpB decreases (increase in negative flat-band shift), thereby indicating the creation of a positive oxide charge, an effect which has been reported for plasma-enhanced thermal nitridation. The VpB value then stabilizes and finally, during a third period, increases and comes back almost to its original value.

Silica, Silicon Nitride and Oxynitride Thin Films

75

Since AVpB reflects the variations of both the fixed oxide charge and the fixed interface charge during nitridation, the interpretation of the phenomena is not easy at this stage. The complexity of the phenomena involved is further illustrated by Fig. 1.55 b where the VpB measured during a sequential thermal nitridation (i.e. nitridation by cycles of short duration: Atnit = 3 to 4 mn at the same temperature) has been plotted. In this case the final VpB value exceeds that of the original oxide !

1 2

(a)

3

4

5

Net nitridation time (h)

0 (b)

10

20

30

40

Nitridation step duration (min)

Fig. 1.55 (a) - AVfB is plotted as a function of nitridation time for a continuous nitridation mode (T = 1050°C, P = 10'^ mbar); (b) AVf^ is plotted as a function of At for a sequential nitridation mode (t^^^ = 120 min, T = 1050°Q P =10-^ mbar). (After [223]).

In both cases (continuous and sequential nitridation) the AVpB curve displays zones for which various mechanisms have been proposed. • During the first phase (i.e. for t^^^ < 30 min), initial nitridation produces electrically active defects (strained bonds, broken Si-O bonds, possibly accompanied by displaced Si and O atoms and Si-dangling bonds) which are all sources of positive charge, i.e. which all produce a negative VpB shift [177]. These defects are due to the in-diffusion of hydrogen, O-H and N-H radicals, into the oxide. This shift has indeed been correlated with the presence of Si-H and Si-OH groups, observed by analyzing the NO film by means of SIMS and RAMAN spectroscopy [217-219]. • During the second phase t^it increases and Si-N groups form which reduces AVpB by reducing the number of SDBs or by redistributing the existing defects. • During the third phase and after long nitridation times (t^jt > 90 min), the negative voltage shift is greatly reduced, as the amount of incorporated nitrogen keeps increasing. The concentrations of the main defects, namely = Si*, = Ni*, and = Si-H, = N-H, increase. AES analyses show in fact that the amount of incorporated nitrogen increases with time and temperature and that nitrogen is detected at the Si-Si02 interface [212-214].

76

JB. Balland and A, Glachant

Fig, 1.56 - Evolution of the fixed charge and generation of charge and interface traps during the nitridation of a IS-nm-thick oxide [217].

0

2

4

6

Nitridation time (h) 5.7.3. Impact of nitridation on interface states • MOS structure with w^ polysilicon gate electrode and p'Si substrate Nitridation does not significantly degrade the Si02-Si interface when the initial quality of the oxide is good (i.e. typically when Dj^ «10l^ cm-^ eV"l at mid-gap). By optimizing the nitridation conditions [217], Djt values after nitridation remain low (1 - lOxlOl^ cm"2 eV"l) as illustrated in Fig. 1.56. The incorporation of a fraction as low as 4 at.% of nitrogen* at the Si02-Si interface leads to some increase in Djj [205]. The change in material structure from Si02 to nitrided Si02, leads to a different state of bonding, stress, etc. at the interface and may be one of the causes of an increase in Dj^ upon nitridation. It is therefore desirable to keep interfacial [N] well below this value. • MOS structure with p^ (boron-doped) polysilicon gate electrode The measurement of the VpB shift as a function of annealing time, is not sensitive enough to detect any degradation due to boron diffusion but the midgap interface state density (Djt), measured by QSM reveals a strong degradation when boron diffusion occurs. Figure 1.58 illustrates that this is indeed the case for a control oxide (Dit varies from 3 x 10^^ to 6.1011 eV-l cm-2), while Dit for two plasma-nitrided films remains nearly constant (from 2 X 10^^ to 3 X lOlO eV-l cm-2), even for prolonged nitridation. The nitridation of silica is effective in providing a good protection against boron diffusion [233]. 5.7.4. Impact of nitridation on conduction mechanisms Figure 1.59 a shows the I-V curves of MOS and MNOS devices (with an oxide thickness of 10 nm). Each curve is the average representative of several I(V) measurements performed for VG<0.

• For low electric fields (e.g. EQX < 7 MV/cm), as visible in Figs. 1.59 a and b, NO layers display a better conductivity (curve (3) than regular oxide layers (curve 1)). This can be attributed to the presence of the N-rich superficial layer which lowers the effective energy barrier height for electrons (this barrier is smaller for Si3N4 (2.1 eV) than for Si02 (3.2 eV)). •

Nitrogen atomic concentrations are mesured by fitting AES spectra.

Silica, Silicon Nitride and Oxynitride Thin Films

11

•^••1 5 ^ • Oxide (lOnm) K * 3h nitrlded / A 30 min nitrlded^'

'>10-|-

®

T—

o ^ 5 4-

0

1 Annealing time

2 (h)

-0.2

Surface potential (V) Fig. 1.57 (left) - The interface state density of several MOS and MNOS structures is plotted versus surface potential (or energy): (I) Si02film of poor initial quality, (2) and (3) the same film after nitridation at 1050''Q (4) good quality Si02film, (5) the same film after nitridation [223]. Fig. 1.58 (right) - Evolution of the midgap interface state density of MOS capacitors with a /?+ (B-doped) polysilicon gate (D of MNOS capacitors ® as a function of the annealing time at 950°C in N2: [233].

-6 f^

(a)

- 5 -1 0 Gate voltage (V)

Fig. 1.59 (a) - I-V characteristics of MIS devices with a 10-nm-thick oxide and a lO-nm-thick nitrided oxide (nitrided at lOOO^'Cfor 4 hours). (After [223]). Fig. 1.59 (b) - I-V characteristics measured: (D for a MOS structure ® and (3) for an MNOS structure obtained by sequential nitridation (t^if^ 120 min, T = 1050°C, P(NH^) = 10-1 mbar with At =10 min for (2) and with At = 40 min for 3). (After [224]).

(b)

4 8 12 Gate voltage (V)

16

• For higher electric field (EQX > 8 MV/cm), FN tunneling is the prevailing conduction mechanism, both for NO and regular oxide films (in the FN plots of Fig. 1.60, both I(Eox) data fit a straight Une and the strong field dependence of the current is preserved after nitridation).

78

B, Balland and A, Glachant

CM

>

LU

Fig. 1.60 - Current-field plot for as-grown and nitrided Si02 films: (D As-grown 11-nm-thick oxide ® after nitridation at 1000°Q in NH3, 10 min (S) after nitridation at lOOO^'C, in NH3, 120 min (After [223]).

1.0

1.2

1.4 1/Eox

1.6

1.8

(lO^cm/V)

The surface oxynitride layer and the interfacial oxynitride layer (when it exists) of NO films, are both thinner than typical tunneling distances (2 to 3 nm). Therefore, the FN characteristics of NO film are not markedly different from those of regular oxide films. An increase in the nitrogen content of the film causes a parallel rightwards shift of the FN plots as visible in Fig. 1.60, and this shift, which is found to be proportional to the increase in [N], is due to the increase in the positive oxide charge. The non-linear behavior of curve (3) of Fig. 1.60 is due to a change in film composition following a prolonged nitridation: the slope of the FN-plots decreases for long nitridation times at low pressures (10"6 mbar 0). To minimize or avoid trap generation and high-field-assisted detrapping, techniques like UV photo-injection, FN tunneling (Constant Current Stress: CCS) or avalanche injection can also be used.

Silica, Silicon Nitride and Oxynitride Thin Films

79

Carrier trapping can be detected through the shift of the high-frequency C-V curves along the voltage axis (AVQ or AVpe). A positive shift indicates that a negative charge is accumulating, and the measured charge nearly equals (in magnitude) the charge injected into the NO film. • The detrapping properties of NO films Once AVpB has reached saturation and when electron injection is stopped, the C-V curves relax. This relaxation is initially quick and then slows down. Reverse-biasing the device significantly increases the relaxation process. Temperature is shown to have a negligible effect on electron detrapping, which makes a mechanism of thermal emission from shallow traps unlikely. Tunnel emission must be envisaged to explain electron detrapping, and the depth of the dominant deep electron traps has been estimated at 2 eV below the conduction band edge of the oxide [212]. A tunneling hole process may also contribute to the relaxation of the C-V curve. Holes tunnel from the silicon substrate to the oxide valence band and subsequently recombine with the trapped electrons. However no extensive investigation of this phenomenon, in the case of thermally-nitrided oxide, has been carried out. 5.1.6. Dielectric breakdown in NO films The dielectric strength (or destructive breakdown field) of NO films varies from 2 MV/cm to about 30 MV/cm, depending on the nitridation conditions (Fig. 1.61). It is however shown to be on average greater than that of regular (non-nitrided) oxide films. The electrical conduction and charge trapping characteristics of NO films, measured before breakdown, are similar to those of oxide films. The current distribution in NO films is however found to be much more uniform than that found across a regular oxide thus indicating fewer weak spots (these weak spots are thought to cause current instabilities in the high-field regime and to induce breakdown itself). Nitridation removes flaws in the oxide and gives NO films a greater dielectric strength. 12.0 F

?o

1

5 11.5

ll

1 1

5,,.o

1 10.5 1

(a)

1 — 1 —

• 1 2 3 4 Nitridation time 1

L 5 (h)

(b)

1 2 3 4 Nitridation time

5 (h)

Fig. 1.61 a - The maximum field strength of a 10-nm-thick NO film is plotted versus nitridation time (at T=1000''C) Fig. 1.61 b - Breakdown current, defined as the maximum equilibrium current just prior to breakdown, is plotted versus nitridation time (at T = 1000°C) [256].

80

B. Balland and A, Glachant

Another explanation for the improvement in dielectric strength is that the electron traps created by the nitridation process are filled more quickly near weak spots in the oxide (because of enhanced conduction there). The filled traps create a local field which counters the external field and chokes off conduction, allowing a more even current distribution across the film. Consequently the dielectric strength of NO films appears to be a function of the number of electron traps created by the nitridation process [72]. Below a critical number, the traps increase the dielectric strength by reducing the field, and consequently the current at weak spots. Above this critical number, the filled traps appear to cause the intemal field to increase which could result in breaking the Si-0 bonds and trigger breakdown. SJ.l. Enhanced saturation transconductance of p-channel MOSFETs Dual gate C-MOSFETs have been fabricated with thin 8- and 15-nm-thick silica gate films nitrided using LP-PE nitridation. An improvement of both n and p-channel transistors drive characteristics (+ 12% and + 5% respectively) has been obtained [233]. After nitridation, the saturation current of transistors with 15-nm gate oxides improves by 8% and 3%, for n and p-channel devices respectively, when measured at Vc-Vth = Vj = 5 V. The influence of nitridation in the saturation regime is even more effective when the oxides are thinner. In this case, the n and p-channel transistors with 8-nm dielectrics show respectively 12% and 5% higher current values after nitridation, as shown in Figs. 1.62 a andb. The difference observed between the two types of transistors (tox = 8 nm and 15 nm) can be explained by the higher nitrogen contents (N / N + O) incorporated in thinner films. Indeed, Auger analyses have shown that treatment in an anmionia plasma essentially nitridates the outer oxide surface so that the resulting nitrogen fraction is higher when the film is thinner. Moreover, capacitance measurements show that the permittivity increases after nitridation by only 3% for 15-nm oxides and by more than 5% for 8-nm oxides. 1.2

y

VG-Vth PMOS

E 1.0hL.

'—t" -^^

Jo.8 0.6 Jr^r^

0.4

>.--••

.J^fs^^

''

A—

i\i

— ( f - »3V

p-

0.2 0 (b)

'•••^•^5

^A^ 0

. ^V

1

4

5 Vd ( V )

Fig. 1.62 - Saturation Id-Vd characteristics ofn-channel (a) and p-channel (b) MOSFETs featuring 8-nm-thick non-nitrided gate oxides (lower curve) and 8-nm-thick NO films (upper curves) (the oxides have been nitrided in a NHs plasma). (After [233]).

Silica, Silicon Nitride and Oxynitride Thin Films

81

In the case of the p-channel transistors, the higher current drive characteristics quantitatively corresponds to the percentage of capacitance (or permittivity) increase. But, for the n-channel transistor, the capacitance increase is not sufficient to account for the observed 12% enhancement of the saturation drain current. Since the normalized saturation transconductance (Gmsat/Co) with Co = Ci*W*L is known to be the best criterion for speed evaluations, we have plotted in Fig. 1.63 a and b this switching speed parameter as a function of Vc-Vth for n- and p-channel transistors respectively. The magnitude of Gmsat/Cc for the n-channel transistor with the NO gate insulator is comparable at low gate drive to that of the pure oxide, but a striking improvement is obtained at higher-field. The highest switching speed of 2.10^ s"! is obtained at 3.5 V and is 9% higher than that of the control device. The p-channel transistor drive characteristics increases after nitridation. This is due both to a gate capacitance increase and to an absence of degradation of the high-field hole mobility. The preservation of carrier mobilities, especially that of holes, in both the linear and saturation regimes can be related to the very low level of Nit, Nf and traps introduced by the LP plasma nitridation, in contrast with other (thermal) nitridation processes in ammonia.

PMOS K/1

C/5 OS

o

o o

Nitrided Oxide

I

I

o 1 V

o o

r

o

o 0 (a)

3 4 5 VG-Vth(V)

1

- j -

(b)

Oxide

1 ll 3 4 5 VG-Vth(V) L.

Fig. 1.63 - Saturation transconductance normalized by capacitance is plotted versus gate drive (V^ = ± 3.5V) (a) for an n-channel MOS transistor; (b)for a p-channel MOS transistor (After [233]).

This weak degradation of the interface can be explained by the low nitrogen content in the bulk and in the interface region. Furthermore, it has been shown that plasma nitridation leads to a reduction of donor interface states near the valence edge [12]. Because of this reduction of Njt, the contribution of interface states to hole scattering is thought to be reduced and this compensates the contribution of the few fixed charges introduced by nitridation. 5.8. CONCLUSION AND APPLICATION TO VLSI CIRCUITS Many techniques have been proposed to nitridate thin oxides in ammonia.

82

B, Balland and A. Glachant

The HP process results in the incorporation of nitrogen below the surface, in the bulk and at the Si02-Si interface. The amount of nitrogen incorporated increases with nitridation temperature and duration. HP films offer two consecutive barriers against oxidation and impurity diffusion. However, the HP nitridation of thermal oxides is responsible for an increase in the positive fixed charge, a significant increase in the density of electron traps and a reduction of channel mobility. The LP process leads also to the incorporation of nitrogen, but mainly below the surface of the film. The LP films thus offer only one effective barrier against oxidation and impurity diffusion. The drawbacks of conventional thermal nitridations (HP and LP) processes are higher interface states densities, higher fixed positive charge densities, and the incorporation of a large amount of hydrogen atoms in Si02,which leads to an increase in electron traps. Plasma nitridation increases the high-field transconductance of p-channel devices in contrast with other thermal nitridation processes. The specificity of the LP plasma-enhanced nitridation method, is that the reactions take place essentially at the outer oxide surface while the nitrogen content can be maintained very low in the oxide bulk and at the interface. This is thought to explain the excellent transport properties found in n-and p-channel devices featuring an LP-PE NO gate insulator. Let us mention also that NO films display a better stability under high field stress (FN current injection) and a greater dielectric strength, than regular oxide films. Because of their unique properties, NO films have been used to fabricate various MIS devices, such as: • MIS transistors with Leff = 1.5 |Lim (using a 10-nm-thick plasma NO film [120]); • a 16-kb EPROM structure (using a 6.5-nm-thick re-oxidized NO film) having better performances than those built with a conventional oxide [180]; • MIS transistors with Leff = 4.0 |im (using a 10-nm-thick thermal NO film) displaying a high resistance against irradiation [181]. 6. THERMALLY REOXIDIZED NITRIDED OXIDE FILMS We have seen in Section 5 that during the nitridation of silica in NH3 the incorporation of hydrogen atoms, which act as precursors of electron traps, is unavoidable. The reoxidation of nitrided-oxide films has proven effective in reducing the density of incorporated H atoms. It has therefore been investigated [243-259, 281] as a technique to minimize bulk electron trapping and to reduce interface states, without affecting other properties. The obtained films are called ReOxidized Nitrided Oxide (abbr. RONO) films. They still behave as excellent diffusion barriers and display a better endurance under hot-carrier stress. They are also shown to improve the transconductance of n-channel transistors.

Silica, Silicon Nitride and Oxynitride Thin Films

83

6.1. PROCESSES USED

Mostly two methods are being used to obtain RONO films: furnace annealing in dry oxygen and rapid thermal annealing in dry oxygen. • Furnace annealing in dry oxygen Studies on the fumace nitridation of thermal silica layers, at high temperatures, followed by a reoxidation step have shown very promising results. Conventional annealing in dry oxygen in a quartz-tube fumace can be used (as illustrated in Fig. 1.44). Its major drawback is a considerable redistribution of impurities [243249]. Typical reoxidation cycles are 15 min in O2 ambient at 950°C, resulting in a film thickness increase of less than 0.5 nm. Longer reoxidation times are used mostly to understand reaction kinetics, and the evolution with time of the film composition. • Rapid Thermal annealing in dry oxygen An annealing in dry oxygen using the so-called Rapid Thermal Process (RTP) has many advantages because it can be well controlled. This process shall be described in Section 7. 6.2. FILM COMPOSITION

As discussed in § 5.3, NO films resist oxidation. Reaction kinetics and film composition can be studied by using long reoxidation times (e.g. 60 min at T = 950''C) [249] as illustrated in Fig. 1.64 a. Figure 1.64 b shows the etching behavior (in a 100-to-l buffered HF solution) for NO films subjected to various length of reoxidation times. 6.2.1. Zones of interest As illustrated in Fig. 1.65, two zones are of interest: the top (external) surface and the filmsubstrate interface. • At the surface The study, by AES, of the influence of a low-pressure reoxidizing anneal on NO structures shows that only the nitrogen concentration below the surface is substantially reduced (30% to 50%). The top oxynitride layer of the NO film is rapidly converted back into silica. It follows that the surface etch rate of a RONO film approaches that of silica (Fig. 1.64 b). • At the film-substrate interface The oxidizing species diffuse to the film-substrate interface and react with silicon to form a thin silica film undemeath the oxynitride layer whose nitrogen concentration decreases with oxidation time and temperature. However the amount of nitrogen at the interface remains almost unchanged [246]. The RONO structure possesses oxynitride layers near both interfaces with, in addition, nitrogen distributed inside the oxide bulk. The Nitrogen [N] and Hydrogen [H] contents of RONO films have been monitored [246] using AES and SIMS, respectively.

B, Balland and A, Glachant

84 E 30 c

(D

L P-Oxide

®

(2) NO ® NO

20

E 0 c CO CO

c ^ - (D *-

10

0 o > o E C15

-D1 • ^

CO CO

U^-'

c

S

1 ,,. .

1

i

20 40 60 80 Oxidation time (min)

^NO^

~

L ® L P-Oxide ""^-^^ @

(S)

lu^

NO RONO RONO

^

® 1

N

1

L_

100 200 Etch time (s)

Fig, 1.64 - (left) Increase in film thickness during oxidation in O2 at 950^C (A t^ox) versus oxidation time: 0for a low-pressure oxide film; ®) for a nitrided-oxide film; (3) for a nitrided-oxide with surface removed, (right) Etching behavior of various types of films (in 100:1 = NH4: HF solution): (Dfor a low-pressure oxide, ® for a nitrided oxide, ®for an NO film reoxidized at 950^Cfor 15 min; ®for an NO film reoxidized at 950°Cfor 1 h. (After [249-250] slightly modified).

0 0 0 0 0 0 0 0 0

1 SiOy

1®

0 0 0 0 0 0 0 0 0

1

Si O2

00 0 0 0 0 0 0 0 1

te"

w

-w-

w

w

N2

SiwNx Si Oo

Fig. 1.65 - Model for the reoxidation of nitrided-oxide films: (I) at the external surface: 2SiOyN^ + (2-y)02 -^ 2Si02 + zJ^2(2) at the interface: Si + 02^ Si02.

Silicon Substrate 1

6.2.2. Nitrogen content AES analyses reveal that as reoxidation proceeds, [N] at the outer surface decreases quickly, while at the interface, [N] decreases very slowly (see Fig. 1.66). Moreover, the oxynitride layer at the interface moves further into the substrate as reoxidation proceeds. The distance travelled by the oxynitride layer is greater if its nitrogen content is originally smaller or if the reoxidation temperature is higher. This inward motion of the oxynitride layer at the interface is attributed to the diffusion-limited interfacial oxidation (let us note that in contrast, the annealing of NO films in pure N2 leads also to a reduction in the interfacial [N] but causes no motion of the oxynitride layer) [246].

Silica, Silicon Nitride and Oxynitride Thin Films

85

Fig. 1.66 - Nitrogen in-depth profiles measured by AES in 7. J-nm-thick RONO films. (After [245] modified) (a) The oxide samples have been nitrided in pure NH3 at T = 950''Q during t = 15 s and then reoxidized in a dry O2 (T = 950°C )for various times (tfox)trox =0 s (-), trox = ^^ s (---) and

(a)

trox = 60s(

j,

(b)The oxide samples have been nitrided in pure NH3 at T = 1150°C, during t = 60 s and then reoxidized in dry O2 (T = 1150°) for various times (tfox)-' trox =0(-),trox

=15s(---),

trox = 60s( ; a n d 2 0 0 s ( - . - . -). Crosses indicate the positions of the interface between the Si and the N-rich layer near the Si02/Si interface.

10 (b)

Depth

15 (nm)

6,2.3. Hydrogen content Hydrogen introduced during annealing in NH3 is reduced during post-annealing in O2 via the following reactions: 2 (=Si-H) + O-^ = Si-0-Si = + H2

(1.10)

= Si'H + HO-Si = + O ^ = Si-0-Si = + H2O

(1.11)

SIMS analyses reveal that, as the reoxidation of NO film proceeds, [H] decreases and the film thickness increases. Concentration [H] is found to decrease more rapidly if [N] is originally lower or if reoxidation temperature is higher. For example, [H] = 1.8 lO^O/cm^ in a thermal oxide film, [H] = 1.6 lO^Vcm^ in nitrided oxide film and [H] = 1.6 lO^O/cm^ in RONO film [242-246].

86

B, Balland and A, Glachant

6.2A. Boron diffusion Boron diffusion through RONO films has been studied by fabricating 100 |Lim x 100 |Lim boron-doped polysilicon capacitors. The results of quasi-static C-V measurements performed on these capacitors are shown in Fig. 1.67. The threshold voltage of RONO capacitors is 0.14 Volt higher than that of NO capacitors indicating that about 3 x lO^^ boron atoms have diffused per cm^ through the RONO films [18].

1.0

0)

o

0.8 -

o

(0 Q.

©"

CO

O XJ

0.4

75 E 0.0 -2.5

1

1

Fig. 1.67' Quasi-static C-V curves measured on MIS capacitors (with a borondoped polysilicon electrode) fabricated on a: 0) silica film, ® nitrided oxide film, (3) reoxidized nitrided oxide film. (After [18] slightly modified).

2.5

0.0 Gate voltage (V)

6.3. THE ELECTRICAL PROPERTIES OF RONO FILMS

The reoxidation step slightly modifies the electrical properties of the nitrided oxide films (as well as those of the underlying channel if the NO film is used as a gate oxide in a MOSFET) [232-233]. 6.3.1. Electrical conduction Electrical conduction in RONO films has been measured by using a stepped ramp I-V technique [251] on capacitors with a boron-doped polysilicon electrode. The resulting I-V characteristics are shown in Fig. 1.68, for RONO structures of three different thickness, with an increasing negative gate voltage (the silicon surface is in accumulation) applied until the capacitors break down. The low-level leakage current is found to increase with decreasing RONO thickness. The leakage currents measured in RONO films are generally more than one order of magnitude greater than those measured in thermal oxides. Large initial leakage in RONO is attributed to an energy barrier lowering due such causes as: a pile-up of nitrogen in the interfacial region [254], Frenkel-Poole conduction, field ionization from trap-assisted tunneling or a combination of these processes. No clear mechanism for low-field leakage current in thin RONO has been reported so far. The FN tunneling of electrons is still the dominant conduction mechanism encountered in RONO films (Fig. 1.68).

Silica, Silicon Nitride and Oxynitride Thin Films

87

Fig. L68-I-V characteristics of three RONO structures compared to that measured for a 10-nm thermal oxide (after [251] modified]).

8

10

12

14

Gate voltage (V)

63.2. Interfacial charges The mobility of channel electrons has been measured on large geometry (100 |im x 100 |Lim) n-channel MOSFETs fabricated with: regular oxide, NO and RONO films and with a channel doping of about 10^^ cm"^. The mobility of channel electrons is found to be lower for NO films, whereas with RONO films the mobility approaches that of MOSFETs using Si02 films [233]. This observation is consistent with the presence in RONO films of a thin Si02 layer at the dielectric-substrate interface. The fixed oxide charge density of RONO films should thus be similar to that of LP Si02 films («10^ cm-2). 6.4. INSTABILITIES IN (RONO) FILMS UNDER STRESS

6.4.1. Capacitance-voltage curves after stress The C-V curves shown in Fig. 1.69 have been measured before and after FN constantcurrent stress. NMOS capacitors have been stressed by electrons injected by the gate electrode (VQ < 0) or by the silicon substrate (VQ > 0). It is clear from the distortion of the quasi-static curves and the stretch-out of the high-frequency curves, that for equivalent stresses, the RONO dielectric exhibits much less degradation. 6.4.2. Interface state generation under stress C-V curves have been measured before and after FN - CC stress (Fig. 1.69), to determine ADit, the amount of generated interface states (using the high-low frequency method). The resulting distribution of interface states in the bandgap, after stress, is shown in Fig. 1.70. The difference in the shapes of the RONO and Si02 spectra could be attributed to the fact that the damage levels are different. Although the two dielectrics (NO and RONO) have a similar interfacial nitrogen content, they display a significant difference in their ability to suppress the generation of interface states.

88

B. Balland and A, Glachant

^30

0 1 2 Gate voltage (V)

(a)

(b)

0 1 2 Gate voltage (V)

Fig. 1.69 - HF and LF C-V curves of NMOS capacitors measured before (-) and after (—) a 10'"^ Acm'^ constant current stress applied during 5000 s. (a)fora Il-nmSi02 sample, (b) for all-nm NO sample (nitrided at 950°C), (c)for a U-nm RONO sample (reoxidized at 950°C). (After [248] slightly modified). -1 (c)

0 1 2 Gate voltage (V)

• Generation when electrons tunnel from the silicon substrate to the gate contact Figure 1.71 shows the plot of log (ADit) vs log (F), where the fluence (F) is the number of carriers injected per unit area or tunneling through the gate dielectric (F is the current density multiplied by the duration of the stress). By examining the slope of the resulting curve, it is possible to learn about the rate-limiting step of the interface state generation process. Following a positive gate bias stress, the increase in Da measured at midgap on a PMOS capacitor, is found to be linearly dependent on fluence, for low injected fluences: ADit = KA.FlO

(1.12)

where KA is the generation efficiency. As the fluence increases, the rate of interface-state generation decreases and ADit approaches a maximum values Dit,niax» although it never completely saturates. This suggests that ultimately is the number of (interface state) precursors that determines the magnitude of ADit. Fo^* high fluences, the damage is not linear with fluence, but described by: ADit = ^it^m^x

[1 - exp(

-KA.F]

(1.13)

Silica, Silicon Nitride and Oxynitride Thin Films

89

10

\W>

s

^

4

1

(DV^^^^^^

>

It

1

—

e

f-H i-H

o

^

=: 2 o

r-H

HI 1

<S ' L-

-0.4

a)

1

-0.2

1

0.0

_l

1 V il 0.2 0.4

E - E M G (eV)

-0.4

b)

^

-0.2

1

1

0.0

0.2

\ *

Vi 1 0.4

E-EMG(eV)

Fig. 1.70 (a) - Distribution Dn vs energy measured for several NMOS capacitors after a 10-^ A/cvffi CCS applied for 5000 s: (D oxide film, ® NO film (oxide nitrided in NHs at T = 950''C, P = 0.1 atm, for Ih), ® RONO film (NO reoxidized in 02atT= 950°C, P = 0.1 atm, for 3h). (b) Dif vs energy measured: Qfor an oxide film after a 10-"^ A/cm^ CCS applied for 200 s, ©for a RONO film after a 10-^ A/cm^ CCS applied for 20 000 s. (After [248] slightly modified).

Equation (1.13) simplifies into Eq. (1.12) at low fluence. When the change in the number of remaining precursor sites is small, which is the case at low fluence, the generation rate is a constant. KA is the low-fluence interface state generation efficiency, and is dependent on thickness, electric field, temperature and processing history. • Generation when electrons tunnel from the gate contact to the silicon substrate As illustrated in Fig. 1.71, after an NMOS capacitor is submitted to an electron injection from the gate, the increase in interface state density is not linear with fluence, but varies as: ADit^KB.F0 5

(1.14)

Under negative-bias stress, interface states are generated via a different mechanism. This weaker dependence on fluence is explained by considering that these interface states are due to the breaking of strained chemical bonds. When a strained bond is broken, the surrounding lattice relaxes reducing the strain in adjacent bonds. Thus, when one interface state is created, the probability that another defect be created nearby decreases [248]. • Transient response of RONO films For RONO films, ADit is not stable inmiediately following an FN injection. For positive-bias stress, ADit is found to increase once the stress has ceased, while ADit decreases after stress if a negative-bias stress has been applied. Thus, a delay of several hours is necessary after the stress to measure the post-stress C-V curves which allow one to calculate Dit.

B. Balland and A. Glachant

90 1000 1

^

»

•

'

» » 1

1

1

: o ---•

o —•

Q—.a

©--••

^^

1

1

1

•

•

I 1*

-fr^

j

\ T

Q

100

: ® —•

9*

Ao-'

0...O

o

%/y

A

,x

,Q

.

/

/

1 10 7 1

/

1 ' * * ' - ' '

0.001

i^

'

'

/ • / '

. . . . . I

0.01

/^

4

0.1

1

1 1

m / *'

1

10

Fluence (C. cm^)

100

Fig. 1.71 - Interface state generation vs fluence for various MOS structures and various injection densities 0+10'"^ Acw? (2) ©-10-"^ Acm? for U-nm Si02 films, S)+70-^ Acm^ ® -lO-"^ Acm?for 11nm NO (950°C, 10 min) films, ®) +10-"^ Acm^ ® '10-"^ Acrn^ for 11-nm RONO (950''Q 10 min) films, ®+10-^ Acrn^ ®-10'^ Acm^ for 11nm RONO (950''C, 10 min) films. Positive-bias stress data is fitted to Eq. (1.13) (solid line) and negative bias stress data ( ) is fitted to ^^ (L14).(Afier [260] modified).

• Generation mechanisms The formation of interface states can be prevented by blocking one of the steps leading to bond-breaking at the interface, or by simply not having precursor sites at the interface. The reoxidation of NO films improves the dielectric reliability by removing the Pb- centers which are precursor sites initially present at the interface. During the nitridation step, strained Si-Si bonds are broken, and some sites are passivated with nitrogen or hydrogen. Nitrogen may also displace an hydrogen atom on existing Si-H bonds. However, short nitridations result in a large density of Pb- center precursor sites. During the reoxidation step, oxygen permeates the dielectric, replacing the remaining Si-H bonds with a stronger Si-0 configuration, and oxidizing any remaining precursor site. Thus, the RONO process first damages the Si02-Si interface (during nitridation), and then repairs it to create a more stable atomic network (during reoxidation). This explanation of how interface-states are generated in RONO films accounts for the fact that not all oxynitrides inhibit the formation of interface states under electrical stress. While most oxynitride gate dielectrics, including heavily and lightly nitrided oxides, as well as reoxidized nitrided oxides, are resistant to radiation-induced interface state generation, only a subset of these dielectrics can be made "electrically hard". The nitrogen-rich layer at the interface acts as a diffusion barrier for hydrogen and inhibits hydrogenic radiation-induced interface state generation. 6A.3. Electron trapping A quantitative relationship between the electron trap density and the [H] concentration has been established for NO films [242] reoxidized in dry oxygen at temperatures ranging from 1050 to 1150X for 15-200 s (according to process 4a, see Table 1.07 of Sect. 8). In this experiment, the trapping properties have been evaluated by injecting a charge of 0.1 C/cm^ from the substrate (using a constant injection current of 10 mA/cnfi) and by measuring the ensuing flatband voltage shift AVpB induced by the stress. The residual [H] content has been measured by SIMS (see Fig. 1.72).

Silica, Silicon Nitride and Oxynitride Thin Films

91

Figure 1.73 shows the C-V curves recorded, before and after electron injection on various but related MOS samples. One is an oxide nitrided in NH3 at 1150°C for 60 s, and reoxidized either at 1050°C or at 1150°C for 60s. A large positive shift of the C-V curve (AVpB = +1-5 V) is observed for the first sample which indicates a high electron trap density [242]. The reoxidation steps indeed reduces the amount of electron trapping. 1.0 CO

'B

0)

O

o o

o

cd

0.5

o

I

N

§

o

a o U

i 0.01

t

0.0 15

20

Depth (nm) Fig. 1.72 - Hydrogen in-depth profiles measured by SIMS in NO and RONO films. (After [242] slightly modified).

-3

-

1

0

1

2

Gate voltage (V) Fig. 1.73 - C-V curves measured before (D and after @ electron injection (Qi^j = 0.1 C/crr?) on NO and RONO capacitors. (After [242] slightly modified).

Figure 1.74 shows the correlation found between AVpB values by induced by electron injection and concentration [H] for different RONO samples. Regardless of the fabrication conditions one finds: AVFB =

K,[H]

(1.15)

where K is a constant («9.3 lO-^^V/cm^ when a charge of 0.1 C/cm^ is injected into an 8-nm-thick RONO film). The elimination of hydrogenated species by reoxidation reduces indeed electron trapping. The reoxidation step appears also as promising in reducing electrical instabilities due to electron trapping, RONO films appears "superior", (i.e. display lower charge trapping) compared to other insulators, at high fields and for injected fluences > O.lC/cm^. They appear, however, "inferior" (i.e. display higher charge trapping) at low fields. Generally speaking, background electron trapping dominates all observations at lower fields (experimentally, < 7 MV/cm) for any nitrided structure.

B. Balland and A. Glachant

92 1.5

4^A

• RONO(1) A RONO (2)

A

Fig. 1.74 - Correlation observed between the flatband voltage shifts AVpB induced by an electron

• Oxide CO

injection of 0.1 C.cm'^ and the hydrogen concentration [HI measured in various RONO samples.

1.0

u.

.?-;

> 0.5

RONO (1) (oxide nitrided at 950''Cfor 60 s and reoxidized at lOSO^'C, and RONO (2) (oxide nitrided at 1150°C for 60 s and reoxidized at USO^'C). (After [246] slighly modified).

A%

0.5

1.5

1.0 21.

Concentration [H] (1 0 at.cm ^) 6.5. CONCLUSION

The reoxidation of NO films brings other advantages not mentioned above. It reduces the fixed oxide charge and increases the charge to breakdown. However the property most often seeked in RONO films is their ability to improve the stability of insulating films under stress and for many RONO gate dielectrics, their ability to suppress interface-state generation (ADit) under a variety of electrical and radiation stresses. 7. THIN DIELECTRIC FILMS FABRICATED BY RAPID THERMAL PROCESSES The nitridation and reoxidation processes, when carried out in a fumace, suffer from a dual handicap: they require a prolonged treatment at high temperature, and the risk of incorporating unwanted impurities and interfacial stress is high. An alternative technique based on rapid thermal processes has shown great potential, which we explain next. 1.1. PRINCIPLE

As illustrated in Fig. 1.75, the abbreviation RTF refers to the use of a broad range of energy sources to heat rapidly (1-100 s) and isothermally materials used in semiconductor and IC processing. Rapid Thermal Frocessing (RTF), originally introduced to anneal ion implantation defects, has since proved useful for a variety of additional applications [243]. Indeed, as device dimensions decrease (from micrometer to submicrometer devices), low "thermal budgets" are necessary to limit dopant diffusion. There exist then two solutions: • either to use low-temperature processes, enhanced by: photons, plasmas, etc. (see Sect. 9), • or to use RTF processes in which high temperatures are applied for short durations (typically a few seconds). Figure 1.76 shows schematically the time-temperature regime available using RTF.

Silica, Silicon Nitride and Oxynitride Thin Films

Names used Annealing Heating Processing

Time scale

T profile

Fast Rapid Short time Transient

Isothermal

93

Heating devices Flash lamp Heat pulse Incoherent light Infrared lamp Optical furnace Thermal furnace

Fig. 1.75 - An overview of terms used to describe Rapid Thermal Processes.

The RTF processes described next have been used to manufacture thin silica films (RTO), thin nitride films (RTN), thin nitrided oxide films (RTNO) and thin reoxidized nitrided oxide films (RTONO). They can also be used to fabricate composition-tailored insulators [243]. The cleaning (RTC) and the annealing (RTA) of the wafer can usually also be performed in the same apparatus.

^

Fig. 1.76 - Schematic representation of the time-temperature ranges used for Furnace Processing (FP), Rapid Thermal Processing (RTP) and Very Rapid Thermal Processing (VRTP) (after [244]).

1500 VRTP RIP

I-

FURNACE 500

H X -1

1

X

2

3

Log (time) (s)

4

Nota - Annealing for less than 1 second is indicated as a separate regime. Very Rapid Thermal Annealing (VRTP) is not currently accessible in most RT processing modules.

7.2. APPARATUS

Figure 1.77 shows a schematic cross-section of a single-wafer, rapid thermal processing module. In this module, heating is provided by a bank of tungsten-halogen lamps and temperature is monitored using an optical pyrometer for temperature measurement and a feedback system for controlling the power supplied to the lamp bank. The wafer is held by quartz pins and the reactive gas flows from the gas inlet (right) to the exhaust (left). This apparatus allows one to perform several processes sequentially in the same chamber. The small size of the chamber makes possible quick changes in reacting gases, while the substrate temperature, rather than the gas flux, switches on and off the chemical reactions. A computer controls the temperature between 700°C and 1200°C for reaction times between 0 and 300 s, and also selects which gas or combination of gases flows into the quartz chamber, which provides another degree of process control. The wafer is kept at high temperature only during the active chemical reaction and is kept at lower temperature during the gas purges.

94

B, Balland and A. Glachant

.«—

Lamp bank-

Process gases

wafer insertion removal

quartz tray quartz tube

pyrometer

Fig, 1.77- Schematic cross-section of the reaction chamber of an RTF module. (After [245] slightly modified).

Figure 1.78 illustrates typical temperature-time profiles used while, in Table 1.05, the gases used for each step are indicated. Gases most frequently used are ultra pure nitrogen, oxygen, hydrogen chloride, forming gas and ammonia. For example, RTC/RTA or RTO/RTN processes consist of two temperature steps. The first step is used to stabilize the system, typically at 775°C. The chemical process takes place during the second step, at a higher temperature, and lasts between 0 and 300 s. 1200

1

1

ei 1000 llOO^Ci o

1

•

3

1

1

1

1150*Q 1150*0/—I /; I

r

""

loso^Ci

i i 770*c\

I

1

CO

V'

L^

V.

0) Q.

r

RTA time

^

time

E 02-

0)

NH3 or N2.

-^r^

-H

(0

J

24

Wafer loading

Air

48

r

I

72

I

I

96

I

I

120

I

L_i

L

144 168 Time (s)

RT Oxidation

Rapid Thermal Cleaning

Fig. 1.78 - Wafer temperatures and gases used as a function of time for a typical RTC/RTO/RTA process in Ar or N2 (or RTN in NH3) (After [246] modified).

RT Annealing

RT (Oxy)Nitridation

Ar/10% H2

O2

N2

NH3

Ar/10% H2/O.5 -1.0% HC^

O2/I - 4.0% HC^

Ar

(NO)

N2/2% HCm.5% O2

(N2O)

Table 1.05 - Typical gases used for the RTF growth of oxides, nitrides and oxynitrides [246].

Silicay Silicon Nitride and Oxynitride Thin Films

95

13. RAPID THERMAL CLEANING

Native oxides encountered at the surface of silicon usually contain metallic impurities which may contaminate the silicon substrate during further steps. Moreover, the presence of a native oxide renders the manufacturing of very thin oxides difficult to control. Rapid Thermal Cleaning (RTC) allows for the reduction of native oxides and enables some silicon etching prior to growing Si02 film. It is typically performed at a temperature between 1000°C and 1150°C for 2 to 10 s. The gases used for RTC are Usted in Table 1.05. A chemical oxide {- 1-nm-thick) grows during the standard (liquid) cleaning process for which such solutions as ammonium hydroxide/hydrogen peroxide, hydrochloric acid/hydrogen peroxide, and sulfuric acid/hydrogen peroxide are used. By using the RTC process, it is possible to reduce this chemical oxide and thus to obtain, in-situ, an ultra clean silicon surface prior to film growth. It follows that wafers can be transported from the standard cleaning station to the RTP equipment without the need to perform a buffered oxide etch prior to oxidation. During a thermal treatment in an 02-free ambient (less than 100 ppb of oxygen), the thin chemical oxide is reduced by reaction of the Si02 film with the Si of the substrate and the formation of volatile SiO species following: Si + Si02-^2SiOT

(1.15)

SiO is volatile at temperatures above 750''C. When the Si02 film is removed, the silicon wafer starts to etch, in a low O2 partial pressure: Si + 02-^2SiOT

(1.16)

In an Ar/10% H2 ambient, the reduction of chemical oxides proceeds at rates shown in Table 1.06. These data show that RTC can be accomplished in a matter of 2 to 5 s at a steady state temperature (RTC etch rate), while 10 to 40% of etching takes place during the temperature ramp (ramp-up etch). Argon serves as an inert carrier gas, while it is believed that H2 reduces Si to gaseous SiHx and also allows for the formation of O and SiO. This cleaning eliminates also metallic impurities which adhere to the silicon surface, by forming the corresponding metal halides.

1

Temperature (°C)

Etch rate during T ramp (nm/s)

1150

0.4

0.1

1100

0.3

0.04

1050

0.2

0.015

1000

0.05

0.005

950

Etch rate at constant T (nm/s)

0.002

Table 1.06 - Etch rates of chemical oxides during Rapid Thermal Cleaning in Ar/10% H2, as a function of temperature

96

B, Balland and A, Glachant

The kinetics of silicon etch in an H2/HC^ ambient can be represented by a series of adsorption-desorption reactions and the subsequent chemical reaction of the absorbed species. The potential reactions are represented by : nHC/^ + Si —> SiC/n * + nif *

(1.17)

l/2H2(g)-\- *"->if*

(1.18)

(2x-4)m + (4'X)HC/'' + Si (s) —> SiH^Cf'4.^ (g)

(1.19)

SiH^C/^4-x (g) - > SiH^ C/4.X (g)

(1.20)

where * designates a free site on the surface. These kinetics have been studied for conventional FG cleanings and should be the same for RTC because in both cases they are thermally driven. The gas mixture containing HC^ has been found to produce some pitting of the silicon. Thus an optimum cleaning process has been developed whereby any chemical or native oxide is first reduced in Ar/10% H2, followed by a treatment, for 2 to 5 seconds, in Ar/10% H2/0.5% HC^. 7.4. RAPID THERMAL OXIDATION OF SILICON

Using conventional oxidation techniques (i.e. thermal FG-oxidation) silica can be obtained in very thin layers either by lowering the growth temperature or by diluting the oxidizing gas and/or by reducing pressure (see § 2.3.1). However, the oxydation of silicon at temperatures below 900°C generates large compressive stresses and a large fixed oxide charge. Moreover, a considerable amount of moisture is incorporated into the silica film during the boat-loading and unloading steps. Unless water is fully removed from the film, hydrogen forms centers which act as electron traps and degrade the film quality (see Chap. 2 of Vol. 2 of this book series and Chap. 11 of this volume). Traditional FG-oxidation is thus becoming more and more difficult to use, to grow very thin gate insulators (VTGIs). Rapid Thermal Oxidation (RTO) has proved a very attractive and efficient technique to grow device-quality thin Si02. We present next its principle and we compare some physical and electrical properties of oxides obtained by RTO to those of conventional (FG) oxides. 7.4.1. Basic process Nulman et al. succeeded for the first time in 1985 to grow thin Si02 film by RTO [250251]. Since then many publications have dealt with RTO [137, 244-282]. • Apparatus Thin RTO films are grown in a well-controlled oxygen ambient. The gas flow is monitored by computer-controlled mass flow controllers. The RTF chamber (Fig. 1.77) is equipped with tungsten-halogen lamp heaters. The reaction chamber is a quartz tube. The temperature is controlled with an in-situ thermocouple and a microprocessorcontrolled feedback system and/or with a calibrated optical pyrometer. A reflector can be used to provide a uniform heating of the wafer.

Silica, Silicon Nitride and Oxynitride Thin Films

97

• Procedure Silicon wafers are chemically cleaned and then "spun dry" in an N2 ambient. Wafers are introduced in an N2-filled quartz chamber and the oxygen gas flow is switched on. Oxidation is carried out in a pure oxygen ambient or in oxygen with 4% HC^. A first heating step is carried out at 800°C for 30 s in order to stabilize the process conditions (Fig. 1.78). The oxide grows during a second step, set at 1150°C for a duration of 5-30 s. This temperature has been chosen in order to achieve optimum chlorine gettering. This two-step approach lets the wafer reach the oxidation conditions in the shortest possible time (the heating and cooling rates are typically + 100°C/s and -60°C/s respectively). Once the oxidation step is completed, the oxygen flow is discontinued and nitrogen is introduced. After a short purge period, a similar two-step process, but in N2, follows. This last high-temperature post-oxidation annealing step, typically performed at 1050°C, stabilizes the Si02- Si interface and reduces the interface state density. 1A.2. Thickness uniformity The thickness of RTO films, measured by means of either a Nanospec apparatus or an ellipsometer, has been found to be as uniform across the wafer as in the case of conventional FG oxides. This uniformity depends on how the temperature is distributed across the wafer diameter. A fairly uniform thickness can be obtained from center to about 10 mm from the edge regardless of the ramp rate. In the outer ring, the thickness drops significantly (by more than 15%) due to radiative heat loss mechanisms. A good thermal repeatability of the two-step RTO process is ensured by the feedback control system. The "slip results" indicate that slip dislocations are generated more easily at higher temperatures and for faster temperature ramps. RTO can be a slip-free process in a wide range of process temperatures and times, if the transient and steady-state temperature gradients, particularly near the wafer edge, are eliminated. 7.4.3. Growth kinetics Figures 1.79 a and b show how the thickness of an RTO film varies as a function of oxidation time. Figure 1.79 b also shows the growth enhancement resulting from an addition of 4% HC^ to the oxidizing ambient. In the RTO process, oxide growth starts during the temperature ramp-up portion of the RTF cycle resulting in a thickness off-set (- 2.8 nm) at zero RTO time. This initial oxide protects the silicon surface from being etched by chlorine (which would result in pitting of the silicon surface) [246]. •Growth rate Figure 1.80 shows how the oxide thickness typically varies as a function of oxidation time for temperatures between 800''C and 1150°C in a pure dry O2 ambient, obtained from a one-step RTO cycle. Growth data, such as those of Fig. 1.80, shows that the growth rate, initially very fast, decreases with oxidation time (i.e. with oxide thickness). The linear regime is followed by a fast parabolic regime before growth become linear again. The second linear regime corresponds, at high temperatures, to the linear oxidation kinetics described by Deal and Grove. The oxidation models, conceived for oxides grown over long periods (see e.g. Chap. 1 of Vol. 1 [10]) cannot accurately predict the growth kinetics of RTO. This is because transient physical processes, other than simple one-species

98

B. Balland and A. Glachant ^i ,''

E c

,'3''' .--'''I

S 10 S 8 o

'£

^^

6 •

4 0

10

(a)

20 Time

30 (s)

.,

^

•

1

r •

r

•

10

15

1

20 25 30 RTO Time (s)

1150^0

Dry Oxygen One step E S15

1100^C

1050**C

Fig. 1.79 - Typical growth rates of RTO films (a) The thickness of an RTO film is plotted as a function of oxidation time (on a linear scale) during the initial growth regime (T = IISO^'C). (b) The thickness of an RTO film is plotted as a function of RTO time at a temperature of 1150°C in dry O2 (^ and in O2 with 4% HC/ (D). (After [246] slightly modified).

Fig. 1.80 - Typical growth rates of RTO films at temperatures between 800°C and 1150°C, in dry 02.(After [246] slightly modified).

80

100

120

140

RTO Time (s)

diffusion and interface reaction, may play an important role. The results shown in Fig. 1.80 disregard the ramp-up growth and the native oxide.

Silica, Silicon Nitride and Oxynitride Thin Films

99

10 • EA = 1.27 eV

8

• EA = 1.44 eV o EA = 1.71 eV

'co 6 E c 0)

Fig. 1.81 - Arrhenius plot ofRTO growth rates (nm/s) versus 1/kT (eV)'^ for the linear regime (10-sec window), for various RTO apparatus. (After [249] modified).

7.5

8.0 1/kT (eV ')

• Activation energy For RTO temperatures between 900°C and 1150°C and times less than 20 s, the oxidation rate in the linear regime has an activation energy of « 0.9 to 2 eV [246247] as shown by the Arrhenius plot of Fig. 1.81. 7.5. COMPARED ELECTRICAL PROPERTIES OF R T AND F G OXIDE FILMS

7.5.1. Conduction properties To compare the conduction properties of RT and FG oxides, MOS capacitors have been fabricated with both types of thin (8 -10 nm) films. The electrical characteristics of the films have been assessed by I-V and C-V measurements. Typical I(V) and C(V) curves are given in Figs. 1.82 and 1.83. • I(V) curves Three consecutive voltage ramps have been applied to the virgin RTO structure, up to 10 volts. As visible in Fig. 1.82, these ramps cause no visible degradation of the film characteristics. A fourth voltage ramp applied up to 12 volts leads to destructive breakdown. The same four ramps have been also applied to an FG oxide. The I(V) curves shown in Fig. 1.82 are similar but significant consequences of voltage stress are seen both in the base leakage current and in the Fowler-Nordheim region for the FG film. The lack of shift of the I(V) curves for RT oxides is a consequence of the very low trap generation as compared to FG oxides. The parts of the I(V) curves which correspond to FN conduction display indeed two distinct slopes. The last voltages in the curves of Fig. 1.82 correspond to destructive breakdown [245 - 246]. • C(V) curves High-frequency (1 MHz) C(V) measurements yield in both cases (RTO and FGO) a flat-band voltage value of « - 0.9 volt (this VpB value depends on the substrate resistivity) and a total flat-band charge of 2.5 10^ cm-2. An example is shown in Fig. 1.83 (curve 3).

100

B. Balland and A, Glachant

A shift of -0.15 volt in VpB is observed when the sample is stressed under 15 V at 300''C for 15 min. A AVpB of +0.10 volt is observed on a control sample which has been postannealed in N2 in a furnace.

Fig. 1.82 ' I-V curve measured on MOS capacitors: • with 10-nm thick FG oxide (for four consecutive I'V ramps) •with 10-nm thick RT oxide (for four consecutive I-V ramps) (After [243]). The M(RT)OS capacitor is in a virgin condition before the first ramp. The current values for the first four ramps overlap exactly until catastrophic breakdown is allowed to occur (during the fourth ramp only).

9 1 2 Gate voltage (V)

The effects of RTC on the electrical properties of Si02 films have been studied by comparing C-V data for films grown by RTC/RTA with and without RTC. Figure 1.83 shows such curves for a 16-nm Si02 film grown at 1150°C in dry O2 and subsequently annealed at 1050°C in N2 for 31 s. A reduction of interface states is clearly indicated in the C-V curves of Fig. 1.83 (curve 1) by the sharper transition from charge accumulation to inversion for the wafer with RTC compared to that without [243]. From I(V) and C(V) measurements we can conclude that the dielectric strength and the quality of the Si02-Si interface in RT oxides are equal to or better than those of comparable FG oxides.

Fig. 1.83 - C-V curves of MOS structures. (Dforaie.O-nmoxide (RTC-RTORTA). ® for a 16.0-nm oxide (RTORTA). ®for a 10.9-nm RT oxide (grown at 1000°C in a dry O2 ambient for 80 s). Both HF and LF curves are shown. (After [243] slightly modified).

-1

0 1 Gate voltage (V)

Silica, Silicon Nitride and Oxynitride Thin Films

101

7.5.2. Interface trap density The interface trap distributions of FGO and RTO films are compared in Fig. 1.84. Diluted and wet FGO samples have nearly U-shaped Dit distributions. RTO samples have similarly shaped distribution with smaller Dit concentrations than FGO samples. The Dit distributions of FGO and RTO samples become nearly equal as the RTO temperature is decreased and no difference is observed when oxidation takes place at lOOO^'C. RTO films formed at 1200°C show the largest decrease in Dit, in the upper side of the Si02 bandgap (Fig. 1.84). This decrease is however not due to the type of oxidation process but to the oxidation temperature itself.

Fig. 1,84' Distributions of interface traps in FGO and RTO

films: (D Wet FGO (850''C) grown in a 1:1 H2/O2 ambient, ® Dry FGO (800°C) grown in a 2:1 N2/O2 ambient, 0) FGO (950°C) in dry O2, ®RTO (lOOO^'C) in dry O2, ®RTO (llOO'^C) in dry O2. (After [243] slightly modified).

0.4

0.6

0.8

1.0

1.2

Surface potential (V) The Dit values found for p+-polysilicon gate MOS structures are more than one order of magnitude above those of similar n+-polysilicon gate structures. This significant degradation is apparently caused by the penetration of boron atoms into the ultra thin gate oxide. This penetration not only degrades the interfacial properties but also may enhance carrier trapping in the gate insulator and reduce the device lifetime. 7.5.3. Dielectric strength Distributions of breakdown field values measured on FGO films are centered around 11 MV/cm while similar distributions for RTO films are shifted by about + 1 MV/cm. Moreover, some RTO capacitors display breakdown fields above 12 MV/cm and an average charge to breakdown (QBD) value of 50 C/cirfi (at a stress current density of 1 A/cm^).

102

B, Balland and A. Glachant

In time-Zero Dielectric Breakdown (TZDB) tests, a negative voltage ramp is applied to the gate electrode and the breakdown voltage is defined as that voltage reached across the oxide when a leakage current of 1 |iA is measured [243]. In Fig. 1.85 the TZDB characteristics of an FGO film grown at 950°C in dry O2 and an RTO film grown at lOOO^C in dry O2, for two thicknesses (7.5 and 9.8 nm) are compared. The TZDB of RTO films is better than that of FGO films on two counts: (1) low-field (< 1 MV/cm) and medium-voltage breakdown rarely occur in RTO films; (2) the maximum breakdown frequency occurs at higher fields in RTO films [243]. 80 o c

0) 3

RTO - — FGO

60

cr o 40

c o 20 •o

1 1 1 1

1 1

—

1 "-n

CO

o (a)

0 5 Breakdown

10 15 field (MV/cm)

CD

(b)

"%

T _ "

!

1

0 0

5

Breakdown

10 field

LJ

1

15

(MV/cm)

Fig. 1.85 ' Time-zero dielectric breakdown histograms measured on MOS capacitors fabricated with RTO and FGO films. The film thicknesses are (a) 7.5 nm and (b) 9.8 nm, respectively [243].

In Fig. 1.86, the time to breakdown (tBo) data, measured on 9.8-nm-thick oxide films fabricated by different techniques, have been plotted versus Jinj, the density of the injected current. Time tsD is found to vary as l/Jinj^'"^. We note that the values of tsD for RTO films are consistently larger than those of FGO films and that they increase when oxidation temperature increases. These larger tsD values have been explained by a reduction in the amount of defects, especially strained Si-O-Si bonds and Si dangling bonds at the Si02-Si interface, due to the higher oxidation and anneal temperatures used in the RTO process [243]. 7.5.4. Role of annealings As shown in Fig. 1.87, the rapid post-oxidation thermal annealing, in Ar + N2 or Ar + O2 at lOSO'^C, of RT oxides, results in a rapid decrease in VpB whose value approaches the ideal work function value. This decrease is correlated to a decrease in Dit (below 10^^ eV-^cm-^ after 40 s for RTO compared to 5.10^^ eV-^cm-^ for FGO). Similarly, the average breakdown field of annealed RT oxides has been observed to increase to a value of 15 MV/cm, as compared to 13.5 MV/cm for FGO.

Silica, Silicon Nitride and Oxynitride Thin Films

103

Fig. 1.86 - Mean-time-to-breakdown (tQp) values versus injected current density (Jinj)' Oxidation conditions are shown as a parameter: 0FGO (diluted, 800°C), a>FGO(wet,850''C), (3>FGO(dry,1000°C), ®RTO(dry,1000''C) ®RTO(dry, 1200''C). The film thickness is 9.8 nm. (After [243] slightly modified).

10" 10 Injected current density

10

(AcmO

A post-oxidation RTA, as short as 10 s, has been shown to reduce both electron and hole trapping. A low-level nitridation takes place during RTA in nitrogen. RTA in NH3 (as discussed in the following section) results in films with better properties than those annealed in N2. The QBD value measured on 10-nn oxides increases from 20 C/cnfi for FGO films to 80 C/cm^ for RTO/RTA films [246]. Since QBD is directly correlated to electron trapping in Si02, it is concluded that electron trapping on water-related centers occurs at a much smaller rate in RTO films annealed in Ar + N2 and Ar + O2 than in FGO films. By comparison, hole trapping is optimally reduced by RTA in Ar + O2 for (longer) times of 100 s at a (higher) temperature of lOOOX [250].

25.0 E o H 20.0 > Q

15.0 10.0

-0.25 0.0

20.0

40.0 RTA time (s)

Fig. 1.87 - Illustration of the influence of the post-oxidation RTA time on the flat band voltage (upper curve) and on the breakdown field (lower curve) of MOS capacitors annealed in Ar + O2. (After [246] slightly modified).

104

B, Balland and A, Glachant

7.6. RAPID THERMAL NITRIDATION OF THIN OXIDES IN AMMONIA

The incorporation of nitrogen in the Si02 network of an oxide film by Rapid Thermal Nitridation (RTN) yields a nitrogen-rich surface layer, a bulk oxide with a small concentration of nitrogen, and an interface region consisting of an interfacial nitride layer and an oxygenrich layer. RTN gives oxides several advantages such as an increased barrier to dopant diffusion [228, 251], an increased resistance to interface trap generation under electrical stress [106], a reduced sensitivity to radiation, an increased endurance to hot-electron injection [121, 177], and a dielectric constant larger than that of pure oxides. In this sub-section, the rapid thermal nitridation (RTN) of thermal oxides films is described and the main physical, chemical and electrical properties of these films are sunmiarized. In this case, the RTA part of the cycle shown in Fig. 1.78 is replaced by RTN. 7.6.1. Basic process The Rapid Thermal Nitridation of RTO films is performed in a pure anmionia ambient (containing less than 1 ppm H2O, at atmospheric pressure, for typically less than 60 s [243]. NH3 is introduced after a 10 s purge in nitrogen at 770''C. This is followed by two hightemperature pulses [243]. The first temperature pulse is set at about 800''C, i.e. below the threshold temperature for nitridation, in order to quickly reach the actual nitridation temperature and thus reduce the early incorporation of nitrogen to an insignificant amount. The second temperature pulse is chosen between 900 and 12(X)°C with nitridation times between 3 s and 300 s. Finally, ammonia is switched off after this second step and nitrogen is introduced inside the reactor. 7.6.2. Composition of RTNO films Nitrided Oxide films, fabricated by means of the RT process (abbr. RTNO), have been studied using various techniques such as AES [216, 245, 246, 254], XPS [249], RBS, etch rate and TEM [21b] or SIMS [249-254]. Figure 1.88 shows the [H], [O] and/or [N] in-depth profiles, obtained by AES, of RTNO films nitrided at 1150°C for 3 and 300 s. These experimental results show that [N] below the extemal surface tends to increase with RTN time and temperature; [N] saturates at 1.7 x lO^^ cm-^ [20f]. Generally speaking, the largest variations in the amount of nitrogen incorporated into the starting oxide film are observed for the thinnest oxide films. Nitridation is not observed for temperatures below 900°C, whereas above 1050''C, surface nitridation is accomplished in a very short time (3 s at 1150°C). Surface nitridation is essentially a reaction-rate-limited process and the ensuing [N] depends on the RTN temperature and not on the oxide thickness. For prolonged RTN, the nitrogen concentration in the Si02/Si interfacial region increases. In fact, interfacial [N] appears at the early stages of the RT process and even for the least severe nitridation conditions (950''C, 30 s). It increases monotonically with time and slightly with temperature but does not saturate. This observation suggests that the concentration of the nitriding species at the interface is not rate limiting in the process. This interfacial N-rich layer is believed to be between 0.3-0.6 nm thick [247]. Hence the RTNO film appears as a nitride/oxide/nitride (NON) structure.

Silica, Silicon Nitride and Oxynitride Thin Films

105

During nitridation, the thinnest oxides [249] behave with time and temperature just like thicker oxide films, but depending on the values of the RTN parameters, nitridation of the bulk oxide also occurs. During the early stages of RTN, nitrogen piles up at the oxide/silicon interface, and in the final stages it distributes uniformly throughout the film (Fig. 1.88b), until complete saturation (formation of an oxynitride). No increase in oxide thickness due to nitridation is observed. Finally, the hydrogen concentration is found to increase monotonously as nitridation proceeds. The physical, optical, and electrical properties of nitrided oxides are related to the presence and the behavior of the reaction by-products in the oxide. ^ 100

RTN time = 3s

80 h Oxygen

o

100

RTN time = 300s

80

SiliconOxygen

CO

60 0)

o c o o o E o 2.5 (a)

5.0 7.5 10.0 Sputter time (min)

3 (b)

6

9

Sputter

time

12 (min)

Fig. 1.88 ' Auger in-depth profiles of a nitrided oxide, (a) RTN time of 3 s at 1I50°C, (b) RTN time of 300 s at 1150°C. The thickness of the RTOfilm is tox = lUnm. (After [245] slightly modified).

7.6.3. Optical refractive index EUipsometry is used to characterize the RTNO films as a function of RTN time and temperature. Figures 1.89 a and b show how the optical refractive index of an 8-nm-thick RTNO film varies with nitridation time and temperature. Index values are in the 1.45 -1.68 range. These indices depend on the nitrogen content. A longer RTN time results in index values above 1.7 (NON structure). 7.7. ELECTRICAL PROPERTIES OF RTNO 7.7.1. C-V characteristics Rapid thermal nitridation affects the high- and low-frequency C-V characteristics of MOS capacitors in several ways. For nitridation temperatures below 1000°C, a large negative shift is observed. For higher temperatures, the initial negative shift is smaller and tends to disappear as nitridation time increases (Fig. 1.90a). These shifts in VpB values are due to complex variations in Nf and Dit at midgap, with time and temperature, and probably to some variation of the work function difference between the gate electrode material and the Si substrate.

106

B. Balland and A. Glachant

^-''^''"•l ^

X

a> 1.7 c _


•

1.6 k

••'

> ^ • *^ o •^ 5 1.5 - .•^ «0) *« • ^

1.5 tox = 8nm

1.4

Oxide-* NO#-NON-ff-Oxy litride

1.71-

[..•-•-

. 1.

60

1

120

,.,

1

180

tox = 8nm RTN time = 120s

1

I-

RTN time (s)

(a)

1

0

1.4 L

240

' • "

-^"

RTN temp. = 1150^C ,

• •

1

800 / jj ^

I

1

1

J

1000 1200 RTN temperature ("C)

Fig. 1.89 - Optical refractive index ofnitrided oxide films versus RTN time (a) and RTN temperature (b).

4.8 RTN temp. == n50°c -n4--

•£ 4.6

^ ^Jc"^ - ^ - - ^ "

o

.-^ir

M C

'^^'

o

0 4.4

u

i

^ 4.2 a tox = lOnm

-3

-2 -1 0 Gate voltage (V)

-^^-^ ^^' .^"# ..-^r^'

1 1

.^-^

.0--

^^•^ " 960°C 900°C

---•--"••-•'- - — • - - •

r

RTN temp. = n s e c

-4

V

1050°C

vJAiuo^o.y;

3.8

tox = 8nm 1

100

200 300 RTN time (s)

Fig. 1.90 ' (Left) High-frequency C-V curves of MIS capacitors with oxides nitrided by RTN at IISO'^C for several nitridation times. (After [254] slightly modified). Fig. 1.91 - (Right) Dielectric constant Ejsfo versus nitridation time for several nitridation temperatures. (After [245] slightly modified).

7.7.2. Dielectric constant The Cacc value (dynamic capacitance in the accumulation mode) of RTNO capacitors is found to increase with RTN time and temperature. Increases as large as 20% have been observed (as shown in Fig. 1.90 for a 10-nm-thick RTNO film). Sputter Auger profiles show that the thickness of the nitrided oxide does not change. Consequently, the observed increase in Cacc is only due to an increase in dielectric constant.

Silica, Silicon Nitride and Oxynitride Thin Films

107

Figure 1.91 illustrates that £NO increases monotonously with nitridation time and temperature. Compared with the original oxide, nitridation for 5 to 300 s results in increases of 8NO of about 12 and 20 percent respectively. These increases are found to follow increases in [N] at the interface. For similar conditions, £NO increase faster if the oxide film is thinner. 7.7.3. Fixed charge and interface states In thin nitrided oxides, interface traps and fixed charges are found to vary strongly with RTN time and temperature. Variations of Nf and Dit, calculated by combining high-frequency and quasi-static C-V measurements, are plotted versus nitridation time in Fig. 1.92. Two temperature ranges must be distinguished: below and above 950°C.

L

E o ^' 5

Nitridation temp. = 950X

p Cv-•»•"•

7

900'C

T-

^ ^ '**

1050'C ^--t.

1150X A

•A

-1 L

L.

100 (a)

J.J 200 300 Nitridation time (s) i

Nitridation temp. = 950X

0 •

^

•'• 9 ^ ^

5

^ ^

-

-

-

-

-

^

^-^

^'^

^^-*A.

t,'V-^

'

-

(a) Variation in the fixed oxide charge density with RT-nitridation time for several nitridation temperatures. (b) Variation in the midgap density of interface states with RTnitridation time for several nitridation temperatures. (After [249] slightly modified).

1050*C

•"•--—-.-

»^a-^

nl

-

900'C

f 7 X X^^si^;: W

(b)

.

Fig. 1.92 - Illustration of how the electrical properties of the Si02-Si interface are modified by Rapid Thermal Nitridation. (The oxide film is 8-nm-thick).

115o»c

1

1

100

200 Nitridation time

LJ

300 (s)

• Below 950°C, Nf and Dit increase regularly during the early stages and then tend to saturate for longer nitridation times.

108

B, Balland and A, Glachant

• Above 950°C, both Nf and Dit first increase sharply at a rate which depends on the RTN temperature, reach a maximum, and then decrease monotonically at a rate which again depends on RTN temperature [249, 255]. For long nitridation times, Nf and Dit reach values comparable to those of FG oxides. The similarity in the behavior of Nf and Djt suggests that the physical and chemical mechanisms underlying these changes are the same in both cases. Models explaining the role of RTN, on ANf and ADit, based on mechanisms involving nitrogen, hydrogen, and Si-0 bonds, have been proposed by Hori et al [255]. In a first step, defects form due to the incorporation of nitrogen while in a second step these defects are reduced through a process similar to high-temporature annuealing [255]. This reduction could also be due to the fact that at higher temperatures, surface nitridation is enhanced and blocks the subsequent in-diffusion of N-rich species. This blocking action slows down further interfacial nitridation. An alternative explanation is to consider the thermal and chemical changes taking place at the interface and their influence on the partial charge transfer in interface bonds [256]. It is well known that a thermally-grown silica film on silicon is under compressive stress above the Si02-Si interface (due to a mismatch of the two lattices) while a nitride film on Si is under (macroscopic) tensile stress (see Sect. 2). Nitrogen-related defects are formed under the influence of interfacial stress. A sufficiently large incorporation of nitrogen relaxes the initial stress and leads to the healing out of the existing defects and thus to a decrease in Nf and D^. Once interfacial nitridation has reached a certain level, the interface stress disappears and the strain energy is reduced because the Si lattice and the SiOxNy lattices more or less match. Above this level, the further incorporation of nitrogen is hampered by the generation of a counter stress. Whatever the mechanism may be, Nf is shown to increase with increasing [N] and then to decrease, as illustrated in Fig. 1.93. Nitridation temp. T 9 0 0 ' C

6

..;;;;p;;. .•i3:L^^§jij:..

a pso'C Ol050°C

I

e

4 1 , %

o

A.

Fig. 1.93 - Variation in fixed oxide charge density with nitrogen concentration at the interface. (After [242] slightly modified).

•,•• J6

•I:'"^'

>^^.

2 ,••-••,•

n

••• • •

•«,••,••.

1

1

1

LIIILA

8 12 16 [N] at interface (at %)

1

Silica, Silicon Nitride and Oxynitride Thin Films

109

7.7.4. Behavior of RTNO films under electric stress In a study reported in [242], very thin (< 5 nm) RTNO MIS structures have been submitted to electron injection (electrons being injected from the gate electrode into the RTNO film by FN tunneling). The injected current was kept constant (= 10 mA/cm^). The effects of this stress on the leakage current and on Time-Dependant Dielectric Breakdown (TDDB) is reported below. i) Effect on oxide leakage current For all samples, the I-V curves measured before stress are nearly identical as visible in Fig. 1.94 a. After an injection stress (Qinj = 0.1 C/cm^), a sizeable leakage current appears for all samples, below 8 MV/cm, as seen in Fig. 1.94 b. It is observed that the current passing through the oxide increases for electric fields in the 6-8 MV/cm range, with the current increase becoming larger in samples nitrided at higher temperatures. At fields larger than 8 MV/cm, the current through the oxide decreases. This behavior is attributed to the role of nitrogen affecting the tunneling barrier for electrons and holes, the changing interfacial fixed charge density, and the lower conductivity of RTN oxides and their weaker field dependence. This leakage current increases with nitridation time. Although this leakage current is also encountered in thicker (> 10 nm) oxide samples, it plays a more important role when oxide are thinner. The mechanism of this low-field conduction is not fully known yet but it seems to fit an FN type of conduction with a reduced barrier height.

6 (a)

8 10 E (MV/cm)

6 (b)

8 10 E (MV/cm)

Fig. 1,94 ' Leakage current-versus electric field curves measured on MIS samples before (a) and after (b) FN injection. The oxide samples are S-nm-thick and have been nitrided for various lengths of time in NH^ via an RTF process: (a) I-E curves before stress (Dpure Si02, ©after 10 s of nitridation, ® after 20 s of nitridation, ® after 30 s of nitridation, (b) I-E curves obtained after injecting Qinj = 0.1 C/crr?. (After [242] slightly modified).

It is believed that FN electron injection increases the number of electron traps and that this creation is made easier as nitridation time is increased. The leakage current, which results from an increase in the number of electron traps, acts as a trigger for oxide breakdown.

B. Balland and A, Glachant

no

ii) Effect on dielectric strength Figure 1.95 shows the increase in gate voltage (AVQ) necessary to maintain a constant injection of 10 mA/cm^ in the oxide samples. • For pure Si02 film (case ©) AVQ is positive which means that hole generation and trapping dominate during the early stages of injection. • For RTNO films, AVG is negative which means that electron trapping dominates during injection. AVG is found to increase with nitridation time. The ratio AVc/AQinj (i.e. the slope of the AVc-Qinj curve) is proportional to the product of the capture cross-section of the traps and of the trap density (see Chap. 10 of Vol. 2 ) . Figure 1.95 shows that this ratio increases with nitridation time. Figure 1.95 also shows that the charge-to-breakdown value (QBD) decreases with increasing nitridation time. We can thus conclude that in RTNO sample nitrided in NH3, the electron trapping process dominates and that the amount of created electron traps increases with nitridation time. -0.5

0.6 Q

0.8 1.0 • (C cm"2)

Fig. 1.95 - The increase in gate voltage necessary to maintain a constant injection current is plotted versus the injected charge for various silica samples nitrided via an RTN process: (Dpure silica film, ® nitridation for 10 s, (3> nitridation for 20 s, ® nitridation for 30 s, ® nitridation for 60 s. Arrows indicate that the film was destroyed by dielectric breakdown. (After [242] slightly modified).

Dielectric breakdown in very thin Si02 could result from an increase in low-field leakage due to the enlargement of defect-related "weak spots". Another possibility is that tunneling occurs in the regions where conduction relies on the field-assisted hopping of electrons from one trap to another i.e. where Poole-Frenkel conduction dominates. In RTNO samples, a strong correlation is found between QBD» the ratio AVc/AQinj and the nitridation time. Charge QBD is proportional to (AVc/AQinj)"^ with k = 0.56, [242-243]. The charge trapping characteristics of silica film have been explained by means of the broken bond model (see Chap. 2 of Vol. 1) and by the role hydrogen-containing species, such as -H and -OH or -NH bonds play in electron trapping. -H and -OH bonds are created during RTN as a result of the dissociation of NH3 and are responsible for the large number of electron traps in nitrided oxides. Electron trapping in high-field stress is associated with chemical reactions such as: 03=Si'H +e-—> 03=S> -vRo (1.21) or 03=Si^NH + ^ - —> 03=Si- +NHO (1.22)

Silica, Silicon Nitride and Oxynitride Thin Films

111

Fourier Transform InfraRed measurements show that during RT nitridation in NH3 a large number of N-H bonds (« 2.9 10^1 at/cm^) and Si-H bonds (« 3.3 10^0 at/cm^) form in the film. These sites act as electron traps. Thus if the weak s Si-H, = Si-NH and /or = Si-O-Si = bonds encountered in pure silica, are minimized by the formation of more stable bonds, such as SiN bonds (4.6 eV), the electron trapping density can be reduced. This can lead to a larger QBD value. Thus, in ultra thin RTNO films, the density of electron traps must be minimized to reduce the leakage current and increase QBD- The rapid thermal reoxidation of nitrided oxides eliminates these hydrogen-containing species via the reactions: 2 (=Si ^H) + 0 ^ = Si-0-Si

= + H2

(1.23)

and = Si- H +=Si -OH +0-> = Si-0-Si=

+H2O

(1.24)

which results in the reduction of electron traps in nitrided oxides while niaintaining all other advantages of RTN [259 - 261]. 7.8. CONCLUSION

Thermal nitridation was formerly considered as a step difficult to apply to a ULSI process. This difficulty stemmed from the high temperatures and long durations attached to the fumace process. Rapid Thermal Processes (RTO and RTN), using a lamp-heated apparatus have made it possible to minimize the duration of the oxidation and nitridation steps and thus have allowed a reduction of impurity redistribution and stress at the interface. Thin oxides grown at 1150°C show superior electrical characteristics (breakdown fields of 15 MV/cm and interface state densities below 10^^ eV'l cm-^) compared to oxides grown in diffusion furnaces at low temperatures. When an additional RTN step is added, oxides display characteristics similar to those of annealed oxides, while gaining both a superficial nitride layer and a nitrogen-rich interfacial layer. Rapid Thermal Processing is mostly exploratory and developmental in nature but it is slowly being introduced as a manufacturing technique of Si devices. It is an important new direction. The greater use of RTP in routine production will depend on either demonstrated productivity/cost advantages or on some intrinsic advantage of RTP (single wafer processing, possibility of selectively enhancing a desired process over another undesired reaction, etc.). Temperature uniformity and repeatability will also need to be better garanteed. 8. THIN OXYNITRIDE FILMS GROWN IN N2O AND NO AMBIENTS The nitridation of silica in gaseous ammonia introduces a substantial amount of hydrogen in the film which in tum enhances the density of electron traps, results in a fixed-charge buildup, and causes the leakage current to increase. However, the primary purpose of nitridation is usually to introduce a small concentration of nitrogen at the Si02-Si interface to improve the interfacial quality and the charge-to-breakdown.

112

B, Balland and A. Glachant

Nitridations conducted in oxidizing ambients have been found to suppress or reduce some of the disadvantages of nitridation while preserving its advantages. 8.1. THE MAJOR PROCESSES

Alternative nitridation processes, using gaseous nitrous oxide (N2O) or nitric oxide (NO), have been developed [237, 262-294]. The successful oxynitridation of silicon in N2O has been demonstrated by using both Rapid Thermal OxyNitridation (abbr. RTON) and conventional Furnace OxyNitridation (abbr. FON). Several processes have been tested to get the best electrical characteristics for a given application. The four major processes which use N2O are given in Table 1.07. • Process 1

a) Conventionalfiamaceoxynitridation of silicon using [237-280] a pure N2O ambient (typ. T = 900°C, t = 60 min) b) Rapid thermal oxynitridation of silicon using a pure [237, 262-279] N2O ambient (typ. T = 1050°C, t = 100 s)

• Process 2

Rapid sequential thermal processing of silicon at various ambients: N2O followed by O2 and then N2O (typ. T = 1050°C)

• Process 3 (RTON)

Two-step process: (1) treatment in O2 (typ. for FON, T = 900°C, t = 60 [237, 280] min and for RTON, T = 1100°C, t = 20 s), followed by (2) treatment inN20 (typ. for FON, T = 900°C, [263, 271-275] t = 60 min and for RTON, T = 1100°C, t = 30 s)

\» Process 4 • Process 4 a • Process 4 b (RTONO)

[263, 271-275]

In-situ RT-oxidation followed by RT-nitridation: (1) ^ O2 (T = 1100°C, t = 60 s) ^ then (2) -^ NH3 (T = 900°C, t = 60 s) -^ then

a) [242, 253-261]

(a) -> dry O2 (T = 1000°C, t = 30 s)

b)[237, 277-279]

or (b) -» N2O (T = 1100°C, t = 30 s)

Table 1.07 - Characteristics of four oxynitridation processes using N2O.

Although nitridation in N2O can be performed directly on silicon (process 1), it usually follows an oxidation step, because the thickness of films grown directly in N2O can saturate at relatively low values. Two-step oxynitridation allows one to produce any desired thickness and yields superior electrical characteristics. The thin oxynitride films thus produced exhibit interesting electrical properties (QBD > 30 C/cm^ and a smaller change in Dit upon nitridation) which stem from the presence of nitrogen at the interface and from a low concentration of hydrogen-related species in the resulting film. The first three processes are hydrogen-free. The fourth process has been proposed to grow thin films for flash EEPROMs (a most promising device for the next generation of non-volatile memories) [277-279].

1

Silicay Silicon Nitride and Oxynitride Thin Films

113

8.2. OXYNITRIDATION IN N2O 8.2.1. Growth kinetics The growth of an "oxynitride" film in N2O is slower than a regular oxidation in O2 and is easier to control. Growth may be self-limited as nitridation time increases, depending on the amount of incorporated nitrogen [237, 269-270]. The growth rate strongly depends on temperature (T ~ 1000-1200'^C), as illustrated in Fig. 1.96a, on pressure, and on the dimensions of the RTP reactor (which in turn determine the amount of nitriding species). Typical growth curves are shown in Figs. 1.96. As illustrated in Fig. 1.96b, growth in N2O is twice slower than growth in O2. Figure 1.100 c shows the influence of temperature and crystal orientation on the growth rate in N2O. These data show that tox increases as approximately (time)l/^. From the Deal & Grove model [10a], this time dependence implies that the oxidation rate is limited primarily by the diffusion of the oxidizing species through the oxide, rather than by the chemical reaction at the Si-Si02 interface (which would produce a linear time dependence). This conclusion is supported by the data of Fig. 1.96c which shows a relatively small orientation dependance, especially at 1000°C, (on the contrary, reaction rates depend relatively strongly on crystal orientation). Soleimani et al. have reported a linear time-dependent oxidation rate [281]. Others [282285] have reported self-limited growth in N2O [274]. Low N2O flow rates produce a lower nitrogen concentration at the interface, which is a less effective diffusion barrier [285]. Ting [266] and Soleimani [281] have presented a model for growth kinetics of oxynitrides on Si in N2O using a FON process or a RTON process. 8.2.2. Growth mechanisms Studies on the (gas phase) dissociation of N2O near the Si wafer temperature, the dissociation products are NO (gas), O2 and O:

show that at high

• the primary decomposition is: N2O <=> N2+ O

(1.25)

• but the following reactions are expected to take place: N20 + 0<^ N2+O2

(1.26)

N20 + 0^2NO

(1.27)

The incorporation of nitrogen in the film is due to the diffusion of NO [274]. The NO radicals diffuse through the growing film via an interstitial mechanism (as explained in Chap. 7 of this volume). They have a weak probability of reacting with the network atoms but dissociate at the Si02/Si interface to form SiO^Ny. This explains why nitrogen is only encountered at the Si02-Si interface in N20-grown films.

114

B. Balland and A. Glachant

1"

a 900^C

c 30.0 ^-'

o 950^C

o

•g 20.0

.^-''' ..•''"' ,^'-'"' ^«»" ^*"

.^'•'" V - - " • '

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2 10.0

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A

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1

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120

F

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°

[

T-

•-^ f

•

r

t

/

/ ^

y . -a

1

(min)

.4-^ '

^'

1

Oxidation time

/ 1

900*»C

1

I

180

N2O

1 0 h1

I

150

L^

in

c o

1

90

(a) 100

,---'^"

/ X

.'0

b Y

L

T A <111>

" ^ <100>

1

'''°' ^

10"

Oxidation time

1 1 1 1 m 1

L

t

10^ 1 (min)

(c)

X

''

_^

-'

-' A'-'

>i . * . ' 'f '^' ' ^ ' . ' A . r 'f^

.''-•'' .^d \

^ ^ 1

.'

•

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-y^A

\ ^ •

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>'6

/

1000»C

r

^

A 1 rf n i i 1

10^ (b)

X

•

''

^

•

'JLX

^'

¥ ' ' .'".^'a' 3 ^ .'^^'

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-p- a '-^

'V'/d'

L

1

iV

^ ^

1 ^1,1.1

\ 111 i

10

1

1 1 « 1 1k A j j

10^

Oxidation time

10 (min)

Fig. 1.96 - Typical growth data for the furnace oxynitridation of Si: (a) Growth kinetics in N2O at various temperatures, (b) Growth kinetics in O2 and N2O at 900°C; (c) Growth kinetics in N2O for two wafer orientations at 900''C and lOOO^'C (After [280] and [283] modified).

Both molecular and atomic oxygen contribute to the growth of the Si02 film. Molecular oxygen diffuses through the growing film to react with Si at the Si02-Si interface. Atomic oxygen reacts at the surface of the film and/or gets into an exchange mechanism with O atoms of the film. 8.2.3. Film composition The composition of oxynitride films grown in N2O differs slightly depending on whether the film is grown in a furnace or in an RTP apparatus. Extensive chemical analysis data of films grown in N2O have been obtained by AES, XPS and SIMS analysis [262-266]. The maximum [N] concentrations found vary between 1% and 6% as sunmiarized in Fig. 1.97. • Furnace-grown films The distribution of nitrogen in an FON film differs from that of an RTON film. More N is found in the bulk of FG films. SIMS results for O2/N2O processes are shown in Fig. 1.98 a. For the two-step O2/N2O sample, the N profile peaks at the Si-Si02 interface at a concentration of « 0.55 at.%, with a width of «(5 ± 1) nm a t « 0.3 at.%. [N] near the top of the oxide, far from the Si-Si02 interface, is only « 0.03 at.%.

Silica, Silicon Nitride and Oxynitride Thin Films

115

The reoxidation of an O2/N2O oxynitride in O2 causes an unusual behavior. A new Si02 layer grows at the Si02-Si interface under the nitrogen peak, and the existing N-rich layer remains essentially intact (Fig. 1.98 b). This behavior suggests that nitrogen atoms are chemically bonded in the oxide near the interface, rather than bonded exclusively, at the interface, with silicon atoms. 6 ^

f

5

1 1 1 1 1

1

'

'

'

1 ~ ""

• « •

1 1 1

=

1 1 1

"~ 3 IT ~

c a> o c o O

I } \ y-r 1 ( 1 1 j T t 1 1 ,

•i® '

^@ i

~

r

f 1 n

'

r

"-' 4 h c o

1 1 1 1 ^ 1 1 1 1

1 1 1

: ®^i

! ®

2 h

1 I I __!_ I 1 1 I

~

<

1 h

j

1 1

, , , _4 , , ,

J J J J "n J J

I

1

__ '

j

i

•_ 1 1

,

n

4 -

-J I

- J

,

J

^® i

1

Fig. 1.97 -Maximum [N] values found in ETON films (oxynitrides grown in N2O): (D - N2O furnace oxynitridation ® - N2O furnace oxynitridation (D - N2O furnace oxynitridation ® ' N2O furnace oxynitridation ® - N2O furnace oxynitridation ® - N2O furnace oxynitridation ® - N2O RTF oxynitridation ® - N2O RTF oxynitridation ® - N2O RTF oxynitridation © - N2O RTF oxynitridation (li)-N20 RTF oxynitridation Q-N2O RTF oxynitridation (After [292] modified)

T-T-I

i

I I

1 !

id

b j - i ~ i . .4 1 1 1 . 1.-L-1 1 -1—LJ-I-X..I I 1 1 \ 1 1 1 1 1 1 i-,.i 1 t..i... 1J

900°C

lOOO^C

1100°C

1200X

Temperature

(^ C) 1.00

1.00

i

•]

0.75

T 0.75

0—^i^x1

-ll

«

/ -j

0.50 Sl_

r y^M*^

M

0,25

[-1 0.00

1

0 (a)

5

10

15

Depth (nm)

20

1

0 (b)

I

5

I

1

10

1

1

15

1

S

0.25

g

\v 1

..v^V. 1

0.50

iL

1

\

A

0.00 1

20

1

25

Depth (nm)

Fig. 1.98 - SIMS profiles of N, O, and Si (a) for a two-step O2/N2O oxide and (b) for a reoxidized O2/N2O oxide [281].

• RTP'grown films To highlight the difference in the amount of N and H introduced by the various RTON processes, oxide films nitrided in NH3 and N2O have been compared [275]. Figure 1.99 shows the N and H in-depth concentration profiles: of a control oxide obtained by RT oxidation (a), of the same oxide nitrided in NH3 (RTN) (b) and of an RT-oxide treated in N2O (c). The film thickness has been estimated at 5 nm using ellipsometry [275].

116

J5. Balland and A, Glachant

• A^ in-depth concentration We note the presence of nitrogen in the RTO film. This nitrogen comes from the gas ambient which was only 99.9% pure. We note also that, compared with nitridation in N2O, more nitrogen is found in the bulk of the RTN sample and that [N] at the Si02-Si interface is also larger. It is clear from these results that, in both cases, during the nitridation of Si02, the nitriding species diffuses and N piles up at the Si02-Si interface. • H in-depth concentration Identical [H] values are found in the RTO and RTON samples. This has been attributed to the fact that the water concentration [H2O] was about the same in the O2 and N2O gases used [275]. In contrast, [H] is much larger in the RTN film, as expected. InfraRed analyses show the existence of N-H and Si-H bonds with concentrations above 10^^ at/cm^ in the RTN-film, while these concentrations remain below detection limits for the RTON samples [275]. Complementary XPS experiments (as shown in Fig. 1.100) confirm that the only nitride species formed in the RTON films are Si-N species, whereas N-H, Si-H and Si-N species are found in the RTN sample [275]. Typical 0(ls) and N(ls) core level lines recorded at the interface reveal the presence of an N-Si bond peak at 397.8 eV. No peaks originating from N-H bonds and N-O bonds, which are expected to appear in the range of 398.5-400 eV and 400-404 eV, respectively, have been seen in the XPS spectrum [281]. The 0(ls) spectrum, whose main component appears at 532.2 eV, indicates that the SiOxNy structure is essentially the same as that of the tetrahedral Si04 network itself. 1 ^sro2 : Si

^

N\

. H

RTN . . . . 1 5 10

1 * * * ' *J

0 (a)

5 Depth

10 (nm)

0 (b)

Depth

(nm)

0 (c)

5 Depth

1 0 (nm)

Fig. 1,99 - Nitrogen and hydrogen in-depth profiles measured by SIMS in three different 5-nm-thick samples : a) Control oxide grown by RT oxidation (RTO), b) Oxide nitrided in NHj by RT nitridation (RTN), c) Oxynitride first grown in O2 at lOSO^'Cfor 5 s and then in N2O at llOO'^Cfor 30 s (RTON). (After [273, 275] modified).

Silica, Silicon Nitride and Oxynitride Thin Films

536

534

532

530

402 400

117

398 396 394

Binding energy (eV) Fig. 1. 100 - 0(1 s) and N(ls) core level XPS spectra measured at the interface for ETON [250]),

samples. (After

Any reduction in the concentration of hydrogenated species (-H and -OH, Si-H, Si-NH, Si-OH, etc.) in the oxynitride film should minimize the number of electron traps [273, 275] as well as the density of neutral defects by the formation of strong Si-N bonds (see § 4.7). RTON films are thus expected to show lower electron trap density, as confirmed below by electrical measurements. High Resolution Transmission Electron Microscopy has revealed [263, 273] the structure of the Si02-Si interface of RTON samples. Cross-sectional HRTEM images of RTON films, produced using the hydrogen free processes described above, show that process 3 of Table 1.07 gives the best results. In this case, the interface structure seems to be quite uniform, at least ordered within one or two atomic layers. Moreover, no anomalous oxidation behavior, like Si clusters or Si02 epitaxial layers, have been observed [273]. However, a transition layer, one or two atoms thick, has been found between the Si crystal and the amorphous oxide layer. This last result has been confirmed by means of a Transmission Electron Diffraction analysis performed at points A, B, C and D (Fig. 1.101).

Fig. 1.101 - Cross-sectional HRTEM image of the insulator/silicon interface of an RTON film formed (process 3) in O2 (1050°Q 5 s) and then in N2O (llOO^'Q 30 s). (After [273] modified).

• • • . f • • • • » • »j

wnnwiMmwww

mm

118

5. Balland and A, Glachant 8.2.4. Trapping properties

The trapping properties of MOS samples using either an oxide or an oxynitride film have been studied by submitting these samples to an electron FN injection from the gate electrode (at a constant current of: 10 mA/cm^) [275]. • Flat band voltage shift The variations in AVpB as a function of injected charge (Qinj) are represented in Fig. 1.102. Obviously, the oxynitride samples grown in N2O display a smaller AVpB than either the pure oxide film or the reoxidized RTN film. This means that (after pair production) hole trapping is smaller for N2O samples. The tendency of AVpB to saturate in the region of higher injected charge indicates a hole trap filling process and the saturation value is proportional to the trap density. During injection experiments, the gate voltage (VQ) must be readjusted to maintain the injected current constant. This shift in gate voltage has been plotted versus stress time for the above three samples, in Fig. 1.103. We note that AVQIS positive for the oxide samples, while it is negative for the reoxydized RTN oxide and nearly neutral for the oxide nitrided in N2O. The positive V^ shift is attributed to hole generation and trapping (confirmed by theVpB shift). On the contrary, negative VG shifts are attributed to the creation and the filling of new electron traps during the high-field stressing. We note that the creation of new traps occurs mostly in the samples nitrided in NH3. The differences observed between the three kinds of oxide films can be explained in terms of the broken bond model [10b]. 1.5

m 11.

1.0 U A

Fig. 1.102 - The AVfB observed after injection is plotted as a function of Qinj for: pure Si02(A), reoxidized NHs-nitrided Si02 (0) and N2Onitrided Si02 (m) (After [275] modified).

A' /

•0.5 r

:iS

RTO RTO/RTN/RTO RTO/RTON

I

0.0

u

-1

l_l

0.5

U

1

1.0

1

1

1

1

1

1.5

2.0

Injected charge (Ccrrr^)

• Interface trap density The change in interface trap density Dit after an FN injection of ±0.01 C.cm-2 is shown in Fig. 1.105 (right). First, all oxides last exposed to N2O during growth show a smaller D^ increase for positive gate bias during e-injection than those submitted to negative bias, whereas samples last exposed to O2 show the opposite behavior. Second, oxides grown in O2/N2O and (especially) in N2O show less Dit generation than the control oxide. Similar trends are found after irradiation experiments.

Silica, Silicon Nitride and Oxynitride Thin Films

Fig. 1.103 ' The gate voltage adjustment AVQ^ necessary to maintain a constant injection current (linj =0.1 A/cm^) is plotted versus stress time for the same samples as those of Fig. 1.102. (After [275] modified).

0

RTO/RTN/RTO

t'

119

RTO/RTON

RTO

+0.4 h I

10

I

I

20

I

30

-L 40

50

Stress time (s)

8,2.5. Dielectric brealidown • LoW'field leakage Breakdown in ultra thin silica films results from an increasing low-field leakage due to the enlargement of defect-related weak spots. As visible in Fig. 1.104, after stress, this anomalous leakage current is visible at low-field (< 10 MV/cm), whether the structure has been positively or negatively biased. Low-field leakage is thought to be due to the generation of defects or weak spots, located on positive charges and/or trap sites, near the injecting interface. All currents measured after a high-field stress seem to be the sum of two components: a leakage current Idef flowing through the defective area and If, a current flowing through the remaining area [275]. 1 0"

c ^ 10

10

-11

1 0

12

6 8 10 Field (MV.cm^)

6

8

10

Field (MV.cm^)

Fig. 1.104 - Leakage currents measured on the same samples as those of Fig. 1.103 after a negative bias (left) and a positive bias (right). The insulator thickness is 6 nm. (After [275] modified).

120

B, Balland and A. Glachant

• Charge-tO'breakdown In Fig. 1.105, average QBD values obtained for a small constant injection current (Jjnj = ±4.10"^ A.cm-^) are given. First, QBD is higher in the O2/N2O and O2/N2O/O2 samples than in the control oxide. Second, QBD for the N2O oxide is smaller than for the other samples, especially for V Q > 0. Such an asynmietric behavior with bias suggests that the Si02-Si interface (injecting for V Q > 0), is much rougher than the Si02-gate interface. Joshi [290] proposed that the lower QBD values observed for N2O oxides is caused by an increase in roughness at the Si02-Si interface, especially for oxidation temperatures of 1000°C or above. This roughness is thought to enhance locally electron injection, leading locally to higher current density and lower QBD- This hypothesis has been validated by taking TEM pictures of the Si02-Si interface to evaluate the roughness. The interface appears reasonably abrupt, with a roughness of « ± 2 monolayers (± 0.27 nm) encountered over a lateral distance of « 0.1 |im. About the same roughness is obtained for a 10-nm control oxide grown in O2 at 900°C. As illustrated in Fig. 1.105, these data suggest that the two-step O2/N2O oxide is preferable (process c) to oxidation in N2O alone (processes a or b). The corresponding leakage current is smaller, which will result in a better resistance to dielectric wear-out. 100 i

E

o O

10 1

O

0.1

0.01

10 ^H

i

1 • !1 • ' H1 I II I -

J 1ll

+ 0.01 C. cm^ -0.01 C. cm^

J

J 1 1 L

LIJlII • \ a)

b) c) d) Process

a)

b)

c)

I d)

Process

Fig, 1.105 - (Left) Charge-to breakdown (QBD) ^^d (right) change in interface trap density (Dif) measured after FN injection, for gate insulators grown in various conditions: (a) furnace oxidation in O2 at 900°C, (b) two-step oxidation first in O2 and then in N2O (90 0°C, 60 min), (c) like (b) and then reoxidation in O2 (900°C, 60 min), (d) furnace oxidation in N2 O at 1000°C (60 min). For FN injection + (resp -) indicates that a positive (resp. negative) charge ofO.OlC.cm^ has been injected (After [280] modified).

8.2.6. Reliability MOSFETs using RTON films as a gate dielectric display excellent performance and good inraiunity to hot-carriers [282]. Figure 1.106 shows that the degradation in threshold voltage, due to channel hot carrier effects, is indeed less when N20-grown gate dielectrics are used [283]. Moreover, the effective carrier mobility, both in n-MOSFETs and p-MOSFETs is virtually unchanged after hot carrier injection when N2O gate dielectrics are used.

Silica, Silicon Nitride and Oxynitride Thin Films

121

Fig. 1.106 -The degradation in threshold voltage due to channel hot carrier injection is plotted versus gate voltage for p-MOSFETs possessing either an oxide or an N20-grown oxynitride as gate dielectric. (After [292] modified).

- 4

- 6

Gate voltage (V) Oxynitride films grown in N2O display a better resistance to process-induced damage (such as that caused by plasma during the polysilicon etch and resist etch steps) and to dielectric wear-out. They, moreover, display a better immunity to radiation (suppression of both radiation-induced neutral traps and positive charge build-up) [292, 293], It has also been shown that N20-oxides grown on RIE-treated surfaces show higher breakdown fields, lower leakage currents and significantly improved TDDB characteristics. They thus have been used as tunnel dielectrics to manufacture reliable EEPROM devices with slow "window closing" and high endurance. The leakage current induced in oxynitride films by such stresses as: successive voltage ramp stress, constant voltage stress, alternative stresses (unipolar or bipolar) is suppressed when the films are grown in N2O. 8.3, THIN OXYNITRIDE FILMS GROWN IN NO

Unlike growth in N2O, only limited data on growth in NO is available. 8.3.I. Principle and growth kinetics Preliminary results indicate that growth is more "self-limited" in gaseous NO than in N2O. For example, while the exposure of bare silicon to N2O ambient at 1050°C for 100 seconds produces a 5.2-nm-thick layer, exposure to NO, under the same conditions, produces only a 2.5-nm-thick layer [292]. This is probably due to the larger amount of N incorporated in the latter case, the N-rich silicon layer acts then as a barrier blocking the diffusion of the oxidizing species towards the interface. Growth kinetics in NO when the starting materials is Si02 is illustrated in Fig. 1.107. We note that growth is extremely slow. The increase in [N] is probably due to the complete dissociation of the NO molecules and to the subsequent direct reaction of N and O atoms with silicon, whereas in the case of growth in N2O, this direct reaction is less probable [292].

122

B. Balland and A. Glachant

10.0

Fig. 1.107 - Growth curves ofoxynitride films obtained by nitriding Si02 films of various thicknesses in NO at 1000°C. (After [252] modified).

40

60 NO anneal time

80 (s)

8.3.2, X-ray assisted growth at room temperature The formation of an oxynitride film on silicon in NO is possible at room temperature when one operates in Ultra High Vacuum under soft X-ray irradiation. For example, a (111)oriented single Si crystal can be cleaved in an UHV chamber (residual pressure < 5 10" 11 mbar) [301-303]. After exposure to 10"^ mbar of pure NO gas, the NO-covered surface is irradiated at grazing incidence. This leads to the formation of Si-N and Si-O bonds due to the dissociation of NO-molecules by the Si dangling bonds from the Si(lll)-2 x 1 reconstructed surface (an ultrathin, passivating, oxynitride layer forms). The remaining NO molecules, adsorbed at the surface, give rise to further oxynitride growth upon irradiation under X-rays. Thin oxynitride films (0.6 -1.0 nm) can thus be formed. 8.3.3. Electron beam-assisted growth at moderate temperature The exposure of a Si(100)-2xl surface to a low pressure NO gas (< 10-5 mbar) at moderate temperature (from room temperature up to 600°C) leads to the formation of a «0.5- nm-thick amorphous passivating oxynitride layer [294]. The irradiation of the surface with a low energy (100 eV) electron beam (maximum fluence= 1.6 lO^^/cm^), during exposure to the NO gas, induces the growth of an amorphous, thin (> 3 nm), oxynitride film whose composition depends on temperature. At room temperature, oxygen-rich films are formed, whereas at 600°C, nitrogen-rich layer are formed. It has been suggested [294] that the observed electron beam-induced growth at room temperature is the result of both: • the reaction of activated N and O species, produced by the dissociation of NO molecules, with free Si atoms from the substrate, • the electromigration of NO", O^" and/or O" ions through the oxyde layer formed, up to the interface, where they react with the Si atoms of the substrate. An increase in temperature, from room temperature to 600''C, leads to an enhancement of the thermal diffusion, through the oxide film, of the NO species adsorbed on the surface. These diffuse to the insulator-silicon interface, where they react.

Silica, Silicon Nitride and Oxynitride Thin Films

123

8.3.4. Film composition Comparing the N(ls) XPS spectra of oxynitride films grown by annealing silica samples in N2O and NO for identical conditions, shows that the N(ls) signal is much larger for samples grown in NO, thereby indicating a higher [N] concentration. The [N] profiles obtained by SIMS for both types of oxynitride show that N mostly piles up near the Si02-Si interface. The required thermal budget is found to be much lower for the NO-process than for the N20-process. The Composition Parameter (CP), i.e. ratio [0]/([0] + [N]), and the thickness of the obtained oxynitride film, measured by AES can vary between 0.50 (0.5 nm) and 0.83 (3.0 nm) [294]. Moreover, the energy gap, determined using REELS is found to vary between 6.0 eV (CP = 0.59) and 7.7 eV (CP = 0.83). These values are in good agreement with the values expected for such compositions using optical absorption [295]. 8.3.5. Electrical properties Basically, the oxynitride films grown in NO display excellent electrical and reliability properties, even better than those of films grown in N2O. Both n- and p-MOSFETs using NOgrown oxynitrides exhibit excellent performance and a good resistance to hot-carrier effects [286-287]. Less interface states are generated during an electrical stress when an NO oxynitride is used. This improvement is due to the presence of N atoms at the Si02/Si interface which reduce the interfacial strain through the replacement of strained Si-O bonds by Si-N bonds. It is also due to the replacement of weak Si-H bonds by strong Si-N bonds, which renders the generation of interface states by bond breaking under electrical stress less likely.

40 - a Ofe 20 : 0 • •

>

^ 1

NO N20

0 -20 1 •40 1 1 ...

1 1

20

_i

1

1

1—1—1—1—1—1—1—1—1—1—1—1—I

40

60 80 100 Stress time (s)

Fig, 1.108 - Charge trapping characteristics for various MIS insulators. The shift in gate voltage necessary to maintain a constant injection current (Iinj = 200 mA/cm^) has been plotted versus stress (injection) time for a S.l-nm-thick untreated oxide and for a similar film nitrided in N2O and NO. (After [290] modified).

124

B, Balland and A, Glachant

Likewise, due to the absence of hydrogen in the processing ambient, NO-based oxynitrides display negligible charge trapping, as illustrated in Fig. 1.108. A significant improvement in TDDB characteristics is thus obtained in such films. The excellent breakdown properties of NO-based oxynitrides are due to the much reduced charge trapping and to the electrical stability of the Si/oxynitride interface. NO-based oxynitrides can be used as tunnel dielectrics in EEPROM. Figure 1.109 shows that over a wide range of oxide thicknesses, the Stress Induced Leakage Current (SILC) in NO-processed films is always lower than in thermal Si02 films [290]. 8.4. CONCLUSION

The use of oxynitride films grown in N2O and in NO is extremely promising due to the simplicity of their fabrication process, to a good control of their thickness and to the excellent electrical characteristics obtained. Since the thermal budget required to incorporate the same amount of nitrogen in Si02 is much lower for the NO process than for the N2O process, the NO process could become a process of choice. This technology is key to manufacture submicrometer flash-EEPROMs. 10

-5

F L r

E o <

r

^-''' < ' . -

-O"--

^ ^ x

\

10

6

h-

t

H

V

• -

\ 0 SD2 • N O Annealed SiOz

o

o

\N

N

\

\ \ \

\ \

\N \

tr

\

\

\

b

N

Fig. 1.109 - The Stress Induced Leakage Current (SILC) measured for an applied field of 6.2 MV/cm is plotted as a function of oxide thickness. The SILC has been measured both for a regular thermal oxide film and for oxide an film nitrided in NO. An injection stress of 100 mA/crn^ has been applied for 10 seconds. (After [290]).

N

•

I

t_J- 1 11 1 1 11 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1

4.0

5.0

6.0

7.0

Oxide thickness (nm) 9. A BRIEF REVIEW OF LOW-TEMPERATURE ASSISTED PROCESSES Current high-temperature furnace processes, and even RT processes, induce such undesirable effects as the redistribution of doping atoms and the growth of stacking faults. Many attempts are thus under way to grow or deposit dielectric films at room temperature or close to, it through techniques requiring low thermal budgets. Several ways to enhance the reactivity of the active species have been tried. The enhancement techniques make use of photons, electrons, plasmas and reactive RF sputtering. We examine next these techniques as well as the properties of the films thus produced.

Silica, Silicon Nitride and Oxynitride Thin Films

125

9.1. PHOTON-ENHANCED PROCESSES

Both silicon nitride and silicon oxynitride can be obtained at low temperature using photon-enhanced processes. 9.1.1. Basic equipment Thin silicon nitride films may be obtained either through the direct reaction of an activated NHx (x < 3) species with the silicon substrate [296] or by deposition [86, 297-298]. In each case, the Si(lOO) wafer is introduced into a quartz reactor in front of an excitation source. This source may be an ex-situ UV-light source (e.g. a low-pressure mercury lamp with resonance lines at 184.9 and 253.7 nm) [297-298] or an ArF excimer laser [86]). This source may also be an in-situ UV-light source, the gases involved in the chemical reaction being then used as the gases of a pseudo-lamp operating in the normal glow discharge domain of a DC discharge. The wafer is heated from the rear by means of a halogen lamp. The wafer temperature reached varies between 100 and 800''C i.e. well below that of usual pyrolytic processes (for which T < 900°C). 9.1.2. Photon-enhanced nitride growth The reactive NHx species are produced after absorption of an ex-situ UV-light by the NH3 molecules [296]. NH3 is known to absorb wavelengths between 160 nm and 220 nm and to dissociate according to the following three equations: NH3 + /iv -^ NH2 + H

(1.28)

NH3 ^-hv-^NH + 2H

(1.29)

NH3 + hv "-> NH-\-H2

(1.30)

Energy considerations show that if X. < 213 nm, the NH2 radical is in an excited state. At "moderate" temperature (400°C < T < 800°C) a nitride film grows on silicon. Growth is quick during the initial stage but saturates with increasing time, just like in the case of HT thermal nitridation. Thicknesses of 2.7 nm (400°C, 1 h) and 6.2 nm (800°C, 1 h) have been obtained [86, 296], to be compared with 4.6 nm for the standard thermal process (llOO^C, 40 min). 9.1.3. Photon-enhanced nitride deposition Thin silicon nitride films can be deposited at low pressure (< 5 mbar) and low temperature (100-400°C) by the photon-enhanced decomposition of hydrazine (N2H4) and silane (Si H4) or ammonia and silane [297, 298], with Hg vapor being introduced in the reactor. An irradiation with a wavelength of A. = 253.7 nm produces, in the pseudo-lamp, an excitation of the Hg atoms to the 3?^ state. When colliding with silane or hydrazine molecules, the Hg atoms release the absorbed energy, and the silane or hydrazine molecules decompose.

126

B. Balland and A. Glachant

The decomposition products thus form a deposit on the substrate. Growth rates of up to 10 nm/min can be obtained at 200°C, depending on the total pressure and on the distance between the sample and the light source. 9.1.4. Composition and properties of LT- PE nitride films The Auger spectra of the LT-PEnitride films grown on silicon (direct reaction with Si) reveal a small carbon contamination at the nitride surface, and a decreasing oxygen contamination, when T increases from 400 to SOO^'C. Auger spectroscopy yields values of [N] of 50at.% Ih, Hg lamp) [296], of 48at.% (400°C, after 2000 pulses of 15nJ.cm-2, Arf excimer laser [86], and 69% (800°C, Ih, Hg lamp) [296]. Films grown at 400°C are thus nitrogen-rich oxynitride films rather than nitride films. However, the films grown at the highest temperature (T = 800°C) show a composition parameter which is very close to that of LPCVD nitrides. The IR absorption spectra of LT-PE deposited nitride films reveal the presence of Si-N or Si-H bonds [297]. Compared with films deposited using SiH4+NH3 at 900X, LT-deposited films display: a lower dielectric strength (10 MV/cm), a lower dielectric constant (5.5) and a higher etch rate in NH4F-HF (0.1 |im/mn). 9.1.5. Photon-enhanced oxynitridation processes Thin oxynitride films have been deposited [299] or grown [300-304] directly on silicon substrates at temperatures below 500°C, using the same apparatus as that described in § 9.1.1. and a gas mixture containing argon, SiH4 and NH3. Oxygen (O2) (from 0 to 2%) has also been added to the reaction gases. Activation was achieved by a DC electrical discharge in the pseudo-lamp. The deposition of oxynitride films can also be achieved using a pulsed ArF laser beam (K = 193 nm) and two different sets of precursor gases: SiH4 and SiC^2H2 combined with NH3 and N2O. The Si substrate is heated up to 500°C [299]. The residual pressure inside the preparation chamber, prior to processing, is kept below 10-^ mbar. The influence of various parameters such as: the laser pulse energy, the repetition rate, the volumetric ratio of reactive gas and the substrate temperature on the deposition rate, has been investigated [299]. The deposition rate (whose maximum value is « 0.17 nm/J.pulse) is found to increase with the average energy density, the repetition rate and temperature. The SiH4 process exhibits a stronger temperature dependence than that using SiC^2H2. The films deposited with SiH4 are of higher quality than with SiC^2H2. A maximum film thickness of 400 nm has been obtained by optimizing the process parameters [299]. 9.1.6. Composition and properties of LT-PE oxynitride films As-deposited LT-PE oxynitride films have been analyzed by ellipsometry and FTIR spectroscopy. Their optical refractive index n varies between 1.41 and 1.81 (to be compared with 1.46 and 2.05 for stoichiometric Si02 and Si3N4 respectively). The pulse frequency of the laser is found to influence the value of n: an increase in frequency leads to a decrease in n (0.001 per Hz), when all other parameters are kept constant [299].

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FTIR spectra reveal the existence of small concentrations of O-H, Si-OH, N-H and Si-H groups in the deposited films, i.e. that the quality of these films is, in this respect, comparable to PECVD films. 9.2. ELECTRON-ENHANCED PROCESSES

9.2.1. Electron-enhanced nitride growth Atomic and ionized nitrogen are effective in nitriding silicon at low-temperature. Uniform ultra thin nitride films can be grown at low temperature (T < 50°C) on Si(100)-2xl surface, in a UHV environment, by exposing the substrate to low anmionia pressures (P(NH3) < 10"6 mbar) and by simultaneously bombarding it with a flux of high-energy electrons (0.3 keV < E < 2.5 keV, flux < l.SxlO^O cm-2 s-l) [88, 141]. The rate of Electron-Enhanced (EE) nitride growth at room temperature for: a partial pressure P(NH3) of 3x10"^ mbar, an electron energy of 1.3 keV, and a flux of 1.3 X 1020 cm-2 s-1, is found to be half the growth rate at 950X (i.e. 0.8 nm/h). The growth rate doubles when the ammonia pressure doubles. This electron-enhanced growth has been attributed to the dissociation of NH3 molecules adsorbed at room temperature on the Si(lOO) surface of the wafer. This dissociation yields nitrogen atoms [136-138] and ions, in an excited state, which readily react with the underlying silicon atoms. Consequently, the local growth of silicon nitride can be obtained by using direct electron beam writing [305, 306]. The Si dangling bonds from the reconstructed silicon surface have been shown to be effective in the dissociation of NH3, forming Si-N and Si-H bonds [308, 309]. The breaking of Si-H bonds by electron beam thus restores the Si dangling bonds and the surface reactivity. 9.2.2. Electron-enhanced nitridation of silica films For temperatures below 800°C, the direct thermal nitridation of silica by NH3 cannot be achieved. The nitridation of silica can however be performed at room temperature using an electron beam [141, 215-227]. The electron energy can be as low as 3 eV (using an inverse photoemission electron gun). The usual process parameters are: 3 eV < E < 300 eV, with an electron flux < 10^6 cm-^ s'l. The use of anmionia is essential in this EE-nitridation process since N2 alone or mixtures of N2 and H2 are shown to be ineffective. The extent of nitridation is found to depend on electron energy and fluence and on P(NH3). The amount of incorporated nitrogen increases as LogP(NH3). The irradiation of Si02 with high-energy electrons induces the breaking of Si-0 bonds [241, 288]. A substantial amount of Si-O bond breaking is obtained for a total electron flux above - 2 x lO^^ cm"^ s-1 [141, 216]. However, lower electron fluxes have been shown to be sufficient to produce a substantial amount of oxide nitridation.

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This clearly shows that the dissociation of NH3 and/or the ionization of nitrogen (depending on the energy of the primary electrons) play an important role in inducing the reaction. In fact, the reacting species are NHx amine groups (with 0 < x < 3), which are created by the impact of primary and secondary electrons [141, 219]. 9.2.3. Composition and properties of LT-EE oxynitride films Auger in-depth [N] profiles, measured in LT-EE nitrided silica films show that [N] increases with electron energy. For example, 4-eV electrons induce a superficial reaction at room temperature (limited to a depth of « 1 nm from the oxide surface) [225], while 1.3-keV electrons lead to the formation of an inhomogeneous oxynitride whose N content decreases down to the Si02-Si interface [141, 216]. Compared with the Raman spectra of thermal NO films, those of LT-EE oxynitride films exhibit additional lines attributed to a-Si3N4 and hydrogenated species (Si-H, N-H, 0-H). These results are confirmed by IR analyses showing: a strong absorption due to nitrogenated species (N-H, N-0 and Si-N), the formation of a nitride environment with Si-N local groups and the presence of many N-H and Si-H species [141]. This electron-enhanced nitridation process is shown to produce nitrided oxide films which offer a better resistance to energetic electron bombardment than thermal NO-films [141]. 9.3. ION-ENHANCED DEPOSITION PROCESSES

We limit next our review of Ion-Enhanced (IE) nitridation techniques to reactive RFsputtering [125, 126, 307, 310-314]. Ion-implantation [100-104, 127, 300] cannot be considered as an LT-nitridation process since it generally requires an annealing above 850°C to form the insulating thin film. 9.3.1. Nitride deposition by RF-sputtering Amorphous silicon nitride films can be deposited on Si wafers at a high rate, at a temperature slightly above room temperature, by the DC reactive sputtering of a pure Si target in an (Ar + N2) atmosphere, using a sputtering apparatus of the planar magnetron type [125]. Films as thick as 600 nm can be deposited. The total gas pressure is set a t « 8.10-^ mbar, when the N2 partial pressure is varied from 3 to 8.10-^ mbar [125]. The deposition of nitride films at room temperature is also possible using the interaction of a monoenergetic nitrogen ion beam (generated in a separate duoplasmatron ion source), with a Si target located in the deposition chamber (the chamber pressure is maintained at the required low level i.e. < 8 xlO'^ mbar) [126, 307]. Regardless of the partial pressure of N2 (8 x 10"^ to 10-"^ mbar), the stoichiometry of the films depends on the sputtering yield of Si in the 0.4-20 keV range. Nitride layers can be obtained at low DC-voltage, but only with a low deposition rate («1 nm/min).

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The incorporation of nitrogen into the growing layer could be due to any of the following three processes: • Nitrogen ions, first implanted into the target, are then sputtered, bonded or not to Si atoms, by the subsequent ion bombardment. The [N]/[Si] ratio of the deposited layer varies conversely with the sputtering yield of silicon, • N2 molecules could be adsorbed on the target and then sputtered as atomic or bonded N-Si species towards the growing film, • N2 molecules could be adsorbed on the growing film itself during its formation. The additional irradiation of the growing nitride film by an electron beam increases the probability that N2 molecules adhere to the surface and increases the deposition rate. 9.3.2. Composition and properties of deposited nitride films The properties of nitride films deposited by RF-sputtering have been investigated [125]. They are shown to depend on the partial pressure of N2. Films deposited with P(N2)>5x 10"^ mbar exhibit excellent properties: (2.06 < n < 2 . 1 0 , etch rate<7 nm/min, resistivity - 10^^ il.cm, residual film stress ~ 12.3 x 10^ dyn/cm^) even if they have been deposited at an elevated deposition rate (e.g. > 100 nm/min). The [N]/[Si] ratio of these nitride films has been measured using RBS and AES [126, 307]. The sputtering yield of silicon must be reduced to 0.5 atom/ion to get [N]/[Si] = 1.25, i.e. to reach stoichiometry. 9.3.3. Oxynitride deposition by RF-sputtering Amorphous oxynitride thin films can also be prepared by the reactive RF sputtering of a silicon target in a (O2 + N2) gas mixture [310-314]. The [0]/[N] ratio of the deposited film can be adjusted by varying the [02]/[N2] gas ratio in the ambient. The residual pressure in the sputter chamber must be reduced to lO-'^ mbar prior to deposition. The other process parameters have the following typical values: total gas pressure = 8 x 10"^ mbar, RF power = 400 W, DC voltage = 3.6 kV, substrate temperature = 127°C, and deposition rate = 6 nm/min. Film thicknesses can be assessed by interferometry (± 5%) or by stylus profilometry. The refractive index at X, = 589 nm is shown to vary between 1.96 (100% N2) and 1.57 (76% N2; 23% O2). Various composition parameters (0.43 < [0]/([0]+[N] < 0.94) have been obtained and measured (through AES and RBS) [310-314]. 9.4. PLASMA-ENHANCED (PE) PROCESSES

Plasma-assisted processes have been used in order to fabricate, at relatively low temperatures, layers whose thickness is compatible with microelectronics.

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9A.\. Principle The experimental plasma-enhanced deposition apparatus operates in the 250-1200°C temperature range, using excitation frequencies between 30 kHz and 2.45 GHz. The basic idea is to introduce energy into a gaseous medium through an RF discharge so that the molecules get "heated". These molecules can then deposit on (or react with) a substrate at low ambient temperatures [105]. Excitation can be generated in the inductive or capacitive mode. In the latter case, ring-shaped electrodes [95], and parallel plates are used. The formation of the plasma between two neighboring Si wafers, as in the case of a multiple electrode holder (illustrated in Fig. 1.110.), can reduce considerably the damage done to the internal wall of the reactor. There also exists plasma systems [79] in which the plasma chamber is separated from the reaction chamber. The defects introduced in the sample by exposure to charged particles are thus eliminated and the reaction conditions are well controlled. In this case, the reactive species are transferred from the plasma to the reaction chamber by means of a differential pumping system [79]. The possible deposition on the samples, of silica sputtered off the plasma chamber walls, can also be minimized by placing the wafers sufficiently far from the RF electrode [79-84]. This results in a redeposition of sputtered silica on that wall, before the sputtered material can reach the wafers. RF power.

Ti rods in ^ quartz tube

Gas inlet (N2, NH3)

Wafers

Fig. 1.110' Schematic view of a plasma-enhanced nitridation reactor (after [229] modified)

Furnace

Quartz tube

Vacuum outlet

The use of a DC bias makes possible either the reactive etching of the Si wafer (cathode biasing eliminates the natural oxide layer [84]) or an enhancement of the nitride growth rate (anodic nitridation [84, 115]). Nitride films can be fabricated by plasma-enhanced CVD on substrates kept at a "moderate" temperature (i.e. between 150 and 500''C). The plasma parameters can vary widely: RF frequency (30 kHz-2.45 GHz), RF power (10-1200 W), gas mixture, total pressure (0.25-7 mbar) [116, 121, 123, 310]. The maximum achievable growth rate can be as large as 600nm/min (for plasma-enhanced CVD deposition) or 0.13nm/min (for direct plasmaenhanced nitridation [162]).

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9A.2. Plasma-enhanced nitridation of silicon The maximum thickness of films produced by the direct nitridation of Si in a nitrogen plasma is about 10 nm [85]. The obtained films are indeed silicon nitride but exhibit some oxygen and carbon contamination. A typical dielectric strength of ~ 10 MV/cm has been measured. These nitride films can be considered as potential candidates to fabricate ultra thin gate, tunnel, and DRAM memory insulators for VLSI devices. 9A.3. Plasma-enhanced nitridation of silica The nitridation of thin silica films has been performed in N2 or NH3 plasmas at temperatures ranging from 300 to 700°C. The plasma is ignited by a 90-450 kHz RF generator. The frequency range is chosen well below the ion transit frequency (- 4 MHz), to maximize the ion bombardment of the substrate, (the substrate is a silica film 10 to 20 nm thick, thermally grown on p-type Si(lOO)). The other main process parameters are: pressure (= 0.1-1.0 mbar), RF-power (= up to 50 mW/cm^) and t > 2 h, [229]. The [N], [O] in-depth profiles measured by AES, reveal: an enhanced nitridation at the surface of the oxide, little nitrogen incorporation in the oxide bulk, and the existence of a small nitrogen pile-up at the Si02-Si interface, when NH3 is used, or the formation of a near homogeneous oxygen-rich oxynitride, when N2 is used [229]. These profiles have been confirmed by etch rate measurements. 9.4.4. Plasma-enhanced nitride deposition Several gas mixtures can be used: NH3+SiH4, SiH4+N2+H2, SiH4+N2(+Ar), NH3+SiH4+N2. Let us consider the case of a NH3 + SiH4 gas mixture and a plasma system with two separate regions (one for reaction and one for deposition). A plasma is generated in the N2 (or NH3) inlet tube. The activated nitrogen (N2*) reacts with SiH4 (diluted in a suitable inert gas like Ar) and forms Si3N4 (or more generally SixNy) according to the following reaction [110]. The reaction product deposits then as a thin film on the substrate surface. 2 N2''+ 3 SiH4-^ Si3N4 +6H2

(1.31)

Chemi-luminescence emission measurements performed during PECVD show that in fact Si-H, N-H and Si-N radicals, as well as excited N2* molecules, are present in the reaction zone [110]. It has been inferred that two kinds of reaction take place: homogeneous (in the reaction volume) and heterogeneous (at the substrate surface). 9.4.5. Composition and properties of PECVD nitrides Depending on the preparation conditions, the deposited films display an excess of Si [76] and a substantial [H] content (from 4 to 39 at.% [109]). The etch rate of the films thus produced, measured at 25°C using a 13:2 NH4F/HF solution, is found to decrease with the hydrogen content [109]. Moreover, if the [Si-H]/[N-H] ratio increases, the refractive index increases also [114].

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The ammonia-free process (using a N2 + SiH4 mixture) leads to the formation of a nearly stoichiometric nitride film with little N-H bonds and less hydrogen [112]. The resistivity of the films thus produced exceeds lO^^ Q.cm and their dielectric strength is about 6xl06V/cm[lll]. 9A.6. Plasma-enhanced oxynitride deposition Oxynitride films can be deposited by plasma-enhanced CVD for substrate temperatures ranging from room temperature to 430'^C, for a wide range of plasma parameters (RF frequency: 30 kHz-2.45 GHz, RF power: 5-300 W, gas mixtures: NH3 + SiH4 + N2O, SiH4 + N20, SiH4 + N2 + 02, SiH4 + N2 + N20, N2O + NH3 + SiH4 + H2, total pressure: 0.7 X 10-3 mbar-1.2 mbar) [310-315, 317, 318]. Film as thick as 4 |iim can be achieved using the PECVD method [315]. Oxynitride films can also be grown by the direct nitridation of a silicon substrate using the same parameters [237] as above but in a gas mixture of: NH3 + H2. In this case, the film does not exceed 6 nm [110]. After the chemical etching of the sample to eliminate the native oxide layer, a residual oxide film, only 0.3 nm thick remains. An 0/N ratio of 1.5 and a significantly smaller amount of excess Si, compared to ultra thin thermal oxide films, is found using AES. Oxynitride films, only 1.3 nm thick, tum out to be good oxidation barriers up to 980°C and reveal excellent resistance against electron irradiation. Various SiOxNyHz film compositions have been achieved by PECVD, depending on the deposition parameters [315]. An SiO2.06N0.09H0.i8 sample has revealed a refractive index of 1.46 (at X = 632.8 nm), while an SiO0.70N0.24H0.24 sample has exhibited a 1.94 value. The optical forbidden gap EQ has been deduced from Tauc's law [295]. E Q is found to vary between 5.6 ± 0.1 eV (for [0]/([0+N]) = 0.046) and 8.9 ± 0.1 eV (for [0]/([0+N]) = 0.984). 9.4.7. Applications A bilayer made up of SiOxNy and SiNx deposited by PECVD has been used as the gate insulator of an amorphous silicon thin film transistor (TFT) [316]. The presence of this bilayer leads to a decrease in the density of trapped charges, if the thickness of the SiNx layer is reduced. Unlike what happens when the SiNx l^y^r is used alone, the bilayer introduces no deterioration in the switching characteristics. The stability of MIS tunnel diodes, which use ultra thin oxynitride films (1.3 nm) is shown to be better after a "life test" at 250°C than regular MIS tunnel diodes which use an oxide film of the same thickness [ 162]. 10. SUMMARY AND CONCLUSION A continuous research effort is under way to improve the characteristics of dielectrics needed for VLSI and ULSI devices. Among the several materials which have been investigated to replace thin thermal silica, mostly, silicon nitrides and oxynitrides have retained attention.

Silica, Silicon Nitride and Oxynitride Thin Films

133

Silicon nitride is attractive because it is an excellent barrier against the diffusion of doping or metal atoms, because of its radiation hardness and because of its good resistance to oxidation. It is, however, inadequate due to its high hydrogen content, its poor interface with silicon and its large leakage current. Thus silicon nitride alone can only be applied towards local oxidation technology. Thin Si3N4 - Si02 bilayers, used in MNOS structures, have resulted in unsatisfactory threshold voltage stability (due to the high trapping efficiency of both the nitride bulk and the nitride/oxide interface). It was thus challenging to achieve the direct conversion of Si02 thin films into SiOxNy by directly incorporating nitrogen into the film. This can be done using three main processes: the thermal nitridation of Si02 in ammonia (NO thin films), the thermal reoxidation of nitroxide thin films (RONO thin films) or the thermal oxidation of sihcon: in N2O (or NO) or successively in O2 and N2O (or NO) (RTON thin films). • The thermal nitridation in anmionia of thin thermal Si02 films (« 10 nm) has attracted attention for a number of reasons: better resistance to irradiation, greater resistance to impurity diffusion, lower interface and trapping densities than MNOS structures, higher dielectric constant, higher dielectric strength, greater bias and temperature stability and greater stability when submitted to high current density. The nitroxides thus formed exhibit in fact one or two maxima in the nitrogen concentration profile, below the film surface and/or at the insulator/silicon interface). These oxynitride or nitride layers are interesting because they offer two efficient barriers against impurity diffusion (at the gate/insulator and insulator/silicon interfaces) and resistance to oxidation (at the insulator surface). The interfacial nitrogen pile-up can be minimized using Rapid Thermal Nitridation. However, thin oxide films nitrided in NH3 cannot prevent the incorporation of hydrogen at the dielectric/silicon interface, and exhibit a large electron trapping. • An additional reoxidation of nitrided oxides reduces both electron trapping and interfacestate generation remarkably, without affecting other properties. However, under such conditions, it has been observed that the masking effect of the oxynitride layer vanishes as the nitrogen content from the gate-nitroxide film interfacial region decreases due to reoxidation. Hole trapping at the silicon-insulator interface is also expected to occur if the annealing treatments are carried out without the presence of an intentional (i.e. controlled) low partial pressure of oxygen. The RONO layers still possess improved electrical characteristics, enhanced resistance to dopant diffusion and also improved radiation hardness, compared to ultra thin Si02 films. However, this process is not easy to optimize and multi-step HT cycles are not desirable if one wants to manufacture ULSI circuits. • To solve these problems, in recent years. Rapid Thermal Processing (RTP) has been proposed. RTP makes possible: fast changes in process temperature and gases and short processing times. These advantages also enable one to perform multiple processing in a single chamber. However, the formation of high quality RONO films requires a careful optimisation of the RTP sequential process.

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An alternative approach is to grow thin oxynitride films in an RTP reactor using nitrous oxide (N2O) or O2 followed by N2O. The RTP method permits one to avoid long HT treatments and to better control the thickness of the oxynitride film. This hydrogen-free process incorporates a low concentration of nitrogen (~ 5 at.%) at the Si02-Si interface and thus, the ultra thin (< 10 nm) oxynitrides formed still offer an interesting barrier to the diffusion of dopant impurity from the substrate. These ultra thin oxynitride layers display: a high charge to breakdown, reduced interface generation and less charge trapping compared to Si02, NO and RONO thin films. However, only the oxynitride films formed via consecutive oxidation in O2 and N2O ambients have a large charge-to-breakdown value (> 90 C.cm-^) and display a quite uniform interface ordered within at least one or two atomic layers. Moreover, the levels of N incorporated in these dielectrics may not be sufficient to prevent boron penetration. Oxynitrides grown in NO retain the excellent endurance properties of oxynitrides grown in N2O and form good diffusion barriers due to the higher level of incorporated nitrogen. The properties of the thin insulators reviewed in this chapter are sunraiarized in Table 1.08. 1

DIELECTRICS -> PROPERTIES i

Thermal Oxidized Therma Nitrided oxide Nitride nitride RTN RONO 1 Si02 *

He

1 (low) defect density

*

He He

^ ^^

1 (good) resistance to HF etching

He

^ ^^

He He

^

1 (good) barrier against diffusion

sH

^ ^^

He He

r^ ^ ^

1 (low) electrical leakage

He 4 e He He

^ ^^^

^

^ ^ r^

1 (high) breakdown field

^ ^^

^ ^^

^

1^ ^

(good) resistance to wear out: tBD

^ ^^

^ ^^

^ ^^

(low) density of bulk traps: Not

^ ^^

^ ^^

^ ^^

(low) density of fixed oxide charge: Nj

r^ r^ 1^ ^

He He

^ ^^

He He

He He

(low) density of interface traps: Njt

^ ^ :^ ^

^ ^^^

:^ ^ ^ ^

He He

He He

(high) carrier mobility

^ ^^

He He

^ ^^

(high) dielectric constant ZoZ{

^ ^^

He

^

He He

He

He He

He

^

He

He

^

He He

He

0

^ ^^

He

0

He

He He

He

He

^

1^

dielectric strength *

He

He He

Table 1.08 - The properties of various thin dielectric films for VLSI applications are compared: ( * * * * * ) excellent, f * * *j good, f * *j average, (*)poor, (0) worst, unknown, ( ).

Silica, Silicon Nitride and Oxynitride Thin Films ACKNOWLEDGEMENTS The authors wish to thank the editors, G. Barbottin and A. Vapaille who reviewed this text and contributed many comments and suggestions. They are grateful to G. Barbottin who rewrote the English version of this text.

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[20a] [20b] [20c] [20d] [20e] [20f| [20g] [20h] [21a] [21b] [21c] [21d]

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INSTABILITIES IN SILICON DEVICES Silicon Passivation and Related Instabilities G. Barbottin and A. Vapaille (Editors) © 1999 Elsevier Science B.V. Allrightsreserved.

CHAPTER 2

A REVIEW OF BURIED OXIDE STRUCTURES AND SOI TECHNOLOGIES byJ.-L.LERAYO)

Key items Silicon-On-Insulator (SOI) technologies Buried Oxide (BOX) structures Silicon-On-Sapphire (SOS) Zone Melt Recrystallisation (ZMR) Wafer bonding Bond and Etch-back (BESOI) process Separation by Implantation of Oxygen (SIMOX) process Radiation Hardening Smart devices Buried optics Micromachining Sensors

(I) CEA'DAM, Commissariat a VEnergie Atomique Direction des Recherches en Ile-de-France B.P. 12, 91680, BruyereS'Le-Chatel, France E-mail: [email protected]

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Abstract of Chapter 2: A review of buried oxide structures and SOI technologies Various techniques have been tried to fabricate buried oxide (BOX) structures and Silicon-On-Insulator (SOI) devices. The advantages associated with such structures are many: an increased integration, a reduction in coupling effects, a better radiation hardness and low leakage currents. Most currently used techniques are reviewed in this chapter. To obtain a SOI structure, silicon can be deposited on an amorphous (or polycrystalline) insulator, or on a crystallized insulator. Although many insulator substrates have been tried, the best results have been obtained by epitaxial deposition of silicon on sapphire (A 120^. The obstacles which the CMOS/SOS process had to overcome to become a reliable process are reviewed along with other techniques which permit growing a layer of crystalline silicon on an amorphous substrate (the ZMR and ISE process). A buried oxide can also be manufactured by implanting oxygen ions at a given depth in a silicon wafer. The SIMOXprocess is based on this principle. Other techniques (the FIFOS, SOOZ, GAA and EFIC processes) make it possible to grow an oxide layer underneath the device one wants to isolate. It is also possible to obtain a buried oxide by bonding two wafers, one of which has been oxidized. The BESOI process enables not only to obtain silicon-on-silica structures but also to associate other semiconductor materials with an oxide. Whatever the method used, BOX structures have found applications not only in microelectronics but also in micro-optics, sensors and micro-machines. When BOX structures are irradiated, the presence of an additional oxide layer and of an additional siliconinsulator interface gives birth to new effects (charge build-up, creation of new interface and bulk traps). These effects must be taken into account when a SOI device is designed to operate in a radiation environment Technologies based on buried oxides have a promising future. Resume du chapitre 2 : Les structures a oxyde enterre et les technologies SOI Diverses techniques ont ^te explorees pour fabriquer des structures a oxyde enterre et des dispositifs en silicium-sur-isolant (SOI). Les avantages que procurent de telles structures sont nombreux : une integration plus poussee, une reduction des effets de couplage, une meilleure tenue aux radiations et de faibles courants defuite. Laplupart des techniques actuellement utiUsees sont passees en revue dans ce chapitre. Four obtenir une structure SOI, le silicium peut etre depose sur un isolant amorphe (ou polycristallin) ou sur un isolant cristallise. Bien que de nombreux substrats isolants aient et^ essayes, les meilleurs resultats ont ete obtenuspar croissance epitaxique du silicium sur le saphir (Al20^. Les obstacles que le precede CMOS/SOS a du surmonter pour devenir un precede fiable, sont passes en revue. De meme, sont presentees d'autres techniques qui permettent defaire croitre du silicium monocristallin sur un substrat amorphe (notamment les procedes ZMR et ISE). On peut egalement fabriquer un oxyde enterre en implantant des ions oxygene dans une tranche de silicium. Le precede SIMOX est base sur ce principe. D'autres techniques permettent defaire croitre une couche d'oxyde sous le dispositif que Ton veut isoler (les procedes FIFOS, SOOZ, GAA et EFIC). II est egalement possible d'obtenir une couche d'oxyde enterre en soudant deux tranches dont Tune est oxydee. Le precede BESOI permet ainsi non seulement d'obtenir des structures silicium-sur-silice mais aussi d'associer d'autres materiaux semiconducteurs a des oxydes. Quelle que soit la methode utilisee, les structures a oxyde enterre ont trouve des applications non seulement en micro-electronique mais egalement en micro-optique, dans les micromachines et pour fabriquer des capteurs. Quand des structures SOI sont irradiees, la presence d'une couche d'oxyde et d'un interface silicium-isolant supplementaires donne naissance a de nouveaux effets (accumulation de charge, generation de nouveaux pieges de volume et d'interface). Ces effets doivent etre pris en compte quand un dispositif SOI est appele a fonctionner dans un environnement radiatif Les technologies utilisant les oxydes enterres ont un avenir prometteur.

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Zusammenfassung zu Kapitel 2: Eine Ubersicht ilber vergrabene Oxidstrukturen und SOI-Technologien. Verschiedene Verfahren zur herstellung vergrabener oxide (buried oxide: BOX) und Silizium-auf-Isolator (Silicon-On-Insulator: SOI) sind entwickelt worden. Die mit solchen Strukturen verbundenen Vorteile sind manigfaltig: eine hOhere Integrationsdichte, geringere Ubersprechneigung, erhohte Strahlungshdrte und geringere Leckstrome. Die gegenwdrtig genutzten Varianten werden in diesem Kapitel dargestellt Um eine SOI-Struktur herzustellen, kann Silizium entweder aufeinen amorphen (oder polykristallinen) oder kristallinen Isolator aufgebracht werden. Obwohl eine grosse Anzahl von Isolatorsub straten untersucht wurde, sind die besten Resultate durch epitaktisches Aujwachsen von Silizium aufSaphir (Al20^ erzielt worden. Die Schwierigkeiten, die der CMOS/SOS-Prozess zu uberwinden hatte, um ein zuverldssiger Prozess zu werden, werden ebenso dargestellt wie andere Verfahren, die es gestatten, kristallines Silizium auf einem amorphen Substrat aufzuwachsen (ZMR- und EPIC- Verfahren). Vergrabene Oxide vorgegebener Tiefe konnen auch durch lonenimplantation in einem Silizium-Wafer erzeugt werden. Der SIMOX-Prozess basiert auf diesem Verfahren. Andere Verfahren (die FIPOS-, SOOZ-, GAA- und EPIC-Prozesse) machen es moglich, eine Oxidschicht unterhalb eines zu isolierenden Bauteils zu erzeugen. Es besteht ebenfalls die Moglichkeit, durch Verbindung zweier Wafer, von denen einer oxidiert ist, eine vergrabene Oxidschicht zu erhalten. Der BESOI-Prozess gestattet nicht nur, Silizium-auf OxidStrukturen zu erhalten, sondern auch solche anderer Halbleiter-Materialien auf einem Oxid. Welches Verfahren auch immer gewdhlt wird, BOX-Strukturen werden nicht nur in der Mikro-elektronik, sondern auch in der Mikrooptik, Sensoren and Mikromechanik eingesetzt. Bei Bestrahlung treten bei BOX-Strukturen aufgrund der zusdtzlichen Oxidschicht und der zusdtzlichen Phasengrenze neue Schddigungsmechanismen auf (Ladungsaufbau, Erzeugung neuer Phasengrenz- und Volumenzustdnde). Diese Effekte mtissen beim Einsatz von SOI-Bauelementen in strahlungsbelasteter Umgebung berucksichtigt werden. Die aufvergrabenen Oxiden basierenden Technologien haben eine vielversprechende Zukunft.

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Chapter 2: A review of buried oxide structures and SOI technologies Table of contents List of symbols and abbreviations used 1. An introduction to SOI structures and buried oxides 2. A historical perspective 2.1. The early works 2.2. How the concepts evolved 3. The many advantages of SOI structures 3.1. Improvements in packing density and process simplifications 3.2. Advantages of device downscaling 3.2.1. Reduction of junction dimensions 3.2.2. The electric breakdown of silicon 3.2.3. Reliability of junctions 3.2.4. Doping fluctuations 3.2.5. Sensitivity to the ionizing particles of the natural environment 3.3. Improvements in hardness against radiation-induced transient effects 3.4. Improvements in high-temperature performance 3.5. Advantages of dielectric insulation in high-firequency devices 3.5.1. Minimizing cross-coupling between elements 3.5.2. Minimizing high-fi-emiency losses 3.5.3. Increase in the maximum operationalfi-equencyof transistors 4. SOI manufacturing: processe/s based on the deposition of silicon on insulator 4.1. Deposition of silicon on/an insulator substrate 4.1.1. Thin-Film Transistirs (TFT) 4.1.2. Epitaxial Lateral Overgrowth (ELO) 4.2. Deposition of crystalling silicon on a crystalline bulk insulator 4.2.1. Origins of the SOS; process and early achievements 4.2.2. Carrier mobility and properties of the silicon-sapphire interface 4.2.3. Bulk minority-carrier lifetime and surface recombination velocity in the silicon film 4.2.4. Morphology and elebtrical properties of deposited silicon 4.2.5. The aluminum autodoping problem 4.2.6. Major improvements contributed by the Solid-Phase Epitaxy methods 4.2.7. Conclusions for the SOS process 4.3. Dual epitaxial deposition 4.4. Deposition of amorphous or polycrystalline silicon followed by recrystallization 4.4.1. The Zone Melting Recrystallization (ZMR) process 4.4.2. The Isolated Silicon Epitaxy (ISE) technique 4.4.3. Examples of other ZMR applications

A Review of Buried Oxide Structures and SOI Technologies SOI manufacturing: processes based on oxygen implantation 5.1. The high-fluence SIMOX process 5.1.1. Early developments 5.1.2. Oxygen and damage profiles 5.1.3. The Ultra-High Temperature Annealing (UHTA) step 5.1.4. Standard temperature conditions used during implantation to obtain a monocrystalline silicon layer 5.1.5. Standard dose conditions used to obtain a thick SIMOX buried oxide 5.1.6. Standard conditions used to obtain a thin SIMOX oxide 5.1.7. The InTernal OXidation (ITOX) process 5.1.8. Adjustments by supplemental implantation 5.1.9. Multiple implantation 5.1.10. Other insulators obtained by ion implantation 5.2. Major defects encountered in SIMOX structures 5.2.1. Fixed charge and interface traps 5.2.2. Silicon islands in the buried oxide 5.2.3. "Pipes" and nano-clusters in the buried oxide 5.2.4. Leakage currents induced by defects in SIMOX structures 5.2.5. Defects in silicon 5.3. Quality and variety of SIMOX substrates 5.3.1. First-order progress 5.3.2. Currently available processes Processes based on directed thermal oxidation (FIPOS, SOOZ and GAA methods) 6.1. The FIFOS process 6.1.1. Selective anodization 6.1.2. Selective oxidation 6.1.3. Densification 6.1.4. Obtained results 6.1.5. Peculiarities of FIFO S oxides 6.1.6. The advantages of using n-doped substrates 6.2. The SOZ and SOOZ processes 6.3. The Gate All Around process 6.4. The EPIC epitaxial and chemical thinning process SOI manufacturing processes based on the bonding of two materials (BESOI) 7.1. Principles of the BESOI techniques 7.2. Wafer bonding 7.3. Thinning of the top layer 7.4. The hydrogen cleavage process (Smart-Cut®) 7.5. Defects and properties of BESOI materials 7.6. Characteristics of current BESOI wafers 7.7. Other bonded materials (SICOI) 7.8. Novel structures permitted by wafer bonding

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8. Applications of SOI structures to novel smart structures 8.1. Application to buried optics 8.2. Application to micromachines 9. Radiation effects in buried oxide structures 9.1. Charge trapping in dielectrics after ionization 9.2. Parasitic transistors due to charge trapping 9.2.1. Case of SOI structures 9.2.2. Case of SOS structures 9.3. Specific radiation effects in SOS structures 9.4. Specific radiation effects in SIMOX, BESOI and FIFOS structures 9.5. Additional comments on radiation effects in SOI materials 9.5.1. SIMOX buried oxides 9.5.2. BESOI buried thermal oxides 10. Conclusion 10.1. The fast evolution of BOX technologies 10.2. Perspectives Acknowledgements List of References

A Review of Buried Oxide Structures and SOI Technologies

List of symbols and abbreviations used Cox

F.cin-2

imax

NA

s-l s-l cm cm-3

ND,5ND

cm-3

Concentration of donor-type doping atoms, variation thereof

Qe

C.cm-2

Charge stored under the gate (of a MOS transistor)

Qsi

C.cm-2

Space charge of the silicon film of thickness tg^ when the film

ft L

Oxide capacitance per unit area Maximum (operational) frequency Transition frequency Transistor channel length (distance between source and drain) Concentration of acceptor-type doping atoms

is fully depleted q Mep

C cm

Elementary charge (q = 1.6 10"!^ C)

W

cm

Thickness of the oxide film

tsi

cm

Thickness of the silicon film

VT, 6VT

V

Threshold voltage, variation thereof

W

Transistor width

esi,Sox

cm F.cm'

Permittivity of silicon, resp. of silica

(|)F, 5<j)F

eV

Fermi energy, variation thereof

<|)MS

eV cm^

Metal-Silicon work function difference

CT

3D BESOI BOX C CMOS CVD DI DRAM ELO EPIC FET FIFOS GR GAA

Thickness of the depleted zone

Trap capture cross section Three-Dimensional Bond and Etch-back SOI Buried OXide (structure) Carbon. Stands here for technology using diamond Complementary Metal Oxide Semiconductor Chemical Vapor Deposition Dielectric Isolation Dynamic Random Access Memory Epitaxial Layer Overgrowth Epitaxial Process for Insulated Circuits Field Effect Transistor Full Isolation by oxidation of POrous Silicon Generation-Recombination Gate All Around

151

152 HEMT HTA IC ISE ITOX MBE PD PSG RMS SCR SEU SICOI SIMNI SIMOX SOD SOI SOS SOZ SRAM TFT UHTA VLSI ULSI

vuv XTEM YSZ Yttria Zirconia ZMR

J.L. Leray High Electron Mobility Transistor High Temperature Annealing Integrated Circuit Isolated Silicon Epitaxy InTemal OXidation Molecular Beam Epitaxy Partially Depleted Phosphorous Silicate Glass Root Mean Square Silicon Controlled Rectifier (or Thyristor) Single Event Upset Silicon Carbide On Insulator Separation by IMplantation of Nitrogen Separation by IMplantation of OXygen Silicon On Diamond Silicon On Insulator Silicon On Sapphire Silicon on Zirconium Oxide Static Random Access Memory Thin-Film Transistor Ultra-High-Temperature Annealing Very Large Scale Integration Ultra Large Scale Integration Vacuum Ultra-Violet High-Contrast Transmission Electron Microscopy Yttria-Stabilized Zirconia Y2O3 Zr02 Zone-Melting Recrystallization

A Review of Buried Oxide Structures and SOI Technologies

153

1. AN INTRODUCTION TO SOI STRUCTURES AND BURIED OXIDES To design and fabricate high performance integrated devices, one fruitful solution is to isolate electrically the semiconductor layer, in which the active elements are made, from the substrate. This can be accomplished: • either by depositing the "active layer" on an isolating substrate, • or, by somehow introducing a dielectric layer between the active layer and the substrate. A lot of effort has been devoted in the past twenty years to produce such structures for which two acronyms are currently being used: SOI: which can be understood as "Silicon On Insulator" or "Semiconductor On Insulator" and which usually refers to (SOI) devices. BOX: which stands for "Buried OXide" and which usually refers to the (BOX) structure itself This chapter reviews the many techniques used to fabricate BOX structures and SOI devices and their physical and electrical characteristics. In Section 2 we recall that in the early days of field-effect transistors, one already used a buried oxide structure and we show how the concept evolved over the years. When a SOI technology is used to manufacture analog and digital circuits, these circuits display several advantages, namely: an improvement in packing density, an improvement in radiation hardness, and the possibility of operating at higher temperatures, (the last two improvements being partly due to smaller leakage currents). These advantages are reviewed in Section 3. The isolation of individual (elementary) devices on a chip, using insulating layers (instead of pn junctions), makes it also possible to reduce cross-coupling effects and dielectric losses. We also show in this section that BOX structures are well suited to increase integration and reduce dimensions because of the sharp discontinuity the Si/Si02 interface provides. Problems usually encountered when dimensions are reduced (e.g. increase in electric field, electromigration, sensitivity to ionizing particles, ...) are more easily solved using a BOX structure than using bulk substrates. In Section 4, we review SOI processes based on the deposition of silicon on an insulator substrate, the latter being amorphous or crystallized. When the substrate is amorphous, the deposited silicon film remains amorphous or polycrystalline (case of thin-film transistors) unless crystallization seeds are introduced (the ELO process). The use of a crystallized insulator substrate such as sapphire has given birth to the Silicon On Sapphire (SOS) process in which silicon is deposited and grows epitaxially. We review the many problems which had to be overcome to make the CMOS/SOS process a commercially successful one, namely: an improvement of the Si/Sapphire interface, an improvement of the crystalline quality of the deposited silicon layer (using e.g. Solid Phase Epitaxy methods) and a reduction in aluminum contamination.

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J,L,Leray

Other techniques used to produce a crystallized silicon layer are also reviewed: the dual epitaxial deposition, the Zone Melting Recrystallization (ZMR) process, and the Isolated Silicon Epitaxy (ISE) technique. Some of these techniques have made it possible to build several active layers on the same wafer. A buried oxide can also be manufactured by somehow introducing oxygen undemeath the silicon surface. In the SIMOX process (separation by Implantation of Oxygen), oxyden is introduced by implantation and the crystalline structure of silicon is restored by a suitable ultra-high temperature anneal. We review the currently available SIMOX processes in Section 5 and show that both thin and thick silicon layers can be obtained, depending on the implantation conditions (energy, fluence, multiple implants) and on the subsequent annealing conditions (temperature, annealing ambients). We also review the various process-induced defects (pipes, nanoclusters, silicon islands, fixed interface charge, interface states) and show that SIMOX structures have greatly improved due to a drastic reduction in contaminants during oxygen implantation. Another way of fabricating a silicon layer on an insulator is to somehow manage a local thermal oxidation of the silicon substrate undemeath the device to be isolated. We review four such processes in Section 6. In the FIFOS process (Full Isolation by Oxidation of Porous Silicon), the silicon substrate is oxidized through microchannels or pipes previously manufactured by means of anodic etching in HF acid. In the SOOZ process (Silicon Oxidation On Zirconia), one takes advantage of the fact that oxygen ions diffuse across zirconia. In the GAA (Gate All Around) process, one starts first from a SIMOX substrate and the buried oxide is etched undemeath a silicon island, which in a later step is reoxidized to obtain a thin gate oxide. Finally, in the EPIC process (Epitaxial Process for Insulated Circuits) the active devices are manufactured inside "tubs" of silicon dioxide. Another way of producing a buried oxide structure is described in Section 7. It consists in forcing an oxidized wafer to bond with an unoxidized wafer and subsequently to thin one of the two bonded wafers to obtain the desired thickness of active semiconductor material. The BESOI process (Bond and Etch-back Silicon-On-Insulator) is currently widely used to produce Silicon-Oxide-Silicon structures but can also be applied to manufacture new structures in which the active semiconductor can be SiC, GaAs, and InP. The thinning of the active silicon layer can be greatly simplified by using the Smart-Cut® technique in which hydrogen ions are implanted at a given depth to facilitate wafer splitting. Wafer bonding is also shown to render possible the 3D integration of active layers. The advantages brought about by SOI structures have made possible the design of novel structures. In Section 8, we show that the buried oxide may be used as a waveguide, which should enable the design of silicon-based opto-electronic devices. The SOI structure is also shown to offer many advantages in the fast-expanding field of micromachining and should give birth to new "smart" devices such as sensors and micro-actuators. Radiation effects in buried-oxide structures are reviewed in Section 9. Ionizing radiation generates electron-hole pairs in buried oxides just like in any other insulator. This gives birth to another parasitic structure called the back-gate FET transistor, and to leakage currents, due

A Review of Buried Oxide Structures and SOI Technologies

155

to the charge build-up in the buried oxide. Specific effects are also shown to exist in most CMOS/SOS structures due to the large build-up of states at the silicon-sapphire interface. Both electron and hole traps are generated during irradiation. Their main characteristics are shown to depend on the radiation used, and on the process conditions used during fabrication of the buried oxide, while their density is shown to depend on the biasing conditions during irradiation. Oxygen vacancies are thought to act as trap precursors, not only in SIMOX oxides but also in BESOI buried oxides. Carrier trapping occurs in the buried oxide during irradiation. Either electron or hole trapping prevails, depending on bias and dose. Buried oxide technologies have made tremendous progress in the last 40 years. This evolution and the benefits it brought are summarized in Section 10. These technologies provide new ways to further integrate electronic circuits and find new applications in the fastexpanding field of sensors and micromachines. 2. A HISTORICAL PERSPECTIVE Let us quickly review the evolution of BOX structures from a chronological point of view. 2.1. THE EARLY WORKS

The early works on BOX structures dealt with the fabrication of Field-Effect Transistors (FETs). Indeed, the most natural way to make a field-effect transistor is to use a semiconductor film on an insulator. These works began in the late 20's and dealt with what would nowadays be identified as Semiconductor-On-Insulator thin films [1, 2, 3]. The early patents filed by Lilienfeld and described in 1926 and 1928 (Fig. 2.1) showed how to control the value of a thin-film resistor (copper sulfide) through a spacer insulator (which at the time was proposed to be aluminum oxide). Heil [3] in the UK suggested in 1935 that the conductivity of a "thin gap" semiconductor could be modulated by an extemal field through mica (Fig. 2.2). March 7, 1933.

j . E. LILIENFELCT

1,900,018

Hl!li|lh;-|[

CeVICB fOR COriTROLLIKG ELECTRIC CURRENT F i l e d March 2 8 . 1928

3 Sbavts-Sbcii

I

Fig. 2.1 - The first Field-Effect Structure (US Patents claimed in 1926 and 1928). The proposed structure used a groove to recess the resistor film and make control easier [1, 2].

J.L. Leray

156

a) Fig. 2.2 - The original MIS patent: a thin film of semiconductor material is placed on or between insulators [3]. a) Single gate Metal-Insulator-Semiconductor Transistor b) Double gate Metal-InsulatorSemiconductor Transistor. (1), (2) contacts - (3) semiconductor gap - (6) plate electrodes - (8) upper and buried insulator.

Shockley rediscovered the structure (illustrated in Fig. 2.3 a) and finally demonstrated in 1948 the feasibility of such a field-effect device by using silicon and quartz (Fig. 2.3 b) [5]. He showed that the conductivity of evaporated layers of Ge (p-type), Si (n-type) or CU2O, with thicknesses ranging from 20 to 50 |Lim could indeed be modulated by a metal plate placed undemeath. An insulated plate of fused quartz (70-|Lim thick) was used both as a mechanical holder, as a substrate for deposition and as a gate insulator. The modulation of the conductivity was as "high" as 11% and the best results were obtained with CU2O and a 3 kV voltage. Gold electrodes

70 mn

7K

Deposited semi conductor

\

THIN LAYER OF / SEMICONDUCTOR

Fig. 2.3 - First evidence of a field-effect transistor using a MOS technology, a) Principle [4] b) Representation of the first manufactured prototype [5].

A Review of Buried Oxide Structures and SOI Technologies

157

2.2, H o w THE CONCEPTS EVOLVED

To be able to manufacture SOI devices, various solutions have been attempted, each solution featuring advantages and limitations: 1. One can deposit the Semiconductor (SC) material on an amorphous insulator. Devices thus produced have poor performances but can be used to command flat screens. 2. One can deposit the semiconductor material on a monocrystalline insulator. The difficulty of such a process has been to find a suitable insulator. The solution which has been the most successfiil one, from an industrial point of view, has been Silicon-On-Sapphire (SOS) which started in the 60's and had its heyday in the 80*s. 3. One can deposit the semiconductor material on an amorphous insulator (which is itself on top of a monocrystalline semiconductor) and then find a way to restore the crystalline structure of the top SC layer (e.g. using "seeds"). This concept gave birth to the Zone Melting Recrystallization (ZMR) process around 1975 and to the Isolated Silicon Epitaxy (ISE) technique around 1985. Because of the need to open "windows", the ZMR process has, however, many limitations. 4. One can implant oxygen atoms in a crystalline silicon substrate undemeath the surface and then, by annealing, create a buried oxide layer while restoring the crystalline structure of the top layer. This gave birth around 1980 to the widely successful Separation-by-Implantationof-OXygen (SIMOX) process. 5. Finally, one can bond two oxidized silicon wafers together (silica layer against silica layer) and thin one of the silicon wafers to the desired thickness: This gave birth, circa 1985, to the process called "Bond and Etch-back Silicon On Insulator" (BESOI). All these processes and their many variants have made it possible to manufacture products which feature many advantages (reviewed in Section 3) over their counterparts built on bulk silicon. Figure 2.4 illustrates how elementary devices manufactured on bulk material have been adapted to the SOI technology.

3. THE MANY ADVANTAGES OF SOI STRUCTURES When a SOI technology is used to manufacture analog and digital circuits, these circuits gain two unique advantages: an improvement in radiation hardness (i.e. a better resistance against radiation effects), and the possibility to operate at higher temperatures [6]. Moreover, the SOI technology enables an even higher degree of integration of the devices. Let us describe these advantages in some detail. 3.1. IMPROVEMENTS IN PACKING DENSITY AND PROCESS SIMPLIFICATIONS

The next figures illustrate how the distance between two neighboring transistors can be reduced in CMOS/SOI devices compared to bulk counterparts. This reduction comes first from the fact that anti-latch-up design rules are no more necessary. Second, well contacts, necessary in the bulk technology, can be optionally avoided in SOI devices. Third, a direct contact between the n^ and p"^ drain areas of neighboring n and p-MOS transistors can be obtained without having to define a metal shunt line and p" or n" wells vmdemeath the field oxide (Figs. 2.5 a and b).

158

J,L. Leray fGitel

FielcLOxide

p G ^

Gate I

WT] i

p

I

I I

Gate!

mr

PTT

p

N

rrr

0.05 to 1 |xm

N

'

0.05 to 2 Mm

Buried Oxide

Buried PN Junction

I

i

f

Silicon Bulk Substrate

Silicon Bulk Substrate I ••

CMOS/SOI

CMOS/Bulk

B

E



Gate

Gate|

TT N+

pTT N+ TP+

|B L _ ^

1 to 5 Mm P N+

C

I

N+

Silicon Bulk Substrate

N+ i

1

1

1

:

1

H .J

Bipolar/Bulk

N+

C

1 1 1

Buried Oxide

0.05 to 2 Hm

iJ

— Silicon Bulk Substrate

L

JFET/Bulk

Bipolar/SOI

JFET/SOI

Fig. 2.4 - Illustration of how elementary devices, manufactured with a conventional have been adapted to the SOI technology (right).

"bulk'* technology (left)

The SOI technology brings an improved flexibility in design (Fig. 2.5 c) since transistors can be made independent. Mixed designs which include CMOS transistors for logic and JFET, or bipolar transistors, for analog parts of the device [7] (and even both types: complementary types of JFETs and bipolars: C-JFET and C-Bipolar) are straightforwardly introduced [8]. SMART^'> architectures comprising high-voltage MOS transistors and diodes, and low-voltage logic (npn, pnp and CMOS along with signal photodiode), are also made easier by using dielectric isolation [9]. 3.2. ADVANTAGES OF DEVICE DOWNSCALING

Beyond the present state of the art, buried oxides will have to take into account the general trends of silicon technology. As lateral dimensions continue to shrink in VLSI circuits, vertical dimensions must also be reduced, thus requiring that the depth of the source and drain junctions be no deeper than 0.1 |Lim. Thanks to the Buried OXide (BOX) under-layer, thin SOI devices do not need such shallow junctions, and hence, do not pose such problems. This advantage and its consequences are described next.

(1) In SMART devices, additional circuits are introduced to process information, on technologies not originally suited for that purpose (e.g. smart sensors, smart power devices).

A Review of Buried Oxide Structures and SOI Technologies distance N' P

159

distance N* P*

a)

c)

Buried Oxide

Bulk S i l i c o n

Fig. 2.5 - Illustration of progress made in integration due to transposing bulk devices onto SOI substrates, a) CMOS/bulk. The anti-latch-up rules require a guard distance of 5-8 pim. b) On CMOS/SOI, the guard distance is reduced to 2.5 ixm in a 1.2 fim technology such as HSOI3 (circa 1990, [10]). c) On 0.8 fim SOI with trench isolation, such as in the DMILL technology, the guard distance can be further reduced [11].

3.2.1. Reduction of junction dimensions A shallow junction is difficult to manufacture, whereas the thickness of an insulating layer is very easy to control. Therefore, in SOL devices, transistors characteristics are more uniform and bi-dimensional effects, such as: (i) short channel effect affecting the threshold voltage, (ii) drain barrier lowering effects due the accumulation of carriers generated in the substrate close to the drain/substrate junctions, are easier to overcome. The evolution of Integrated Circuits (ICs) requires using ever lower supply voltages to reduce power consumption (from 10 V to 5, 3.3, 2.5, 1.8, 1.5 ...). Although the supply voltage of a device can be scaled down, two parameters hamper this reduction: the threshold voltage and the jimction capacitance. The threshold voltage cannot be reduced below a fraction of one volt, whereas junction capacitance increases when the reverse bias voltage drops (thus causing a loss in speed improvements). BOX isolation and very thin SOI layers render integration easier by: • offering the sharp potential barrier of the silicon/insulator band discontinuity, • yielding much smaller parasitic capacitances than their bulk counterparts (for equal oxide or junction depleted thicknesses), since the dielectric constant of Si02 is lower than that of Si.

160

J,L. Leray

Basic device parameters and speed are less sensitive to a reduction in supply voltage in the case of SOI devices than for similar bulk CMOS devices [12], [13, page 161]. 3.2.2. The electric breakdown of silicon In the current race to increase device integration, the dimensions are reduced even faster than the supply voltage. Therefore, the electric fields in the semiconductor increase. Electric breakdown or other phenomena associated with carrier multiplication in silicon must be avoided by carefully controlling the maximum value of the electric field and by properly designing the doping profiles. Some analyses [13] prove that very thin films on insulators are superior in this field-and-doping optimization, by exploiting the deep depletion mode, which is a unique feature of the SOI technology. An increase in the electric field displaces the distribution of electron and hole kinetic energies in the range of one electron-volt, thus increasing the ratio of electrons able to pass through the insulator barrier. Although some authors [14, 15] have reported^^^ that certain types of BOX layers do trap electrons injected from silicon, which could be a major drawback, hot electrons are not a specific reliability concem in the BOX technology, at least up to now [6, 16]. However, in the near future, for technologies with feature sizes of 0.2 micron and below, the energy of hot electrons will reach 1 to 1.5 eV [17, 18], thus increasing the probability that electrons be injected into the BOX and get trapped. This is another strong reason to measure and control the electron trap density in advanced SOI technologies. 3.2.3. Reliability of junctions As junctions become shallower, electromigration requirements become more stringent [19]. Indeed, any metal spike, or even a dislocation can short-circuit the junction as illustrated in Fig. 2.6 a. The use of a very thin silicon layer on an insulator minimizes the junction area since the junction becomes controlled by its peripheral surface rather than by its projected surface, as illustrated in Fig. 2.6 b. In this special case, electromigration may cause a metal pile-up reaching down to the underlaying insulator but consequences such as drain-channel short-circuit are avoided [20 a]. This makes very thin SOI devices extremely interesting. The maximum required thickness is of the order of 100 to 200 nm in this case. 3.2.4. Doping fluctuations Another serious problem encountered when reducing channel lengths down to 0.1 |Lim, or below, is due to fluctuations in the number of doping atoms located in the depleted zone below the channel [19]. Let us recall the equation relating the threshold voltage (Vj) to the substrate doping concentration (N/^) for a bulk NMOS transistor:

Vr- ^^^2^.^ ^ / 5 ^ ^

(2.1)

(2) The magnitude of the electric field in the substrate used for that particular experiment was 1 MV/cm, which far exceeds the magnitude of fields encountered in current BOX structures (< 100 kV/cm).

A Review of Buried Oxide Structures and SOI Technologies

161

where Oj^s is for the difference in electron work functions between gate and source. In transistors whose channel length is reduced to 0.1 |Lim, the volume of active silicon becomes of the order of lO'^^cm^. For a doping concentration N^ of S.lO^'^cm-^, the nimiber of doping atoms in the channel under the gate is as low as N j = 500. This number is small and any deviation from it causes fluctuations in the electrical characteristics from one transistor to another (with standard deviation a = yN^ = 22 and 3a = 66). Metal y Line ^ ^ ^ m LOCOS-^

Gate

r x _ W ^ ^ H , y^

brain \ Metal spite I Source and drain and dislocation^ I J""^('ons ^ short-circuiting, 1 Silicon substrate the drain junction Source

^^^^^Dislocation^^^^^^m Gate

Insulator pv-_W_ -, -_^^, - , 1/^

Source /

Source an^ drainjunctions I I

Drain' \ ' Metal spik and dislocations reaching the bimedl^er

b) a) Fig. 2.6 - Illustration of linear defects affecting junctions in a) bulk and b) SOI MOS transistors (after [13] and [20 a]). The threshold voltage fluctuation can be estimated by modifying (2.1) to introduce Q^gp the space charge encountered in the depleted zone of thickness tjep: Qdep VT = ^ms+'^F+ CoxWL

(2.2)

with W and L being the width and length of the transistor respectively. We can therefore write: q SNd SVf = 25F + Cox WL

(2.3)

If we neglect 5(|)p, since it only varies logarithmically with N^, we get, for SNj = ± 3 a = 66andW = L = 0.1 ^m: 5VT=+160mV

(2.4)

Therefore, the threshold voltage of the transistors could fluctuate substantially. In very large-scale integrated (VLSI) circuits containing 10^-10^ transistors, circuit failvires could arise due to leakage currents statistically likely to occur (some transistors may, statistically, be "on" when all others are "off).

J.L. Leray

162

P4

Fig. 2.7 - Illustration of a fully-depleted n-channel transistor with a p^-doped polysilicon gate (only possible with the SOI technology).

I N+ j N-! N+ \

The situation is very different when one considers a transistor, manufactured in the SOI technology, whose thin siUcon film is fully depleted (Fig. 2.7). The threshold voltage is then given by: ([20 b], or [21, p. 242, adapted]): VT =^msl+ 2^F+

Qsi

(2.5)

with Qsi^'^^AfSi Here, suffix 1 refers to thefi-ontgate device. Qsi is the space charge of the silicon film, of thickness tsi, when the film is completely depleted. Let us note that the factor 2 which appears in the denominator comes fi-om the fact that the image charge of the fiiUy depleted silicon layer is shared equally by the two symmetrical electrodes:fi-ontgate and back-gate. It must be noted also that the condition of complete depletion imposes 2 t^ep > tsiTherefore, an upper value for N^ is given by: \4s <.,<]>

^dep ~-

^'''^ > t,.' qN

or N^tsi'

< 10'cm-'

(2.6)

For tsi = 0.1 nm, it gives an upper admissible value of lO^^ cm-3 for NA- The number of doping atoms encountered in the film for a transistor of dimensions W = L = 0.1 ^im is only: Nd = N^.W.L.tsi = 100. Consequently, the statistical variation in the number of doping atoms isonly5Nd = ± 3 V N 7 = ±30. The correspondingfluctuationin V j is now: q SNd = ±36mV (2.7) 2Coxi WL In this unique type of SOI structure, threshold voltage fluctuations due to fluctuations in channel doping are therefore much less stringent than in bulk devices [22]. For this application, a silicon thickness of less than 100 nm is required and the method used to 5VT =

A Review of Buried Oxide Structures and SOI Technologies

163

fabricate the silicon film depends on the nature of the buried insulator. To date, the SIMOX process (see Sect. 5) is the only process that can provide such a structure with a good interface smoothness, although the BESOI process is making rapid progress. 3.2.5. Sensitivity to the ionizing particles of the natural environment Another source of instability in VLSI devices is the presence of high-energy particles in the natural radiation environment. At ground level, muons, neutrons, and pions resulting from the decay of cosmic rays, can pass through any device (as described in Chap. 12 of this volume). Alpha particles are also encountered. They are usually generated by the fission of the radioactive species contained in the ceramic package or in the device itself (especially in the metal layers).

vpjj

#r

L H^•W\

Fig, 2.8 - Track of an ionizing particle passing through the thin silicon film of a SOI transistor.

N+ \

Along their track, these particles generate electrons and holes in the active silicon layers as illustrated in Fig. 2.8. For the muons conmionly encountered at ground level (their flux is about one particle per cm^ per hour), a charge of 1 to 10 femtocoulomb is generated per micron of path length. This must be compared with the charge Qe stored under the gate of a transistor possessing the following characteristics: W.L = 0.01 [iim^, with V D S = 1 . 5 V; Vx = 0.5 V and a gate oxide thickness t^^ = 5 nm. This stored charge amounts to: Q, = C^^. W.L (VDS ' VT) = 0.067fC

(2.8)

which corresponds to 420 electrons. This rough evaluation shows that the stored charge will be altered when a device is struck by a particle of the natural environment, unless the "collection length" in the silicon substrate (defined in § 3.3 and Chap. 12) is reduced to somewhere between 50 and 100 nm. This is another advantage of using very thin SOI films for VLSI devices. 3.3. IMPROVEMENTS IN HARDNESS AGAINST RADIATION-INDUCED TRANSIENT EFFECTS

A good radiation hardness is historically the main advantage attributed to devices manufactured with SOI technologies. Radiation encountered in space consists mainly of cosmic rays, which are high-energy ions and protons, and of electrons trapped in the Van Allen belts (a simple description of the space radiation environment can be found in Chap. 8). Ground level radiation results from fusion or fission nuclear reactions (due to weapons or

164

7.L. Leray

nuclear reactors), and consists of gamma rays and neutrons. Any of these particles causes (directly or indirectly) ionization phenomena, which generate electron-hole pairs in and around the junctions. The generated carriers are swept away by the applied electric field, or by the doping gradients, and diffuse towards pn jimctions. As a result, the collected "photocurrents" can cause "upsets" in circuit nodes, as described at length in Chap. 12. These phenomena are called "transient" since they are related to the ionization rates, and their effects disappear when ionization ceases. Unlike what happens in silicon, ionization charges generated in insulating layers can be permanently trapped, and in this case, permanent effects survive the transient cause. This aspect is discussed in Chap. 11 and later on in this chapter in the case of buried oxides. The magnitude of these photocurrents is roughly proportional to the junction areas and to a lateral dimension called "collection length". The collection length consists of two parts: i) the depletion width of the junction and ii) the lateral diffusion length. As explained in Chap. 12, when a device is struck by an energetic particle, ionization and carrier drift and diffusion take place throughout the silicon layers, along the particle track. The nearest biased pn junction collects the carriers, generated along a distance called the "collection length". The harmful consequence of this diffusion is the creation of minority-carrier leakage currents, which can flow between neighboring transistors and temporarily connect them. In the early 60*s, Complementary Metal-Oxide-Semiconductor (CMOS) devices were already being reliably fabricated but subsequently the increase in transistor density caused interactions between transistors to increase also. Photocurrent paths may also cormect parasitic bipolar transistors of two types (npn and pnp) and cause the latch-up phenomenon. If the product of the transistor gains satisfies the condition p^pn Ppnp ^^^ ^^^r, a positive feedback loop is triggered and the device latches. The current flows then directly from the supply lines, and is only limited by the low series resistances of the conducting bipolar transistors. The creation of such a "latch-up" circuit is illustrated in Fig. 2.9. If the supply line is not quickly shut down, thermal runaway may destroy the device. The latch-up effect is mostly encountered when the radiation flux is delivered in short or very short pulses, e.g. fluxes of high-energy photons produced by nuclear weapons (pulses lasting from 10 ns to 10 ms), or when the device is struck by cosmic rays, a frequent occurrence in satellites (cosmic rays may strike asfrequentlyas once per second for a l-cm^ chip, while the cosmic rays transit in less than a picosecond). Such a Dirac-shaped excitation causes various electrical interferences (described in Chap. 12 of this volume). By using a SOI technology, most of the pn junctions used for isolation are replaced by a dielectric isolation and bulk leakage paths are automatically avoided. Moreover, the lateral etching of the silicon surroimding the transistors allows a full isolation (as illustrated in Fig. 2.5 c) and shuts off surface leakage paths, reducing the photocurrents by two to three orders of magnitude. Therefore, a substantial gain is obtained since transistors can be made simpler and closer to one another. Most important of all, any latch phenomenon between transistors is inherently avoided. This specific resistance to radiation is called radiation

A Review of Buried Oxide Structures and SOI Technologies

165

"hardness" and the action of improving a given structure or process is called "hardening". NMOS

Fig. 2.9 - Illustration of a parasitic Silicon" Controlled'Rectifier structure (SCR) in the set of transistors encountered in a CMOS structure.

The SOI technology also reduces the sensitivity of a device to particle fluxes. In a regular CMOS/bulk device, the collection length extends into the silicon substrate as represented in Fig. 2.10 a. In similar CMOS/SOI devices, the collection length is reduced to the thickness of the (thin) upper silicon layer, as illustrated in Fig. 2.10 b. The charge thus collected is much reduced and may be unable to cause any disturbance. Moreover, the active area surroimding the transistor is also much reduced in SOI devices, further reducing the charge collection due to carrier diffusion. Overall, compared with its CMOS/bulk counterpart, the CMOS/SOI technology makes it possible to decrease the sensitivity of a device to a given particle flux by several orders of magnitude, depending mostly on silicon thickness. A thorough analysis of this decrease can be found in Chap. 12. COSMIC RAY FLUX

Drain Junction Cross-Section

N-Well Cross-Section

^ N Transistor

f Transistor

rTFn

rm

a

s

N

ITT

Buried Oxid

I

f a)

\\ 7

\

\\"

\

\\

\

W

\

Silicon Bulk SJibstrate

\

b)

\ \

Generation of photocurrent at the crossing of each pn junction

Fig. 2.10 ' Illustration of the reduction in collection length when going from a conventional structure a) to a SOI structure b).

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yx. Leray

3.4. IMPROVEMENTS IN HIGH-TEMPERATURE PERFORMANCE

Another advantage of full isolation and of a reduction in junction area is clearly found at high temperatures. Many pieces of equipment must function at elevated temperatures in such applications as: i) under-the-hood electronics and anti-lock braking systems in the automotive industry, ii) deep earth drilling for the petroleum industry and the monitoring of geothermal reservoirs iii) aircraft and spacecraft systems, which require functioning at 250°C. The area of the source-substrate and drain-substrate junction is much smaller in thin-film silicon devices than in bulk silicon MOSFETs. In addition, the total volume of silicon in SOI devices is also very small. These two factors explain why in SOI devices, the diffusion currents can be reduced by several orders of magnitude. It follows that the leakage current across the jimctions can also be reduced, especially at high temperature, as first pointed out in 1988 [23]. This was clearly demonstrated in 1989 [24] when a 16-kbit SRAM memory in SOI technology withstood temperatures of 300°C, with leakage currents 2 or 3 orders of magnitude lower than those of bulk CMOS counterparts. High-temperature testing was successfully performed up to 400°C [25] and even at 425°C with devices featuring an ultrathin silicon layer (23.5 nm) [26]. In these two cases, correct transfer characteristics were found up to 400°C and fully usable characteristics were found for circuits up to 250°C, whereas standard bulk devices usually fail above 150°C. Such experiments suggest that, when operating in the 300-400°C range, the limitations will not come from silicon but fi'om aluminum interconnections (the aluminum alloys currently used melt around 600°C and the interdiffusion of Ai into silicon takes place at a much lower temperature). Other metallizations such as tungsten will have to be used in the CMOS process. Thus, it is clearly advantageous to use mature and up-to-date SOI technologies in these temperature domains, instead of costly and not yet reliable SiC or C (diamond) technologies. 3.5. ADVANTAGES OF DIELECTMC INSULATION IN HIGH-FREQUENCY DEVICES

3.5.1. Minimizing cross-coupling between elements A reduction in cross-coupling obviously stems from the isolation of individual transistors by means of "dielectric isolation". It is obtained in any SOI technology, such as those represented in Figs. 2.5 b and 2.5 c. The isolation of transistors by using lateral and buried oxides has the advantage of not only preventing their cross-coupling by leakage currents, but also of reducing their cross-coupling by capacitances. For instance, when replacing a junction isolation by a buried or lateral silicon dioxide layer, the parasitic junction capacitances decrease first because of a favorable dielectric constant ratio (Sox/^si =3.9/11.9). This is especially true for source-substrate or drain-substrate junctions (n"^p or p^n). Due to the decrease in parasitic capacitance values, the operating speed of the ICs is expected to increase by a factor as large as 2, depending on transistor size and circuit layout.

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In the 80's, this enhancement factor ranged from 30% to 50% for transistors with 1 to 2-micron channel lengths ([27-29], [30, p. 196]). For 0.5 |am transistors, the speed has been found to increase by a factor of two, and this factor is expected to increase even more for deep submicrometer technology and lower power supplies (2.5, 1.5 Volts and below) [31]. Figure 2.11 depicts quantitatively the gain in isolation obtained by going from a bulk technology (illustrated in Fig. 2.5 a) to a trench-SOI technology (such as that illustrated in Fig. 2.5 c). It has been also observed that the suppression of the collector-substrate diode and its replacement by a dielectric layer decreases capacitance and improves operatingfrequency.For instance, the transition frequency of an npn transistor transferred into a dielectric isolation technology was found to increase from 0.5 to 3 GHz. This conversion improved also the noise figure by a factor of 10, since an important source of 1/f noise, i.e. the collector-substrate diode, disappeared (ACUTE technology [32]). 0 -20

1 CO

P+ & N-Well P+ & trench P+ (back tied to grd)

-40 -60

P+, SOI & trench (handle floating)

-80 -

110

P+, SOI & trench (handle grounded)

_ 120

140 I I I M i n i — I I I mill

10'

I I III

10'

10

F r e q u e n c y (Hz) Fig. 2.11 - Cross-talk versus frequency in typical structures (after [33], modified).

3.5.2. Minimizing high-frequency losses Another advantage of dielectric isolation is that it reduces losses in the microwave frequency domain. For microwave applications, surface inductors or transmission lines are needed. These elements are usually not manufactured in a silicon technology because of the dielectric losses that take place in the isolation junctions. These losses prevent the use of microwave circuits, made on silicon substrates, above a few hundred megahertz, as opposed to circuits on gallium arsenide substrates for which such losses do not exist. Using a SOI technology of the type illustrated in Fig. 2.5 b can be a way to overcome this difficulty. Figure 2.12 a illustrates the parasitic elements found in a simple spiral inductor consisting of a metal line deposited on an insulating layer, itself grown or deposited on a substrate.

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7.L. Leray

The elementary cell includes a distributed inductance L, a coupling capacitance C (coupling with the substrate), and dissipation resistances Rg^b (substrate) and Rj^ (metal). At a given frequency, the quality factor Q is improved by maximizing R^ub or minimizing C^ubThis was first obtained in the 70's by using silicon-on-sapphire (SOS) technology (for which Rsub =00). Possible applications include low-cost cellular telephone networks [35]. 3.5.3. Increase in the maximum operational frequency of transistors An increase in the maximum operational frequency (fmax) ^^ MOS transistors has been obtained by using SOI technologies of the type described in Fig. 2.5 b. Gigahertz applications were first demonstrated, and in the late 80*s a 6.2 GHz prescaler divider, fabricated in SOI on silicon dioxide, exhibited a 50% improvement over its silicon counterpart [34]. In the 90's, MOS/SOI transistors demonstrated power gains of 9 dB at 10 GHz and made it possible to integrate the CMOS digital command of microwave transistors operating in the L and X band. This technique (called the MICROX process [36]) used a special high-resistivity silicon substrate (4.10"* Q.cm) obtained by multiple-refining float-zone (FZ) to minimize silicon losses. The possibility of manufacturing high-frequency MOS transistors in silicon has been thus demonstrated, e.g. through the samples made by Westinghouse with transition frequencies f^ of 14 GHz in 1991 and 23 GHz in 1993 ([37]). Using a smaller gate linewidth of 0.2 |im, frequency values of f^ = 51 GHz and f^^x ^ 28 GHz have been obtained with a drain voltage of 1.5 V, even with standard SIMOX wafers with a silicon resistivity of 20 Q.cm [38]. Using SOS with Solid Phase Epitaxy (see § 4.2.6), values of f^^^x "^ 50 GHz have been obtained for transistors with a gate length of 0.5 |im [39-41]. With a fiirther optimization of SOS or SOI processes, one can expect transition frequencies to reach 100 GHz, thus allowing significant power gains in the high-frequency bands currently used for domestic communications (1 to 20 GHz), with a minimum of power loss (thanks to the use of dielectric isolation).

L

Rm C^Cox+Csub

ir=Cox+Csub

—v\^

substrate

a)

ub

b)

Fig. 2.12 - Simple generic SOI microwave structure: a) surface inductor b) equivalent circuit.

A Review of Buried Oxide Structures and SOI Technologies

169

4. SOI MANUFACTURING: PROCESSES BASED ON THE DEPOSITION OF SILICON ON INSULATOR The simplest way to obtain a SOI structure is, at least in theory, to deposit a thin silicon film on an insulating layer. If the insulator is amorphous, the resulting silicon film will be either amorphous or polycrystalline, unless a recrystallization process can be somehow triggered. If the insulator is crystallized, the silicon film may grow epitaxially if conditions are right. We review next these various processes and their peculiarities. 4.1. DEPOSITION OF SILICON ON AN INSULATOR SUBSTRATE

This deposition process is the most straightforward way of manufacturing a SOI structure. Silicon can be deposited on top of a pre-existing insulator, as illustrated in Fig. 2.13. Indeed, Shockley and Pearson gave the first evidence of a field-effect modulation in the late 40's using this process [5], as mentioned in Sect. 2. amorphous or polycristalline silicon layer y^

Fig. 2.13 - Basic features of a Thin-FilmTransistor (TFT) manufactured by depositing silicon on an insulator layer.

4.1.1. Thin-Film Transistors (TFT) In the 60's, this deposition technique gave birth to the Thin-Film Transistor (TFT) technology [42]. In this structure, the gate electrode is first deposited on the substrate insulator (quartz or glass). The gate insulator (glass) and finally the active semiconductor (made up of hydrogenated amorphous silicon) are deposited. The structure is therefore the reverse of a normal transistor. The semiconductor is amorphous, giving mostly poor electrical performances but the technique enables the manufacturing of large areas at low-cost and is increasingly used for large arrays of transistors, e.g. for the growing market of flat panel displays [43-45]. .INSULATING SUBSTRATE

Fig. 2.14-Various forms of TFT manufactured around 1962 (after [45]).

S.C.

INS.

PERFORATED GATE

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y.L. Leray 4.1.2. Epitaxial Lateral Overgrowth (ELO)

The ELO technique was developed in the 70's to overcome the poor electrical performances obtained with amorphous semiconductors and to enable the growth of a monocrystal over the insulator. In this epitaxial technique, silicon is deposited after patteming windows have been etched in the insulator. Epitaxial growth proceeds both vertically and laterally from the seeding windows. Seeds coming from the etched pits grow and meet to form continuous films [13, 46], as illustrated in Fig. 2.15. The technique is limited by the recrystallisation rates in the horizontal and vertical directions, which requires one to build films as thick as 10 |Lim to cover insulator films with seed window pattems as close as 20 |am.

Fig. 2.15 - Principle of Epitaxial Lateral Overgrowth (ELO). 4.2. DEPOSITION OF CRYSTALLINE SILICON ON A CRYSTALLINE BULK INSULATOR

To overcome the problems associated with deposition on glass, one can attempt to obtain an epitaxial growth on another crystal. The most straightforward technique would be to deposit silicon on a crystalline form of Si02. However, in a-quartz, a phase transition, which takes place at 573°C, causes changes in substrate dimensions. This phase transition thus induces considerable stresses in any siUcon film deposited on top of a-quartz, and consequently, high-temperature treatments are incompatible with good properties of the silicon layer. This precludes any MOS-compatible process. For this reason at least, silicon must be deposited on amorphous Si02, which, consequently yields polycrystalline or amorphous films. 4.2.1. Origins of the SOS process and early achievements In the early 60's, due to advances in the manufacturing of monocrystalline sapphire (A^203)' i^ slicing and polishing techniques and in surface preparation techniques (such as prefiring in hydrogen), crystalline Silicon-On-Sapphire structures were successfully produced at RCA Labs and reported in 1964 by Manasevits and Simpson [47]. In an altemative technique, spinel, a crystalline mixture of A.^203 ^ ^ M%0 was used as the insulator substrate. The first device produced on sapphire (1966) resulted from the works of Heiman and consisted of p- MOS transistors connected in arrays of 16 transistors [48].

A Review of Buried Oxide Structures and SOI Technologies

171

These two techniques were called Complementary MOS On Sapphire or Spinel (CMOS/SOS), and were sufficiently mature to allow the first commercial offer by a company called Inselek in 1971. A thorough review of accomplishments in the area of SOS materials and circuits can be found in [49]. The 70's saw the triumph of this heteroepitaxy technique [50]. Union Carbide and Kyocera became the main wafer suppliers, thereby manufacturing SOS substrates for radiation hardened circuits. Advanced applications took advantage of the low-capacitance, highvoltage, and simpler processes. Toshiba buih the first 16-bit microprocessor on a SOS substrate in 1977, along with the first 16-bit microprocessor on bulk silicon (SBP9900 in PL technology). At the same time, Hewlett Packard proposed SOS devices for pocket calculators. In Europe, works were undertaken on high-voltage applications and on low-power circuits to be used in wristwatches. The quality of the silicon layer and silicon/sapphire interface remained the main concern. Because of the commercial success of this process, numerous studies were carried out to assess and improve the quality of the silicon-sapphire interface. This characterization effort, as explained next, was applied mainly to four areas: -

electrical characterization of the interface, electrical characterization of the deposited Si layer, X-ray study of the interface morphology, study of the aluminum autodoping effect. 4.2.2. Carrier mobility and properties of the silicon-sapphire interface

Figure 2.16 a illustrates the specific "back-gate" structure which can be built with any device containing a buried oxide. For a bulky buried oxide, such as sapphire, kilovolts must

source

back gate G2 I a)

-200

'G2

b)

-100

0

TOO

200

back-gate voltage VQ2 (V)

Fig, 2.16- Electrical characterization of the silicon-sapphire interface using the back-gate biasing technique (after [51]). a) Description of the test structure b) Current-Voltage characteristics of a back NMOS transistor with W/L=100 jum/100 fim andx^^ — 80 jum using a drain voltage V^y^ of 100 mV.

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y.L. Leray

be applied to the back gate in order to accumulate or invert the silicon-sapphire interface and thus be able to characterize it. This voltage can be reduced by locally thinning the sapphire (e.g. jfrom 300 |im to 70 or even 50 |im) before depositing the back (A-^) gate. By using this technique, some authors have deduced the field-effect mobility, by measuring the IDCVQ) characteristics firom the back-gate as illustrated in Fig. 2.16 b. Mobility values range from: ^e = 40 cm2 V ^ s"! [51], with a n+/p/n+ enhancement-type MOS, to 2 to 10 cm^ V^ s"! with a n"*"/n"/n'^ deep-depleted type relevant to another process. Er

Fig. 2.17 - Profile of the density of states at the silicon-sapphire interface (after [52]).

10