Service manual BBK9903S

SERVICE MANUAL bbk9903S CONTENTS 1. SAFETY PRECAUTIONS 2. PREVENTION OF ELECTRO STATIC DISCHARGE(ESD)TO ELECTROSTAT...

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SERVICE MANUAL bbk9903S

CONTENTS 1.

SAFETY PRECAUTIONS

2.

PREVENTION OF ELECTRO STATIC DISCHARGE(ESD)TO ELECTROSTATICALLY

1

SENSITIVE(ES)DEVICES

1

3.

CONTROL BUTTON LOCATIONS AND EXPLANATIONS

2

4.

PREVERTION OF STATIC ELECTRICITY DISCHARGE

3

5.

ASSEMBLING AND DISASSEMBLING THE MECHANISM UNIT

4

5.1

OPTICAL PICKUP UNIT EXPLOSED VIEW AND PART LIST

4

5.2

BRACKET EXPLOSED VIEW AND PART LIST

6

5.3

MISCELLANEOUS

7

6.

ELECTRICAL CONFIRMATION

8

6.1

VIDEO OUTPUT (LUMINANCE SIGNAL) CONFIRMATION

8

6.2

VIDEO OUTPUT(CHROMINANCE SIGNAL) CONFIRMATION

9

7.

MPEG BOARD CHECK WAVEFORM

10

8.

IC BLOCK DIAGRAM & DESCRIPTION

11

8.1

MT1336

11

8.2

MT1379

19

8.3

AM29LV160D

35

8.4

HY57V641620HG

40

8.5

CD4052B

43

9. 10.

SCHEMATIC & PCB WIRING DIAGRAM SPARE PARTS LIST

APPENDIX-AM/FM Tuner Specificadtion

47 62

68

1. SAFETY PREAUTIONS 1.1 GENERAL GUIDELINES 1. When servicing, observe the original lead dress. if a short circuit is found, replace all parts which have been overheated or damaged by the short circuit. 2. After servicing, see to it that all the protective devices such as insulation barrier, insulation papers shields are properly installed. 3. After servicing, make the following leakage current checks to prevent the customer from being exposed to shock hazards.

2.PREVENTION OF ELECTRO STATIC DISCHARGE(ESD)TO ELECTROSTATICALLY SENSITIVE(ES)DEVICES Some semiconductor(solid state)devices can be damaged easily by static electricity. Such components commonly are called Electrostatically Sensitive(ES)Devices. Examples of typical ES devices are integrated circuits and some field-effect transistors and semiconductor chip components. The following techniques should be used to help reduce the incidence of component damage caused by electro static discharge(ESD). 1. Immediately before handling any semiconductor component or semiconductor-equipped assembly, drain off any ESD on your body by touching a known earth ground. Alternatively, obtain and wear a commercially availabel discharging ESD wrist strap, which should be removed for potential shock reasons prior to applying power to the unit under test. 2. After removing an electrical assembly equipped with ES devices,place the assembly on a conductive surface such as alminum foil, to prevent electrostatic charge buildup or exposure of the assembly. 3. Use only a grounded-tip soldering iron to solder or unsolder ES devices. 4. Use only an anti-static solder removal device. Some solder removal devices not classified as anti-static (ESD protected)can generate electrical charge sufficient to damage ES devices. 5. Do not use freon-propelled chemicals. These can generate electrical charges sufficient to damage ES devices. 6. Do not remove a replacement ES device from its protective package until immediately before you are ready to install it. (Most replacement ES devices are packaged with leads electrically shorted together by conductive foam, alminum foil or comparable conductive material). 7. Immediately before removing the protective material from the leads of a replacement ES device, touch the protective material to the chassis or circuit assembly into which the device will be installed. Caution Be sure no power is applied to the chassis or circuit, and observe all other safety precautions. 8. Minimize bodily motions when handling unpackaged replacement ES devices. (Otherwise harmless motion such as the brushing together of your clothes fabric or the lifting of your foot from a carpeted floor can generate static electricity(ESD).

notice (1885x323x2 tiff)

1

3.

2

4.PREVENTION OF STATIC ELECTRICITY DISCHARGE The laser diode in the traverse unit (optical pickup)may brake down due to static electricity of clothes or human body. Use due caution to electrostatic breakdown when servicing and handling the laser diode. 4.1.Grounding for electrostatic breakdown prevention Some devices such as the DVD player use the optical pickup(laser diode)and the optical pickup will be damaged by static electricity in the working environment.Proceed servicing works under the working environment where grounding works is completed. 4.1.1. Worktable grounding 1. Put a conductive material(sheet)or iron sheet on the area where the optical pickup is placed,and ground the sheet. 4.1.2.Human body grounding 1 Use the anti-static wrist strap to discharge the static electricity from your body. safety_3 (1577x409x2 tiff)

4.1.3.Handling of optical pickup 1. To keep the good quality of the optical pickup maintenance parts during transportation and before installation, the both ends of the laser diode are short-circuited.After replacing the parts with new ones, remove the short circuit according to the correct procedure. (See this Technical Guide). 2. Do not use a tester to check the laser diode for the optical pickup .Failure to do so willdamage the laser diode due to the power supply in the tester. 4.2. Handling precautions for Traverse Unit (Optical Pickup) 1. Do not give a considerable shock to the traverse unit(optical pickup)as it has an extremely high-precise structure. 2. When replacing the optical pickup, install the flexible cable and cut is short land with a nipper. See the optical pickup replacement procedure in this Technical Guide. Before replacing the traverse unit, remove the short pin for preventingstatic electricity and install a new unit.Connect the connector as short times as possible. 3. The flexible cable may be cut off if an excessive force is applied to it.Use caution when handling the cable. 4. The half-fixed resistor for laser power adjustment cannot be adjusted. Do not turn the resistor.

3

5. Assembling and disassembling the mechanism unit 5.1 Optical pickup Unit Explosed View and Part List

Pic (1)

4

Materials to Pic (1) No.

PARTS CODE

PARTS NAME

Q ty

14692200

SF-HD60

1

1

1EA0311A06300

ASSY, CHASSIS, COMPLETE

1

2

1EA0M10A15500

ASSY, MOTOR, SLED

1

Or

1EA0M10A15501

ASSY, MOTOR, SLED

1

3

1EA2451A24700

HOLDER, SHAFT

3

4

1EA2511A29100

GEAR, RACK

1

5

1EA2511A29200

GEAR, DRIVE

1

6

1EA2511A29300

GEAR, MIDDLE, A

1

7

1EA2511A29400

GEAR, MIDDLE, B

1

8

1EA2744A03000

SHAFT, SLIDE

1

9

1EA2744A03100

SHAFT, SLIDE, SUB

1

10

1EA2812A15300

SPRING, COMP, TYOUSEI

3

11

1EA2812A15400

SPRING, COMP, RACK

1

21

1EA0B10B20100

ASSY, PWB

1

Or

1EA0B10B20200

ASSY, PWB

1

31

SEXEA25700---

SPECIAL SCREW BIN+-M2X11

3

32

SEXEA25900---

SPECIAL SCREW M1.7X2.2

2

33

SFBPN204R0SE-

SCR S-TPG PAN 2X4

2

34

SFSFN266R0SE-

SCR S-TPG FLT 2.6X6

1

35

SWXEA15400---

SPECIAL WASHER 1.8X4 X0.25

2

Note : This parts list is not for service parts supply.

5

5.2 Bracket Explosed View and Part List

Pic (2) Materials to Pic(2) 1.bracket 2.belt 3.screw 4.belt wheel 5.gearwheel 6.iron chip 7. Immobility mechanism equipment 8. Magnet 9. Platen 10. Bridge bracket 11. screw 12. screw 13. Big bracket

14. front silicon rubber 15. Back silicon rubber 16. Pick-up 17. Pick-up 18. switch 19. Five-pin flat plug 20. screw 21. PCB 22. motor 23. Motor wheel 24. screw 25.tray

Before going process with disassembly and installation, please carefully both peruse the chart and confirm the materials.

6

5.3 MISCELLANEOUS 5.3.1 Protection of the LD(Laser diode) Short the parts of LD circuit pattern by soldering.

5.3.2 Cautions on assembly and adjustment Make sure that the workbenches,jigs,tips,tips of soldering irons and measuring instruments are grounded,and that personnel wear wrist straps for ground. Open the LD short lands quickly with a soldering iron after a circuit is connected. Keep the power source of the pick-up protected from internal and external sources of electrical noise. Refrain from operation and storage in atmospheres containing corrosive gases (such as H2S,SO2, NO2 and Cl2)or toxic gases or in locations containing substances(especially from the organic silicon,cyan, formalin and phenol groups)which emit toxic gases.It is particularly important to ensure that none of the above substances are present inside the unit.Otherwise,the motor may no longer run.

7

6.Electrical Confirmation 6.1. Video Output (Luminance Signal) Confirmation DO this confirmation after replacing a P.C.B. Measurement point

Mode

Disc

Video output terminal

Color bar 75% PLAY(Title 46):DVDT-S15 PLAY(Title 12):DVDT-S01

DVDT-S15 or DVDT-S01

Measuring equipment,tools

Confirmation value

200mV/dir,10 sec/dir

1000mVp-p±30mV

Purpose:To maintain video signal output compatibility. 1.Connect the oscilloscope to the video output terminal and terminate at 75 ohms. 2.Confirm that luminance signal(Y+S)level is 1000mVp-p±30mV

8

6.2 Video Output(Chrominance Signal) Confirmation Do the confirmation after replacing P.C.B. Measurement point

Mode

Disc

Video output terminal

Color bar 75% PLAY(Title 46):DVDT-S15 PLAY(Title 12):DVDT-S01

DVDT-S15 or DVDT-S01

Measuring equipment,tools Screwdriver,Oscilloscope 200mV/dir,10 sec/dir

Confirmation value 621mVp-p±30mV

Purpose:To maintain video signal output compatibility. 1.Connect the oscilloscope to the video output terminal and terminate at 75 ohme. 2.Confirm that the chrominance signal(C)level is 621 mVp-p±30mV

9

7.MPEG BOARD CHECK WAVEFORM 7.1 27MHz WAVEFORM DIAGRAM

7.2 IC5L0380R PIN.2 WAVEFORM DIAGRAM

10

MT1336 PRELIMINARY, SUBJ ECT TO CHANGE WITHOUT NOTICE

MTK CONFIDENTIAL, NO DISCLOSURE

8. IC BLOCK DIAGRAM & DESCRIPTION 8.1 MT1336 GENERAL DESCRIPTION M T 1 3 3 6 i s a h i g h p e r f o r m a n c e C M O S a n a l o g f r o n t -e n d I C f o r b o t h C D _ R O M d r i v e r u p t o 4 8 X S a n d D V D - R O M d r i v e r u p t o 1 6 X S . I t a l s o s u p p o r t s D V D- R A M r e a d u p t o 4 X S V e r s i o n 2 . I t c o n t a i n s s e r v o a m p li f i e r s t o g e n e r a t e f o c u s i n g e r r o r , 3-b e a m t r a c k i n g e r r o r , 1 b e a m r a d i a l p u s h -p u l l s i g n a l , R F l e v e l a n d S B A D f o r s e r v o f u n c t i o n s . I t a l s o i n c l u d e s D P D t r a c k i n g e r r o r s i g n a l f o r D V D _ R O M a p p l i c a t i o n . F o r D V D- R A M d i s k s , t h e r e a r e a l s o D i f f e r e n t i a l P u s h -P u l l ( D P P ) m e t h o d f o r g e n e r a t i n g t r a c k i n g s i g n a l a n d D i f f e r e n t i a l A s t i g m a t i c D e t e c t i o n (DAD) for processing focusing signal. Programmable equalizer and AGC circuits are also incorporated in this chip to optimize read channel performance. In addition, this chip has dual automatic laser power control circuits f o r D V D- R O M ( D V D-R A M )

and

C D -R O M s e p e r a t e l y a n d r e f e r e n c e v o l t a g e g e n e r a t o r s t o r e d u c e e x t e r n a l

c o m p o n e n t s . P r o g r a m m a b l e f u n c t i o n s a r e i m p l e m e n t e d b y t h e a c c e s s o f i n t e r n a l r e g i s t e r t h r o u g h b i -d i r e c t i o n a l serial port to configure modes selection.

FEATURES n

RF equalizer with programmable

fc

from 3MHz to 70 MHz and programmable boost from 3dB to

13dB.

n

M T 1 3 3 6 s u p p o r t s a t l e a s t e i g h t d i f f e r e n t k i n d s o f p i c k-u p h e a d s w i t h v e r s a t i l e i n p u t c o n f i g u r a t i o n f o r both RF input stages and servo signal blocks.

n

Versatile on -line AGC.

n

3 beams tracking error signal generator for CD_ROM application.

n

One beam differential phase tracking error (DPD) generator for DVD_ROM application.

n

Differential push pull tracki ng error (DPP) generator for DVD_RAM application.

n

Focusing error signal generator for CD-ROM, DVD-ROM and DVD-RAM (DAD method).

n

RF level signal generator.

n

Sub-beam added signal for 3 beams CD_ROM.

n

One beam push -pull signal generator for central servo application.

n

High speed RF envelop detection circuit with bandwidth up to 400KHz for CD-ROM.

n

Defect and Blank detection circuits.

n

Dual automatic laser power control circuits with programmable level of LD monitor voltage.

n

Vref=1.4V voltage and V2ref=2.8V voltage generators.

n

V20=2.0V voltage for pick -up head reference.

n

Bi-directional serial port to access internal registers.

11

MT1336 PRELIMINARY, SUBJ ECT TO CHANGE WITHOUT NOTICE

MTK CONFIDENTIAL, NO DISCLOSURE

OSP DVDA

OSN

CDA DVDB

RFOP

ATTENUATOR INPUT MUX

VGA

EQ RFON

CDB DVDC LRFRP CDC DEFECT

DVDD

HRFRP

CDD DVDRFIN

CRTP

ENVELOP

CRTPLP

DETECTOR

DVDRFIP

AGC

MA CSO

MB MC

LVL

MD

DPD

SA

TEO

SB

FEO

SC REFCOS

SD

SBAD

PCS

HALLCOS COSPHI

DPFN

REFSIN

DPFO

HALLSIN

IR

SINPHI DPDMUTE

TE

DVD

MDI2

APC

TPI TNI

LDO2

CDFOP

RF

CDFON

LEVEL

RFGC RFGCU MDI1

CD

FE

RFGCI

APC

AGC1

LDO1

AGC2

CENTRAL

AGC3

SERVO RFSUBO WOBSO

UDGATE IDGATE

WOBBLE

VFO13

DET

SDATA

SERIAL V20 V2REFO

REF and 2VREF

PORT

Voltage Generator VREFO

MT1336 FUNCTION BLOCKS DIAGRAM

12

SLCK SDEN

MT1336

CDFOP SD SC AVDD IR AGND SB SA MD MC

TNI TPI SVDD CDFON

WAGND SGND

WAVDD AGC1

MDI2 AGC3 AGC2

LDO2 LDO1 MDI1

MTK CONFIDENTIAL, NO DISCLOSURE

128 127 126 125 124 123 122 121 120 119 118 117 116 115 114 113 112 111 110 109 108 107 106 105 104 103

WGND RFSUBO

PRELIMINARY, SUBJ ECT TO CHANGE WITHOUT NOTICE

MT1336 DVD-ROM With DVD_RAM Read

MT1336 PIN ASSIGNMENT

13

AGNDP AGNDX AVDDP

AVDDT V2REFO VREFO V20 FEO LVL CSO TEO VDDP DEFECT LRFRP HRFRP CRTP CRTPLP TRLPA TRLP HTRC GNDP DPFN DPFO AGNDX AGNDX AGNDX VDD VFO13

12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38

DPDMUTE

AGNDT TM4

GNDS SDEN SDATA RST

TM1 TM2 TM3

39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64

RFOP RFON AGNDO

1 2 3 4 5 6 7 8 9 10 11

GND UDGATE HDGATE IO0 IO1 IO2 IO3 IO4 IO5 IO6 IO7 IO8 IO9 IOA IOB VDDS XCK16M SCLK

WOBSO WVDD AGNDX AGNDX AVDDO

102 101 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65

MB MA DVDA DVDB DVDC DVDD DVDRFIP DVDRFIN CDA CDB CDC CDD OSN OSP RFGC RFGCU RFGCI CEQP CEQN AGNDX AGNDX MON MOP SW1 SW2 SWO SINPHI REFSIN HALLSIN AGNDM REFCOS HALLCOS COSPHI AVDDM AGNDX AVDDF VCON AGNDF

MT1336 PRELIMINARY, SUBJ ECT TO CHANGE WITHOUT NOTICE

MTK CONFIDENTIAL, NO DISCLOSURE

MT1336 PIN DESCRIPTIONS Pin Numbers

Symbol

Type

Description

DEFECT

Digital Output

56

SCLK

Digital Input

RF serial clock input

58

SDEN

Digital Input

RF serial data enable

59

SDATA

Digital IO

60

RST

Digital input

Reset (active high)

55

XCK16M

Digital Input

16.9MHz for verification

LQFP128 RF Flag Interface 23

Flag of bad data output status

RF SIO interface

RF serial data IO

RF SERVO interface 40

UDGATE

Digital Input

Con trol signal for DVD-RAM

41

IDGATE

Digital Input

Control signal for DVD -RAM

38

VFO13

Digital Input

DVD -RAM Header signal

RF 100

DVDA

Analog input

AC coupled DVD RF signal input A

99

DVDB

Analog Input

AC coupled DVD RF signal input

98

DVDC

Analog Input

AC coupled DVD RF signal input C

97

DVDD

Analog Input

AC coupled DVD RF signal input D

95

DVDRFIN

Analog Input

AC coupled DVD RF signal input RFIN

96

DVDRFIP

Analog Input

AC coupled DVD RF signal input RFIP

94

CDA

Analog Input

AC coupled CD RF signal input A

93

CDB

Analog Input

AC coupled CD RF signal input B

92

CDC

Analog Input

AC coupled CD RF signal input C

91

CDD

Analog Input

AC coupled CD RF signal input D

90

OSN

Analog

RF Offset cancellation capacitor connecting

89

OSP

Analog

RF Offset cancellation capacitor connecting

85

CEQP

Analog

RF Offset cancellation capacitor connecting

84

CEQN

Analog

RF Offset cancellation capacitor connecting

88

RFGC

Analog

RF AGC loop capacitor connecting for DVD -ROM

14

B

MT1336 PRELIMINARY, SUBJ ECT TO CHANGE WITHOUT NOTICE

MTK CONFIDENTIAL, NO DISCLOSURE

87

RFGCU

Analog

RF AGC loop capacitor connecting for DVD -RAM

86

RFGCI

Analog

RF AGC loop capacitor connecting for DVD -RAM

101

MA

Analog Input

DC coupled DVD-RAM main-beam RF signal input A

102

MB

Analog Input

DC coupled DVD-RAM main-beam RF signal input B

103

MC

Analog Input

DC coupled DVD-RAM main-beam RF signal input C

104

MD

Analog Input

DC coupled DVD-RAM main-beam RF signal input D

105

SA

Analog Input

DC coupled DVD-RAM sub-beam RF signal input A

106

SB

Analog Input

DC coupled DVD-RAM sub-beam RF signal input B

110

SC

Analog Input

DC coupled DVD-RAM sub-beam RF signal input C

111

SD

Analog Input

DC coupled DVD-RAM sub-beam RF signal input D

108

IR

Analog

External current bias resistor (R=20K)

119

AGC1

Analog

Wobble AGC loop1 capacitor

121

AGC2

Analog

Wobble AGC loop2 capacitor

122

AGC3

Analog

Wobble AGC loop3 capacitor

127

RFSUBO

Analog output

Header push-pull RF output signal

1

WOBSO

Digital output

Wobble signal output

6

RFOP

Analog output

RF positive output

7

RFON

Analog output

RF negative output

32

DPFN

Analog

DPD amplifier negative input

33

DPFO

Analog

DPD amplifier output

61

DPDMUTE

Digital input

DPD mute control input

116

TNI

Analog Input

3 beam satellite PD signal negative input

115

TPI

Analog Input

3 beam satellite PD signal positive input

21

TEO

Analog Output

TRACKING ERROR

FOCUSING ERROR & RF LEVEL

Tracking error output

& CENTRAL SERVO SIGNAL

112

CDFOP

Analog Input

CD focusing error positive input

113

CDFON

Analog Input

CD focusing error negative input

18

FEO

Analog Output

Focusing error output

19

LVL

Analog Output

RF level output

20

CSO

Analog output

Central servo signal output

ALPC

15

MT1336 PRELIMINARY, SUBJ ECT TO CHANGE WITHOUT NOTICE

MTK CONFIDENTIAL, NO DISCLOSURE

124

MDI1

Analog Input

125

LDO1

Analog Ou tput

123

MDI2

Analog Input

126

LDO2

Analog Output

26

CRTP

Analog

RF top envelop filter capacitor connecting

27

CRTPLP

Analog

Defect level filter capacitor connecting

25

HRFRP

Analog output

High frequency RF ripple output or Blank detector’s output

24

LRFRP

Analog output

Low frequency RF ripple output

67, 69

AVDD

Power

65, 73

AGND

GND

64

AVDD

Power

DPD Power

62

AGND

GND

DPD GND

109

AVDD

Power

107

AGND

GND

RF path GND

114

SVDD

Power

Servo Power

117

SGND

GND

2,120

WAVDD

Power

128,118

WAGND

GND

5

AVDDO

Power

Power for RF output

8

AGNDO

GND

GND for RF output

14

AVDDT

Power

12

AGNDT

GND

GND for Trimming PAD

22

VDDP

Power

Peak Detection Power

31

GNDP

GND

Peak Detection GND

37,54

VDD

Power

Serial I/O Power

39,57

GND

GND

Serial I/O GND

Laser power monitor input Laser driver output Laser power monitor input Laser driver output

RF RIPPLE

POWER Master PLL Filter power GND for Master PLL Filter

RF path Power

Servo GND Wobble Power Wobble GND

Power for Trimming PAD

REFERENCE VOLTAGE 16

VREFO

Analog output

Reference voltage 1.4V

15

V2REFO

Analog output

Reference voltage 2.8V

17

V20

Analog Output

Reference voltage 2.0V

16

MT1336 PRELIMINARY, SUBJ ECT TO CHANGE WITHOUT NOTICE

MTK CONFIDENTIAL, NO DISCLOSURE

ALPC TRIMMING 9

TM1

Analog input

Trimming pin for ALPC1

10

TM2

Analog input

Trimming pin for ALPC1

11

TM3

Analog input

Trimming pin for ALPC2

13

TM4

Analog input

Trimming pin for ALPC2

HIGH SPEED TRACK COUNTING 29

TRLP

Analog

Low-pass filter capacitor connecting

28

TRLPA

Analog

Low-pass filter capacitor connecting

30

HTRC

Digital output

High speed track counting digital output

74

HALLSIN

Analog input

Negative input of amplifier for hall sensor signal

75

REFSIN

Analog input

Positive input of amplifier for hall sensor signal

76

SINPHI

Analog output

Amplifier output for hall sensor signal

71

HALLCOS

Analog input

Negative input of amplifier for hall sensor signal

72

REFCOS

Analog input

Positive input of amplifier for hall sensor signal

70

COSPHI

Analog output

Amplifier output for hall sensor signal

PCS

FOR MONITOR ONLY 81

MON

Analog output

80

MOP

Analog output

66

VCON

Analog output

77

SWO

Analog output

Output from mux of SW1 & SW2

78

SW2

Analog input

External input for servo input select

79

SW1

Analog input

External input for servo input select

FOR SERIAL I/O 42

IO0

43

IO1

44

IO2

45

IO3

46

IO4

47

IO5

17

MT1336 PRELIMINARY, SUBJ ECT TO CHANGE WITHOUT NOTICE

48

IO6

49

IO7

50

IO8

51

IO9

52

IOA

53

IOB

MTK CONFIDENTIAL, NO DISCLOSURE

18

MT1379 Progressive Scan DVD Player Combo Chip

Specificationsaresubjecttochangewithoutnotice

8.2 MT1379 n Super Integration DVD player single chip §

Servo controller and data channel processing

§

MPEG-1/MPEG-2/JPEG video decoding Dolby AC-3/DTS/DVD -Audio audio decoding

§ § § § § §

Built-in TV encoder Built-in progressive video output

§

Video input port and audio/SPDIF input port

§ §

§ § § §

Built-in DSP for digital servo control

§

Built-in 8032 micro controller

§

Built-in internal 373 and 8-bit programmable lower address port

§

1024-bytes on-chip RAM Up to 2M bytes FLASH-programming interface Supports 5/3.3-Volt. FLASH interface

§ § §

§

Built-in a frequency programmable clock to µP and RSPC Decoder to optimize the performance over power

§ § §

Provides interface with analog front-end processor Analog data slicer for small jitter capability

§ §

Built-in high performance data PLL for chann el data demodulation

§

EFM/EFM+ data demodulation Enhanced channel data frame sync protection & DVD-ROM sector sync protection

§ § §

n Servo Control and Spindle Motor Control §

§

Programmable frequency error gain and phase error gain of spindle PLL to control spindle motor on CLV and CAV mode Provide a varipitch speed control for CLV and CAV mode Built-in ADCs and DACs for digital servo control

§

Provide 2 general PWM

§

Supports power-down mode Supports additional serial port

n DVD-ROM/CD-ROM Decoding Logic

DVD-ROM up to 8XS CD-ROM up to 24XS

n Channel Data Processor §

§

§

n Speed Performance on Servo and Decoding §

Tray control can be PWM output or digital output

n Host Micro controller

Unified track buffer and A/V decoding buffer Video processing for scaling and video quality enhancement OSD & Sub-picture decoding Built-in clock generator

§

§

19

Supports CD-ROM Mode 1, CD-ROM XA Mode 2 Form 1, CD-ROM XA Mode 2 Form 2, and CD-DA formats High-speed ECC logic capable of correcting one error per each P-codeword or Q-codeword Automatic sector Mode and Form detection Automatic sector Header verification 8-bit counter for decode completion check Programmable descrambling and error correction schemes Automatically repeated error corrections 8-bit C2 Pointer counter Decoder Error Notification Interrupt that signals various decoder errors Provide error correction acceleration

n Buffer Memory Controller §

Supports 16Mb/32Mb/64Mb/128Mb SDRAM

§

§

Supports 16-bit/32-bit SDRAM data bus interface Build in a DRAM interface programmable clock to optimize the DRAM performance Provide the self-refresh mode SDRAM

§

Programmable DRAM access cycle and refresh

§

MT1379 PRELIMINARY, SUBJECT TO CHANGE WITHOUT NOTICE

§

MTK CONFIDENTIAL, NO DISCLOSURE

§

cycle timings Block-based sector addressing

§

§

Programmable buffering counter for buffer status tracking

§

Maximum DRAM speed is 133MHz Support 5/3.3-Volt. DRAM Interface

§

§ §

n Video Decode § §

Decodes MPEG1 video and MPEG2 main level, main profile video (720/480 and 720x576) Maximum input bit-rate of 15Mbits/sec

§

Smooth digest view function with I, P and B picture decoding

§

Baseline, extended-sequential and progressive JPEG image decoding

§

RLE and non-RLE BMP image decoding Support CD-G titles

§

§

§ § § § § §

§

§ §

HDCD certified

§

§

Six 54MHz/12bit DA converters Support NTSC, PAL-BDGHI, PAL-N, PAL-M interlace TV format and 480p, 576p progressive TV format Automatically turn off unconnected channel(s). Support PC monitor (VGA)

§

Support Macrovision 7.1

§

256/16 color RLC format OSD Automatic scrolling of OSD image

§

Provides 4 -color/32x32-pixel hardware cursor Fade-in, Fade out, and Wipe functions as specified in the DVD-Audio Specification and other slide show transition effects Progressive scan output

n Progressive Output §

Automatic detect film or video source

§

3:2 pull down source detection Advanced Motion adaptive de-interlace Minimum external memory requirement

§

Decoder format supports: - Dolby Digital (AC -3) decoding

§

- DTS decoding - MLP decoding for DVD -Audio

n Audio/Video Output §

- MPEG-1 layer 1/layer 2 audio decoding - MPEG-2 layer1/layer2 2 -channel audio decoding - Dolby Pro Logic decoding - High Definition Compatible Digital (HDCD) decoding §

Karaoke functions - Microphone echo with adjustable echo level, echo -depth and delay length - Microphone tone control with three custom second-order IIR filter - Vocal mute/vocal assistant - Key shift up to +/- 8 keys controlled by 1/2 key

n TV Encoder

Arbitrary ratio vertical/horizontal scaling of video, from 0.25X to 256X 65535/256/16/4/2-color bitmap format OSD,

n Audio Processing §

- PCM / bit stream / mute mode - Custom IEC latency up to 2 frames Pink noise and white noise generator

Channel equalizer 3D surround processing include virtual surround and speaker separation Power-down control

§

n Video/OSD/SPU/HLI Processor

Downmix function Support IEC 60958/61937 output

§ §

Line-in/SPDIF-in for versatile audio processing CCIR601/656 video input port Support picture-in-picture for video decoding and input source

n Outline

Up to 6 channel linear PCM output for DVD Audio / DVD Video

20

§ §

216-pin LQFP package 3.3/2.5-Volt. Dual operating voltages

MT1379 PRELIMINARY, SUBJECT TO CHANGE WITHOUT NOTICE

MTK CONFIDENTIAL, NO DISCLOSURE

P IN D EFINITIONS Pin Number

Symbol

Type

1

IREF

Analog Input

2 3 4 5 6 7 8 9 10 11 12 13 14

PLLVSS LPIOP LPION LPFON LPFIP LPFIN LPFOP JITFO JITFN PLLVDD3 FOO TRO TROPENPWM

Ground Analog Output Analog Output Analog output Analog Input Analog Input Analog Output Analog Output Analog Input Power Analog Output Analog Output Analog Output

15 16 17 18 19 20 21 22

PWMOUT1 PWMOUT2 DVDD2 DMO FMO DVSS FG HIGHA0

23

HIGHA1

24

HIGHA2

25

HIGHA3

26

HIGHA4

27

HIGHA5

28

DVSS

Analog Output Analog Output Power Analog Output Analog Output Ground Input Inout 2~16MA, SR PU Inout 2~16MA, SR PU Inout 2~16MA, SR PU Inout 2~16MA, SR PU Inout 2~16MA, SR PU Inout 2~16MA, SR PU Grou nd

Description Current reference input. It generates reference current for data PLL. Connect an ext ernal 100K resistor to this pin and PLLVSS. Ground pin for data PLL and related analog circuitry Positive output of the low pass filter Negative output of the low pass filter Negative output of loop filter amplifier Positive input of loop filter amplifier Negative input of loop filter amplifier Positive output of loop filter amplifier RF jitter meter output Negative input of the operation amplifier for RF jigger meter 3.3V power pin for data PLL and related analog circuitry Focus servo output. PDM output of focus servo compensator Tracking servo output. PDM output of tracking servo compensator Tray open output, controlled by microcontroller. This is PWM output for TRWMEN27hRW2=1 or is digital output for TRWMEN27hRW2=0 The 1st general PWM output

The 2nd general PWM output 2.5V power pin for internal fully digital circuitry Disk motor control output. PWM output Feed motor control. PWM output Ground pin for internal fully digital circuitry Motor Hall sensor input Microcontroller address 8

Microcontroller address 9

Microcontroller address 10

Microcontroller address 11

Microcontroller address 12

Microcontroller address 13

Ground pin for internal digital circuitry

21

MT1379 PRELIMINARY, SUBJECT TO CHANGE WITHOUT NOTICE

MTK CONFIDENTIAL, NO DISCLOSURE

Pin Number

Symbol

Type

29

HIGHA6

30

HIGHA7

31

AD7

32

AD6

33

AD5

34

AD4

35 36

DVDD3 AD3

37

AD2

38

AD1

39

AD0

40

IOA0

41

IOA1

42 43

DVDD2 IOA2

44

IOA3

45

IOA4

46

IOA5

47

IOA6

Inout 2~16MA, SR PU Inout 2~16MA, SR PU Inout 2~16MA, SR Inout 2~16MA, SR Inout 2~16MA, SR Inout 2~16MA, SR Power Inout 2~16MA, SR Inout 2~16MA, SR Inout 2~16MA, SR Inout 2~16MA, SR Inout 2~16MA, SR PU Inout 2~16MA, SR PU Power Inout 2~16MA, SR PU Inout 2~16MA, SR PU Inout 2~16MA, SR PU Inout 2~16MA, SR PU Inout 2~16MA, SR PU

Description Microcontroller address 14

Microcontroller address 15

Microcontroller address/data 7 Microcontroller address/data 6 Microcontroller address/data 5 Microcontroller address/data 4 3.3V power pin for internal digital circuitry Microcontroller address/data 3 Microcontroller address/data 2 Microcontroller address/data 1 Microcontroller address/data 0 Microcontroller address 0 / IO

Microcontroller address 1 / IO

2.5V power pin for internal digital circuitry Microcontroller address 2 / IO

Microcontroller address 3 / IO

Microcontroller address 4 / IO

Microcontroller address 5 / IO

Microcontroller address 6 / IO

22

MT1379 PRELIMINARY, SUBJECT TO CHANGE WITHOUT NOTICE

MTK CONFIDENTIAL, NO DISCLOSURE

Pin Number

Symbol

Type

48

IOA7

49

A16

50

A17

51

IOA18

52

IOA19

53

IOA20

54 55 56

APLLVSS APLLVDD3 ALE

57

IOOE#

58

IOWR#

59

IOCS#

60 61

DVSS UP1_2

62

UP1_3

63

UP1_4

64

UP1_5

65

UP1_6

66

DVDD3

Inout 2~16MA, SR PU Output 2~16MA, SR Output 2~16MA, SR Inout 2~16MA, SR SMT Inout 2~16MA, SR SMT Inout 2~16MA, SR SMT Ground Power Inout 2~16MA, SR PU, SMT Inout 2~16MA, SR SMT Inout 2~16MA, SR SMT Inout 2~16MA, SR PU, SMT Ground Inout 4MA, SR PU, SMT Inout 4MA, SR PU, SMT Inout 4MA, SR PU, SMT Inout 4MA, SR PU, SMT Inout 4MA, SR PU, SMT Power

Description Microcontroller address 7 / IO

Flash address 16 Flash address 17 Flash address 18 / IO

Flash address 19 / IO

Flash address 20 / IO OR Videoin Data PortB 0 Ground pin for audio clock circuitry 3.3V Power pin for audio clock circuitry Microcontroller address latch enable

Flash output enable, active low / IO

Flash write enable, active low / IO

Flash chip select, active low / IO

Ground pin for internal digital circuitry Microcontroller port 1 -2

Microcontroller port 1 -3

Microcontroller port 1 -4

Microcontroller port 1 -5

Microcontroller port 1 -6

3.3V power pin for internal digital circuitry

23

MT1379 PRELIMINARY, SUBJECT TO CHANGE WITHOUT NOTICE

MTK CONFIDENTIAL, NO DISCLOSURE

Pin Number

Symbol

Type

67

UP1_7

68

UP3_0

69

UP3_1

70

INT0#

71

IR

72 73 74 75

DVDD2 UP3_4 UP3_5 UWR#

76

URD#

77 78 79 80 81 82 83 84 85 86 87

DVSS RD7 RD6 RD5 RD4 DVDD2 RD3 RD2 RD1 RD0 RWE#

88

CAS#

89

RAS#

90

RCS#

91

BA0

92 93

DVSS RD15

Inout 4MA, SR PU, SMT Inout 4MA, SR PU, SMT Inout 4MA, SR PU, SMT Inout 2~16MA, SR PU, SMT Input SMT Power Inout Inout Inout 2~16MA, SR PU, SMT Inout 2~16MA, SR PU, SMT Ground Inout Inout Inout Inout Power Inout Inout Inout Inout Output 2~16MA, SR Output 2~16MA, SR Output 2~16MA, SR Output 2~16MA, SR Output 2~16MA, SR Ground Inout 2~16MA, SR PU/PD, SMT

Description Microcontroller port 1 -7

Microcontroller port 3 -0

Microcontroller port 3 -1

Microcontroller interrupt 0, active low

IR control signal input 2.5V power pin for internal digital circuitry Microcontroller port 3 -4 Microcontroller port 3 -5 Microcontroller write strobe, active low

Microcontroller read strobe, active low

Ground pin for internal digital circuitry DRAM data 7 DRAM data 6 DRAM data 5 DRAM data 4 2.5V power pin for internal digital circuitry DRAM data 3 DRAM data 2 DRAM data 1 DRAM data 0 DRAM Write enable, active low DRAM columnaddress strobe, active low DRAM row address strobe, active low DRAM chip select, active low DRAM bank address 0 Ground pin for internal digital circuitry DRAM data 15

24

MT1379 PRELIMINARY, SUBJECT TO CHANGE WITHOUT NOTICE

MTK CONFIDENTIAL, NO DISCLOSURE

Pin Number

Symbol

Type

94

RD14

95

RD13

96

RD12

97 98

DVDD3 RD11

99

RD10

100

RD9

101

RD8

102 103

DVSS CLK

104

CLE

105

RA11

106

RA9

107

RA8

108 109 110

DMVDD3 DMVSS RA7

111 112

DVDD3 RA6

113

RA5

114

RA4

115 116

DVSS DQM1

Inout 2~16MA, SR PU/PD, SMT Inout 2~16MA, SR PU/PD, SMT Inout 2~16MA, SR PU/PD, SMT Power Inout 2~16MA, SR PU/PD, SMT Inout 2~16MA, SR PU/PD, SMT Inout 2~16MA, SR PU/PD, SMT Inout 2~16MA, SR PU/PD, SMT Ground Output 2~16MA, SR Output 2~16MA, SR Output 2~16MA, SR Output 2~16MA, SR Output 2~16MA, SR Power Ground Output 2~16MA, SR Power Output 2~16MA, SR Output 2~16MA, SR Output 2~16MA, SR Ground Output 2~16MA, SR

Description DRAM data 14

DRAM data 13

DRAM data 12

3.3V power pin for internal digital circuitry DRAM data 11

DRAM data 10

DRAM data 9

DRAM data 8

Ground pin for internal digital circuitry DRAM clock DRAM clock enable DRAM address bit 11 or audio serial data 3 (channel 7/8) DRAM address 9 DRAM address 8 3.3V Power pin for DRAM clock circuitry Ground pin for DRAM clock circuitry DRAM address 7 3.3V power pin for internal digital circuitry DRAM address 6 DRAM address 5 DRAM address 4 Ground pin for internal digital circuitry Mask for DRAM input/output byte 1

25

MT1379 PRELIMINARY, SUBJECT TO CHANGE WITHOUT NOTICE

MTK CONFIDENTIAL, NO DISCLOSURE

Pin Number

Symbol

Type

117

DQM0

118

BA1

119

RA10

120 121

DVDD2 RA0

122

RA1

123

RA2

124

RA3

125 126

DVSS RD31

127

RD30

128

RD29

129

RD28

130 131

DVDD3 RD27

132

RD26

133

RD25

134

RD24

135 136

DVSS DQM3

137

DQM2

Output 2~16MA, SR Output 2~16MA, SR Output 2~16MA, SR Power Output 2~16MA, SR Output 2~16MA, SR Output 2~16MA, SR Output 2~16MA, SR Ground Inout 2~16MA, SR PU/PD, SMT Inout 2~16MA, SR PU/PD, SMT Inout 2~16MA, SR PU/PD, SMT Inout 2~16MA, SR PU/PD, SMT Power Inout 2~16MA, SR PU/PD, SMT Inout 2~16MA, SR PU/PD, SMT Inout 2~16MA, SR PU/PD, SMT Inout 2~16MA, SR PU/PD, SMT Ground Output 2~16MA, SR Output 2~16MA, SR

Description Mask for DRAM input/output byte 0 DRAM bank address 0 DRAM address10 2.5V power pin for internal digital circuitry DRAM address 0 DRAM address 1 DRAM address 2 DRAM address 3 Ground pin for internal digital circuitry DRAM data 31

DRAM data 30

DRAM data 29

DRAM data 28

3.3V power pin for internal digital circuitry DRAM data 27

DRAM data 26

DRAM data 25

DRAM data 24

Ground pin for internal digital circuitry Mask for DRAM input/output byte 3 Mask for DRAM input/output byte 2

26

MT1379 PRELIMINARY, SUBJECT TO CHANGE WITHOUT NOTICE

MTK CONFIDENTIAL, NO DISCLOSURE

Pin Number

Symbol

Type

138

RD23

139

RD22

140 141

DVDD2 RD21

142

RD20

143

RD19

144

RD18

145 146

DVSS RD17

147

RD16

148

ABCK

149

ALRCK

150 151

DVDD3 ACLK

152 153

MC_DATA SPDIF

154

ASDATA0

155

ASDATA1

156

ASDATA2

Inout 2~16MA, SR PU/PD, SMT Inout 2~16MA, SR PU/PD, SMT Power Inout 2~16MA, SR PU/PD, SMT Inout 2~16MA, SR PU/PD, SMT Inout 2~16MA, SR PU/PD, SMT Inout 2~16MA, SR PU/PD, SMT Ground Inout 2~16MA, SR PU/PD, SMT Inout 2~16MA, SR PU/PD, SMT Output 4MA Inout 4MA, PD, SMT Power Inout 4MA Input Output 2~16MA, SR : ON/OFF Inout 4MA PD SMT Inout 4MA PD SMT Inout 4MA PD SMT

Description DRAM data 23 / Videoin Data PortA 7 DRAM data 22 / Videoin Data PortA 6 2.5V power pin for internal digital circuitry DRAM data 21 / Videoin Data PortA 5 DRAM data 20 / Videoin Data PortA 4 DRAM data 19 / Videoin Data PortA 3 DRAM data 18 / Videoin Data PortA 2 Ground pin for internal digital circuitry DRAM data 17 / Videoin Data PortA 1 DRAM data 16 / Videoin Data PortA 0 Audio bit clock (1) Audio left/right channel clock (2) Trap value in power-on reset : 1 : use external 373 0: use internal 373 3.3V power pin for internal digital circuitry Audio DAC master clock (384/256 audio sample frequency) Microphone serial input SPDIF output

(1) (2) (1) (2) (1) (2)

Audio serial data 0 (left/right channel) Trap value in power-on reset : 1 : manufactory test mode 0 : normal operation Audio serial data 1 (surround left/surround right channel) Trap value in power-on reset : 1 : manufactory test mode 0 : normal operation Audio serial data 2 (center/left channel) Trap value in power-on reset : 1 : manufactory test mode 0 : normal operation

27

MT1379 PRELIMINARY, SUBJECT TO CHANGE WITHOUT NOTICE

MTK CONFIDENTIAL, NO DISCLOSURE

Pin Number

Symbol

Type

157

ASDATA3

Inout 4MA PD SMT

158

ASDATA4

Inout 4MA PD SMT

159 160 161 162

DACVDDC VREF FS YUV0/CIN

163 164

DACVSSC YUV1/C

165 166

DACVDDB YUV2/Y

Power Analog input Analog output Output 4MA, SR Ground Output 4MA, SR Power Output 4MA, SR Ground

Description (1) (2)

Audio serial data 3 (surround left/surround right channel) Trap value in power-on reset : 1 : manufactory test mode 0 : normal operation OR Videoin Data PortB 1 (1) Audio serial data 4 (center/left channel) (2) Trap value in power-on reset : 1 : manufactory test mode 0 : normal operation OR Videoin Data PortB 2 3.3V power pin for VIDEO DAC circuitry Bandgap reference voltage Full scale adjustment Video data output bit 0 / Compensation capacitor Ground pin for VIDEO DAC circuitry Video data output bit 1 / Analog chroma output 3.3V power pin for VIDEO DAC circuitry Video data output bit 2 /

Analog Y output

167

DACVSSB

168

YUV3/CVBS

Output 4MA, SR

Ground pin for VIDEO DAC circuitry Video data output bit 3 / Analog composite output

169 170

DACVDDA YUV4/G

171 172

DACVSSA YUV5/B

173

YUV6/R

174

ICE

3.3V power pin for VIDEO DAC circuitry Video data output bit 4 / Green or Y Ground pin for VIDEO DAC circuitry Video data output bit 5 / Blue or CB Video data output bit 6 / Red or CR Microcontroller ICE mode enable

175

BLANK#

176

VSYN

177

YUV7

178 179

DVSS HSYN

180

SPMCLK

Power Output 4MA, SR Ground Output 4MA, SR Output 4MA, SR Input PD, SMT Inout 4MA, SR SMT Inout 4MA, SR SMT Inout 4MA, SR SMT Ground Inout 4MA, SR SMT Input

Video blank area, active low / Videoin Field_601 Vertical sync / Videoin Vsync_601 Video data output bit 7 / Videoin Data PortB 3 Ground pin for internal digital circuitry Horizontal sync / Videoin Hsync_601 Audio DAC master clock of SPDIF input / Videoin Data PortB 4

28

MT1379 PRELIMINARY, SUBJECT TO CHANGE WITHOUT NOTICE

MTK CONFIDENTIAL, NO DISCLOSURE

Pin Number

Symbol

Type

181

SPDATA

Input

182 183

DVDD2 SPLRCK

Power Input

184

SPBCK

Input

185 186 187 188

DVDD3 XTALO XTALI PRST

189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216

DVSS VFO13 IDGATE DVDD3 UDGATE WOBSI SDATA SDEN SLCK BDO ADCVSS ADIN RFSUBI TEZISLV TEI CSO FEI RFLEVEL RFRP_DC RFRP_AC HRFZC PWMVREF PWM2VREF ADCVDD3 RFDTSLVP RFDTSLVN RFIN RFIP

Power Output Input Input PD, SMT Ground Output Output Power Output Input Output Output Output Input Ground Analog Input Analog Input Analog Input Analog Input Analog Input Analog Input Analog Input A Input Analog Input Analog Input A Input A Input Power Analog Output Analog Output Analog Input Analog Input

Description Audio data of SPDIF input / Videoin Data PortB 5 2.5V power pin for internal digital circuitry Audio left/right channel clock of SPDIF input / Videoin Data PortB 6 Audio bit clock of SPDIF input / Videoin Data PortB 7 3.3V power pin for internal digital circuitry Crystal output Crystal input Power on reset input, active high Ground pin for internal digital circuitry The 1st, 3rd header VFO pulse output Header detect signal output 3.3V power pin for internal digital circuitry DVD_RAM recording data gate signal output Wobble signal input RF serial data output RF serial data latch enable RF serial clock output Flag of defect data input status Ground pin for ADC circuitry General A/D input RF subtraction signal input terminal Tracking error zero crossing low pass input Tracking error input Central servo input Focus error input Sub beam add input or RFRP low pass input RF ripple detect input RF ripple detect input (through AC coupling) High frequency RF ripple zero crossing A reference voltage input for PWM circuitry. A typical value of 4.0 v A reference voltage input for PWM circuitry. A typical value of 2.0 v 3.3V power pin for ADC circuitry Positive RF data slicer level output Negative RF data slicer level output Negative input of RF differential signal Positive input of RF differential signal

29

MT1379 PRELIMINARY, SUBJECT TO CHANGE WITHOUT NOTICE

MTK CONFIDENTIAL, NO DISCLOSURE

26 Jul, 2002

216 215 214 213 212 211 210 209 208 207 206 205 204 203 202 201 200 199 198 197 196 195 194 193 192 191 190 189 188 187 186 185 184 183 182 181 180 179 178 177 176 175 174 173 172 171 170 169 168 167 166 165 164 163

RFIP RFIN RFDTSLVN RFDTSLVP ADCVDD3 PWM2VREF PWMVREF HRFZC RFRP_AC RFRP_DC RFLEVEL FEI CSO TEI TEZISLV RFSUBI ADIN ADCVSS BDO SLCK SDEN SDATA WOBSI UDGATE DVDD3 IDGATE VFO13 DVSS PRST XTALI XTALO DVDD3 SPBCK SPLRCK DVDD2 SPDATA SPMCLK HSYN DVSS YUV7 VSYN BLANK ICE YUV6/R YUV5/B DACVSSA YUV4/G DACVDDA YUV3/CVBS DACVSSB YUV2/Y DACVDDB YUV1/C DACVSSC

Page 1 of 2

MT1379 (216 pins)

162 161 160 159 158 157 156 155 154 153 152 151 150 149 148 147 146 145 144 143 142 141 140 139 138 137 136 135 134 133 132 131 130 129 128 127 126 125 124 123 122 121 120 119 118 117 116 115 114 113 112 111 110 109

55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108

LPIOP LPION LPFON LPFIP LPFIN LPFOP JITFO JITFN PLLVDD3 FOO TRO TROPENPWM PWMOUT1 PWMOUT2 DVDD2 DMO FMO DVSS FG HIGHA0 HIGHA1 HIGHA2 HIGHA3 HIGHA4 HIGHA5 DVSS HIGHA6 HIGHA7 AD7 AD6 AD5 AD4 DVDD3 AD3 AD2 AD1 AD0 IOA0 IOA1 DVDD2 IOA2 IOA3 IOA4 IOA5 IOA6 IOA7 A16 A17 IOA18 IOA19 IOA20 APLLVSS

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54

APLLVDD3 ALE IOOE# IOWR# IOCS# DVSS UP1_2 UP1_3 UP1_4 UP1_5 UP1_6 DVDD3 UP1_7 UP3_0 UP3_1 INT0# IR DVDD2 UP3_4 UP3_5 UWR# URD# DVSS RD7 RD6 RD5 RD4 DVDD2 RD3 RD2 RD1 RD0 RWE# CAS# RAS# RCS# BA0 DVSS RD15 RD14 RD13 RD12 DVDD3 RD11 RD10 RD9 RD8 DVSS CLK CKE RA11 RA9 RA8 DMVDD3

IREF PLLVSS

30

YUV0/CIN FS VREF DACVDDC ASDATA4 ASDATA3 ASDATA2 ASDATA1 ASDATA0 SPDIF MC_DATA ACLK DVDD3 ALRCK ABCK RD16 RD17 DVSS RD18 RD19 RD20 RD21 DVDD2 RD22 RD23 DQM2 DQM3 DVSS RD24 RD25 RD26 RD27 DVDD3 RD28 RD29 RD30 RD31 DVSS RA3 RA2 RA1 RA0 DVDD2 RA10 BA1 DQM0 DQM1 DVSS RA4 RA5 RA6 DVDD3 RA7 DMVSS

MT1379 PRELIMINARY, SUBJECT TO CHANGE WITHOUT NOTICE

MTK CONFIDENTIAL, NO DISCLOSURE

F UNCTIONAL B LOCK

DVD module

Servo IO

Analog Front end

Servo DSP

Spindle Controller

Debug Port

Channel Decode

DPU

System Parser

CSS/ CPPM

TV encoder

Video Decoder

Video Output

Playback Controller IR/ VFD

System Controller

DRAM Interface

Flash

DRAM

Audio Processor

Audio Output

Audio DAC

SPDIF

Microphone Input

MIC

Servo Controller The servo control is accomplished through the servo DSP (Servo Digital Signal Processor) and its accessory I/O circuits. This servo DSP is capable of performing complex operations an d also provides a friendly interface for the system controller. By issuing type 1 and type 2 commands from the system controller, the servo DSP can accomplish various complicated servo control functions, such as tracking, seeking and MT1336/MT1376 chip register programming. As for the servo I/O circuits, it provides interface between the input servo signals and the Servo DSP. It has built-in ADCs to digitize the servo control signal and DACs to provide signals for the actuator and sledge motor. It also has a serial interface to communicate with the MT1336/MT1376 chip.

Analog Front End The analog front end contains a data slicer circuit and a data PLL circuit. The RF analog signal from MT1336/MT1376 is quantized by the data slicer to form the EFM/EFM+ bit st ream, from which the channel bit clock is extracted by the data PLL.The EFM/EFM+bit stream and bit clock are then output to DPU for channel bit processing.

DPU Data path unit (DPU) provides protection on data with lost synchronization patterns and demodulates EFM/EFM+ bit stream into the channel raw data that will be corrected by the decoder. The synchronization protection makes data after the synchronization pattern to be extracted even if the synchronization pattern is not found.

Spindle Controller The spindle controller is used to control disc spindle motor. It includes a varipitch CLV clock generator, a CLV/CAV controller, and a PWM generator. The varipitch CLV clock enerator generates a reference colck for the speed of operation. The CLV/CAV

31

MT1379 PRELIMINARY, SUBJECT TO CHANGE WITHOUT NOTICE

MTK CONFIDENTIAL, NO DISCLOSURE

controller changes the mode and speed of operation according to servo register setting. The PWM generator generates pulse -width-modulated signal to drive disc spindle motor driver.

CSS/CPPM The CSS/CPPM module provides functions necessary for decoding discs conforming to CSS/CPPM specification.

System Parser The system parser is used to help the system controller to decode DVD/SVCD/VCD bitstream just after the channel decoder performing error correction. Acting as a DMA master, it moves bitstream data from RSPC buffer to video, audio, or sub-picture buffer according to system controller request. It also decrypts the scramble data of the CSS/CPPM sectors. Another function of system parser is providing system controller/DSP a DRAM memory copy controller to enhance system controller/DSP performance.

Video Decoder The primary function of MT1379 is to support MPEG1 and MPEG2 video decoding. The video decode engine comprises of variable length decoder (VLD), inverse transformer (IT), motion compensator (MC), and block reconst ructor (BR). The video decode engine decodes the variable length encoded symbols in MPEG bitstream and performs inverse scan, inverse quantization, mismatch control and inverse discrete cosine transform onto the variable length decoded data. The motion compensator fetches prediction data from reference picture buffer according to motion vectors and motion prediciton mode for P and B pictures. Finally, the block reconstructor combines both the results of inverse transformer and motion compensator to derive the reconstructed image macroblock and write back to picture buffer. The video decode engine can also support JPEG and BMP file decoding by common image compression hardware kernels.

Video Output The Video Output unit contains Video Processor, SPU, OSD, Cursor, TV encoder units, it performs § Reading decoded video from DRAM buffer § Scaling the image § Gamma/Brightness/Hue/Saturation adjustment and edge enhancement § Reading and decoding SPU and OSD data from DRAM buffer § Generating hardware cursor image § Merging the video data, SPU, OSD and cursor Video Processor The Video Processor unit controls the transfer of video data stored in the DRAM to an internal or external TV encoder. It uses FIFOs to buffer outgoing luminance and chrominance data, and performs YUV420 to YUV422 conversion and arbitrary vertical/horizontal decimation/interpolation, from 1/4x to 256x. With this arbitrary ratio scaling capability, the Video Processor can perform arbitrary image conversion, such as PAL to NTSC, NTSC to PAL, MPEG1 to MPEG2, Letterbox, Pan-Scan conversion or zoom in, zoom out. It is also capible of interlace to progressive conversion. The Video Processor unit performs the following functions: § Requests and receives the decoded picture data from the picture buffer in external DRAM for display § Resample vertical data to create 4:2:2 sample format § Optionally performs vertical/horizontal resampling of both luminance and chrominance data § Performs optional Gamma correction, luminance/chrominance adjustment, and edge enhancement The V ideo Processor unit contains two 2-tap vertical filters for luminance and chrominance . These filters are used to interpolate and reposition luminance and chrominance line to improve picture quality. These filters are capble of generating up to eight, unique subline value between two consecutive scan lines. The generation of lines depends on the ratio between the height of the source image and the target image. In applications where DRAM bandwidth are critical the filters can be configured as simple line-repeating to reduce the DRAM bandwidth required. The Video Processor unit integrates two separate horizontal postprocessing filter, a simple 2-tap linear horizontal filter and an 8-tap programmable filter. These filters are provided for scaling images horizontally along the scan line. These two filters is capable of generating up to eight, unique subpixel values between two consecutive pixels on a scan line. The generation of pixels depends on the ratio between the width of the source image and the target image. SPU

32

MT1379 PRELIMINARY, SUBJECT TO CHANGE WITHOUT NOTICE

MTK CONFIDENTIAL, NO DISCLOSURE

This is a hardware sub-picture decoder. It decodes the compressed SPU image bitstream and CHG_COLCON commands according to SPU header information previously decoded by system controller. The SPU module also allows two SPU objects to be displayed at the same time. SPU image is blended with main video stream. OSD The OSD module can operate with 2/4/16/256 -color bitmap format (1/2/4/8 bits), and 16/256 color RLC format, all have 16 levels of transparency. In addition, it accepts an special WARP mode, which inserts one programmable RLC code in the bitmap to reduce the image size stored in DRAM. It also features automatic shadow/outline generation in 2-color mode, 2 Hilight areas, 1 ChangeColor area and 1 OSDVoid area. One OSD area can occupy the full or a partial screen, or multiple OSDs can occur in a screen at the same time, only if they don't occupy the same horizontal line. The output image is blended with the video-SPU mixed stream. Cursor A hardware cursor generator is integrated in Video Ou tput Unit. The cursor image is a 32x32 4-color bitmap image, each colors are programmable. Cursor can be enlarged by 2 in both vertical and horizontal directions. Cursor image is multiplexed with video-SPU-OSD mixed stream.

Audio Interface Audio interface consists of Audio Output Interface and Microphone Input Interface. Audio Output Interface The MT1379 can support up to 8 channel audio outputs. The output formats can be 16, 24, or 32-bit frames. Left alignment, 2 right alignment, or I S formats are all supported. With built-in PLL, MT1379 can provide the audio clock (ACLK) for external audio DAC at 384Fs, where Fs is usually 32KHz, 44.1KHz, 48KHz, 96KHz, or 192KHz. ACLK can also be programmed to be from outside MT1379. When ACLK is input to MT1379, the frequency could be 128*n Fs, where n is from 1 to 7. Audio raw (encoded) data or cooked (decoded) data can be output on a single line using S/PDIF interface. The output slew rate and driving force of this pad are programmable. Microphone Input Interface The MT1379 provides a microphone input interface. Two independent microphones’ data could be input to the MT1379. There are two independent digital volume control for these two input channels. The input data formats can also be left 2 alignment, right alignment, or I S formats.

System Controller MT1379 uses an embedded Turbo-8032 as System Controller and provide ICE interface to increase the feasibility of F/W development. Also, MT1379 includes an build-in internal 373 to latch lower byte address from 8032 Port 0 and provide a glue-logic free solution. MT1379 supports up to 1M X 16 bits Flash ROM to store 8032 code, H/W related data, User data, etc. F/W upgrade can be achieved either by debug interface or by disk.

33

MT1379 PRELIMINARY, SUBJECT TO CHANGE WITHOUT NOTICE

MTK CONFIDENTIAL, NO DISCLOSURE

E LECTRICAL C HARACTERISTICS Absolute Maximum Rating Symbol

Parameters

Value

Unit

VDD3 VDD2 VDDA VIN VOUT Ta

3.3V Supply voltage 2.5V Supply voltage Analog Supply voltage Input Voltage Output Voltage Ambient Temperature

-0.3 to 3.6 -0.3 to 3.0 -0.3 to 3.6 -0.3 to 5.5 -0.3 to VDD3+0.3 0 to 70

V V V V V °C

DC Charateristics Symbol

Parameters

Min

Typ

Max

Unit

VIH VIL VOH VOL IIH IIL PD PDown

Input voltage high Input voltage low Output voltage high Output voltage low High level input current Low level input current Power dissapation Power down mode

2.4 3.0 -

-

3.6 0.8 VDD3 0.5 10

V V V V uA uA W W

-10 1.0 0.1

34

8.3 Am29LV160D 16 Megabit (2 M x 8-Bit/1 M x 16-Bit) CMOS 3.0 Volt-only Boot Sector Flash Memory DISTINCTIVE CHARACTERISTICS ■ Single power supply operation

■ Embedded Algorithms

— Full voltage range: 2.7 to 3.6 volt read and write operations for battery-powered applications — Regulated voltage range: 3.0 to 3.6 volt read and write operations and for compatibility with high performance 3.3 volt microprocessors ■ Manufactured on 0.23 µm process technology — Fully compatible with 0.32 µm Am29LV160B device

— Embedded Erase algorithm automatically preprograms and erases the entire chip or any combination of designated sectors — Embedded Program algorithm automatically writes and verifies data at specified addresses ■ Minimum 1,000,000 write cycle guarantee per sector ■ 20-year data retention at 125°C

■ High performance

— Reliable operation for the life of the system

— Access times as fast as 70 ns ■ Ultra low power consumption (typical values at 5 MHz)

■ Package option — 48-ball FBGA

— 200 nA Automatic Sleep mode current

— 48-pin TSOP

— 200 nA standby mode current

— 44-pin SO ■ CFI (Common Flash Interface) compliant

— 9 mA read current — 20 mA program/erase current ■ Flexible sector architecture — One 16 Kbyte, two 8 Kbyte, one 32 Kbyte, and thirty-one 64 Kbyte sectors (byte mode)

— Provides device-specific information to the system, allowing host software to easily reconfigure for different Flash devices ■ Compatibility with JEDEC standards

— One 8 Kword, two 4 Kword, one 16 Kword, and thirty-one 32 Kword sectors (word mode)

— Pinout and software compatible with singlepower supply Flash

— Supports full chip erase

— Superior inadvertent write protection ■ Data# Polling and toggle bits

— Sector Protection features: A hardware method of locking a sector to prevent any program or erase operations within that sector Sectors can be locked in-system or via programming equipment

— Provides a software method of detecting program or erase operation completion ■ Ready/Busy# pin (RY/BY#)

Temporary Sector Unprotect feature allows code changes in previously locked sectors ■ Unlock Bypass Program Command

— Provides a hardware method of detecting program or erase cycle completion (not available on 44-pin SO) ■ Erase Suspend/Erase Resume

— Reduces overall programming time when issuing multiple program command sequences ■ Top or bottom boot block configurations available

— Suspends an erase operation to read data from, or program data to, a sector that is not being erased, then resumes the erase operation ■ Hardware reset pin (RESET#) — Hardware method to reset the device to reading array data

This Data Sheet states AMD’s current technical specifications regarding the Product described herein. This Data Sheet may be revised by subsequent versions or modifications due to changes in technical specifications.

35

Publication# 22358 Rev: B Amendment/+3 Issue Date: November 10, 2000

PRODUCT SELECTOR GUIDE Family Part Number

Am29LV160D Voltage Range: VCC = 2.7–3.6 V

-70

-90

-120

Max access time, ns (tACC)

70

90

120

Max CE# access time, ns (tCE)

70

90

120

Max OE# access time, ns (tOE)

30

35

50

Speed Option

Note: See “AC Characteristics” for full specifications.

BLOCK DIAGRAM DQ0–DQ15 (A-1)

RY/BY# VCC

Sector Switches

VSS Erase Voltage Generator

RESET#

WE# BYTE#

Input/Output Buffers

State Control Command Register

PGM Voltage Generator Chip Enable Output Enable Logic

CE# OE#

VCC Detector

Address Latch

STB Timer

A0–A19

Am29LV160D

36

STB

Data Latch

Y-Decoder

Y-Gating

X-Decoder

Cell Matrix

CONNECTION DIAGRAMS

A15 A14 A13 A12 A11 A10 A9 A8 A19 NC WE# RESET# NC NC RY/BY# A18 A17 A7 A6 A5 A4 A3 A2 A1

A16 BYTE# VSS DQ15/A-1 DQ7 DQ14 DQ6 DQ13 DQ5 DQ12 DQ4 VCC DQ11 DQ3 DQ10 DQ2 DQ9 DQ1 DQ8 DQ0 OE# VSS CE# A0

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24

Standard TSOP

Reverse TSOP

37

48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25

48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25

A16 BYTE# VSS DQ15/A-1 DQ7 DQ14 DQ6 DQ13 DQ5 DQ12 DQ4 VCC DQ11 DQ3 DQ10 DQ2 DQ9 DQ1 DQ8 DQ0 OE# VSS CE# A0

A15 A14 A13 A12 A11 A10 A9 A8 A19 NC WE# RESET# NC NC RY/BY# A18 A17 A7 A6 A5 A4 A3 A2 A1

CONNECTION DIAGRAMS RESET# A18 A17 A7 A6 A5 A4 A3 A2 A1 A0 CE# VSS OE# DQ0 DQ8 DQ1 DQ9 DQ2 DQ10 DQ3 DQ11

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22

44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23

SO

WE# A19 A8 A9 A10 A11 A12 A13 A14 A15 A16 BYTE# VSS DQ15/A-1 DQ7 DQ14 DQ6 DQ13 DQ5 DQ12 DQ4 VCC

FBGA Top View, Balls Facing Down

A6

B6

C6

D6

E6

A13

A12

A14

A15

A16

A5

B5

C5

D5

E5

F5

G5

H5

A9

A8

A10

A11

DQ7

DQ14

DQ13

DQ6

A4

B4

C4

D4

E4

F4

G4

H4

WE#

RESET#

NC

A19

DQ5

DQ12

VCC

DQ4

A3

B3

C3

D3

E3

F3

G3

H3

RY/BY#

NC

A18

NC

DQ2

DQ10

DQ11

DQ3

A2

B2

C2

D2

E2

F2

G2

H2

A7

A17

A6

A5

DQ0

DQ8

DQ9

DQ1

A1

B1

C1

D1

E1

F1

G1

H1

A3

A4

A2

A1

A0

CE#

OE#

VSS

Special Handling Instructions Special handling is required for Flash Memory products in FBGA packages.

A

38

F6

G6

BYTE# DQ15/A-1

H6 VSS

Flash memory devices in FBGA packages may be damaged if exposed to ultrasonic cleaning methods. The package and/or data integrity may be compromised if the package body is exposed to temperatures above 150°C for prolonged periods of time.

PIN CONFIGURATION A0–A19

LOGIC SYMBOL

= 20 addresses

20

DQ0–DQ14 = 15 data inputs/outputs DQ15/A-1

A0–A19

= DQ15 (data input/output, word mode), A-1 (LSB address input, byte mode)

16 or 8 DQ0–DQ15 (A-1)

BYTE#

= Selects 8-bit or 16-bit mode

CE#

= Chip enable

CE#

OE#

= Output enable

OE#

WE#

= Write enable

RESET#

= Hardware reset pin

RY/BY#

= Ready/Busy output (N/A SO 044)

WE# RESET# BYTE#

VCC

= 3.0 volt-only single power supply (see Product Selector Guide for speed options and voltage supply tolerances)

VSS

= Device ground

NC

= Pin not connected internally

39

RY/BY# (N/A SO 044)

HY57V641620HG 4 Banks x 1M x 16Bit Synchronous DRAM

8.4 HY57V641620HG

DESCRIPTION The Hyundai HY57V641620HG is a 67,108,864-bit CMOS Synchronous DRAM, ideally suited for the main memory applications which require large memory density and high bandwidth. HY57V641620HG is organized as 4banks of 1,048,576x16. HY57V641620HG is offering fully synchronous operation referenced to a positive edge of the clock. All inputs and outputs are synchronized with the rising edge of the clock input. The data paths are internally pipelined to achieve very high bandwidth. All input and output voltage levels are compatible with LVTTL. Programmable options include the length of pipeline (Read latency of 2 or 3), the number of consecutive read or write cycles initiated by a single control command (Burst length of 1,2,4,8 or Full page), and the burst count sequence(sequential or interleave). A burst of read or write cycles in progress can be terminated by a burst terminate command or can be interrupted and replaced by a new burst read or write command on any cycle. (This pipelined design is not restricted by a `2N` rule.)

FEATURES •

Single 3.3±0.3V power supply Note)

•

Auto refresh and self refresh

•

All device pins are compatible with LVTTL interface

•

4096 refresh cycles / 64ms

•

JEDEC standard 400mil 54pin TSOP-II with 0.8mm of pin pitch

•

Programmable Burst Length and Burst Type

•

All inputs and outputs referenced to positive edge of system clock

- 1, 2, 4, 8 or Full page for Sequential Burst

•

Data mask function by UDQM or LDQM

•

Internal four banks operation

- 1, 2, 4 or 8 for Interleave Burst •

.

40

Programmable CAS Latency ; 2, 3 Clocks

HY57V641620HG

PIN CONFIGURATION VDD DQ0 VDDQ DQ1 DQ2 VSSQ DQ3 DQ4 VDDQ DQ5 DQ6 VSSQ DQ7 VDD LDQM /WE /CAS /RAS /CS BA0 BA1 A10/AP A0 A1 A2 A3 VDD

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27

54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28

54pin TSOP II 400mil x 875mil 0.8mm pin pitch

VSS DQ15 VSSQ DQ14 DQ13 VDDQ DQ12 DQ11 VSSQ DQ10 DQ9 VDDQ DQ8 VSS NC UDQM CLK CKE NC A11 A9 A8 A7 A6 A5 A4 VSS

PIN DESCRIPTION PIN

PIN NAME

DESCRIPTION

CLK

Clock

The system clock input. All other inputs are registered to the SDRAM on the rising edge of CLK

CKE

Clock Enable

Controls internal clock signal and when deactivated, the SDRAM will be one of the states among power down, suspend or self refresh

CS

Chip Select

Enables or disables all inputs except CLK, CKE and DQM

BA0,BA1

Bank Address

Selects bank to be activated during RAS activity Selects bank to be read/written during CAS activity

A0 ~ A11

Address

Row Address : RA0 ~ RA11, Column Address : CA0 ~ CA7 Auto-precharge flag : A10

RAS, CAS, WE

Row Address Strobe, Column Address Strobe, Write Enable

RAS, CAS and WE define the operation Refer function truth table for details

LDQM, UDQM

Data Input/Output Mask

Controls output buffers in read mode and masks input data in write mode

DQ0 ~ DQ15

Data Input/Output

Multiplexed data input / output pin

VDD/VSS

Power Supply/Ground

Power supply for internal circuits and input buffers

VDDQ/VSSQ

Data Output Power/Ground

Power supply for output buffers

NC

No Connection

No connection

41

HY57V641620HG FUNCTIONAL BLOCK DIAGRAM 1Mbit x 4banks x 16 I/O Synchronous DRAM

Self refresh logic & timer

Internal Row counter

1Mx16 Bank 3

CLK Row active

Column Pre Decoders

UDQM

Y decoders

LDQM

Bank Select

A0 A1

Column Add Counter

Address Registers Address buffers

A11 BA0 BA1

Memory Cell Array

Burst Counter

Mode Registers

CAS Latency

42

Data Out Control

Pipe Line Control

DQ0 I/O Buffer & Logic

Column Active

1Mx16 Bank 0 Sense AMP & I/O Gate

WE

refresh

1Mx16 Bank 1

X decoders

CAS

1Mx16 Bank 2

X decoders

RAS

State Machine

CS

Row Pre Decoders

X decoders X decoders

CKE

DQ1

DQ14 DQ15

CD4051B, CD4052B, CD4053B

8.5 CD4052B

August 1998 - Revised March 2000

Data sheet acquired from Harris Semiconductor SCHS047D

CMOS Analog Multiplexers/Demultiplexers with Logic Level Conversion The CD4051B, CD4052B, and CD4053B analog multiplexers are digitally-controlled analog switches having low ON impedance and very low OFF leakage current. Control of analog signals up to 20VP-P can be achieved by digital signal amplitudes of 4.5V to 20V (if VDD -VSS = 3V, a VDD -VEE of up to 13V can be controlled; for VDD -VEE level differences above 13V, a VDD -VSS of at least 4.5V is required). For example, if VDD = +4.5V, VSS = 0V, and VEE = -13.5V, analog signals from -13.5V to +4.5V can be controlled by digital inputs of 0V to 5V. These multiplexer circuits dissipate extremely low quiescent power over the full VDD -VSS and VDD -VEE supply-voltage ranges, independent of the logic state of the control signals. When a logic “1” is present at the inhibit input terminal, all channels are off.

[ /Title (CD405 1B, CD4052 B, CD4053 B) /Subject (CMOS Analog Multi- The CD4051B is a single 8-Channel multiplexer having three plexbinary control inputs, A, B, and C, and an inhibit input. The ers/Dem three binary signals select 1 of 8 channels to be turned on, ultiplex- and connect one of the 8 inputs to the output. ers with The CD4052B is a differential 4-Channel multiplexer having two binary control inputs, A and B, and an inhibit input. The Logic two binary input signals select 1 of 4 pairs of channels to be Level Conver- turned on and connect the analog inputs to the outputs. The CD4053B is a triple 2-Channel multiplexer having three sion) /Author separate digital control inputs, A, B, and C, and an inhibit input. Each control input selects one of a pair of channels () which are connected in a single-pole, double-throw /Keyconfiguration. words (Harris When these devices are used as demultiplexers, the “CHANNEL IN/OUT” terminals are the outputs and the Semi“COMMON OUT/IN” terminals are the inputs. conductor, CD4000 Ordering Information PART NUMBER

TEMP. RANGE (oC)

PACKAGE

CD4051BF, CD4052BF, CD4053BF

-55 to 125

16 Ld CERAMIC DIP

CD4051BE, CD4052BE, CD4053BE

-55 to 125

16 Ld PDIP

CD4051BM, CD4051BNS

-55 to 125

16 Ld SOIC

CD4051BPW, CD4052BPW, CD4053BPW

-55 to 125

16 Ld TSSOP

43

Features • Wide Range of Digital and Analog Signal Levels - Digital . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3V to 20V - Analog. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ≤20VP-P • Low ON Resistance, 125Ω (Typ) Over 15VP-P Signal Input Range for VDD -VEE = 18V • High OFF Resistance, Channel Leakage of ±100pA (Typ) at VDD -VEE = 18V • Logic-Level Conversion for Digital Addressing Signals of 3V to 20V (VDD -VSS = 3V to 20V) to Switch Analog Signals to 20VP-P (VDD -VEE = 20V) • Matched Switch Characteristics, rON = 5Ω (Typ) for VDD -VEE = 15V • Very Low Quiescent Power Dissipation Under All DigitalControl Input and Supply Conditions, 0.2µW (Typ) at VDD -VSS = VDD -VEE = 10V • Binary Address Decoding on Chip • 5V, 10V and 15V Parametric Ratings • 10% Tested for Quiescent Current at 20V • Maximum Input Current of 1µA at 18V Over Full Package Temperature Range, 100nA at 18V and 25oC • Break-Before-Make Switching Eliminates Channel Overlap

Applications • Analog and Digital Multiplexing and Demultiplexing • A/D and D/A Conversion • Signal Gating

CD4051B, CD4052B, CD4053B Pinouts CD4051B (PDIP, CDIP, SOIC, TSSOP) TOP VIEW 4 1

16 VDD

6 2

15 2

COM OUT/IN 3

14 1

7 4

13 0

CHANNELS IN/OUT

CD4052B (PDIP, CDIP, TSSOP) TOP VIEW 0 1

16 VDD

2 2

15 2

COMMON “Y” OUT/IN 3

14 1

Y CHANNELS IN/OUT

X CHANNELS IN/OUT

CHANNELS IN/OUT CHANNELS IN/OUT

Y CHANNELS IN/OUT

3 4

13 COMMON “X” OUT/IN

5 5

12 3

1 5

12 0

INH 6

11 A

INH 6

11 3

VEE 7

10 B

VEE 7

10 A

VSS 8

9 C

VSS 8

9 B

X CHANNELS IN/OUT

CD4053B (PDIP, CDIP, TSSOP) TOP VIEW

IN/OUT

by 1

16 VDD

bx 2

15 OUT/IN bx OR by

cy 3

14 OUT/IN ax OR ay

OUT/IN CX OR CY 4

13 ay

IN/OUT CX 5

12 ax

INH 6

11 A

VEE 7

10 B

VSS 8

9 C

IN/OUT

Functional Block Diagrams CD4051B CHANNEL IN/OUT

16 VDD

7

6

5

4

3

2

1

0

4

2

5

1

12

15

14

13 TG

TG A

†

11 TG

B

†

10 LOGIC LEVEL CONVERSION

C

†

9

INH

†

6

TG

BINARY TO 1 OF 8 DECODER WITH INHIBIT

3 TG

TG

TG

TG

8 VSS

COMMON OUT/IN

7 VEE

† All inputs are protected by standard CMOS protection network.

44

CD4051B, CD4052B, CD4053B Functional Block Diagrams

(Continued) CD4052B X CHANNELS IN/OUT 3

2

1

0

11

15

14

12

TG 16 VDD

A

†

10

B

†

9

INH

†

6

TG

BINARY TO 1 OF 4 DECODER WITH INHIBIT

LOGIC LEVEL CONVERSION

TG

COMMON X OUT/IN

TG

13

TG TG

3 COMMON Y OUT/IN

TG TG

8 VSS

7

VEE

1

5

2

4

0

1

2

3

Y CHANNELS IN/OUT

CD4053B

LOGIC LEVEL CONVERSION

16 VDD

BINARY TO 1 OF 2 DECODERS WITH INHIBIT

IN/OUT cy

cx

by

bx

ay

ax

3

5

1

2

13

12 TG

COMMON OUT/IN ax OR ay 14

A

†

11

TG

TG

COMMON OUT/IN bx OR by 15

B

C

†

†

10

TG

TG

9

4 TG

INH

†

COMMON OUT/IN cx OR cy

6

VDD

8

VSS

7

VEE

† All inputs are protected by standard CMOS protection network.

45

CD4051B, CD4052B, CD4053B TRUTH TABLES INPUT STATES INHIBIT

C

B

A

“ON” CHANNEL(S)

0

0

0

0

0

0

0

0

1

1

0

0

1

0

2

0

0

1

1

3

0

1

0

0

4

0

1

0

1

5

0

1

1

0

6

0

1

1

1

7

1

X

X

X

None

CD4051B

CD4052B INHIBIT

B

A

0

0

0

0x, 0y

0

0

1

1x, 1y

0

1

0

2x, 2y

0

1

1

3x, 3y

1

X

X

None

CD4053B INHIBIT

A OR B OR C

0

0

ax or bx or cx

0

1

ay or by or cy

1

X

None

X = Don’t Care

46

1 2

ASTB

TC414 100UF/10V

VFD-35

R425 10K

10K R423

SW1

D417

D418

C422 104

FL-

SEG16 SEG15 SEG14 SEG13 SEG12 SEG11 SEG10 SEG9 SEG8 SEG7 SEG6 SEG5 SEG4 SEG3 SEG2 SEG1

GRID1 GRID2 GRID3 GRID4 GRID5 GRID6 GRID7 GRID8

10K

R424

8050

Q401

C419 104

R421 10K

CPU+3.3V

KEY3

KEY2

KEY1

LED

SEG16 1 2 3 4 GND GP0 GP1 GP2

0R(DNS)

R426

12C508A

vdd GP5 GP4 GP3

U405

R432 10K

K403

K402

K401

D401 1N4148

8 7 6 5

27 28 29 30 31 32 33 34 35 36 37 38 39

R429 0R

R422 10K

GND

GRID8 GRID7 GRID6

-25V

SEG4 SEG3 SEG2 SEG1 SEG13 SEG14 SEG15 SEG16 SEG17 SEG18 VDD VEE SEG19 SEG20 G8 G7 G6

STB

VCC

R431 10K

22uF/16V

TC416

R430 10K

C402 104

GRID5 GRID4 GRID3 GRID2 GRID1

FL+

SEG5 SEG6 SEG7 SEG8 SEG9 SEG10 SEG11 SEG12 SEG13 SEG14 SEG15 SEG16 26 25 24 23 22 21 20 19 18 17 16 15 14

1K

LED R420

UPD16312

13 12 11 10 9 8 7 6 5 4 3 2 1

U401

VCC

KEY4 KEY3 KEY2 KEY1 STB CLK IC DI DO SW4 SW3 SW2 SW1

SEG12 SEG11 SEG10 SEG9 SEG8 SEG7 SEG6 SEG5 SEG4 SEG3 SEG2 SEG1 VDD

G5 G4 G3 G2 G1 VDD LED5 LED4 LED3 LED2 LED1 VSS OSV

VFD401

IR

C401 104

R434 0R(DNS)

LED401 LED

33K 33K 33K 33K

1K 1K 1K 1K 1K

SW1

FL+

CPU+3.3V

TC402 100uF/16V

VCC

R406 R407 R408 R409 R410

R411 R416 33K 10K

VCC

R433 470R

R401 R402 R403 R404 VFDST

C407 104

V402 8050

R419 330R

CPU+3.3V

R405 33K

1

47 2

40 41 42 43 44 45 46 47 48 49 50 51 52 GND

1 2 MSW SW2 SW3 SW4

3

R418 33R

R415 100

IR

R412 33K

IR GND VFDST VFDCK VFDAT ASTB

1 2

3

C403 101

VCC

1 2 3 4 5 6

1 2 3 4 5 6 7 8 9 10

R417 10K

XS05

XS402

XS401

U403 HS0038A2

VFDCK VFDAT

TC407 100uF/16V

R414 33K

FL-25V GND VCC SW1 GND STB CPU+3.3V GND

104

C405

C404 101

R413 33K

KEY4 KEY3 KEY2 KEY1 C406 101

9. SCHEMATIC & PCB WIRING DIAGRAM

FRONT SCHEMATIC DIAGRAM

FRONT SCHEMATIC DIAGRAM

48

! !

!

D501 1N4007

!

BCN501 ~220V

F501 T1.6A/250V

!

L501

R501 680K 2W

BC501 ~275V 104

D504 1N4007 TC501 47uF/400V

D503 1N4007 2 C501 1103

D502 1N4007

1M

2 3 6 7

R505

R515 1M

S S S S BP

D

TNY268P

1

U501 5

C506 104

10K

R502

DNS

C505

R516 100ohm

D505

C502 222/1KV

C503 101/1KV(DNS) HER107

R503 67K/2W

4 EN S

49 8

!

BC503 ~400V 102

U502 2501

TC502 47uF/50V

1N4148

!

10

D506

11

7

15

6 9

13

16

12

EI128/8-2

!

4

3

2

TR501

14

D511 HER105

C513 101

TC512 47uF/50V

D512 HER105

C511 101

C509 101 HER303

22K

R512

D509 SR303

D510

D508 HER105

C507 101

C514 101

C516 101

U506 MCR100-6 K

U503 LM431A

R506 330

C518 104

L506 TC509 10uH/2A 1000uF/10V

TC505 1000uF/10V

L507 10uH/2A

TC503 470uF/25V

L505 10uH/1A

G

L502 200uH/0.2A A

A

K

R

R507 1K C515 104

R509 1K

D516

D514 SR160 TC510 1000uF/10V

TC506 1000uF/10V

TC504 470uF/25V

D507 1N4148

1

R508 1.5K

R510 4.7K

IN

5.1V ZD501

C519 104

D515 SR560(DNS)

2

3

1 2 3 4 5 6 7 8 9 10 11 12 13

ZD502 9.1V/1W

-9V

C520 104

CPU+3.3V

FL+ FL-21V

R519 10R/2w

DET OK AGND +9V -9V GND +5V GND +3.3V GND SA+5V

100uF/16V

TC508

SA+5V

STB

TC513 100uF/16V

R511 220R/1W

R514 10K

R518 10K(DNS)

+3.3V

CPU+3.3V

L508 10uH/1A

U504 LM7805

OUT

V502 2N5551

CPU+3.3V

+5V 1

TC511 100uF/16V

1N4148

C510 104

C508 104

+9V

1K

R513

C517 104

TC515 47uF/50V(DNS)

GND 2

D513 HER105

STB 1 DET 2 OK 3 4 AGND +9V 5 -9V 6 GND 7 +5V 8 GND 9 CPU+3.3V 10 FL+ 11 FL12 -21V 13

CN502 XS13

CN501 XS13

POWER BOARD SCHEMATIC DIAGRAM

POWER BOARD SCHEMATIC DIAGRAM

50

51

XS601

XS602

FL+ 1 FL2 3 -21V GND 4 +5V 5 SW 6 GND 7 STB 8 CPU+3.3V 9 GND 10

7 6 5 4 3 2 1

1 2 3 4 5 6 7 8 9 10 11 12 13

STB DET OK AGND +9V -9V GND +5V GND CPU+3.3V FL+ FL-21V

MIC602

L602

R601

TC601

C603

R603

R605

3

2

C605

R609

4 +9V

C624

K601

+9VA

8

R607

TC615

R621

6x6x1

U601A

1

2 3

R612

R623

C601

+9VA

OUT2

MIC2

VR601

SW GND

1

TC603

-9VA

-9V

-9VA

+9VA

TC616

R622

3

2

C607

R613

4 8

TC605

OK

U602A

1

C602

-9VA

C608

TC613

R617

+5V

R616

R615

5

6

U602B

7

R619

VD602

TC611

VD603

VD601

R620

DET

OK SCHEMATIC DIAGRAM

OK SCHEMATIC DIAGRAM

52

PDAT0

PDAT2

R704 4.7K

VCC

XS30

XS701 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30

R712 2.2K

2.2K

R710

330R

+10V R709

AGND VGND

SR +10V CC LFE

SL

R

L

TR

VIEDO PDAT0 TL

Pb

Y1

Pr

C

PDAT2 PDAT1 SPDIF VCC Y

AGND

V703 8050

R711 1K

A+10V

AGND

V702 8050

R708 33R

A+10V

AGND

R713 0R

VGND

C707 105

VGND

C

Y

TL

TR

VIEDO

AGND

C716 104

V701 8050

R705 75R

220uF

TC701 2.2R

R706

VGND

TC706 220uF/16V

TC705 220uF/16V

L714 FCM

L713 FCM

C717 104

AGND

VCC

VJS3921

FBSMT

L712

L711 FBSMT

VGND

VGND

C715 224

68R

R703

A(B)OUT A(B)IN A(A)OUT A-COM RETURN A(A)IN BLUE I/O FUNC SW RETURN CONT GREEN I/O NC RETURN RETURN RED I/O BLK I/O RETURN TRTURN V-OUT V-IN GND

JK706

FBSMT

L710

SPDIF

21

19

17

15

13

11

9

7

5

3

1

C718 104

20

18

16

14

12

10

8

6

4

2

1

2

6

5

C711 104

AGND

JK703B V-OUT5

VCC

VGND

R707

A+10V

7 3

53 4

GND

VCC

JK703A S-VIDEO

3

2

JK705 OPTICAL 1 VIN

Pr

Pb

SPDIF

Y1

C710 104

R

L

SR

SL

FB

L706

FB

L705

FB

L704

FB

L703

FB

L702

FB

L701

TC704 220uF/16V

TC703 220uF/16V

VGND

TC702 1000uF/10V

LFE

CC

R

B

100R

R702

220R

R701

G

C706 102

C705 102

C704 102

C703 102

C702 102

C701 102

FBSMT

L708

FBSMT

L707

FBSMT

L709

AGND

VGND

12

10

9

7

6

4

1

3

11

8

5

2

5

2

RCA-407

6

4

3

1

JK702

RED

RED

BLUE

BLACK

GREEN

WHITE

JK701 AV8

OUTPUT BOARD SCHEMATIC DIAGRAM

OUTPUT BOARD SCHEMATIC DIAGRAM

54

2.2R\1/4W

R341

R322 470R

R338 1.5K

104

C341

750K

R333 330K

27P

R331

150P

TC304 47u 20K

C333

TC308 47uF

R336 1R

TROPEN (TRCLOSE1)

LOAD-

R334 330K

C334

GND FMSO R316

VCC

V307 8050

0R

VCC

R335 750K

V306 8550

C336 104

TRSO V1P4 STBY

R332

C337 104

C335 104

C330 104

C329 104

SL+ SL-

FBSMT FBSMT FBSMT FBSMT FBSMT FBSMT FBSMT FBSMT FBSMT FBSMT FBSMT

R327 L312 L314 L316 L317 L318 L319 L320 L321 L322 L323 L324

R313 1R

FBSMT FB

L310 L311

R312 1R

FBSMT FBSMT 10UH FBSMT FBSMT

L304 L305 L306 L307 L308

0R

FBSMT 10UH

L302 L303

0.5mm 24P 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1

XS301

V309 8550

V308 8050

V1P4 SP-

ADIN OPOP+

OPO

22 23 24 25 26 27 28

15 16 17 18 19 20 21

TC309 47uF

7 6 5 4 3 2 1

14 13 12 11 10 9 8

LOAD+

VCC

(TRCLOSE1)TROPEN

(TROPEN1) TRCLOSE

1 2 3 4 5 6

XS303 XS06

VINFFC VOSL VINSLVINSL+ CF2 CF1 VINFC

V310 10K 9014

R323 470R

R342 1.5K

VOFC+ VOFCVO2+ VOSLPGND PVCC1 VCC

R339

PREGND VINLD CTK2 CTK1 VINTK BIAS STBY

VOTK+ VOTKVOLD+ VOLDPGND VNFTK PVCC2

TC303 47u

LDO1

R315 LDO-AVCC 22R

V302 2SB1132

V301 2SB1132

TC302 47u LDO2

R314 22R LDO-AVCC

TC301 100u

U302 BA5954

F B A RFO IOA D CAP#

V20

E

MD11

C328 104

AVCC

29 30

SP+

SL+ SLLIMIT

20K

FOSO

10K

R319 V1P4 R321

SPSP+

AVCC

VC33

XS302 2.0mm 5P 1 2 3 4 5

C331 150P

B

A

104

TRIN C343

LOADLOAD+ TROUT

CAP#

CAP#

C342 120p

RFO

LDO-AVCC

C332 104

C314

OPO OPOP+

100K

R310

10K

R311

AVCC

V304 2SK3018

DMSO

R317 1R

R320 20K

R318 1R

R328 0R

L301 FBSMT

V303 2SK3018

10K

V305 3904

R309

C344 104

D

C345 104

C318

C317

C316

C315

C313

C312

105(DNS)

C311

IOA

105

105

105

105

C346 104

104

104

104

SW1#

B

A D

65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 AGNDF VCON AVDDF AGNDX AVDDM COSPHI HALLCOS REFCOS AGNDM HALLSIN REFSIN SINPHI SW0 SW2 SW1 MOP MON AGNDX AGNDX CEON CEOP RFGCI RFGCU RFFGC OSP OSN CDD CDC CDB CDA DVDRFIN DVDRFIP DVDD DVDC DVDB DVDA MA MB MT1336C_128

U301

PWMOUT2 URST SDATA SDEN R307 33K F E

100K

C319 0.015u

MD11

GND GND

TRCLOSE IOA ENDM STBY LIMIT TROUT TRIN

SCLK

64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 AVDDP AGNDX AGNDP DPDMUTE RST SDATA SDEN GNDS SCLK XCK16M VDDS IOB IOA IO9 IO8 IO7 IO6 IO5 IO4 IO3 IO2 IO1 IO0 HDGATE UDGATE GND MC MD SA SB AGND IR AVDD SC SD CDFOP CDFON SVDD TPI TNI SGND WGAND AGC1 WAVDD AGC2 AGC3 MD12 MD11 LDO1 LDO2 RFSUBO WGND 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128

55

LDO1 LDO2

R308

VFO13 VDD AGNDX AGNDX AGNDX DPFO DPFN GNDP HTRC TRLP TRLPA CRTPLP CRTP HRFRP LRFRP DEFECT VDDP TEO CSO LVL FEO V20 VREFO V2REFO AVDDT TM4 AGNDT TM3 TM2 TM1 AGNDO RFON RFOP AVDDO AGNDX AGNDX WVDD WOBSO

38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1

TRCLOSE TROPEN ENDM STBY

C324 104

C302 104

C325 104

C326 104

VC33

C321 104

VC33

TC305 C320 47u 104

RFON RFOP

TEO CSO RFL FEO V20 V1P4 V2P8

BDO

CRTP RFRP

C304 390P

27K HTRC

27P

0R

R302

C301 104

R356

0R

0R

R324 R325

C339 104

C338 104

10K 10K 10K 10K

C310

VC33

R303 R304 R305 R306

R326

C327 104

C322 104

2

SW1#

HSYNC#

0R(DNS)

C323 104

TC307 10u

C306 C307 0.033u 470P

R301 100K

TC306 C303 10u 104

C305 390P

RVCC VCC 0R 2

C308 C309 0.015u 10P

R(DNS)

R344

1

1 R343

AV33

MIAN SCHEMATIC DIAGRAM

XI

U205A HCU04

C217 331

XS07

XS201 7 6 5 4 3 2 1

C243

101

C251

101

XS04(DNS)

XS202 1 2 3 4

27MHZ

C222 X201 27pF 27MHz

R238 0R(DNS) R208 100K

1

V1P4

PWMOUT2 V25 DMSO FMSO

C287 104

DV33

4.7R

C208 104

C203 104

8 7 6 5

C216 101

C272 104

C209 104

C204 104

C210 104

C205 104

L218 L203 L202 L201

101 101

4

U205B HCU04

103

C215

20K 18K

AD3 AD2 AD1 AD0 A0 A1

A14 A15 AD7 AD6 AD5 AD4

C225 100P

IR

RVCC VFDAT1 VFDAT VFDCK VFDST GND

AV33

C226 225

10K 33K

R212 4.7R

103

C214

750K

103

C212

8.2K

R206 R207

A8 A9 A10 A11 A12 A13

102

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54

GND

102

C239

C234 104

C230 104

IREF PLLVSS LPIOP LPION LPFON LPFIP LPFIN LPFOP JITFO JITFN PLLVDD3 FOO TRO TROPENPWM PWMOUT1 PWMOUT2 DVDD2 DMO FMO DVSS FG HIGHA0 HIGHA1 HIGHA2 HIGHA3 HIGHA4 HIGHA5 DVSS HIGHA6 HIGHA7 AD7 AD6 AD5 AD4 DVDD3 AD3 AD2 AD1 AD0 IOA0 IOA1 DVDD2 IOA2 IOA3 IOA4 IOA5 IOA6 IOA7 A16 A17 IOA18 IOA19 IOA20 APLLVSS

RFIP

RFIN

TC201 10uF/16V

0R(DNS) 0R

100K

C238

TC204 47uF/16V

C206 RFON 104 RFOP C211DV33 104

GND

0R

R211 10

FB FB FB FB

R217

RFRPC R218 HTRC R219 V2P8

R228 1K

R205

R203 R204

R202

A2 A3 A4 A5 A6 C2149 A7 10pF(DNS) A16 A17 A18 A19 A20 C224 GND 104

R209 10R(DNS)

XO

C244 C2125

DV33 RXD TXD GND

C223 27pF

0R

3

R239 0R(DNS)

R269

2

C2113 104

R201

V25

C213 103

C240 104

SCL SDA

C201 104

C218 C219 C220 C221 331 103(DNS) 153 104 AVCC

JITFO JITFN

LPFOP

LPFIP

LPIOP LPION

R261 4.7R

C253 104

C227 104

AV33 R258

C202 104

C207 104

DC/NC VCC RST_/NCRST/WP WP/RST_ SCL VSS SDA

FOSO TRSO TROPEN

1 2 3 4

R227 1K

PRD# PWR# PCE#

33R 33R 33R

R2107 R2108 R2109 FRD# FWR# FCE#

V1P4

C231 104

VCC

C285 C286 101 101

VFDCK VFDAT VFDST SCL GND

0R

R236 0R(DNS)

XTALI URST XI XO

RFRP RFZC C233 RFRPC 102 RFL FEO CSO TEO R216 18K SDA R283 4.7K

PDAT0 DAVNIN

R240

ADIN IR

14

BDO SCLK SDEN SDATA VCC

R245 4.7k

RXD TXD

R2104

TC202 10uF/16V

L255 0R FBSMT

DV33 104

C232

DACV33C TC219 10uF/16V

MT1379E_216

U201

YUV0/CIN FS VREF DACVDDC ASDATA4 ASDATA3 ASDATA2 ASDATA1 ASDATA0 SPDIF MC_DATA ACLK DVDD3 ALRCK ABCK RD16 RD17 DVSS RD18 RD19 RD20 RD21 DVDD2 RD22 RD23 DQM2 DQM3 DVSS RD24 RD25 RD26 RD27 DVDD3 RD28 RD29 RD30 RD31 DVSS RA3 RA2 RA1 RA0 DVDD2 RA10 BA1 DQM0 DQM1 DVSS RA4 RA5 RA6 DVDD3 RA7 DMVSS

V25

TC215 47uF/16V L256 FBSMT

C2137 104

FBSMT C235 104

L257

DV33

162 161 160 159 158 157 156 155 154 153 152 151 150 149 148 147 146 145 144 143 142 141 140 139 138 137 136 135 134 133 132 131 130 129 128 127 126 125 124 123 122 121 120 119 118 117 116 115 114 113 112 111 110 109

C237 104

R237 1.5K

R251

4.7R

ALRCK ABCK DTS_CE DTS_CL

DV33

AV33

DCKE DCLK

R235 R234

DMA7

DMA4 DMA5 DMA6

DMA10 DBA1 RDQM0 RDQM1

DMA3 DMA2 DMA1 DMA0

RDSID RDSCE OA1 OB1

VDATA3 RDSSYNC

DTS_DO

TUNER_ON AMPMUTE

DTS_DI SMUTE 33R VOICE-DET A_MUTE

ASDAT2 ASDAT1 ASDAT0 ASPDIF AMDAT ACLK

FS VREF DACV33C

C228 225 R213

VGND

C229 104(DNS)

DV33

DQ7 DQ6 DQ5 DQ4

4.7R(DNS) R214

ASTB SPBCLK SPLRCK 33R 33R 33R 33R 33R

DQ3 DQ2 DQ1 DQ0 R229 R230 R231 R232 R233 DWE# DCAS# DRAS# DCS# DBA0

7

SPDATA SPMCK HSYNC# VGND Y7 VSYNC# VFDAT1 1K R278 Y6 DQ15 DQ14 DQ13 DQ12

XTALI

Y5 VGND Y4 DACV33A Y3 VGND Y2 DACV33B Y1 VGND

DQ11 DQ10 DQ9 DQ8

R259

RST#

33R SDCKE 33R SDCLK

0R

C245 104

DBA1 R255

R252 1K

FB

MA11 R254

L204

VD

C247 104

R2157 10K

AVCC

R221 4.7K(DNS)

54 41 28

36 40

15 39

19 18 17 16

38 37

23 24 25 26 29 30 31 32 33 34 22 35 20 21

C248 104

A19 A18 A8 A7 A6 A5 A4 A3 A2

FWR# RSET VP

A16 A15 A14 A13 A12 A11 A10 A9 A20

TC217 10uF/16V

Q204 9014-S

VD201 1N4148

RDQM0 RDQM1

DCS# DRAS# DCAS# DWE#

SDCLK SDCKE

DMA0 DMA1 DMA2 DMA3 DMA4 DMA5 DMA6 DMA7 DMA8 DMA9 DMA10 33R DMA11 DBA0 33R

C246 104

SD33

10K

216 215 214 213 212 211 210 209 208 207 206 205 204 203 202 201 200 199 198 197 196 195 194 193 192 191 190 189 188 187 186 185 184 183 182 181 180 179 178 177 176 175 174 173 172 171 170 169 168 167 166 165 164 163

RFIP RFIN RFDTSLVN RFDTSLVP ADCVDD3 PWM2VREF PWMVREF HRFZC RFRP_AC RFRP_DC RFLEVEL FEI CSO TEI TEZISLV RFSUBI ADIN ADCVSS BDO SLCK SDEN SDATA WOBSI UDGATE DVDD3 IDGATE VFO13 DVSS PRST XTALI XTALO DVDD3 SPBCK SPLRCK DVDD2 SPDATA SPMCLK HSYN DVSS YUV7 VSYN BLAANK# ICE YUV6/R YUV5/B DACVSSA YUV4/G DACVDDA YUV3/CVBS DACVSSB YUV2/Y DACVSSB YUV1/C DACVSSC

APLLVDD3 ALE IOOE# IOWR# IOCS# DVSS UP1_2 UP1_3 UP1_4 UP1_5 UP1_6 DVDD3 UP1_7 UP3_0 UP3_1 INT0# IR DVDD2 UP3_4 UP3_5 UWR# URD# DVSS RD7 RD6 RD5 RD4 DVDD2 RD3 RD2 RD1 RD0 RWE# CAS# RAS# RCS# BA0 DVSS RD15 RD14 RD13 RD12 DVDD3 RD11 RD10 RD9 RD8 DVSS CLK CLE RA11 RA9 RA8 DMVDD3

55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 DCLK DCKE MA11 DMA9 DMA8

4.7K(DNS) 4.7K(DNS) R215 R223

56

R222

U202 AT24C02/X4050

C250 104

A16 BYTE Vss DQ15/A-1 DQ7 DQ14 DQ6 DQ13 DQ5 DQ12 DQ4 Vcc DQ11 DQ3 DQ10 DQ2 DQ9 DQ1 DQ8 DQ0 OE Vss CE A0

6 12 46 52

3 9 43 49

1 14 27

2 4 5 7 8 10 11 13 42 44 45 47 48 50 51 53

5

9

RST#

8

U205C HCU04 U205D HCU04

C2155 102

0R L206

R220

48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25

SD33

SD33

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15

0R

R2162

33R

C241

URST

0.1U

RSET R260 0R

R2163 0R(DNS)

AVCC

VCC

DV33

AD0 FRD# GND FCE# A1

AD1

AD2

AD3

AD4 VD

AD5

AD6

GND A0 AD7

A17

TC206 47uF/16V

TC237 FB(DNS) 47uF/16V R2159 6

8M_FLASH(TSOP) VD

A15 A14 A13 A12 A11 A10 A9 A8 A19 NC WE RESET NC NC RY/BY A18 A17 A7 A6 A5 A4 A3 A2 A1

VSSQ VSSQ VSSQ VSSQ

VCCQ VCCQ VCCQ VCCQ

VCC VCC VCC

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15

SDRAM 64M

U214

C284 104

R2158 1K

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24

VSS VSS VSS

NC NC

DQML DQMH

/CS /RAS /CAS /WE

CLK CKE

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 BA0/A13 BA1/A12

U203

C249 104

MIAN SCHEMATIC DIAGRAM

57

AGND

+9V

AGND

PDAT0

VCC

R244 0R

R243 0R(DNS)

R242 0R

R241 0R(DNS)

XS13

L216 L217

L250

L249

L241 L242

L239 L240

V25

C296

104

104

DV33

FB

A5V L209

Cc LFE

SR

SL

TR

TL

Rt

Lt

VIDEO_COMP

VIDEO_U

VIDEO_Y1

VIDEO_V

VIDEO_C

HSYNC# VSYNC# IEC958 R256 VCC VIDEO_Y

AVCC

AV33

AGND VGND

150R

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30

2Q01 8050

L205 FB

XS30

XS204

VCC

TUNER_ON

+9V

104 TC208 TC207 220uF/16V 220uF/16V

C297

RVCC VCC

C295

+9V

U209 LM1117MP-2.5(DNS)

-9V

U208 BA033FP(DNS)

A5V FB ASTB C294 FB MUTEA 104

FB

FB

FBSMT VOICE-DET FBSMT OKA GND FB FB

IN GND OUT

1 2 3

GND OUT IN

1 2 3

XS203 1 2 3 4 5 6 7 8 9 10 11 12 13

VCC

R286 1K

R289 2.2K

C2153 104

V25

C2154 104

Q2 02 8550

TC211 220uF/16V

TC212 220uF/16V

AV33

Q2 03 8050

15K

R290

0R

R257

TC239 220uF/16V

10u/1A

L208

IEC958

C252 104

10

+9VR

HCU04

U205E 11

12

Y6

Y5

Y4

Y1

Y2

Y3

HCU04

U205F

R224 0R(DNS)

13

ASPDIF

VGND

R280 160R

VGND

160R

R276

VGND

R273 160R

VGND

R270 160R

VGND

R274 160R

VGND

R262 160R

L248 0R

L247 0R

0R

L246

L245 0R

L244 0R

L243 0R

C265 47P VGND

C268 47P VGND

C269 47P

C271 47P VGND

L215 1.8uH

C270 20pF(DNS)

C266 47P

L214 1.8uH

C267 20pF(DNS)

C263 47P

L213 1.8uH

C262 47P

VGND C264 20pF(DNS)

C260 47P

VGND

C259 47P

20pF(DNS)

L212 1.8uH

C261

C257 47P

L211 1.8uH

C256 47P VGND

C258 20pF(DNS)

C254 47P

L210 1.8uH

A5V C255 20pF(DNS)

Q2 15 3906-S

Q2 17 3906-S

Q2 14 3906-S

R281 150R

A5V

2Q20 3906-S

R277 150R

A5V

2Q13 3906-S

R272 150R

A5V

2Q16 3906-S

R271 150R

A5V

R275 150R

A5V

150R

R263

VIDEO_V

VIDEO_U

VIDEO_Y1

VIDEO_COMP

VGND

C2152 104

A5V

VIDEO_C

VIDEO_Y

C2151 104

C2150 104

TC203 10uF/16V

MIAN SCHEMATIC DIAGRAM

OKA

C298 102(DNS)

150R(DNS)

R247

AMDAT

SACLK SBCLK SLRCK

C299 105(DNS)

C2156 105(DNS)

AVCC

R2113 100K

R2112 100K

R2111 100K

R2116 100K

R2115 100K

1 2 3 4 5 6 7

AGND

PCM1801(DNS)

VL VR DGND VDD SCKI BCK LRCK

U210

C283 104

C280 104

AGND

VREF1 VREF2 AGND VCC FMT BYPAS DOUT

TC210 C2157 104(DNS) 10uF/16V(DNS)

Cc

LFE

SL

AGND

SR

Lt

Rt

C282 104

R2114 100K

C281 104

AGND

-9V

AGND

C279 104

CH-R

CH-C

CH-SW

CH-SL

R246 0R(DNS)

ACLK ABCK ALRCK ASDAT0 ASDAT1 ASDAT2

10uF/16V

TC224

10uF/16V

TC223

10uF/16V

TC222

10uF/16V

TC221

10uF/16V

TC241

10uF/16V

TC240

MUTE-1

CH-SR

CH-L

C288 104(DNS) TC218 1uF/16V(DNS) TC220 1uF/16V(DNS) AGND

R249 0R(DNS)

R2128 1K

Q210 2SC1815-YS

14 13 12 11 10 9 8

1K

1K R2126

1K R2125

R2124

1K

R2123

1K

R2127 1K

Q209 2SC1815-YS

Q208 2SC1815-YS

Q207 2SC1815-YS

1K R2122

R2121

1K Q206 2SC1815-YS R2120 1K

R2119

1K

1K Q205 2SC1815-YS R2118

R2117

R248 0R(DNS)

R291 R292 R293 R294 R295 R296

7

33R 33R 33R 33R 33R 33R

1

7

-9V

+9V

C2117

R2137

-9V

+9V

101

U220A 4580

3

2

4580 U221B

5

6

4.7K

4.7K

4.7K

4.7K

4.7K

4.7K

4.7K

AGND

C2127 102

R2151

R2150

AGND

C2124 102

R2147

AGND

C2121 102

R2143

R2142

AGND

C2118 102

R2139

R2138

AGND

4.7K

R2149 20K C2126 101

3 U221A 4580

2

C2123 101

4.7K

4.7K C2115 102

R2135

R2134

AGND

R2146

101

R2145 20K

5 U220B 4580

6

C2120

4.7K

4.7K C2112 102

R2131

R2130

20K

U219B 4580

5

6

101

20K

U219A 4580

R2141 20K

SACLK SBCLK SLRCK SDATA0 SDATA1 SDATA2

-9V

+9V

-9V

+9V

-9V

+9V

1

7

C2114

-9V

3

2

101

20K C2111

+9V

R2133

1

R2129

8

4 8

4 8

4

C278 104

R2198 0R(DNS)

8 4 8 4 8

58 4

C2136 122

R2155 6.8K

C2135 122

R2154 6.8K

C2133 122

0R

C2128

C2134 683(DNS)

R2153 6.8K

C2130 122

R2152 6.8K

C2129 122

OKA

SW

C2119 0R

/C

MUTE3

MUTE2

VD209 1N4148

VD208 1N4148

VD207 1N4148

A_MUTE

MUTE1

C293 104

0R(DNS)

R225

SL#

C2132 683(DNS)

683(DNS)

C2138

C2131 0R

L

R

C2116 102

AGND

R2148 6.8K

20K(DNS)

R2156

C2122 122

R2136 6.8K

20K(DNS)

R2132

AVCC 0R

R226

R2106 1K

R2105 1K

1K

R2110

SR#

6.8K

R299

R298 6.8K

RST# SCL SDA

SDATA0 SDATA1 SDATA2 SBCLK SLRCK SACLK

R282 0R

VCC

LL

MUTEA

R253 -9V 330R

Q211 1015

TC238 R266 2.2uF/16V(DNS) 1K

TC230 10uF/16V

TC229 10uF/16V

TC228 10uF/16V

CS4360

VLS SDIN1 SDIN2 SDIN3 SCLK LRCK MCLK VD GND RST SCL SDA CS VLC

U207

R267 +9V 1K

10uF/16V

TC227 10uF/16V

TC226

1 2 3 4 5 6 7 8 9 10 11 12 13 14

10uF/16V

C292 104

DV33

TC225

TC231 10uF/16V

RR

+9V

R265 10K

AL

AR

AGND

TC234 47uF/16V

AGND

0R

R250 10K

TC232 10uF/16V

TC233 10uF/16V

Q219 1015

MUTE-1

VOICE-DET

C289 104

C290 104

C# LFE# MUTE3

MUTE1 FL FR MUTE2 LS RS

VD205 1N4148

AGND

Q218 1015

R297

28 27 26 25 24 23 22 21 20 19 18 17 16 15

Q212 2SC1815-Y

MUTEC1 AOUTA1 AOUTB1 MUTEC2 AOUTA2 AOUTB2 VA GND AOUTA3 AOUTB3 MUTEC3 VQ FILT+ M2

R264 150R

AGND

TC236 10uF/16V

AVCC C291 104

TC235 220uF/16V

VD206 1N4148 +9V

MIAN SCHEMATIC DIAGRAM

A5V

RDSCE

RDSID

SCL

SDA

DAVNIN

RDSSYNC

C2147 CAP

TC247 10U

0805

TC248 10U

TC249 10U

C2100 104

R2172

R2179

R2178

R2177

C2102 104

AGND VCC_DTS

C2101 104

R2175 10K

R2174 10K

C2107 2.2n

220

220

220

R268 470K

220

220

220

220

220

R2171

R2170

R2169

R2168

R2176

AGND +9V

-9V

R2197 R2196 R2195 R2194 10K 10K 10K 10K

L254

AGND

220

4.7K

4.7K

C2148 CAP

R2190

R2189

AGND

C2146 CAP

4.7K

4.7K

20K(DNS)

R2187

C2145 CAP

R2183

R2182

R2164 R2165 R2166 R2167 10K 10K 10K 10K

VCC_DTS

AGND

VCC_DTS

DTS_CE

DTS_DI

DTS_CL

DTS_DO

RR

LL

C2103 102

5

6

3

2

20K

C2140 100n

9

8

2

C2144 47P

5

1

19

C2139 150P

18

20

13

11

10

C2106 470n

C2105 470n

C242 223

TUNER-L

TUNER-R

1

4580

U215B 7

+9V

4580

U215A

-9V

SAA6588

OSCI

MRO

CIN

SCOUT

LVIN

AFIN

PSWN

SCL

SDA

DAVN

MPTH

U229

TUNER-R

TUNER-L

R2188

RDS_MPX

C2159 101

C2158 101

20K

R2181

4

8

R2180 20K(DNS)

4.332MHZ

2X02

OSCO

VSSA

VSSD

MAD

TCON

VREF

VDDD

VDDA

MPX IN

4

15

6

12

3

17

7

14

TC243 2.2U

Q224

C2141 82P

C2109 C2110 TC244 0.1U 0.1U 47U

C2108 330P

330

C2143 102 R2192

AGND

C2142 102

RDS_MPX

2SC1815-Y

HEADER 11

1 2 3 4 5 6 7 8 9 10 11

S X205

R284 1K

470R

R2191

R2161 1K

16

L207 0805

0

TC242 220uF/16V

R279

Q223

330R

470R 2SC1815-Y

R2185

R2184

R2160 1K

10UF/16V

TC209

MUTE-1

10UF/16V

TC205

K A

TC245 220U/16V

5V

VD216

100

R285

+9VR

R2193 100K

R2186 100K

TR

TL

FR

FL

OKA

AGND

R366 100K

AGND

R364 100K

R375 100K AGND

AGND

R373 100K

C358 102

AGND

TUNER-R

TUNER-L

R363

R365

R372

R374

12K

R378

12K 10uF/16V

TC316

AGND

12K 10uF/16V

TC314

12K

R370

12K 10uF/16V

TC312

AGND

12K 10uF/16V

TC310

-9V

R367

6

5

3

2

C352

12k -9V

R371

33P

33P

12k

0R(DNS)

R377

C353

R376

4558

U306B

+9V

7

1

U306A

4558

0R(DNS)

0R(DNS) R369

R368

7

1

U305A 4558

12k

33P

4558

U305B

+9V

C351

6

5

3

2

12k

R362

33P

0R(DNS)

R361 C350

4 8 4

59 8

OKA

10uF/16V

TC317

10uF/16V

TC315

TC313 10uF/16V

TC311 10uF/16V

OA

OB

0A1

AGND

104

C354

R350 1K

10

9

1 5 2 4 6

12 14 15 11

AGND

-9V

A

B

Y0 Y1 Y2 Y3 INH

X0 X1 X2 X3

AR

AL

L325

FB

OB1

Q302 8050

10K

-9V

OB

+9V

R353

+9V

FB TC321 10UF/16V

L326

TC320 10UF/16V

10K

R352 1K

C357 104

C356 104

TC319 10uF/16V

R351 OA

7

8

16

3

13

AGND

Q301 8050

+9V

VEE

VSS

VDD

Y

X

104

C355

U304 CD4052

TC318 10uF/16V

+9V

MIAN SCHEMATIC DIAGRAM

MIAN SCHEMATIC DIAGRAM

60

MIAN SCHEMATIC DIAGRAM

61

10. SPARE PARTS LIST bbk9903S MATERIAL LIST 1、DECODING BOARD NO MATERIAL

SPECIFICATIONS/PART NUMBER

QUANTITY

1

SMD RESISTOR

1/16W 0Ω ±5%

29

2 3 4 5

CARBON FILM RESISTOR SMD RESISTOR SMD RESISTOR SMD RESISTOR

1/4W2.2Ω±5% 1/16W1Ω±5% 1/16W 4.7Ω ±5% 1/16W 15Ω ±5%

1 5 4 2

6

SMD RESISTOR

1/16W 33Ω ±5%

19

7

SMD RESISTOR

1/16W 470Ω ±5%

2

8

SMD RESISTOR

1/16W 150Ω ±5%

15

9 10

SMD RESISTOR SMD RESISTOR

1/16W 220Ω ±5% 1/16W 330Ω ±5%

4 1

LOCATION C2119,C2128,C2131,L243~L248,R205,R 219,R220,R226,R240,R241,R243,R257,R 259,R269,R282,R332,R327,R2162,R344, L301,R246,R249,R2185,R2192 R341 R312,R313,R317,R318,R336 R212,R213,R258,R261 R314,R315 R2107~R2109,R2159,R229~R235,R254, R255,R291~R296 R322,R323 R256,R262~R264,R270~R277,R280,R28 1,R247 R2168~R2171 R253

11

SMD RESISTOR

1/16W 1K ±5%

31

R227,R228,R252,R266,R267,R2104,R21 05, R2106,R2110,R2117~R2128,R2158,R21 60, R2161,R290,R286,R2184,R2191,R350,R 352,L217

12

SMD RESISTOR

1/16W 1.5K ±5%

2

R338,R342 R2130,R2131,R2134,R2135,R2138, R2139,R2142,R2143,R2146,R2147,R215 0, R2151,R2182,R2183,R2189,R2190,R222 ,R223,R289

13

SMD RESISTOR

1/16W 4.7K ±5%

19

14

SMD RESISTOR

1/16W 6.8K ±5%

8

15

SMD RESISTOR

1/16W 8.2K ±5%

1

16

SMD RESISTOR

1/16W 10K ±5%

19

17 18 19 20

SMD RESISTOR SMD RESISTOR SMD RESISTOR SMD RESISTOR

1/16W 12K ±5% 1/16W 15K ±5% 1/16W 20K ±5% 1/16W 18K ±5%

4 6 4 2

21

SMD RESISTOR

1/16W24K±5%

8

22 23 24

SMD RESISTOR PRECISION SMD RESISTOR PRECISION SMD RESISTOR

1/16W 2K ±5% 1/16W 330K ±1% 1/16W 750K ±1%

1 2 3

25

SMD RESISTOR

1/16W 100K ±5%

16

R2136,R2148,R2152~R2155，R298， R299 R201 R206,R250,R265,R303~R306,R309,R311, R319,R339,R2157,R2164~R2167,R351,R3 53,R211

R371,R372,R374,R376 R207,R363,R365，R362,R367，R307 R203,R316,R320,R321 R204,R216 R2129,R2133,R2137,R2141,R2145,R214 9,R2181,R2188 R237 R333,R334 R202,R331,R335 R208,R2111~R2116,R217,R308,R310, R373,R375,R2186,R2193,R364,R366

26

CD

CD11 16V10U±20%5×11 2

41

TC201,TC202,TC203,TC217,TC219, TC221~TC233,TC236,TC240,TC241,T C306, TC307,TC247,TC248,TC249,TC318,TC 319, TC205,TC209,TC310,TC312,TC314,TC 316, TC311,TC313,TC315,TC317,TC320,TC 321, TC210

27

CD

CD11 16V220U±20%6×12 2.5

9

TC207,TC208,TC211,TC212,TC235,TC 301, TC242,TC245,TC239

28

CD

CD11 16V47U±20%5×11 2

11

29

CD

CD11 16V1U±20%5×11 2

2

62

TC204,TC206,TC215,TC234,TC237, TC302~TC305,TC308,TC309 TC218,TC220

30 31

SMD CAPACITOR SMD CAPACITOR

50V 27P ±5% NPO 0603 50V 33P ±5% NPO 0603

3 4

32

SMD CAPACITOR

50V 47P ±5% NPO 0603

15

33

SMD CAPACITOR

50V 101 ±5% NPO 0603

13

34 35 36

SMD CAPACITOR SMD CAPACITOR SMD CAPACITOR

50V 331 ±5% NPO 0603 50V 151 ±5% NPO 0603 50V 391 ±10% 0603

2 2 1

37

SMD CAPACITOR

50V 104 +80%-20% 0603

C222,C223,C333 C350~C353 C254,C256,C257,C259,C260,C262,C263, C265,C266,C268,C269,C271,C243,C244, C2125 C216,C225,C285,C286,C342,C2111,C21 14,C2117,C2120,C2123,C2126,C2158,C 2159 C217,C218 C331,C334 C304

91

C201~C211,C221,C224,C227,C230~C23 2,C234,C235,C237,C240,C241,C245~C2 50,C252,C253,C272,C278~C283,C284,C 287,C289~C297,C301~C303,C312~C313 ,C320~C330,C332,C335~C339,C341,C3 43~C346,C2113,C2137,C2150~C2154,C 2100~C2102,C354,C355,C356,C357,C21 57,C288 C201~C211,C221,C224,C227,C230~C23 2,C234,C235,C237,C240,C241,C245~C2 50,C252,C253,C272,C278~C283,C284,C 287,C289~C297,C301~C303,C312~C313 ,C320~C330,C332,C335~C339,C341,C3 43~C346,C2113,C2137,C2150~C2154,C 2100~C2102,C354,C355,C356,C357,C21 57,C288

37.1 SMD CAPACITOR

25V 104 +80%-20% 0603

91

38 39

SMD CAPACITOR SMD CAPACITOR

16V 105 +80%-20% 0603 10V 225 +80%-20% 0805

6 2

40

SMD CAPACITOR

50V 102 ±10% 0603

15

41

SMD CAPACITOR

50V 122 ±10% 0603

8

42 43 44 45 46 47 48 49

SMD CAPACITOR SMD CAPACITOR SMD CAPACITOR SMD CAPACITOR SMD CAPACITOR SMD INDUCTOR CHOKE COIL SMD INDUCTOR MAGNETIC BEADS INDUCTOR

50V 103 ±10% 0603 50V 153 ±10% 0603 16V 333 ±10% 0603 50V 471 ±5% NPO 0603 50V 82P ±5% NPO 0603 10UH ±10% 2012 立式 10UH 1A 5mm 1.8UH ±10% 1608

4 3 2 1 1 3 1 6

C315~C318,C2156,C299 C226,C228 C233,C238,C239,C2103,C2112,C2115,C 2116,C2118,C2121,C2124,C2127,C2146, C2148,C2155,C298 C2122,C2129,C2130,C2133,C2135,C213 6, C2145,C2147 C212~C215 C220,C308,C319 C306,C242 C311 C305 L254,L303,L306 L208 L210~L215

RH354708

7

L204,L205,L209,L241,L242,L249,L250

SMD MAGNETIC BEADS

FCM1608K-221T05

28

SMD MAGNETIC BEADS SMD DIODE 53.1 SMD DIODE 53.2 SMD DIODE 54 SMD TRIODE 55 TRIODE 56 TRIODE 57 TRIODE 58 TRIODE 59 SMD TRIODE 60 TRIODE 61 SMD TRIODE 62 SMD TRIODE 63 SMD TRIODE 64 SMD TRIODE

FCM2012V-221T07 1N4148 LS4148 LL4148 8050D C8050 8550C 9014C C1815Y C1815 2SA1015 3906 3904 9014C 2SK3018

1 6 6 6 2 4 3 1 1 8 3 6 1 1 2

50 51 52 53

63

L201~L203,L239,L240,L302,L304,L305, L307,L308,L310,L311,L312,L314,L316~ L324, L255~L257,L325,L326 L207 VD201,VD205~VD209 VD201,VD205~VD209 VD201,VD205~VD209 Q301,Q302 V307,V308,Q201,Q203 V306,V309,Q202 Q204 Q212 Q205~Q210,Q223,Q224 Q211,Q218,Q219 Q213~Q217,Q220 V305 V310 V303,V304

65 66

70 71 72 73 74 75 76

SMD TRIODE IC IC IC IC IC IC IC IC IC IC IC IC IC IC CRYSTAL OSCILLATOR

78

CABLE SOCKET

79

CABLE SOCKET

80 81 82 83 84

SOCKET SOCKET SOCKET CABLE SOCKET PCB

66.1 66.2 67 67.1 68 69 69.1

2. POWER BOARD NO MATERIAL CARBON FILM RESISTOR 1 CARBON FILM RESISTOR 2 CARBON FILM RESISTOR 3 METAL FILM RESISTOR 4 METAL FILM RESISTOR 5 CARBON FILM RESISTOR 6 CARBON FILM RESISTOR 7 CARBON FILM RESISTOR 8 METAL OXIDE FILM 9 RESISTOR METAL OXIDE FILM 10 RESISTOR HIGH VOLTAGE RESISTOR 11 CARBON FILM RESISTOR 12 PORCELAIN CAPACITOR 13 PORCELAIN CAPACITOR 14 CERAMIC CAPACITOR 15 16

PORCELAIN CAPACITOR

17

PORCELAIN CAPACITOR 17.1 PORCELAIN CAPACITOR CERAMIC CAPACITOR 18.1 CERAMIC CAPACITOR TERYLENE CAPACITOR 19.1 TERYLENE CAPACITOR CD 20.1 CD 20.2 CD 20.3 CD 20.4 CD CD 21.1 CD CD

18 19 20

21 22

2SB1132 NJM4558M SOP 4580 SOP 4558 SOP MM74HCU04M SOP HCU04 SOP HY57V641620HGT-7 TSOP TL 74HC4052D SOP 36C7T 3MCD4052BM SOP CS4360 SSOP 24C02N SOP MT1336E-C QFP MT1379EE-C QFP BA5954FP HSOP PCM1801U SOP 27.00MHz 49-S 15P 1.0mm STRAIGHT CONTACT DUAL FLAT PLUG 6/5P 1.25mm CURVING HORIZONTAL DUAL FLAT PLUG 5P 2.0mm 6P 2.0mm 13P 2.5mm 24 0.5mm SMD WITH CLASP 2934S-1

2 6 6 6 1 1 1 1 1 1 1 1 1 1 1 1

V301,V302 U219,U220,U221，U215，U305，U306 U219,U220,U221，U215，U305，U306 U219,U220,U221，U215，U305，U306 U205 U205 U203 U304 U304 U207 U202 U301 U201 U302 U210 X201

1

XS204

1

XS205

2 1 1 1 1

XS201,XS302 XS303 XS203 XS301

SPECIFICATIONS/PART NUMBER 1/4W100Ω±5% SHAPED 10 1/4W150Ω±5% SHAPED 10 1/4W1K±5% SHAPED 10 1/4W12K±1% SHAPED 10 1/4W4.7K±1% 1/4W10K±5% SHAPED 10 1/4W4.7K±5% SHAPED 10 1/4W22K±5% SHAPED 10

QUANTITY 1 1 2 1 1 2 1 1

LOCATION R516 R506 R507,R513 R509 R508 R502,R514 R510 R512

1W 220Ω±5％ SHAPED R 15×8

1

R511

2W68K±5% SHAPED FLAT 15×7

1

R503

1/2W680K±5% 1/4W1MΩ±5% 50V 100P ±10% 5mm 1000V 222±20% NPO7.5mm 1000V 103±20% NPO10mm

1 2 5 1 1

50V 104 ±20% 5mm

8

1000V 101 +80%-20% 7.5mm 1000V 101 ±10% 7.5mm CT81 400V 221±20% 10mm CT81 400V221±10% 10mm 275V 104 ±20% 15mm 275V 104 ±10% 15mm GZ16V100U±20%6×12 2.5 CD11 16V100U±20%6×12 2.5 CD110 16V100U±20%6×12 2.5 CD11C 16V100U+20%-15%6×7 2.5 CD11C 16V100U±20%6×7 2.5 CD11 25V470U+20%-10%10×16 5 CD11 25V470U±20%10×16 5 CD11 50V47U±20%6×12 2.5

1 1 1 1 1 1 3 3 3 3 3 2 2 3

R501 R505,R515 C507,C509,C511,C513,C514 C502 C501 C506,C508,C510,C517,C515,C518,C519, C520 C516 C516 BC503 BC503 BC501 BC501 TC508,TC511,TC513 TC508,TC511,TC513 TC508,TC511,TC513 TC508,TC511,TC513 TC508,TC511,TC513 TC503,TC504 TC503,TC504 TC502,TC512,TC515

64

23

24 25 26 27 28 29 31 32 33 34 35 36 37 38

39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56

CD 23.1 CD 23.2 CD 23.3 CD CD 24.1 CD CHOKE COIL CHOKE COIL SWITCHING POWER TRANSFORMER DIODE DIODE DIODE VOLTAGE REGULATOR DIODE VOLTAGE REGULATOR DIODE DIODE DIODE TRIODE IC IC 38.1 IC 38.2 IC 38.3 IC POWER GRID FILTER PHOTOELECTRIC COUPLER

CONTROLLABLE SILICON 41.1 CONTROLLABLE SILICON METAL OXIDE FILM RESISTOR SOCKET SOCKET CONNECTION CORDS CONNECTION CORDS CONNECTION CORDS HEAT RADIATOR BOARD TAPPING SCREW CONNECTION CORDS FUSE FUSE HOLDER GROUND CHIP OF POWER BOARD IC PCB SOCKET

3. MAIN FRONT PANEL NO MATERIAL

CD11 10V1000U±20%8×16 3.5 CD11 10V1000U±20%8×14 3.5 GS 10V1000U±20%8×16 3.5 GS 10V1000U±20%8×14 3.5 LP3 400V47U±20%22×28 10 LS 400V47U±20%22×25 10 VERTICAL 10UH 1A 5mm VERTICAL 10UH 2A 5mm

4 4 4 4 1 1 2 2

TC505,TC506,TC509,TC510 TC505,TC506,TC509,TC510 TC505,TC506,TC509,TC510 TC505,TC506,TC509,TC510 TC501 TC501 L502,L505 L506,L507

BCK-28-0287

1

T501

HER105 HER306 HER107

4 2 1

D508,D511,D512,D513 D509,D510 D505

5.1V 1/2W

1

ZD501

9.1V 1W

1

ZD502

1N4148 1N4007 2N5551 TNY268P DIP KA431AZ TO-92 431L TO-92 TL431C TO-226AA(LP) HA17431VP TO-92 UT-20 40mH ±20% 10×13 HS817 MCR100-6 NCR169D TO-92

2 4 1 1 1 1 1 1 1 1 1 1

D506,D507 D501~D504 V502 U501 U503 U503 U503 U503 L501 U502 U506 U506

2W10Ω±5% SHAPED FLAT 15×7

1

R519

13P 2.5mm 2P 8.0mm 2# Φ0.6 SHAPED 5mm Φ0.6 SHAPED 10mm Φ0.6 SHAPED 7.5mm 11×15×25 WHITE AB905 BT 3×8 BLACK Φ0.6 SHAPED 12.5mm T1.6AL 250V BLX-2

1 1 3 4 2 1 1 2 1 1

CN502 BCN501 JP504,JP506,JP507 JP501~JP502,JP505,D516 JP508,JP503 FIXED HEAT RADIATION BOARD U504 FOR HEAT RADIATION D515,D514 F501 FOR F501

AB903

1

G503

LM7805 GOLE SEALED TO-220 5967S-0 13P 2.0mm

1 1 1

U504

1

SOFT SPONGE SPACER

15×7×13.5 DOUBLE-FACED, HARD

2

2

SOFT SPONGE SPACER

8×8×14.5 DOUBLE-FACED, HARD

1

VFD16-0801 HNV-08SS56 1N4148 PT6311 QFP

1 1 1 1

LOCATION CONNECT VFD WITH FRONT PANEL PCB CONNECT IR SENSOR WITH FRONT PANEL PCB VFD401 VFD401 D401 U401

KFC-A06-2WB L3.8

3

K401～K403

5P100 2.0 2 SOCKET WITL L NEEDLE REVERSE

1

XS402

3 4 5 6 7

VFD 3.1 VFD DIODE IC LIGHT TOUCH RESTORE SWITCH FLAT CABLE

SPECIFICATIONS/PART NUMBER

65

QUANTITY

CN501

8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26

RECEIVER CARBON FILM RESISTOR CARBON FILM RESISTOR CARBON FILM RESISTOR SMD RESISTOR SMD RESISTOR CARBON FILM RESISTOR SMD RESISTOR SMD RESISTOR SMD RESISTOR RADIATION DIODE CD CD SMD CAPACITOR PORCELAIN CAPACITOR SMD RESISTOR CD SMD CAPACITOR PCB

27

FLAT CABLE

4. OK BOARD NO MATERIAL 1 CARBON FILM RESISTOR 2 CARBON FILM RESISTOR 3 CARBON FILM RESISTOR 4 CARBON FILM RESISTOR 5 CARBON FILM RESISTOR 6 CARBON FILM RESISTOR 7 CARBON FILM RESISTOR 8 CARBON FILM RESISTOR 9 CARBON FILM RESISTOR 10 CARBON FILM RESISTOR 11 CARBON FILM RESISTOR 12 CD 13 CD 14 CD 14.1 CD 15 PORCELAIN CAPACITOR 15.1 PORCELAIN CAPACITOR 15.2 PORCELAIN CAPACITOR 16 PORCELAIN CAPACITOR 17 PORCELAIN CAPACITOR 18 PORCELAIN CAPACITOR MAGNETIC BEADS 19 INDUCTOR 20 DIODE 21 IC 22 SOCKET 23 MICROPHONE SOCKET ROTATED POTENTIOMETER 24 25 CONNECTION BOARDS 26 CONNECTION BOARDS 27 MIC METAL PLANK LIGHT TOUCH RESTORE 28 SWITCH 29

WIRE

30

PCB

HS0038B3V 1/6W2.2Ω±5% SHAPED 7.5 1/6W100Ω±5% SHAPED 7.5 1/6W10K±5% SHAPED 7.5 1/16W 4.7K ±5% 1/16W 10K ±5% 1/6W33K±5% SHAPED 7.5 1/16W 33K ±5% 1/16W 51K ±5% 1/16W 470Ω ±5% Φ3 RED CD11C 50V47U±20% 8×9 3.5 CD11 16V22U±20%5×11 2 50V 104 +80%-20% 0603 50V 104 +80%-20% 2.5mm 1/16W 0Ω ±5% CD11C 16V100U±20%6×7 2.5 50V 101 ±5% 0805 4967A-1 10P250 2.0 2 SOCKET WITH L NEEDLE, THE SAME DIRECTION

SPECIFICATIONS/PART NUMBER 1/6W10Ω±5% SHAPED 7.5 1/6W1K±5% SHAPED 7.5 1/6W10K±5% SHAPED 7.5 1/6W4.7K±5% SHAPED 7.5 1/6W330Ω±5% SHAPED 7.5 1/6W100K±5% SHAPED 7.5 1/6W5.1K±5% SHAPED 7.5 1/6W22K±5% SHAPED 7.5 1/6W100Ω±5% SHAPED 7.5 1/16W 10K ±5% 1/6W560Ω±5% SHAPED 7.5 CD11 16V4.7U±20%5×11 2 CD11 16V22U±20%5×11 2 CD11 10V47U±20%5×7 2 CD11C 16V47U±20%5×7 2 50V 47P ±5% NPO 5mm 50V 47P ±5% 5mm 50V 47P ±10% 5mm 50V 102 +80%-20% 2.5mm 50V 103 ±10% 5mm 50V 104 +80%-20% 2.5mm

1 1 1 4 1 3 5 3 1 1 1 1 1 2 1 1 2 3 1

U403 R418 R415 R406,R409,R410,R417 R435 R407,R408,R416 R402~R404,R411~R412 R401,R413~R414 R405 R433 LED401 TC414 TC416 C401,C422 C405 R430 TC407,TC402 C403,C404,C406

1

XS401

QUANTITY 2 1 3 1 1 2 1 1 1 1 1 3 1 3 3 1 1 1 1 1 3

LOCATION R621,R622 R607 R605,R609,R623 R612 R616 R615,R617 R613 R601 R619 R620 R603 TC601,TC603,TC613 TC605 TC611,TC615,TC616 TC611,TC615,TC616 C605 C605 C605 C608 C603 C601,C602,C624

RH354708

1

L602

1N4148 NJM4558D DIP 10芯 2.0mm ST-403-070-100 WH09NTX-1C-A10K-F30 WITH NUT Φ0.6 SHAPED 7.5mm Φ0.6 SHAPED 5mm DV967GREY

3 2 1 1 1 2 3 1

VD601~VD603 U601,U602 XS602 MIC602 VR601 JP601,JP603 JP602,JP604,JP605

HORIZONTAL 6×6×1

1

K601

1

GND1

20# 70mm BLACK WITH WELDING PIECE 6967S-0

66

1

31

SOFT FLAT CABLE

5. OUTPUT BOARD NO MATERIAL 1 SMD RESISTOR 2 CARBON FILM RESISTOR 3 SMD RESISTOR 4 CARBON FILM RESISTOR 5 SMD CAPACITOR 6 SMD CAPACITOR 6.1 SMD CAPACITOR 8 SMD CAPACITOR 8.1 SMD CAPACITOR 8.2 SMD CAPACITOR 9 CD 10 CD 10.1 CD 10.2 CD 10.3 CD MAGNETIC BEADS 11 INDUCTOR ELECTRO-OPTIC 12 TRANSFORMER ELECTRO-OPTIC 12.1 TRANSFORMER 13 TERMINAL SOCKET 14 TERMINAL SOCKET 15 TERMINAL SOCKET

13P50 2.0 2 SOCKET WITH L NEEDLE REVERSE

1

SPECIFICATIONS/PART NUMBER 1/16W 100Ω ±5% 1/4W68Ω±5% 1/16W 2.2Ω ±5% 1/4W220Ω±5% 50V 102 ±10% 0603 25V 104 +80%-20% 0805 50V 104 +80%-20% 0805 50V 224 +80-20% 0805 25V 224 +80%-20% 0805 16V 224 +80%-20% 0805 CD11 16V220U±20%6×12 2.5 GS 10V1000U±20%8×14 3.5 CD11 10V1000U±20%8×14 3.5 GS 10V1000U±20%8×16 3.5 CD11 10V1000U±20%8×16 3.5

QUANTITY 1 1 1 1 8 3 3 1 1 1 5 1 1 1 1

XS601

LOCATION R702 R703 R706 R701 C701~C706,C717,C718 C710,C711,C716 C710,C711,C716 C715 C715 C715 TC701,TC703~TC706 TC702 TC702 TC702 TC702

RH354708

14

L701~L714

TX179ATW

1

JK705

TX179AT

1

JK705

AV4-8.4-6G-3 DASW-8 AV8-8.4-6G-3 15P 1.0mm STRAIGHT CONTACT DUAL FLAT PLUG

1 1 1

JK702 JK703 JK701

1

XS701

16

CABLE SOCKET

17

CONNECTION CORDS

Φ0.6 SHAPED 5mm

7

18 19 20 21 22 23 24 25 26 27 28 29 30

CONNECTION CORDS CONNECTION CORDS SCART SOCKET TRIODE PCB SMD RESISTOR CARBON FILM RESISTOR CARBON FILM RESISTOR SMD RESISTOR CARBON FILM RESISTOR SMD RESISTOR SMD RESISTOR SMD CAPACITOR

Φ0.6 SHAPED 7.5mm Φ0.6 SHAPED 10mm SCART-01 S8050D 7969A-0 1/16W 4.7K ±5% 1/4W330Ω±5% 1/4W33Ω±5% 1/16W 2.2K ±5% 1/6W2.2K±5% 1/16W 1K ±5% 1/16W 75Ω ±5% 16V 105 +80%-20% 0603

5 2 1 3 1 1 1 1 1 1 1 1 1

67

JP701,JP704,JP706,JP707,JP711,JP712, JP714 JP702,JP703,JP708,JP709,JP713 JP705,R707 JK706 V701~V703 R704 R709 R708 R710 R712 R711 R705 C707

APPENDIX-AM/FM Tuner Specificadtion

68

69

70

71

72

73

74

75

76

77

78

79

80

81

82

83

84

85

86

87

88

89

90

最新カスタムIC搭載により容積30%減（当社従来品比）の小形化を実現。 30 % less volume than our traditional models thanks to state-of-the-art customized IC.

■特長 ●

●

■Features

独自開発のICを搭載し、当社従来品容積比約30%減の小形化（60ml）を達成。 ANTコネクタ部を直出構造とし、内部をフルシールド化することにより、優れたノイズ除去能力を発揮。

●

●

■用途 ●

Uniquely developed IC has achieved a small volume of 60 ml, 30 % less than our traditional models. Fully shielded structure with ANT connector effectively filters out noise.

■Applications

マイクロコンポーネントステレオ、MDラジカセ、 DVD、オーディオレシーバなど多機能化、小形化傾向の進む、各種オーディオ機器、ミニコンポーネントステレオ、各種多機能オーディオ機器。

●

Offers a wide range applications to audio equipment, especially multi-functional, compact audio equipment, such as mini- and microcomponent stereo equipment, MD radio cassette recorders, DVDs and audio receivers.

■主な仕様 Typical Specifications Items

Specifications

Receiving frequency range

Input impedance

Receive sensitivity Stereo separation Output level

(Ω)

(dBμ) (dB) (dBs)

Total harmonic distortion

(％)

AM

(kHz)

530 to 1710

FM

(MHz)

87.5 to 108

AM

―

FM

75

AM@SN20dB

51

FM@SN50dB

15

FM

45

AM

ｰ7.5

FM

2.5

AM

1.2

FM

Power consumption

0.25

(V/W)

Volume

(ml)

91

9/500 60

TFCF Series

FM/AM Combination Tuner with Noise Immunizing Structure

■外形図 Dimensions

(9.4)

51.5max.

60max.

20

(18.3)

AM ANT

5.3

(4.35)

(9.9)

12.5

GND

13.95

32.45

0.85

41.3

(4.35)

20max.

FM ANT (TYPE IEC/F)

Unit : mm

Terminal No.

P1.25X10=12.5

!1

5.2

12.5

7.3

1

40.25 (27)

■回路ブロックダイヤグラム

Circuit Block Diagram

Vc FM ANT

L FM/AM/PLL Combination IC R

DO CL AM

DI

ANT

C

92

Terminal name

q

GND

w

FM DET

e

VSM

r

Rch OUT

t

Vcc

y

Lch OUT

u

GND

i

DO

o

CL

!0

DI

!1

CE