Advanced Materials and Technologies for Micro Nano-Devices, Sensors and Actuators (NATO Science for Peace and Security Series B: Physics and Biophysics)

Advanced Materials and Technologies for Micro/Nano-Devices, Sensors and Actuators

NATO Science for Peace and Security Series This Series presents the results of scientific meetings supported under the NATO Programme: Science for Peace and Security (SPS). The NATO SPS Programme supports meetings in the following Key Priority areas: (1) Defence Against Terrorism; (2) Countering other Threats to Security and (3) NATO, Partner and Mediterranean Dialogue Country Priorities. The types of meeting supported are generally "Advanced Study Institutes" and "Advanced Research Workshops". The NATO SPS Series collects together the results of these meetings. The meetings are coorganized by scientists from NATO countries and scientists from NATO's "Partner" or "Mediterranean Dialogue" countries. The observations and recommendations made at the meetings, as well as the contents of the volumes in the Series, reflect those of participants and contributors only; they should not necessarily be regarded as reflecting NATO views or policy. Advanced Study Institutes (ASI) are high-level tutorial courses intended to convey the latest developments in a subject to an advanced-level audience Advanced Research Workshops (ARW) are expert meetings where an intense but informal exchange of views at the frontiers of a subject aims at identifying directions for future action Following a transformation of the programme in 2006 the Series has been re-named and re-organised. Recent volumes on topics not related to security, which result from meetings supported under the programme earlier, may be found in the NATO Science Series. The Series is published by IOS Press, Amsterdam, and Springer, Dordrecht, in conjunction with the NATO Public Diplomacy Division. Sub-Series A. B. C. D. E.

Chemistry and Biology Physics and Biophysics Environmental Security Information and Communication Security Human and Societal Dynamics

http://www.nato.int/science http://www.springer.com http://www.iospress.nl

Series B: Physics and Biophysics

Springer Springer Springer IOS Press IOS Press

Advanced Materials and Technologies for Micro/NanoDevices, Sensors and Actuators edited by

Evgeni Gusev Qualcomm MEMS Technologies San Jose, California, U.S.A.

Eric Garfunkel

Inst. Advanced Materials, Devices & Nanotechnology Rutgers University Piscataway, New Jersey, U.S.A. and

Arthur Dideikin Ioffe Physical-Technical Institute St. Petersburg, Russia

Published in cooperation with NATO Public Diplomacy Division

Proceedings of the NATO Advanced Research Workshop on Advanced Materials and Technologies for Micro/Nano-Devices, Sensors and Actuators St. Petersburg, Russia 29 June – 2 July 2009 Library of Congress Control Number: 2010921298

ISBN 978-90-481-3806-7 (PB) ISBN 978-90-481-3805-0 (HB) ISBN 978-90-481-3807-4 (e-book)

Published by Springer, P.O. Box 17, 3300 AA Dordrecht, The Netherlands. www.springer.com

Printed on acid-free paper

All Rights Reserved © Springer Science + Business Media B.V. 2010 No part of this work may be reproduced, stored in a retrieval system, or transmitted in any form or by any means, electronic, mechanical, photocopying, microfilming, recording or otherwise, without written permission from the Publisher, with the exception of any material supplied specifically for the purpose of being entered and executed on a computer system, for exclusive use by the purchaser of the work.

TABLE OF CONTENTS Preface

ix

MEMS/NEMS TECHNOLOGIES AND APPLICATIONS History of Early Research on MEMS in Russia (U.S.S.R.) V. Vaganov

3

Challenges of Complete CMOS/MEMS Systems Integration V. Vaganov

17

MEMS for Practical Applications M. Esashi

31

Nanochip: A MEMS-Based Ultra-High Data Density Memory Device N. Belov, D. Adams, P. Ascanio, T.-K. Chou, J. Heck, B. Kim, G. Knight, Q. Ma, J.-S. Park, V. Rao, R. Stark, and G. Tchelepi

41

Low Cost Silicon Coriolis’ Gyroscope Paves the way to Consumer IMU B. Vigna, F. Pasolini, R. De Nuccio, M. Capovilla, L. Prandi, and F. Biganzoli

67

Microwave and Millimetre Wave Devices Based on Micromachining of III–V Semiconductors A. Müller, D. Neculoiu, G. Konstantinidis, and T. Vähä-Heikilä Monocrystalline-Silicon Microwave MEMS Devices J. Oberhammer, M. Sterner, and N. Somjit Three-Dimensional Photonic Crystals Based on Opal-Semiconductor and Opal-Metal Nanocomposites V.G. Golubev

75 89

101

MEMS DEVICE AND RELIABILITY PHYSICS Pull-in Dynamics of Electrostatically Actuated Bistable Micro Beams S. Krylov and N. Dick Path Following and Numerical Continuation Methods for Non-Linear MEMS and NEMS P.G. Steeneken and J. Stulemeijer

117

129

v

vi

TABLE OF CONTENTS

The Impact of Dielectric Material and Temperature on Dielectric Charging in RF MEMS Capacitive Switches G. Papaioannou

141

ADVANCED PROCESSES AND MATERIALS Development of DRIE for the Next Generation of MEMS Devices H. Ashraf, J. Hopkins, and L.M. Lea

157

Low-Temperature Processes for MEMS Device Fabrication J. Kiihamäki, H. Kattelus, M. Blomberg, R. Puurunen, M. Laamanen, P. Pekko, J. Saarilahti, H. Ritala, and A. Rissanen

167

High-Temperature Stable Au–Sn and Cu–Sn Interconnects for 3D Stacked Applications N. Hoivik, H. Liu, K. Wang, G. Salomonsen, and K. Aasmundtveit 3D Integration of MEMS and IC: Design, Technology and Simulations M.M.V. Taklo, K. Schjølberg-Henriksen, N. Lietaer, J. Prainsack, A. Elfving, J. Weber, M. Klein, P. Schneider, and S. Reitz Low-Frequency Electronic Noise in the Back-Gated and Top-Gated Graphene Devices G. Liu, Q. Shao, A.A. Balandin, W. Stillman, M. Shur, and S. Rumyantsev Modeling of Dry Etching in Production of MEMS A. Rusakov, P. Bystrov, A. Knizhnik, and B. Potapkin XRD and Raman Study of Low Temperature AlGaAs/GaAs(100) Heterostructures P. Seredin, A. Glotov, E. Domashevskaya, I. Arsentyev, D. Vinokurov, A. Stankevich, and I. Tarasov Internal Stresses in Martensite Formation in Copper Based Shape Memory Alloys O. Adiguzel

179 191

205 215

225

237

SENSORS Smart Sensors: Advantages and Pitfalls P.J. French

249

TABLE OF CONTENTS

Vertically Integrated MEMS SOI Composite Porous Silicon-Crystalline Silicon Cantilever-Array Sensors: Concept for Continuous Sensing of Explosives and Warfare Agents S. Stolyarova, A. Shemesh, O. Aharon, O. Cohen, L. Gal, Y. Eichen, and Y. Nemirovsky

vii

261

Integration of Diverse Biological Materials in Micro/Nano Devices R. Ghodssi, P. Dykstra, M. Meyer, S. Koev, K. Gerasopoulos, X. Luo, G. Rubloff, W. Bentley, G. Payne, and J. Culver

275

Force Sensing Optimization and Applications J.C. Doll, S.- J. Park, A.J. Rastegar, N. Harjee, J.R. Mallon Jr., G.C. Hill, A.A. Barlian, and B.L. Pruitt

287

Using Parametric Resonance to Improve Micro Gyrsocope Robustness L. Oropeza-Ramos, C.B. Burgner, and K.L. Turner

299

Subject Index

311

Author Index

313

PREFACE A NATO Advanced Research Workshop (ARW) entitled “Advanced Materials and Technologies for Micro/Nano Devices, Sensors and Actuators” was held in St. Petersburg, Russia, from June 29 to July 2, 2009. The main goal of the Workshop was to examine (at a fundamental level) the very complex scientific issues that pertain to the use of micro- and nano-electromechanical systems (MEMS and NEMS), devices and technologies in next generation commercial and defenserelated applications. Micro- and nano-electromechanical systems represent rather broad and diverse technological areas, such as optical systems (micromirrors, waveguides, optical sensors, integrated subsystems), life sciences and lab equipment (micropumps, membranes, lab-on-chip, membranes, microfluidics), sensors (bio-sensors, chemical sensors, gas-phase sensors, sensors integrated with electronics) and RF applications for signal transmission (variable capacitors, tunable filters and antennas, switches, resonators). From a scientific viewpoint, this is a very multi-disciplinary field, including micro- and nano-mechanics (such as stresses in structural materials), electronic effects (e.g. charge transfer), general electrostatics, materials science, surface chemistry, interface science, (nano)tribology, and optics. It is obvious that in order to overcome the problems surrounding next-generation MEMS/NEMS devices and applications it is necessary to tackle them from different angles: theoreticians need to speak with mechanical engineers, and device engineers and modelers to listen to surface physicists. It was therefore one of the main objectives of the workshop to bring together a multidisciplinary team of distinguished researchers. To progress towards overcoming many of these fundamental obstacles, we formulated a workshop, the main goal of which was to develop a better fundamental understanding of the science and technology behind MEMS/NEMS. During the four-day ARW, NATO Country and Partner Country leading researchers met, tutored each other about both their recent results and thinking, and discussed where research and development should be directed. Many of the speakers were from Europe and the U.S. Several key speakers came from NATO Partner Countries including researchers from leading centers in the former USSR (Moscow and St. Petersburg), and Ukraine. The list of researchers represented a diverse international group of recognized scientists and engineers who brought a broad array of backgrounds and strengths into the workshop. The group came from academic, industrial and governmental labs, and had both experimental and theoretical researchers with backgrounds in basic and applied areas of physics, chemistry, mechanical and electrical engineering, surface and materials science. The meeting was organized thematically. Following introductory presentations, the first day concentrated on MEMS/NEMS technologies and market trends, as well as device physics aspects. This day was concluded by a poster session in the evening, giving special priority to younger researchers to present and discuss their work. The second day was dedicated to applications, with leading experts in the

ix

x

PREFACE

field discussing progress and sharing their vision for future research. This was followed by a discussion of the important area of sensors for chemical and biological agents. On the last day, we continued with modeling discussions and the role of surfaces, as well as device applications. In the afternoon, a review of NEMS and nanotechnologies was held. The enjoyment of the week came not only from the quality presentations and stimulating discussions, but also from the beauty of St. Petersburg amplified by gorgeous summer weather. The foreigners among us were not only delighted in the “physical” beauty of the city (architecture, Neva-river, canals, palaces, parks, etc.) but enjoyed rich cultural experiences and the hospitality of the local people. The editors would like to thank the members of the International Advisory Committee, Prof. Reza Ghodssi, Dr. Fred Roozeboom, Dr. Vladimir Vaganov and Prof. Alexander Vul’, for help in selecting participants from different countries and for their valuable comments on the scientific program. We would also like to thank all invited speakers and contributors to this book for their support and encouragement during the early planning stages of the Workshop and cooperation in meeting publication deadline. The success of the meeting would not have been possible without the excellent planning and operation of the local team in St. Petersburg led by Dr. Sergey Kidalov and Mrs. Irina Vorobieva. It was a real pleasure to collaborate with this professional team again, after two previous successful NATO ARWs on “Fundamental Aspects of Ultrathin Dielectrics on Sibased Devices: Towards an Atomic-scale Understanding” in 1997 and “Defects in Advanced High-k Dielectric Nano-electronic Semiconductor Devices” in 2005. We are very grateful to Dr. Vadim Siklitsky for developing and maintaining the website (http://www.ioffe.ru/natoarw/2009/) and also for his help during the Workshop. We are thankful to all participants for their excellent presentations, active participation (including peer-review of papers presented in this book) and fruitful discussions at the Workshop. Finally and most importantly, we would like to acknowledge the hard editorial work of Ms. Michele Gardner who helped us to put together the presented papers into this book. The Workshop would not have been possible without financial support from the NATO Public Diplomacy Division. We also greatly appreciate financial contributions from co-sponsors, the Russian Foundation for Basic Research, NT-MDT, and Qualcomm.

August 2009 San Jose, California Piscataway, New Jersey St.Petersburg, Russia

Evgeni Gusev Eric Garfunkel Arthur Dideikin

MEMS/NEMS TECHNOLOGIES AND APPLICATIONS

HISTORY OF EARLY RESEARCH ON MEMS IN RUSSIA (U.S.S.R.) VLADIMIR VAGANOV Siantis Inc, Los Gatos, California 95032, USA, E-mail: [email protected]

Abstract An overview of early MEMS research and developments made in Russia (U.S.S.R.) from 1971 to 1985, which are not widely published and described in the western technical literature, is presented in this paper. Moscow Physics Engineering Institute was the first Russian organization, where MEMS research was initiated. The number of world pioneering developments was made there. Many other institutions in the former Soviet Union participated in early MEMS works. Among them were “Giredmet”, “NiiTeplopribor”, “Electronpribor”, “Nii Physical Measurements”, Bauman Technical University, Novisibirsk University, MIET, Kaunas Polytechnical Institute, Lvov Polytechnical Institute, Leningrad State University and other organizations.

Keywords: Microsensor, pressure sensor, accelerometer, piezoresistor, piezo-transistor, micro-structure, sensitive integrated circuits.

1.

Introduction

The most comprehensive overview of early MEMS history was made by Professor Simon Middelhoek from Delft University in Netherlands [1]. According to him the US academic silicon sensor research was started at Stanford University in 1965. The field of micro-sensors and then MEMS certainly is associated with the term micromachine, which was coined by Professor James Angell from Stanford University in a paper presented at an international conference in 1978 [2]. Thus, Stanford University can be considered as cradle of MEMS. I was fortunate to have the opportunity to visit Stanford in 1969, as a postdoctoral scholar, and sharing the office with Ken Wise who was the first in the world to apply micromachining for making silicon microelectrodes, and who is well known now as one of the leaders in the MEMS area [3, 4]. I was inspired by Jim and Ken and after my returning back to Russia a similar research program at Moscow Physics Engineering Institute (MPhEI) was started. This technical university was a perfect place to start

E. Gusev et al. (eds.), Advanced Materials and Technologies for Micro/Nano-Devices, Sensors and Actuators, DOI 10.1007/978-90-481-3807-4_1, © Springer Science + Business Media B.V. 2010

3

4

V. VAGANOV

because it had the first integrated circuits fabrication facility among Russian universities. This provided an introduction to the new field of micromechanics to Russia. Extensive preceding research on semiconductors in the U.S.S.R. created a solid foundation for MEMS research in Russia.

2. Mechanical sensors As always, at the early stage in any field a lack of either required materials, or chemicals, or equipment often motivates researchers to be more innovative and inventive. At the beginning we didn’t have (100) silicon wafers. That is why researchers at MPhEI started with (111) the available 1″ wafers and developed a piezoresistive pressure sensor based on electro-chemical micromachining (Figure 1a) [5]. From the beginning it was clear that future lie in the complete monolithic integration of sensors and electronics. In 1972 we published a paper describing pressure sensor integrated on one die with IC amplifier (Figure 1b), to our knowledge, the first of its kind in the world [6]. Later sensors integrated with electronics were named “smart sensors”.

(a)

(b)

Figure 1. (a) Piezoresistive pressure sensor based on (111) silicon wafers and electro-chemical micromachining (1972); (b) piezoresistive pressure sensor monolithically integrated with differential amplifier (1972).

By 1972, with access to (100) silicon wafers and starting research in anisotropic etching of silicon, we fabricated piezoresistive pressure sensor with the peripheral location of longitudinal and transverse piezoresistors along the sides of a square diaphragm (Figure 2a) [7]. Next the piezoresistive pressure sensor with peripheral location of four complete bridges in the center of four sides of a square diaphragm was also fabricated (Figure 2b) [8].

HISTORY OF EARLY RESEARCH ON MEMS

(a)

5

(b)

Figure 2. (a) Piezoresistive pressure sensor on (100) Si, square diaphragm and peripheral piezoresistors (1972); (b) pressure sensor with four Wheatstone piezoresistive bridges (1974).

Access to hydrazine hydrate in addition to KOH allowed researchers to make a two-side anisotropic etching and make a first prototype of piezoresistive accelerometer from a pressure sensor by etching a slot along three sides of the diaphragm from the front side of the wafer in 1974 (Figure 3a) [9]. As one can see, this accelerometer was made from the pressure sensor developed earlier and shown in the Figure 2b. The slot along the three sides of the diaphragm from the front side of the die was etched and thus a cantilever beam made from the diaphragm with the complete bridge circuit in the area of clamping the cantilever was fabricated. Visiting Stanford again in 1975 I spent some time with Jim Angell’s group sharing our experience in MEMS research and in accelerometers in particular [10]. I made the first MEMS accelerometer dedicated design and fabricated this accelerometer as shown in Figure 3b. The first publication of this device was made in Russia in 1978 [11]. Later, a similar accelerometer was made at Stanford and publication of its microstructure in “Scientific American” in 1983 is well known [12]. It is interesting to notice that sensitivity of these first accelerometers was high enough that during experiments with it was noticed that it was picking up a sound due to its small thickness and large area. It certainly was acting as a microphone although frequency bandwidth was limited to several kilohertz. Among other interesting early developments was a microstructure of an accelerometer with four symmetrical beams and an asymmetric proof mass published in 1983, as shown in Figure 3c [13]. Similar microstructures were incorporated in 3-axis piezoresistive accelerometers, which are still in use [14–16]. That time market was not ready yet for even one-axis accelerometers not mentioning threeaxis devices. As known, the real market demand for MEMS accelerometers was for air bag automotive applications at the beginning of 90th and the first air bag accelerometers were piezoresistive, though later they were pushed out by capacitive devices.

6

V. VAGANOV

(a)

(b)

(c)

Figure 3. (a) First accelerometer prototype made from pressure sensor in 1974; (b) first piezoresistive accelerometer with cantilever beam and full bridge in the beam clamping area (1975); (c) microstructure of accelerometer used later for multi-axis measurements (1983).

From the beginning our efforts were focused not only on piezoresistors but also on piezo-transistors and other silicon devices, which principle of operation is based on mobility of charge carriers. In 1975 we designed and fabricated pressure sensors based on bipolar and MOS transistors shown in Figure 4 [17–19]. Bipolar transistors were located in different areas of the silicon diaphragm and were planar n-p-n and lateral p-n-p type. Each transistor had separate connections to different contact pads, which provided an opportunity to investigate the piezosensitive property of all transistors independently. MOS transistors were p-channel transistors with different locations and orientation of the channels.

(a)

(b)

(c)

Figure 4. (a) Pressure sensor die with bipolar n-p-n and p-n-p piezo-transistors as sensitive components; (b) pressure sensor die with p-channel MOS piezo-transistors; (c) first piezo-sensitive circuit combining piezo-transistors and pizoresistors (1975).

HISTORY OF EARLY RESEARCH ON MEMS

7

There were several reasons why our attention was attracted to piezo-transistors. The size of a transistor is much smaller than the size of a resistor with the potential to dramatically scale overall sensor size down. The transistor is a three port-pole component compared to a resistor, which is a two port-pole component. Therefore, in contrast with resistors, which can be combined in a Wheatstone bridge circuit with only four sensitive components, transistors can be combined in a circuit with unlimited number of sensitive components and thus increase sensitivity of a sensor. Finally, a sensitive transistor can also be used for an amplification of a transduced signal. In 1973 the Russian patent was filed and issued in 1975 for the first piezo-sensitive integrated circuit shown in Figure 4c [20]. Other researchers in Russia, from Novosibirsk University in particular, also were investigating the properties of sensors based on MOS piezotransistors reporting about sensor, which had a bridge circuit combined from longitudinally and transverse positioned transistors relative to applied mechanical load [21].

3. Sensors for biomedical applications In early years in different countries many MEMS projects were related to biomedical applications due to a very small size of the sensors. In 1973 the first lateral catheter pressure sensor was introduced [22]. The pressure sensitive diaphragm didn’t have a face-end location, as it was previously made, but it was parallel to the axis of the catheter (Figure 5a). The sensor die had two silicon micro-profiled parts: first one having a square diaphragm with piezoresistor bridge electrically connected to contact pads and a cap bonded to the first part.

Figure 5. (a) Catheter pressure sensor die with lateral position of the diaphragm relative to longitudinal catheter axis and with silicon cap providing channel for external pressure through the catheter (1973); (b) multi-beam sensor for cochlear prosthesis (1976).

8

V. VAGANOV

Based on the observation that beam-type sensors exhibit property of a microphone another bio-medical project was started and a die with multiple beams having different geometry was developed in 1976. It provided different mechanical resonant frequency of the beams and reacted differently on a sound of different frequency (Figure 5b) [23]. The goal was to create a prototype of cochlear prosthesis. It was an ambitious goal, which didn’t find a financial support and the project was abandoned. Biomedical applications of MEMS sensors enabled early recognition of the importance of micro-packaging at the wafer level. The development of submillimeter catheter pressure sensors for neuro-surgical applications, shown in Figure 6, is a good example [24]. The die was only 700 µm wide and had a rectangular diaphragm 300 µm wide, 800 µm long and 7 µm thick. It also had two longitudinal bosses and all four piezoresistors were transverse: two resistors were located on two peripheral thin parts of the diaphragm and two resistors on central thin part of the diaphragm, as shown in Figure 6a. The silicon cap beside the cavity on the top of the diaphragm had a micro-socket for connecting and soldering micro-wires to contact pads on the sensor die. After bonding the wafers, they were diced into separate dice ready for assembling with the micro-wires. The ends of long wires were inserted into a micro-socket, the solder or conductive epoxy was loaded through the loading windows and then all wires were soldered simultaneously. Sensor die chips from both sides and a cap chip are shown in Figure 6b. The sensor die was assembled in an external stainless steel package – the tip of the catheter was only 1 mm in diameter and it was used in a number of medical experiments including intra-brain pressure measurements in brain tumor patients.

(a)

(b)

Figure 6. (a) Catheter pressure sensor die for biomedical applications had micro-packaging at the wafer level including micro-socket for connection to the long wires; (b) view of chips of a sensor die from both sides and a cap with micro-socket (1978).

Many other interesting projects related to biomedical applications of microsensors were conducted that time. One was dedicated to the development of artifi-

HISTORY OF EARLY RESEARCH ON MEMS

9

cial heart [25]. Figure 7a illustrates an early prototype of artificial heart with radioisotope power supply. The control system of the heart used several pressure sensors of different ranges and package configurations. Extra-vessel blood pressure sensor, shown in Figure 7b, was developed for prolonged chronic testing of the blood pressure in arteries and veins. The sensor was applied to the external wall of the blood vessel and easily fixed around the vessel [26]. Extra-cellular microelectrodes similar to those, what Ken Wise made at Stanford, were developed and fabricated for neuro-physiological research (Figure 7c) [27].

(a)

(b)

(c)

Figure 7. (a) Prototype of artificial heart with radioisotope power supply and control system comprising multiple pressure sensors (1979); (b) extra-vessel blood pressure sensor (1983); (c) extra-cellular micro-electrodes (1975).

Researchers from Kaunas Polytechnical Institute also developed silicon microsensors for blood pressure measurements [28]. Another interesting development of miniature pressure sensors for biomedical applications was made in Zelenograd. This sensor was made on the silicon-on-sapphire (SOS) structures [29]. The unique process technology of local micromachining of sapphire wafers was developed, which allowed using this technology not only for biomedical sensors but also for industrial applications. Good chemical resistance of sapphire diaphragm provided high reliability of these sensors. “NIKIMP” also was developing medical sensors based on monocrystalline silicon piezoresistive strucrures in the form of a micro-frame made from silicon and mounted on pressure diaphragm [30].

4.

R&D of micro-sensors theory and micromachining processes

Much of the early work between 1972 and 1985 was focused on development of theory, design foundations and processes for mechanical sensors. In particular, the research on anisotropy of piezoresistive coefficients in silicon wafers of different

10

V. VAGANOV

orientations was published in 1978 [31]. Within several years extensive analysis was conducted on the sensitivity of piezoresistors p and n type with different angular orientation and position on the springy elements of different shape and crystallographic orientation was conducted. Square, circular, rectangular, octagonal, cylindrical, flat and profiled in thickness springy element were analyzed. As a result, the design concepts and design rules for different electro-mechanical microsensors were developed [32–34]. There were many industrial and academic research institutes, which traditionally developed conventional transducers based on strain gages including semiconductor strain gages. Having large experience in this area it was relatively easy for them to make a gradual transition into a micro-sensor area at least at the theoretical and metrological level. Among those organizations were “Nii Machinovedenia” of Academy of Sciences of the USSR, “Giredmet”, “Nii Teplopribor”, “NIKIMP” and others. Among educational institutions the pioneering research in micro-sensors was conducted in Technical University named after Bauman, Novosibirsk University, Moscow Institute of Electronic Technology (MIET), Leningrad University, Leningrad Polytechnical Institute, Kaunas Polytechnical Institute and many others. All those organizations significantly contributed to the development of theory, fabrication technology, packaging and testing of different microsensors. Early understanding of the importance of all aspects of micro-sensors: microstructure and sensitive components; IC circuitry for signal conditioning and processing; micro-packaging; testing; their interdependence through the desired parameters and characteristics of resulting micro-device lead us to developing so-called “system approach to MEMS design and commercialization”, which later helped in real life cases of commercialization and which was described in several later publications [35, 36]. Among early micromachining technologies anisotropic etching of silicon certainly attracted a lot of attention. At MPhEI extensive research on anisotropic etching of silicon including a very detailed study of multidimensional space of anisotropy of etching rate vs type of etchant, concentration of etching components, and the temperature of the process was done during this period [37, 38]. Figure 8 illustrates some of the indicatrixi obtained during this research. This effort resulted in development of a model of anisotropic etching of silicon based on a phenomenological approach and a model for computer simulation of the process of local anisotropic etching through a mask of arbitrary shape on the wafers of different crystallographic orientation [39, 40]. One of the particular results of this research was development and patenting of the set of geometrical shapes of right corner compensation masks needed for anisotropic etching of convex-shaped microstructures on (100) silicon wafers [41–43].

HISTORY OF EARLY RESEARCH ON MEMS

(a)

(b)

11

(c)

Figure 8. Indicatrix of anisotropic etching of silicon in water solution of KOH 20% at 50°C (a); KOH 30% at 50°C (b); and in hydrazine hydrate at 50°C (c) (1975).

At Moscow Institute of Electronic Technology (MIET) the researchers attacked anisotropic micromachining of silicon not only in alkaline solutions but also in acid solutions. In a presence of ultrasound, which reduced the diffusive limitation of chemical reaction, the reaction became anisotropic in the nitric and hydrofluoric acid solutions known as isotropic and polishing [44]. As the major research and development activity in MEMS area was happening within an educational institution, it was natural to implement the results of this research into the educational process. In 1976 the first course of lectures on MicroSensors was delivered to graduate students at MPhEI. In 1980 and 1981 two text books for students were published at MPhEI on “Microelectronic transducers” and “IC transducers” respectively (Figure 9a, b) [45, 46]. In 1983 the first monograph on IC piezoresistive sensors was published by Russian technical publishing house “Energoatomizdat” (Figure 9c) [47]. This book was one of the first books in the area of microsensors. Unfortunately it was published only in Russian and naturally didn’t have world wide circulation. In Russia however this book is still in the list of recommended literature for graduate students in MEMS area at the universities.

(a)

(b)

(c)

Figure 9. (a) Text book “Microelectronic transducers” (1980); (b) text book “IC transducers” (1981); (c) monograph “IC Piezoresistive sensors” (1983).

12

5.

V. VAGANOV

Other developments and industrially manufactured sensors

Many organizations were involved in research and development of other than piezoresistive mechanical sensors. Institute of Solid State Physics and Semiconductors of Belorussian Academy of Sciences developed magneto-sensitive Hall sensors on InSb and GaAs shown in Figure 10a [48]. Another magnetic sensor with digital output based on silicon developed by a group of Moscow researchers is shown in Figure 10b [49]. Figure 10c illustrates silicon capacitive pressure transducer developed in Leningrad State Technical University [50].

(a)

(b)

(c)

Figure 10. (a) Hall sensor on InSb; (b) integrated magnetic field sensor with frequency output; (c) silicon capacitive pressure transducer.

There were several organizations, which not only conducted research and development of micro-sensors but also commercialized their developments in volume production. “Nii Teplopribor” developed series of silicon-on-saphire (SOS) pressure sensors “Crystal” in 1973 in cooperation with Zelenograd’s semiconductor company and started their production manufacturing in 1974 [51]. Transducers “Sapphire” and “Sapphire 22” included gage, absolute and differential pressure, consumption of liquids and gases, and liquids level [52]. Transducers were developed for applications in harsh environment and provided accuracy 0.1–0.25% in the temperature range –50 ° C to 120°C. “Nii Physical Measurements” in Penza with participation of MPhEI developed 11 types of pressure transducers for aero-dynamic applications. High quality of these devices allowed them to be used in Russian Shuttle Buran. Sensor dice for these sensors, which were manufactured serially, are shown in Figure 11a. Another Russian company “Electronpribor” in St. Petersburg developed together with MPhEI low cost pressure sensors for automotive applications and started its manufacturing in 1989. These sensors shown in Figure 11b had a low cost plastic package and thin-film trimming resistors on a ceramic substrate for individual calibration of sensor’s offset and sensitivity. Sensor chips were anodically bonded with a glass substrate before packaging.

HISTORY OF EARLY RESEARCH ON MEMS

(a)

13

(b)

Figure 11. (a) Serial pressure sensors for aero-dynamic applications (1983); (b) pressure sensor for high volume automotive applications (1989).

6.

Conclusion

In 1991 the Editor-in-Chief of “Sensors and Actuators”, Prof. Simon Middelhoek, initiated a publication of a special issue devoted to current research on physical sensors in the U.S.S.R. [53]. I had an honor to be invited as a guest editor of this issue, which covered the geography: Moscow, Leningrad, Odessa, Uljanovsk and Yoshkar-Ola. This issue also presented the spectrum of sensors developed in Russian universities and in industry: mechanical sensors on silicon and silicon-onsapphire, phototransistor arrays, liquid crystal sensors, magnetic field sensors, hydrogen detectors, pH-ISFET, SAW sensors and SOI high-temperature sensors. Although that issue made the first presentation of Russian MEMS activity to the western world it didn’t present the whole picture of Russian R&D in MEMS area of that time and didn’t describe the preceding research. This paper hopefully fills in some of the gaps of that presentation. It also should be understood that reconstruction of the events, materials and publications of almost 40 years old is always a challenging task and the author is relying on the leniency of a reader in possible inaccuracy of presented materials. Author also would be grateful for any comments, corrections and response. Today’s broad resources of international communication including Internet hopefully will facilitate the process of exchanging knowledge in the Micro and Nano technologies more effectively and facilitate initiation of new scientific and commercial contacts between the Western, Eastern and Russian professionals in these areas.

14

V. VAGANOV

References 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. 12. 13. 14. 15. 16. 17. 18. 19. 20. 21. 22. 23. 24. 25.

Simon Middelhoek, Celebration of the tenth transducers conference, Sensors and Actuators, 82 (2000) 2– 23 Stanford News Service, News Release February 28, 2006 Kensall D. Wise, James B. Angell, Arnold Starr, An Integrated-Circuit Approach to Extracellular Microelectrodes, Biomed. Engineering, IEEE Trans. on. 08/1970; BME-17(3) Dr. Kensall D. Wise, William Gould Dow Distinguished University Prof. of Electrical Engineering & Computer Science, www.nae.edu/nae/naepub.nsf/Members USSR Pat. 458720. Diaphragms fabrication technique of miniature planar epitaxial pressure sensors (V.I.Vaganov,K.M.Ponomarev), B.I. 1974 #46 Vaganov V.I., Ponomarev K.M., Silicon strain gage component for IC pressure sensors, Physical Electronics, Kaunas, KPI, 1972, v.1, 125– 130. (in Russian) Vaganov V.I., Polivanov P.P., Ponomarev K.M., IC pressure sensor for biomedical applications, Tenzometriya-72, Digest of All-Union Conf. Methods and Means in Strain Gauge Measuremens, Sverdlovsk, 1972, M., IMASH AN USSR, 1972, (in Russian) Vaganov V.I., Polivanov P.P., Ponomarev K.M., IC pressure sensor for biomedical applications, Izvestia Vuzov, ser. Radioelectronics, v.XVII, 1974, 107– 109 (in Russian) Development and Research of ICs based on new semiconductor devices, Annual Report on Government Project “Mayak”, v 2, State Reg. # 75026315, MPhEI, 1974 (in Russian) V.Vaganov, Suggested Improvements on Accelerometer, Office memorandum to Professor J. Angel and Professor J. Meindl, Stanford University, April 30, 1975 V.I.Vaganov, N.I.Goncharova, IC cantilever beam sensor of mechanical parameters, Electronic Instrumentation Technique, Atomizdat, Moscow, 1978, #1, (in Russian) James B. Angell, Stephen C. Terry, Phillip W. Barth, Silicon Micromechanical Devices, Scientific American, April, 1983, 44– 55 Vaganov V., Micromachining is Trend for Sensors, Components and Systems in Instrumentation, Energoatomizdat, Moscow, 1983, pp. 3– 9. (in Russian) K. Yamada, K. Higuchi, H. Tanigawa, A novel silicon accelerometer with a surrounding mass structure, Sensors and Actuators, A21-A23, 1990 308– 311 US Pat. 5,894300, Silicon bulk micromachined, symmetric, degenerate vibratory gyroscope, accelerometer and sensor and method of using the same, Tony K. Tang et al, 1999 US Pat. 6662659, Acceleration sensor, Masakatsu Saitoh, 2003 Development and Research of ICs based on new semiconductor devices, Annual Report on Government Project “Mayak, v 3, State Reg. # 75026316, MPhEI, 1975. (in Russian) V.I.Vaganov, V.V.Beklemishev, A.V.Sumin, IC pressure sensors on planar piezotransistors, Tenzometriya-76, Digest of All-Union Conf. “ Methods and Means in Strain Gauge Measurements and their Applications” , Kishinev, 1976 (in Russian) V.I.Vaganov, P.P.Polivanov, IC piezotransistor pressure sensor, Electronnaya Technika, 1975. ser. 11, #4, 89-92. (in Russian) USSR Pat. 491059. Microelectronic pressure sensor, (V.I.Vaganov), B.I. #41-1975. E.I. Makarov, et al., IC piezosencitive circuits on MOS transistors, Tenzometriya-76, Digest of All-Union Conf. “ Methods and Means in Strain Gauge Measurements and their Applications” , Kishinev, 1976 (in Russian) Development and research of pressure sensors for intraheart catheterization, Final report, MPhEI, Moscow, 1973. (in Russian) Research and Development of IC sensors for biomedical applications, Annual Report, State Reg. # 77021585, MPhEI, Moscow, 1976. (in Russian) V.I.Vaganov, V.V.Beklemishev, S.G.Geletsyan, N.I.Goncharova, A.B.Noskin, IC pressure sensor with ion implanted piezoresistors, Sensitivity Theory in Electronic and Electrical Systems, digest, All-Union Scien.Conf., M., MIEM, 1978, 27– 28. (in Russian) V.A.Kremnev, V.B.Parshin, A.V.Sumin et al., A transducer choice for an implantable autonomous artificial heart, Modern Problems of Transplantation and Artificial Organs, MZ USSR, 1979, 146– 149. (in Russian)

HISTORY OF EARLY RESEARCH ON MEMS

15

26. V.I.Vaganov, V.V.Beklemishev, V.S.Baranov, Implantable contact sensor of arterial blood pressure, Metrology of measurements in medicine, Tallin, 1983, 137. (in Russian) 27. V.I.Vaganov, B.V.Tkachev, IC metallic microelectrodes of comb-like structure, 7-th AllUnion scien.-techn.conf. on microelectronics, digest, Lvov, 1975. (in Russian) 28. I.B.Baltavichus, et al., Sensors for blood pressure measurements, 7-th All-Union scien.techn.conf. on microelectronics, digest, Lvov, 1975. (in Russian) 29. Aleksa A.G., Zimin V.N., et al., Electronnaya Technika Electronic technology, ser. 11, vol. 2, 43– 46, 1976. (in Russian) 30. A.A. Tzivin, U.M. Bazgin, T.A. Motorigina, Biomedical transdusers on monosrystalline structures, 7-th All-Union scien.-techn.conf. on microelectronics, digest, Lvov, 1975 31. V.I.Vaganov, V.M.Khudikina, Anisotropy of piezoresistive coefficients for IC sensors of mechanical parameters, Electronic Measurement Technique M., Atomizdat, 1978 32. N.I.Goncharova, A.B.Noskin, Sensitivity topograms of piezoresistors of IC pressure sensors, Electronic Instrumentation Technique, M., Energoizdat, 1981, #3, 18– 23 33. V.V.Beklemishev, V.I.Vaganov, Non linearity analysis of IC pressure sensor with a square diaphragm,“ Transducers based on microelectronic technology” , Moscow, 1983 34. V.I.Vaganov, N.I.Goncharova, I.I.Sluchak, IC piezoresistive sensor with flexible elements of complex forms, Electronic Measuring Devices and Systems, M., Energoatomizdat, 1984, 105– 108 35. V.I.Vaganov, Basic trends and development problems in sensoelectronics and system approach to sensor and actuator design, Proc.Conf. “ Transducers based on microelectronic technology” , M., MDNTP, 1986, 3– 16. (in Russian) 36. V. Vaganov, A System Approach to Photonic MEMS Commercialization, Fiberoptic product news, Nov, 2002 37. V.I.Vaganov, P.P.Polivanov, Local anisotropic etching of silicon for fabricating IC pressure sensors, Electronnaya Technika, 1975, ser, Complex miniaturization of radioelectronic devices and systems, #4, 93– 98 38. V.I.Vaganov, N.I.Goncharova, T.S.Plokhova, Study of dependance etching rate for anisotropic etching of silicon in KOH water solutions versus etching regime. Electronnaya Technika, 1980, ser, Microelectronics, No2, 29– 36 39. V .I.Vaganov, T.S.Plokhova, Study of shape dynamics for local anisotropic etching of silicon. Electronnaya Technika, 1979, ser. Microelectronics, #5, 55– 62 40. Belov N.S. Silicon micro-mechanical structures, Ph.D. dissert., Moscow, MPhEI, 1989. 41. USSR Pat. 795326. Protective mask, (V.I.Vaganov, T.S.Plohova), 1980 42. USSR Pat. 858491. Protective mask for batch chemical separating of monocrystalline (100) wafers into chips, (V.I.Vaganov, T.S.Plohova), 1980 43. USSR Pat. 1220516. Protective mask, (N.S.Belov, V.I.Vaganov), 1985 44. A.I. Buturlin, T.I. Vishneva, U.D. Chistiakov, Ultrasound activated process of anisot ropic etching of silicon in acid solutions, Digest of projects, Moscow, MIET, 1980 45. V.I.Vaganov, Microelectronic sensors, text book, MPhEI, Moscow, 1980. (in Russian) 46. V.I.Vaganov, IC sensors, text book, MPhEI, Moscow, 1981, 77. (in Russian) 47. V.I.Vaganov, IC piezoresistive sensors, Energoatomizdat, Moscow, 1983. (in Russian) 48. Hall microsensors on InSb and GaAs epilayers, Catalog, Institute of Solid State Physics and Semiconductors, Belorussian Academy of Sciences, 1983 49. S.V. Gumenuk, B.I.Podlepetsky, et al.,Integrated magnetic sensor with frequency output, Sensors and Actuators A, v 28, No3, 1991 50. V.M. Artyomov, E.A. Kudryashov, et al., Silicon capacitive pressure transducer with increased modulation depth, Sensors and Actuators A, v 28, No3, 1991 51. G.G. Iordan, Kenigsberg V.L., et al., Semiconductor piezoresistive transducers, Digest of All-Union Conf. “ Methods and Means in Strain Gauge Measurements and their Applications” , Kishinev, 1976 (in Russian) 52. Kenigsberg V.L., Stuchebnikov V.M., et al., Izmeritelnaja Technika, #10, 1978 53. Sensors and Actuators, A special issue devoted to Current Research on Physical Sensors un the U.S.S.R., Guest Editor: V.I.Vaganov, volume A28 No.3, August 1991

CHALLENGES OF COMPLETE CMOS/MEMS SYSTEMS INTEGRATION

VLADIMIR VAGANOV Siantis Inc, Los Gatos, California 95032, USA, E-mail: [email protected]

Abstract This paper is dedicated to the analysis of the needs and challenges of integration of CMOS and MEMS. It is acknowledged that individual sensors era is ending and the multi-sensor micro-systems era is beginning. On the example of cost requirements for IMU for high volume cell phone application it is demonstrated that achievement of required cost target is possible with monolithic MEMS CMOS integration. Among major challenges of this integration are: need for sensors sensitivity increase, as the way to scale their size down; process integration for different sensors and compatibility of this process with CMOS fabrication technology. General description of Siantis’ technology, which met all major challenges of monolithic integration, is presented then. Finally, economic justification for monolithic integration is considered.

Keywords: CMOS MEMS integration, pressure sensor, accelerometer, piezoresistor, piezo-transistor, micro-structure, multi-sensor micro-systems, inertial measurement unit, sensitive integrated circuits, principle of multi-axis measurements.

1. Need for monolithic integration Even before the term “MEMS” was coined and established, some of the early pioneers in this field envisioned ultimate monolithic integration of MEMS and ICs. Over three decades has passed and this is not yet a main stream technology in MEMS. However, the most significant MEMS products, like print-heads, ADI’s accelerometers, TI’s DLP, are utilizing monolithic integration. Their commercial success is the best evidence of this ultimate technological goal. Nobody is arguing today that integration of MEMS and sensors in particular with CMOS is the next natural step in micro-technology evolution. Many researchers and companies are working in this direction addressing specific devices, applications and markets. Very good example of this effort is an initiative of Ken Wise, who founded Engineering Research Center for Wireless Integrated MicroSystems (WIMS) funded by NSF in 2000. The center combined efforts of E. Gusev et al. (eds.), Advanced Materials and Technologies for Micro/Nano-Devices, Sensors and Actuators, DOI 10.1007/978-90-481-3807-4_2, © Springer Science + Business Media B.V. 2010

17

18

V. VAGANOV

about eight universities in creating microsystems capable of measuring a variety of physical parameters, interpreting the data and communicating over a wireless link [1]. The dramatic difference between what the market was looking for yet several years ago and now is the need for simultaneous measurements of multiple parameters of different physical and/or chemical domains. Several examples of these market needs are shown in Figure 1.

Figure 1. Examples of market need in micro-systems measuring multiple parameters.

It becomes obvious that Individual Sensors Era is ending. Multi-Sensor MicroSystems Era is beginning. Why is it happening now? The market is ready to accept and utilize huge amount of such systems for different high volume applications – market pull. The underlying technologies are developed enough to push the market. These are technologies in all three areas: sensing, computing and communicating. However, for all massive applications the major requirements are: low cost, small size, high reliability. What kind of integration monolithic or hybrid would be better? Older generation of semiconductor industry professionals might remember that at the beginning of IC there were a lot of discussions about “monolithic” vs “hybrid” integration. The real life put everything on its place and brought an understanding that both approaches have the right to live depending mainly on the size of the market and related cost requirements.

CHALLENGES OF COMPLETE CMOS/MEMS SYSTEMS INTEGRATION

19

Principally the history is repeating itself on the example of MEMS and CMOS integration. There are the same two basic approaches: hybrid (MCM) and monolithic, although the border between those two is fading with the advance of new technologies and processes. For example, when two silicon wafers, one with CMOS and another with MEMS, are bonded at the wafer level, it is certainly not a traditional hybrid integration but although not yet true monolithic. To add here chip-scale packaging (CSP), wafer-level packaging, through silicon vias (TSV), vertical multi-chip packaging, and we have even fuzzier line between two basic integration approaches. So the correct question should be not “Which MEMS/CMOS integration technology is better?” but rather “When different MEMS/CMOS integration technologies should be used?” By the other words the question should be: “When monolithic integration should be used instead of MCM, assuming that all technological issues of this integration are resolved for a given application?” Let us consider an example of cost requirements for portable devices. How low the cost, how small the size and how high the reliability should be for these multi-sensor micro-systems depends on specific applications. For example, very high volume cell phone market is looking now for not just 3-axis accelerometer, which is already started to be implemented in some high-end phones, but for whole inertial measurement unit (IMU) for many potential applications, as shown in Figure 1. In particular it can be used for navigation assisting GPS between the transmissions and for navigation in the areas shielded from radio signals. Such multi-sensor micro-system should comprise at least three different sensors: 3-axis linear accelerometer, 3-axis angular sensor, 3-axis compass and CMOS processing circuitry. In some other requirements it also might have an altimeter for measuring elevation, for example within a building. Figure 2 illustrates the pie-chart of the six most important cost components including packaging and testing. Sooner or later this technology will penetrate into all cell phones. It was reported that the bill of materials (BOM) for the low-end cell phones is approaching $20. Let us aggressively assume that the cost of new component might be allowed at 10% of BOM, e.g. $2. Let us also assume for the sake of discussion that this total cost of IMU will be equally broken down between six cost components. Then each of the 3-axis linear accelerometer, 3-axis angular sensor, 3-axis compass, CMOS, packaging and testing should cost $0.33. Is it realistic to achieve this low cost for all these separate components? The answer is “definitely not” without integration. Is it realistic to achieve this low cost with hybrid (MCM) integration? I would say: “Doubtfully” because there is no evidence that within the existing trend of scaling down the size and therefore the cost of 3-axis accelerometers and gyro the price $0.33 per chip-packaged 3-axis device could be achieved soon. Is it realistic to achieve this low cost with monolithic integration? The answer is “definitely yes”. More than that, the monolithic integration seems to be the only way to achieve this goal for such high volume application.

20

V. VAGANOV

Figure 2. Cost structure of the inertial measurement unit components.

2. Major challenges of monolithic integration What are the major challenges for achieving monolithic integration of MEMS sensors with CMOS? The first and probably the main challenge is how to decrease the size (area) of the sensors shared with CMOS at the surface of the die. There are several obvious reasons for that. Multiple sensors require overall size reduction. Integration with IC and wireless requires smaller sensor size. Lower cost requires smaller size. But smaller sensors size typically infers lower sensor sensitivity. For a given application the required sensitivity is determined and therefore, the size of the sensor for a given technology is also determined. If sensor sensitivity can be increased with a new technology, then the size of the sensor can be decreased while still providing the required sensitivity. The second challenge is different sensors process compatibility, meaning how to develop such fabrication process, which would allow fabrication of different multi-axis sensors at the same time. The third major challenge is the selection of such additional materials and processes required for fabrication of different sensors that are CMOS process compatible, which would manifest MEMS CMOS monolithic integration. Siantis successfully met all three major challenges of CMOS and sensors monolithic integration by: 1. Decreasing sensors size and providing their future scalability by increased sensitivity. 2. Providing unified sensing and processing components platform and novel microstructures. 3. Developing unified fabrication process for different sensors. 4. Using monocrystalline silicon as both a mechanical material for microstructures and a substrate for electronic components and also developing a two-stage process (CMOS first, MEMS second) allowing monolithic integration of CMOS with different sensors.

CHALLENGES OF COMPLETE CMOS/MEMS SYSTEMS INTEGRATION

21

Foundation of Siantis’ Technology for Sensitivity and Functionality Increase/ Size and Cost Decrease comprises: 1. Big mechanical input element relative to small sensor size – Novel Microstructures. 2. Multiple sensitive components within multiple suspensions and Simple Microstructure for multi-axis measurements. 3. CMOS transistors as both sensitive and processing components – Unified Component Platform. 4. Collecting more energy induced by measurand – Sensitive Integrated Circuits.

3. Novel microstructures On the example of mechanical sensors, such as accelerometers and gyros, let us look at the important criteria for their mechanical microstructures for the purpose of increasing their sensitivity and scaling size down. Table 1 summarizes these requirements. TABLE 1. Requirements for mechanical sensors microstructure.

Bigger proof mass High sensitivity High resolution Small mechanical noise Better mass reproducibility Stronger suspension Sensor size scaling

Stronger silicon suspension High reliability High shock protection No stiction Wide frequency bandwidth High long-term stability High yield

Simple mechan. structure High reliability Better stability Sensor size scaling

There are many limiting factors for scaling down mechanical sensors. Physical principle, fabrication technology, microstructure and noise are among them. For example, all existing capacitive MEMS sensors have serious challenges in their ability to be significantly scaled down. Any multi-axis sensor cannot be smaller than its several sensitive components. All sensitive components of capacitive sensors are capacitors and they all are located at the surface of the sensor due to “surface micromachining”. These capacitors and the relative change of the capacitance are practically reached the physical limit. Capacitance value could be in the range of several fF and the measured change of capacitance corresponds to a measured charge smaller than the charge of one electron (by statistical measurements) [2]. Small capacitance and its change, on one end, and charge of electron, on the other end, make it very challenging to provide a wide dynamic range of the sensors in concert with scaling them down. If the goal is decreasing of the area occupied by the sensor microstructure at the surface of the die, then the only way to increase the capacitance and its relative change is to increase the thickness of the surface micro-machined layer keeping the length and the width of the fingers in the comb structures and the width of the gaps between the fingers the same. However due to the limits on the aspect ratio during DRIE it is very challenging to achieve this

22

V. VAGANOV

goal [3]. Increasing the depth of DRIE etching would also require increasing the gaps between the fingers, which would not result in increasing the capacitance and its relative change, as capacitance would increase proportionally to the depth and inversely proportionally to the gap width. In reality it would result in increasing the area of microstructure at the surface of the silicon die. Therefore, it seams that MEMS surface micro-machined capacitors cannot be significantly scaled down in size, as well as capacitive MEMS sensors. The second serious challenge of scaling capacitive sensors is that it is not easy to make a big proof mass due to the nature of surface micromachining. The device layer is thin and the mass of the device micro-structure is determined by the area occupied by the microstructure at the surface of the die, which one wants to scale down. Of course, some new technological opportunities like SiGe films, which can be deposited at low temperature on the top of already fabricated CMOS circuit and which can be used as a structural material of the capacitive micro-structures, could make for some time less critical the issue of scaling down the size of capacitive sensors, while the other issues including complexity of the structure, small mass and the economy of this integration will still remain [4]. Figure 3 illustrates the relative size and mass of the proof mass of the current capacitive sensors compared to Siantis’ sensors.

Figure 3. Size and proof mass of the current capacitive sensors compared to Siantis’ sensors.

CHALLENGES OF COMPLETE CMOS/MEMS SYSTEMS INTEGRATION

23

(a)

(b)

(c) Figure 4. (a) First generation of Siantis 3-axis accelerometer; (b) micro-photograph of the mechanical microstructure elements; (c) second generation of 3-axis accelerometer.

24

V. VAGANOV

If capacitive sensor occupies 1 mm2 area and the device layer is 2 μm thick, then the proof mass would be about 1 µg. First generation Siantis’ sensors occupy 0.1 mm2 and the proof mass is 54 µg. The second generation Siantis’ sensors occupy 0.01 mm2 and have the proof mass of 100–400 µg. The result is that Siantis’ sensors are more than 100 times smaller at the surface of the die shared with CMOS and at the same time have proof mass more than 100 times bigger. Figure 4a illustrates the first generation of Siantis 3-axis accelerometer [5]. The microphotographs of the die, mechanical microstructure of the proof mass and one of the beams are shown from the back side in Figure 4b. Figure 4c illustrates the second generation of 3-axis accelerometer, where microstructure of the sensor occupies a small area at the surface of the die shared with CMOS and the big proof mass providing large sensitivity is located within the thickness of the wafer [6].

4. Simple microstructurs for multi-axis measurements General principle, which Siantis uses for multi-axis measurements, is that the large proof mass is formed within thickness of the silicon wafer rather then by depositing structural layers on the surface of the wafer. The proof mass is connected by multiple suspensions to the frame of the die and multiple sensitive elements are incorporated within those suspensions, as schematically shown in Figure 5.

Figure 5. Generalized principle of multi-axis measurements.

The proof mass might move in different directions relative to the frame depending on the vector of the mechanical parameter to be measured. As the mass is not directly connected to the sensitive components, it might have no restrictions on arbitrary motion in any direction. The combination and the value of the output signals from different sensitive components, as a result of mechanical stress in the location of these components within suspensions, allow determining the value of the measurand vector. In case of capacitive sensors the sensitive elements

CHALLENGES OF COMPLETE CMOS/MEMS SYSTEMS INTEGRATION

25

(capacitors) at least partially are connected to the proof mass and move with the mass relative to the frame, which is mechanically connected to the other plates of the sensitive capacitors. Clearly it limits the freedom of proof mass movements and therefore the flexibility of designs, makes the mechanical microstructure very complex compared to Siantis approach and it makes a development of such sensors, as 6-axis sensors, very challenging, if not practically impossible. Siantis’ approach can be applied to different types of multi-axis sensors. If the proof mass is a structure exhibiting linear motion then the sensor can be a linear accelerometer, or inclinometer, or vibrometer. If the proof mass is a structure exhibiting angular motion then the sensor can be an angular accelerometer. If the proof mass is subjected to forced oscillations then the sensor can be an angular rate sensor (gyro). If the proof mass is an oscillating structure capable of an additional linear motion under acceleration then the sensor can be a 6-axis motion sensor. If instead of the proof mass an external force is used to load the microstructure then the sensor can be a three-axis force sensor. This patented technology for force sensors is being commercialized now for high volume application [7, 8]. Similar principle can be also applied to a magnetic field sensor. This unified approach builds the foundation for monolithic integration of different multi-axis sensors within one fabrication process.

5. Unified component platform It is well known that transistors both bipolar and CMOS can be used as mechanical stress sensitive components. It was also demonstrated that piezo-transistors can be fabricated within MEMS sensors, as was described above. Therefore, there are no limits for transistors to being used as both sensitive components and as signal processing components creating a unified component platform. This creates not only the convenience of components and processes standardization but also a basis for unified scaling of total micro-system, as the size of CMOS transistor scales down. As piezo-transistor area can be more than 1,000 times smaller than typical piezoresistor area, it immediately opens an opportunity to scale down the size of the sensor mechanical microstructure and springs, beams and other types of suspensions in particular. Figure 6 illustrates how the size of the beam connected to the frame in piezoresistive sensors can be decreased by switching to piezotransistors, as stress sensitive components. In typical layout of the piezoresistors, shown in Figure 6a, for a half-bridge circuit one of the p-type resistors should be longitudinal and another is transversal. It determines the minimal width of the beam for a chosen size of resistor. When piezo-transistors are used instead of piezoresistors, it allows decreasing the width of the beam, as multiple transistors would require much smaller area (Figure 6b). If requirements for the allowed deflection of the beam remain the same, then the length of the beam can also be decreased.

26

V. VAGANOV

(a)

(b)

Figure 6. Comparative geometries of the beams for piezoresistors (a) and piezo-transistors (b), as sensitive components.

Multiple sensitive components located in one area of the beam also allow measuring different stresses at this location: tensile, compressive, shear in different directions, which gives an additional advantage in measuring very complex mechanical motion of the proof mass relative to the frame of the sensor. It is important for the multi-axis measurements like 6-axis measurements.

6. Sensitive integrated circuits The general principle of sensitive integrated circuits technology is to combine large number of piezo-sensitive components for the purpose of increasing sensor sensitivity. In this case piezo-transistors are used not as active amplifying components but rather as three-port-pole components, which allows to combine more than four, like within Wheatstone bridge, components and by these means increase the signal-to-noise ratio. Without diving into the depth of this pending patenting technology let us illustrate this principle on the example of one specific sensitive integrated circuit based on bipolar piezo-transistors and piezoresistors shown in Figure 7 [9]. As can be seen from the circuit, only two three-port-pole sensitive components bipolar transistors allowed combining 10 piezo-sensitive components: two transistors and eight piezoresistors. While four piezoresistors, with about 1% relative resistance change in the working range, give output signal of about 1% of voltage supply, ten piezosensitive components of the above circuit gave 8.4% of voltage supply. Fabricated circuit pressure sensor for 40 KPa pressure range and 5 V voltage supply provided sensitivity 10.5 mV/KPa.

CHALLENGES OF COMPLETE CMOS/MEMS SYSTEMS INTEGRATION

27

Figure 7. Example of sensitive integrated circuit based on two bipolar piezo-transistors and eight piezoresistors.

Sensitive integrated circuits open the way of achieving dynamic range of these sensors about or greater than 106 with significant scaling sensor size down. One can imagine the unlimited hidden opportunities of this technology applied to CMOS circuitry. Differentiation of Siantis’ technology can be summarized as follows: Integration of CMOS with different sensors Smallest sensor area size shared with CMOS CMOS piezo-transistors as sensor components Circuit sensors Single simple microstructure for multi-axis measurements All the above open an opportunity in decreasing cost per sensor more than 10 times, higher sensitivity more than 100 times and higher reliability, which creates a strong foundation for a long-term roadmap of wide range of multi-sensor microsystems.

7. Economic justification of monolithic integration For the last 17 years the price per sensor axis decreased about 7 times, the same as for sensor size. Similar to IC in general, decrease of the die size is the major source of cost reduction. Today the lowest price for Accelerometers is about $0.4/axis and $1.5–2.5/axis for Gyro. Future individual sensor cost is predictable for currently employed technology and provides basis for sensors monolithic integration commercial rationale. As Sensor price decrease is exponential, it has become asymptotic – paradigm shift is required. Figure 8 illustrates some historical sensor die size decrease data. For the last 17 years the size of a sensor die has only decreased at the rate of 2X every 6.3 years (compared with CMOS rate of 2X every 1.5 years per Moore’s Law). Current average die size is around 1.3 mm2/axis for accelerometers

28

V. VAGANOV

and 10 mm2/axis for gyro. Best results, to our knowledge, are 0.8 mm2/axis for accelerometers (Hitachi) and 5 mm2/axis for gyro (Invensense). Future individual sensor die size (cost) is therefore predictable for currently employed technology. There are no reasons to believe that this rate will significantly change for the current technology – novel technology is required to improve this trend. For the same 17 years the size of a sensor microstructure was decreasing with the rate of 2X in every 17 years for accelerometers and 13 years for gyros. The size of the die was decreasing faster (2X/6.3 years) due to faster decreasing surrounding signal processing electronic circuits (ADI). Today micro-structure size is about 0.3–0.5 mm2/axis for accelerometers and about 3.5–5 mm2/axis for gyros. Future microstructure size (cost) is therefore predictable for currently employed technology. Siantis’ novel technology changes this paradigm.

Figure 8. Historical sensor die and sensor microstructure size decrease.

Estimating the IMU sensors cost for integration one can conclude that for a number of years ahead: expected price for 3-axis accelerometer will be in the range of $1–1.5; for 3-axis gyro – $3–4; for altimeter – $0.3–0.5; total cost (price) for a set of stand alone sensors will be therefore about $4–6. These prices ($1–1.5), ($3–4) and ($4–6) serve as benchmarks that determine the upper limits of the corresponding monolithic integration costs.

CHALLENGES OF COMPLETE CMOS/MEMS SYSTEMS INTEGRATION

29

The logistics of monolithic integration of sensors with CMOS might be describes as: 1. Monolithic Integration of CMOS with Sensors involves the following major additional expenses: cost of SOI initial material (~$800/wafer), cost of cap wafers (~$100/wafer), cost of MEMS processing (~$500/wafer). Total cost of monolithic integration ~$1,500/wafer. 2. Acceptance of this additional expense per wafer depends on the number of die per wafer. In turn, this depends on the die size, where these sensors are to be integrated. 3. Both sensor and CMOS costs reduce in concert with the die size reductions – effect on cost reduction is multiplied, as both are integrated on the same die. Large proof mass allows for stronger suspensions, which provides better reproducibility of sensor micro-structure geometry formed on SOI wafers. As a result, the yield loss related to fabrication of mechanical microstructures of sensors can be up to order of magnitude smaller than yield loss related to CMOS process. On the chart in Figure 9 the maximum allowable cost of monolithic integration per die, as a function of the die size is presented.

Figure 9. Maximum allowable cost of monolithic integration per die.

As can be seen from the chart, Siantis technology provides reduced cost even with large die sizes. Cost reduction improves dramatically with die size reduction and this is already part of CMOS roadmap. The size of the CMOS die, where monolithic integration can be justified today, should be smaller than about 7 × 7 mm for integration only with 3-axis accelerometer, smaller than 12 × 12 mm for integration only with 3-axis gyro and smaller than 15 × 15 mm for integration with 6-axis sensors. While the cost of

30

V. VAGANOV

monolithic integration (SOI wafers, MEMS processing, etc.) will be decreasing, the size of the CMOS dice, with which integration is needed, will also be decreasing along with the decreasing of the node size of CMOS. It will result in compounded savings on monolithically integrated products. One can make corrections to the above estimates of justified die size for monolithic integration by safeguarding the forecast of the corresponding stand alone sensors prices and cost of integration.

8. Conclusion Monolithic integration of CMOS with multiple sensors is inevitable. It provides clear path to lower cost and improved technical performance. However, current sensor technologies cannot support the required price point or process compatibility for monolithic CMOS integration. Siantis’ novel technology changes this paradigm by making monolithic integration of multiple different sensors with CMOS possible. Manufacturing costs are already lower than alternative schemes and there is a logical path to significantly reducing these costs further. These future cost reductions are realized in parallel with and due to decreasing size of CMOS transistors and provide a multiplication effect on the overall cost reduction achieved – far beyond what can be met by alternative approaches. Acknowledgments I would like to express my gratitude to Dr. Nickolai Belov, my colleague, partner and friend for many years who contributed to the development of Siantis’ technology and to some materials published in this paper.

References 1. 2. 3. 4. 5. 6. 7. 8. 9.

Kensall D. Wise, A revolution in information gathering, SmallTtimes, Nov/Dec, 2007. John Geen, David Krakauer, New iMEMS Angular-Rate-Sensing Gyroscope, Analog Dialogue 37-03 (2003). Michel Puech, Enabling DRIE processes for high potential MEMS products, Alcatel presentation, Santa Clara, Oct. 12, 2006. Roger T. Howe, Tsu-Jae King, Low-Temperature LPCVD MEMS Technologies, Mat. Res. Soc. Symp. Proc. Vol. 729, 2002. US Pat. 7367232, System and method for a three-axis MEMS accelerometer, (V.Vaganov, N. Belov), 2008. US Pat 7318349, Tree-axis integrated MEMS accelerometer, (V. Vaganov, N. Belov), 2008. US Pat 7476952, Semiconductor input control device, (V. Vaganov, N. Belov), 2009. US Pat 7554167, Three-dimensional analog input control device, (V. Vaganov), 2009. V.V.Beklemishev, V.I.Vaganov, V.V.Vorobjeva, IC pressure sensor based on piezoresistive circuits with bipolar piezotransistors and piezoresistors, Electronnaya Technika, 1980, series 10, #4, 78–85 (in Russian).

MEMS FOR PRACTICAL APPLICATIONS

MASAYOSHI ESASHI* Tohoku University WPI-AIMR, 6-6-01 Aza-Aoba Aramaki Aoba-ku Sendai, 980-8579, Japan

Abstract Silicon MEMS as electrostatically levitated rotational gyroscopes and 2D optical scanners, and wafer level packaged devices as integrated capacitive pressure sensors and MEMS switches are described. MEMS which use non-silicon materials as LTCC with electrical feedthrough, SiC and LiNbO3 for probe cards for wafer-level burn-in test, molds for glass press molding and SAW wireless passive sensors respectively are also described.

Keywords: MEMS, microphone, packaging, gyroscope, optical scanner, integrated sensor, pressure sensor, switch, probe card, LTCC, SiC, SAW (Surface Acoustic Wave), LiNbO3, transponder.

1. Introduction Micromachining is an extended IC fabrication technology based on deep etching, anodic bonding and other advanced process technologies. This is used to produce value added MEMS (Micro Electro Mechanical Systems) which have multifunctions in it. Examples of application oriented MEMS developed by open collaboration with industry are described below.

2. Silicon MEMS 2.1. MEMS MICROPHONE Capacitive MEMS microphone developed in NHK Science & Technology Research Laboratories [http://www.nhk.or.jp/strl/english/index.html] is shown in Figure 1 [1]. The displacement of the diaphragm by the sound pressure is capacitively detected. The MEMS microphone has been used for TV programs.

______ * Masayoshi Esashi, Fax +81-22-795-6935, E-mail: [email protected]

E. Gusev et al. (eds.), Advanced Materials and Technologies for Micro/Nano-Devices, Sensors and Actuators, DOI 10.1007/978-90-481-3807-4_3, © Springer Science + Business Media B.V. 2010

31

32

M. ESASHI

Figure 1. Capacitive MEMS microphone.

2.2. ELECTROSTATICALLY LEVITATED ROTATIONAL GYROSCOPE Silicon rotational gyroscopes have been developed for the purpose of motion control and navigation [2]. The principle and the photograph are shown in Figure 2. A 1.5 mm diameter silicon ring which is electrostatically levitated by a digital control using a capacitive position sensing and an electrostatic actuation is rotated at 74,000 rpm. The rotation is based on the principle of a variable capacitance motor. A 5 μm radial gap between the ring rotor and stator electrodes is formed using deep RIE (Reactive Ion Etching) of a silicon wafer. The silicon is anodically bonded on both sides to glasses which have electrodes. The chip is packaged in a vacuum cavity to prevent a viscous damping. This inertia measurement system (Tokyo Keiki Inc. [http://www.tokyo-keiki.co.jp/e/index.html] MESAG (Micro Electrostatically Suspended Accelerometer Gyro)) can measure two axes rotation and three axes acceleration simultaneously with high precision (sensitivity 0.01°/s and 0.2 mG respectively).

Figure 2. Electrostatically levitated rotational gyroscope.

2.3. TWO DIMENSIONAL OPTICAL SCANNER Electromagnetic 2D (two dimensional) optical scanners as shown in Figure 3 were developed [3]. A mirror is deflected electromagnetically using planer coils on a silicon gimbal structure and external permanent magnets. The scanner (Nippon

MEMS FOR PRACTICAL APPLICATIONS

33

Signal Co. Ltd.[http://www.signal.co.jp/english/], ECO Scan) has been applied to a 3D imaging system by measuring the distance to the object using a time-of-flight of a laser light as shown in Figure 3.

Figure 3. 2D optical scanner and its application to a time-of-flight 3D imaging system.

3. Wafer level packaging Packaged chip-size MEMS are fabricated by the anodic bonding of a silicon wafer and a glass wafer and by dicing the bonded wafer to chips. This process called wafer level packaging is effective for surface mounting and a small volume production because it makes batch assembly of small sized devices possible and hence automated machines to assemble each chip can be eliminated [4]. The method has advantages of reduced test cost and high reliability. Electrical feedthrough from the glass hole plays important roles for the wafer level packaging. 3.1. CAPACITIVE PRESSURE SENSORS The fabrication process of an integrated capacitive pressure sensor [5] is shown in Figure 4. The silicon is used not only for a capacitive diaphragm pressure sensor and a CMOS capacitance detection circuit, but also a package. The integrated capacitive pressure sensor has been produced in JTECT Corp. [https: //www.hmisource.com/otasuke/files/manual/gpproex/v2_21/device/toy.htm] and used for low pressure measurement. Using the wafer level packaging a capacitive vacuum sensor which has a thin diaphragm and a reference vacuum cavity incorporating a getter in it has been produced by Canon Anelva Corp. [http://www.canon-anelva.co.jp/english/index.html] (Figure 5) [6]. The getter is needed to absorb an oxygen gas generated electrochemically at the glass–silicon interface during the anodic bonding process.

34

M. ESASHI

Figure 4. Fabrication process of an integrated capacitive pressure sensor.

Figure 5. Capacitive vacuum sensor.

3.2. MEMS SWITCH MEMS switch which uses a thermal bimetal actuator for making electrical contacts was developed [7] (Figure 6). The electrical connections are made to the backside using the electrical feedthrough in a glass. The wafer level packaging

MEMS FOR PRACTICAL APPLICATIONS

35

results in not only low cost fabrication but also excellent reliability because the contact surface is kept contamination-free owing to the hermetic sealing. Operations more than 107 cycles and a high frequency response up to 20 GHz were achieved. This switch has been produced and used for latest high speed LSI testers by Advantest Corp.[http://www.advantest.com/].

Figure 6. MEMS switch.

4. MEMS with non-silicon materials 4.1. PROVE CARD FOR WAFER-LEVEL BURN-IN TEST (LOW THERMAL EXPANSION COEFFICIENT LTCC) Electrical feedthroughs made in LTCC (Low Temperature Co-fired Ceramics) was developed in Nikko Inc.[http://www.nikko-company.co.jp/] [8]. As shown in Figure 7, the through holes are made by puncturing the soft green sheet and the holes are filled with a gold paste. The sheet is sintered to make a ceramic, in which process the lateral dimension can be controlled by sintering under pressure. This LTCC wafer can be anodically bonded to a silicon wafer to be used for the wafer level packaging. A multilayered ceramic wafer is fabricated by laminating the green sheets before sintering. The photograph of the cross section of the laminated LTCC with feedthrough is shown in Figure 5. The thermal expansion of the LTCC is matched with silicon. The LTCC with feedthrough was applied to MEMS probe cards [9]. The fabrication process and a photograph are shown in Figure 8. Nickel probes are made by electroplating nickel into a silicon mold and then soldered to the LTCC wafer with AuSn. Finally the silicon mold is etched out. The probe card has similar thermal expansion with silicon, which makes for wafer level burn-in test (reliability test at an elevated temperature on a wafer) possible.

36

M. ESASHI

Figure 7. Fabrication process and cross-section of LTCC with the electrical feedthrough.

Figure 8. Fabrication process and a photograph of probe card for a wafer-level burn-in test.

4.2. SiC MICROSTRUCTURE FOR GLASS PRESS MOLDING (SiC) SiC (silicon carbide) microstructure can be used as a mold to form glass parts by pressing. This takes advantages of the hardness of the SiC at high temperature. The fabrication process is shown in Figure 9a [10]. The SiC was deposited on a

MEMS FOR PRACTICAL APPLICATIONS

37

micromachined silicon wafer by CVD. The SiC surface is ground and bonded to a SiC ceramic plate by a reaction bonding using an interfacial nickel film. Finally the silicon wafer is etched away. The micromachined silicon wafer which has a surface profile for non-spherical lens was made by transferring the resist profile using the RIE. The resist profile was made by a mask less multiple exposure system using the DMD (Digital Micro mirror Device) [11]. The photographs of the SiC mold for a lens and the Pyrex glass press formed are shown in Figure 9b, c respectively.

(a) Fabrication process

(b) SiC mold

(c) Pyrex glass fabricated by mold press

Figure 9. SiC microstructure for glass press molding.

38

M. ESASHI

(a) Principle

(b) Structure

(c) Experimental results Figure 10. SAW passive wireless sensor for pressure measurement.

MEMS FOR PRACTICAL APPLICATIONS

39

Figure 11. Fabrication process of the SAW passive wireless pressure sensor and the photograph of the cross section.

4.3. SAW PASSIVE WIRELESS SENSOR (LiNbO3) 2.45 GHz SAW (Surface Acoustic Wave) based passive transponders for wireless sensing have been developed. The principle and the photograph are shown in Figure 10a. Receiving the 2.45 GHz electromagnetic wave, a surface acoustic wave generated by the IDE (Inter Digital Transducer) on a LiNbO3 substrate propagates.

40

M. ESASHI

It is reflected and a 2.45 GHz electromagnetic wave is transmitted back and the sensing can be performed by measuring the delay time. The structure and the experimental result of the pressure sensor are shown in Figure 10b, c. The delay time is modulated by the deformation of the diaphragm by the pressure. Temperature can be also measured from the temperature dependency of the delay time and multiple reflectors are formed for the temperature compensation in the pressure measurement. The SAW pressure sensor was developed for the TPMS (Tire Pressure Measurement System) [12]. The fabrication process of the TPMS is shown in Figure 11. A thermal inversion of polarization and a polarization dependent selective etching of LiNbO3 are used for the fabrication [13].

5. Conclusions MEMS play important roles as key devices in various systems. Packaging and electrical interconnection are needed for small sized and high reliability MEMS. Not only silicon but also other materials such as LTCC, silicon carbide and LiNbO3 could be used effectively for MEMS.

References 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. 12. 13.

T.Tajima. et. al.: Microelectronic Engineering, 67–68, 508–519 (2003) T.Murakoshi et. al.: Jpn. J. Appl. Phys. 42, 2468–2472 (2003). N.Asada. et.al.: IEEE Trans. on Magnetics 30, 4647–4649 (1994). M.Esashi.: Microsystem Technologies, 1, 2–9 (1994). Y.Matsumoto and M.Esashi: Electronics and Communications in Japan, 76, 93–106 (1992). H.Miyashita and Y.Kitamura: Anelva Technical Report, 11, 37–40. (2005) (in Japanese). A.Nakamura et. al.: Advantest Technical Report,.22, 9–18 (2004) (in Japanese). M.Mohri.et.al.: 23th Convention of Japan Inst. of Electronic Packaging, 51–52 (2009). (in Japanese). S.-H.Choe.et. al.: IEEE International Test Conference 2007, 20.2, (2007). K.O.Min et. al.: Proc. of the 21th Sensor Symposium, 473–478 (2004). K.Totsu.and M.Esashi.: J. Vac.Sci.Technol., B23, 1487–1490 (2005). S.Hashimoto et. al.: Proceedings of the 24th Sensor Symposium, 267–271 (2007). A.B.Randles et. al.: Proc. 2008 IEEE International Ultrasonic Symposium, 1124–1127 (2008).

NANOCHIP: A MEMS-BASED ULTRA-HIGH DATA DENSITY MEMORY DEVICE

1

1

1

NICKOLAI BELOV , DONALD ADAMS , PETER ASCANIO , TSUNG-KUAN CHOU 2 , JOHN HECK2 , BYONG KIM 1 , GORDON KNIGHT 1, QING MA2 , JONG-SEUNG PARK1 , VALLURI RAO2 , ROBERT STARK1 , AND GHASSAN TCHELEPI 1

1 Nanochip, Inc., 48041 Fremont Blvd., Fremont, CA, 94538, USA, E-mail: [email protected] 2 Intel Corporation, 2200 Mission Blvd., Santa Clara, CA, 95054, USA, E-mail: [email protected]

Abstract The paper provides an overview of a probe storage device development. The main results are related to successful development of ferroelectric memory, MEMS micro-mover with large range of motion and an array of cantilevers with sharp tips (read–write heads), demonstrating wear resistance of the tips, integration of memory material into the MEMS process, integration of MEMS cantilever process with CMOS, development of analog front end electronics, including read channel and servo system, and a controller for a storage device.

Keywords: Probe storage, non-volatile memory, ferroelectric memory, scanning probe charge reading, MEMS, CMOS-MEMS integration, micro-mover.

1. Introduction Although development of a probe storage device is linked to a wide spectrum of technical tasks, which should be solved in order to demonstrate viability of the technology, the main development areas are: • • •

Memory material and read–write methods MEMS, including X–Y micro-mover and large array of read–write heads Electronics and system engineering Requirements for the probe storage devices include: (a) memory solution suitable for storing small bits (20–30 nm) with acceptable retention, providing at least 16–32 GB capacity and offering a clear roadmap for at least next three generations; (b) robust read–write method making feasible data transfer rate of at least 20 MB/s with a reasonably small number of read–write channels; (c) MEMS-based X–Y scanner suitable for high-volume manufacturing and featuring a large range of motion, accurate position sensing and good shock protection; (d) large arrays E. Gusev et al. (eds.), Advanced Materials and Technologies for Micro/Nano-Devices, Sensors and Actuators, DOI 10.1007/978-90-481-3807-4_4, © Springer Science + Business Media B.V. 2010

41

42

N. BELOV ET AL.

of AFM-type sharp tips (10–50 nm) working as read–write heads and having built-in actuation to allow engagement of selected heads with memory material; (e) production-friendly and cost-effective integration of memory material, MEMS and electronics in one device, including wafer-level or die-level assembly process that combines components fabricated on different substrates; (f) tribology solution providing required longevity to the read–write heads; (g) system solution for electronics, including read–write channel, data management electronics, servo system for X–Y scanner and standard interface; and (h) processing digital data stream under conditions typical for target applications. Meeting all performance, cost, and reliability requirements, which would allow for successful competition with existing storage devices, represents another layer of work related to product development and commercialization of the technology. Design and fabrication of prototypes of probe storage devices and/or components for them was addressed previously by several companies. There are more than 100 papers and patents on development of a probe storage device called Millipede at IBM [1–2]. The team at IBM achieved excellent results and demonstrated a prototype of probe storage device meeting many of the above requirements. Millipede utilizes a polymer-based storage medium. Writing bits is done by making indentations in the polymer by thermally-actuated cantilevers with sharp tips. Reading is based on thermal sensing, which allows for distinguishing the cases of tip facing a surface of polymer with and without indentation. Slow writing, high power consumption, high temperature sensitivity and difficulties with erasing/overwriting the data are the major drawbacks of this approach. Several other companies including Hewlett–Packard, Seagate, Samsung, Intel, ST Microelectronics and Hitachi filed multiple patent applications [3–8] related to both components of probe storage devices – memory, X–Y micro-movers, probes and methods of writing and reading the data. No publications on prototypes of the probe storage devices fabricated by these companies are available. Nanochip has developed a prototype of probe storage device (nanochip) utilizing ferroelectric memory.

2. Memory material and read–write–erase operations Nanochip uses a ferroelectric non-volatile memory for probe storage application. The ferroelectric memory material permits robust write (electric field switching), non-destructive read (charge detection) and simple overwriting (non-return-to zero process) of data bits with adequately long retention (>1 year), many R/W cycling (>200k), and good tip/media wear (~5 km at speed of 1 cm/s) performance. Ferroelectric recording medium uses a layer of ferroelectric material placed between two electrodes. An electric field created between the electrodes forces the domain polarization to be parallel to the applied field. For probe storage application, a conductive tip is a top electrode, while a conductive layer under the ferroelectric medium serves as a bottom electrode. A voltage applied between the tip and the bottom electrode creates a local electric field across the medium and allows for switching a domain polarization in a ferroelectric material to an UP or DOWN state and this can be equivalent to digital information of 1 or 0.

A MEMS-BASED ULTRA-HIGH DATA DENSITY MEMORY DEVICE

43

A triple stack of epitaxial perovskite oxide layers (PZT/SRO/STO) grown on Si wafers was used as a memory (memory stack). PZT is the ferroelectric recording media. SRO serves as the bottom electrode. STO is a dielectric film serving as the buffer layer formed on the Si wafer that facilitates the single crystalline growth of SRO and PZT. Thickness of the layers is in a range of 20–100 nm. The stack is deposited using a combination of thin film growth techniques: metal-organic chemical vapor deposition, sputtering, and molecular beam epitaxy. The PZT is atomically smooth with the surface RMS roughness between 0.2 and 0.7 nm (as measured by atomic force microscopy). X-ray diffraction analysis shows that the PZT is formed of tetragonal perovskite lattice structure comprising 180° polarization domain. The background polarization of a freshly as-grown PZT is poled naturally to an UP state (as characterized by piezoresponse force microscopy (PFM) [9]). 2.1. WRITE OPERATION Writing of ferroelectric domains of alternating polarity in a PZT media using a train of voltage pulses applied to a probe tip was used for characterization of write operation capabilities. The tip moves in contact with the media surface at the velocity synchronized with the pulse train frequency to write an array of alternating polarization domains (bits) of desired pattern wavelength. Well-defined and uniform bits array can be readily written in this way. The array of bits as small as 19 nm in diameter and spaced by 19 nm have been written [10] with probe tip scanning at the high speeds of 0.1–1cm/s and biased with nanoseconds to microseconds range voltage pulses. Such scanning speed writing process translates to the recording data rates in a range of 0.1–1 Mbps per tip. In Figure 1, overwriting capability in ferroelectric probe storage is demonstrated for the first time using a probe tip scanning with a relatively high speed (~1 mm/s in the x-axis direction in Figure 1) and biased with a bipolar non-return-to-zero voltage write process. Typical track width (i.e., vertical dimension of the bits in Figure 1) is ~40 nm. The write process shows writing first pattern (a), adding two additional writes of small bits offset from old tracks (b), erasing media (c), and writing small dots after erase (d). PFM was used to read out the bits images in Figure 1 which measures a 4 × 4 μm scan area individually. 2.2. READ OPERATION Nanochip developed a scanning probe charge reading technique (SPCRT) to provide a high speed bit reading method compatible with MEMS and CMOS device integration. In SPCRT [11], a conductive probe tip connected with a charge-amplifier circuitry is used to detect a polarization bit signal like the bit signal trace demonstrated in Figure 2a. The charge-amp coupled tip scans the surface of PZT written with the bit array with high speeds (0.1–1 cm/s) and detects the bit signal with the data rate in a range of a 1 k–1 Mbps per tip. The bit signal trace of Figure 2a corresponds to three wavelength alternating polarization domains; 6 cycles of 0.9 μm wavelength bits, 9 cycles of 0.6 μm wavelength bits,

44

N. BELOV ET AL.

and 12 cycles of 0.4 μm wavelength bits formed by applying a bipolar non-returnto-zero voltage pulse train. Figure 2b is an amplitude signal trace of the same three wavelength bits readout using PFM. Both SPCRT and PFM techniques resolve all of the three wavelength bits well. The SPCRT have shown to read the individual bits for numerous cycles (>100k times). It is noted that a variant version of SPCRT called “M-SPCRT” that takes advantage of a lock-in technique has also been developed to read ferroelectric bit charge signals on PZT with nanoscale spatial resolution [10].

Figure 1. PFM images of bits at various “writing” stages.

Figure 2. Signal trace of three wavelength bits: (a) SPCRT and (b) PFM.

A MEMS-BASED ULTRA-HIGH DATA DENSITY MEMORY DEVICE

45

2.3. RETENTION AND ENDURANCE CYCLING Figure 3a shows small inverted dots (diameter 28 nm on average) imaged by PFM within an hour after they are first written. The dots are shown with brighter contrast. A train of 150 ns voltage pulsing to the tip sliding with the speed of 1.3 mm/s was used to write the dots array with the writing data rate ~41 kbps. Figure 3b shows the PFM image of the dots 68 h after Figure 3a was taken. The time comparison of the dots show good retention under the room ambient condition over a period of few days tracked. A temperature accelerated retention test on similar type of dots confirmed that the small dots can stay with over a year of retention. It is our general learning that small inverted UP-polarization dots when formed over a DOWN polarization background can remain with retention much better than inverted dots formed over an UP-polarization background. Cycling of writing, easing, overwriting, and reading per same bit spot has been tested. Figure 4 is a plot of bit polarity readout by PFM as a function of number of writing/erasing/overwriting cycles completed before reading bits. Solid-triangle or solid-circle respectively refers to PFM phase signal of an UP or DOWN bit after cycling. It is shown that the bits can be rewritable with better than 200k endurance

(a) ~28 nm bits at t = 0 h after writing.

(b) ~28 nm bits at t = 68 h.

Figure 3. PFM reading of bits at different times in room ambient condition.

Figure 4. Cycling test of writing, easing, overwriting, and reading by PFM.

46

N. BELOV ET AL.

cycling. The cycling was conducted using 10 μs bipolar voltage pulses with 1 μs delay. It is noted that topography generation during cycling of PZT is a cycling failure mode. Under a controlled condition (in terms of surface and environmental cleanness), topography can be reduced adequately to yield with the 200k cycles. The topography generation is also voltage-dependent and can be significantly reduced with unipolar pulsing (vs. bipolar pulsing). 2.4. WEAR Tip/media wear is an important parameter to be kept under control from the bit capacity and size, and data rate improvement perspectives. In general smaller and higher density bits can be written and read when tips are made shaper and/or media is smoother. Data rate is largely a function of scan speed that a tip slides over the media surface. The contact force should not drift much, especially when the tip moves with high speed to reduce tip/media wear. Once high density and high data rate can be achieved by engineering, tip/media wear needs to be kept to minimum to preserve the high performance R/W. Nanochip found a way to maintain the tip/media wear to functional level even when the tip is traveled over the media for a distance of few kilometers with a 1 cm/s scanning speed. In Figure 5, a tip was able to write a 25 nm dot after scanning in contact with a PZT media for ~5 km with a speed of 1 cm/s. The tip was loaded with the normal force <100 nN. The smallest dot was ~16 nm before the wear test. The radius-of-curvature of the tip before the wear test is ~20 nm, as seen by SEM. The tip is flattened to ~40 nm after the wear test. The following factors are important for good tip wear performance: (a) low friction achieved by loading the tip with as low normal force as usable; (b) smooth media surface such as one achieved with 2-dimenational epitaxy; (c) higher hardness metal-coating on soft stiffness cantilever probe tip; (d) lubricated tip/media interface such as by humidity control; (e) work with a clean surface and environment (via wet and dry treatment).

Figure 5. SEM of tip: (a) before scanning and (b) after ~5 km scanning.

A MEMS-BASED ULTRA-HIGH DATA DENSITY MEMORY DEVICE

47

3. MEMS The probe storage chip developed at Nanochip has three main layers formed by bonding three wafers, as it is schematically shown in Figure 6. The bottom layer (CMOS wafer) has an array of actuated cantilevers with AFM-type tips formed on top of CMOS electronics. The middle layer (Mover wafer) contains an X–Y microscanner or micro-mover. Finally, the top layer (Cap wafer) protects the micromover and provides required mechanical strength to the die. Wafer-level solder bonding provides very strong mechanical connection featuring both liquid-proof sealing and reliable electrical connections between the wafers [12].

Figure 6. Schematic cross-section view of Nanochip memory device. 1 – moveable plate, 2 – media stack, 3 – coil; 4 – position sensors; 5 – array of cantilevers; 6 – suspension; 7 – bond between CMOS and Mover wafer; 8 – bond between Mover and Cap wafers; 9 – inter-wafer electrical connections; 10 – magnets; 11 – bond pads.

3.1. MICRO-MOVER DESIGN AND FABRICATION The micro-mover (see Figures 7 and 8) has a 400 μm thick moveable plate. Area of the plate is chosen to allow for required capacity of the memory device. One side of the plate carries a memory stack 11 for storing data. The other side is occupied by coils 4, which are part of an actuator, and by position sensors 5. Blade-type suspension beams 7 allow for bi-directional (X–Y) in-plane motion of the micromover and constraints its out-of-plane (Z) motion. Suspension also has special “routing” beams 8 carrying conductors for providing electrical connections to both Pads for interwafer electrical connections

Bond ring

Moveable plate

Suspension Figure 7. Micro-mover structure overview from media side.

48

N. BELOV ET AL.

Figure 8. Top view and cross-section of X-Y micro-mover. 1 – moveable plate; 2 – anchors; 3 – frame; 4 – coils; 5 – position sensors; 6 – mass reduction profile; 7 – main suspension beams carrying wires providing connection to bottom electrode of memory stack; 8 – routing suspension beams carrying wires providing connections to coils and position sensors; 9 – joints; 10 – dummy structures; 11 – memory stack.

A MEMS-BASED ULTRA-HIGH DATA DENSITY MEMORY DEVICE

49

coils and position sensors. Although the micro-mover has mass reduction profile 6, the moveable plate is extremely flat because of its thickness. Typical overall bending due to all factors is below 0.25 µm. The micro-mover is actuated by an electromagnetic (EM) actuator. The EM actuator includes four coils 4 positioned on the moveable plate and permanent magnets located in the pockets formed in the Cap wafer – in close proximity to the micro-mover. The permanent magnets create magnetic flux perpendicular to the plate in the areas where the coils are located. Interaction of the flux with electrical current in the coils creates force causing lateral motion of the plate. The EM actuator allows for ±120 μm displacement of the micro-mover along both X and Y axis and requires only 5 V for operation. Position of the plate is determined with help of capacitive position sensors. The position sensors have two sets of electrodes: one set located on the moveable plate and the other set located on the stationary cap. Electrical connections to the electrodes located on the plate are provided through the routing beams 8 and electrical connections to the cap electrodes are formed during solder bonding. Fabrication of the micro-mover requires processing of two wafers – mover wafer and cap wafer. Simplified process flow is schematically shown in Figure 9.

Figure 9. Cap and mover wafers fabrication process flow. Cap wafer: 1 – standoffs; 2 – magnet cavities; 3 – contact to substrate; 4 – bond ring; 5 – bumps for inter-wafer electrical connection; 6 – electrodes of capacitive sensors; 7 – dicing groove. Mover wafer: 8 – recessed coils; 9 – feedthrough lines under the bond ring; 10 – bond ring; 11 – plated wires; 12 – bond pads; 13 – plated standoffs; 14 – electrodes of capacitive sensors; 15 – mass reduction pattern; 16 – routing beams; 17 – main beams.

50

N. BELOV ET AL.

Cap wafer has a standard thickness. Processing of the cap wafer starts with initial oxidation and forming oxide standoffs 1, which precisely define the bond gap between the cap and mover wafers. Magnet cavities 2 (500 µm deep) are etched on the back side using DRIE and the wafer is re-oxidized after that. Areas for providing contact to substrate 3 are open and seed metal is deposited at the next steps. Electroplating is used to form ring pattern 4 for wafer bonding and bumps 5 for inter-wafer electrical connections. Patterning of seed metal defines electrodes 6 of capacitive sensors at the next step. Cap wafer process is concluded by etching of dicing grooves 7, which allows for removing of portions of cap wafer and exposing bond pads formed on mover wafer at the very end of the back-end process. Mover wafer is a 400 µm thick wafer. Using thin wafers allows for reduction of the mass of the moveable plate and corresponding improvement in some important parameters of memory device as seek time and power consumption. The recessed Cu coils 8 and feed-through lines 9 under the future bond ring area are formed at the first steps utilizing processes similar to the processes used for making through wafer interconnects. The wafer is covered by low-temperature oxide and a contact to substrate (not shown in Figure 9) is opened after that. Metallization steps include seed metal layer deposition and electroplating. Bond ring 10, wires 11, bond pads 12 and standoffs 13 are defined by the plating step. Patterning of seed metal defines electrodes 14 of capacitive sensors. Two-step DRIE micromachining of the mover wafer is done at the final steps of the process. A photoresist–oxide mask is used at the first DRIE step that defines mass reduction pattern 15. After that oxide is etched off in the open areas and the second DRIE step pre-etches routing beams 16 and makes the mass reduction pattern deeper. Pre-processed cap and mover wafers are bonded after that. Wafer-level bonding is near hermetic and provides required electrical interconnects between the cap and the mover wafers. Two alloys considered for wafer bonding are AuSn eutectic and CuSn eutectic. The first prototypes have been built with AuSn bonding. However, CuSn bonding process is more perspective as it has lower bonding temperature, allows for better integration with the Cu coil process and does not require use of gold. The bonded stack of cap and mover wafers goes through several additional steps (not shown in Figure 9) after bonding. Contact to the SRO bottom electrode is provided; standoffs, bumps for inter-wafer electrical connections and bond rings for bonding with the CMOS-cantilever wafer are formed on the mover wafer during these additional steps. DRIE release of the moveable plate is done at the next step. Both the 16 main beams 17 and 32 routing beams 16 are formed during this etching step. The main beams are 13.5 µm wide and 300 µm thick. The routing beams are 14 µm wide and 60–80 µm thick. Vertical stiffness of the suspension is more than 300 times larger than the lateral stiffness. As a result, vertical sag of the moveable plate in the gravity field is only 0.25–0.3 μm. Good reproducibility of the suspension beams was achieved due to relatively large width of the beams in the plane of the substrate and excellent verticality of the side walls achieved in DRIE process. Using dummy structures 10 (see Figure 8) allows for equal width of the openings for DRIE and uniform depth of DRIE.

A MEMS-BASED ULTRA-HIGH DATA DENSITY MEMORY DEVICE

51

Main resonance modes of the plate motion are lateral oscillations along X and Y axes. Target resonance frequencies for these modes are close to 130 Hz. Next three modes – vertical oscillations and two rocking modes (X–Z and Y–Z) are overdamped due to a narrow gap between mover wafer and cantilever/cap wafers. The next resonance mode is rotation around vertical axis. Design of the micro-mover provides about 15X separation between the main resonance and this mode. 3.2. DESIGN AND FABRICATION OF ACTUATED CANTILEVERS A two-dimensional array of cantilevers formed on CMOS wafer is located in close proximity to the side of the X–Y micro-scanner carrying the memory stack. Each cantilever carries a sharp tip used as a read–write head. The array of cantilevers (see Figure 10) is fabricated using a low-temperature post-CMOS process utilizing SiGe as a structural material [13]. Cantilevers have a see-saw microstructure with torsional suspension and electrostatic actuation on the wing side opposite to the tip, as schematically shown in Figure 11. Two different designs of cantilevers are presented in Figure 12. Initial bending of cantilevers after release is small and, without actuation, tips do not contact the memory stack. Each cantilever can be actuated in both vertical direction toward the micro-mover and laterally. Vertical actuation brings tips in contact with the memory stack and allows some control of the force applied at the tip-memory interface. Each cantilever also has an electrostatic lateral actuator (nano-mover) for compensation of relative displacement of each tip with respect to the other tips and to the micro-mover due to temperature change. Nanomover allows for about 100 nm lateral motion of the cantilever structure. The cantilever fabrication process follows CMOS process. The finished CMOS wafer is planarized using Chemical-Mechanical Polishing (CMP) of High Density Plasma (HDP) oxide and then covered by a 400 nm thick SiC layer. This insulator is impermeable to HF molecules and is, therefore, used to protect the CMOS circuit during vapor HF etching step – the final step of the process, which is used to remove the sacrificial oxide layer and release the cantilever array. The SiC layer is perforated and the vias filled in with conformal SiGe deposition connecting each cantilever to the top CMOS metal layer underneath. Patterning of the deposited SiGe layer defines electrodes for vertical actuation of cantilevers. A well-controlled deposition of HDP oxide layer is done at the next step. This sacrificial layer defines a 3 μm gap between the body of cantilevers and the actuation electrodes in the final structure. Both shallow trenches (“dimples”) and vias are formed in the sacrificial oxide layer. The dimples create topography on the bottom surface of the cantilever and prevent stiction during release and actuation. The vias are used for anchoring cantilevers to the electrode. After that a 3 μm thick SiGe structural layer is deposited. This deposition is broken into two steps and a 250 nm oxide hard mask (HM) is embedded in the layer. The SiGe layer is used to form cantilever structure. During the structural layer etching steps the oxide HM protects the portion of SiGe layer allowing for the definition of 1 μm thick torsion beams as well as body of cantilevers and the lateral actuators (“nanomover”) – both 3 μm thick. Using CMP steps ensures flatness of the wafer surface after the deposition steps.

52

N. BELOV ET AL.

Figure 10. Overview of a part of cantilever array.

Figure 11. Schematic cross-section of actuated cantilever structure: 1 – oxide; 2 – Top CMOS metal – aluminum; 3 – SiC; 4 – SiGe; 5 – Pt; 6 – Ni; 7 – Au.

4

4

1 3

3

7

6

2

3

5

7

7

1

2

3

5

7

Figure 12. Close-up view of two designs of actuated cantilevers: 1 – body of cantilever; 2 – vertical actuator (wing); 3 – lateral actuator (nano-mover); 4 – tip; 5 – suspension; 6 – suspended portion of the Pt trace (air bridge); 7 – vias to CMOS.

A MEMS-BASED ULTRA-HIGH DATA DENSITY MEMORY DEVICE

53

The sharp tips and traces connecting the tips to the CMOS circuitry are then built up on top of the cantilevers. Oxide trench filling and CMP are used to planarize the wafer. A thick SiC layer is deposited after that to isolate the mechanical cantilever from the traces. The tip is formed out of 1.5 μm thick layer of amorphous Si. Use of an amorphous material allows for minimizing the surface roughness that can be induced during tip formation by the granularity of the layer. Tips are formed by printing dots with diameter of 1.4 μm and applying a sequence of isotropic and anisotropic etch steps. Finally, the tips are coated with the Pt layer, which is used also to form the trace. The coating increases the hardness of the tips minimizing tip wearing. The process allows for sharp tips with a top diameter less then 50 nm after Pt coating. A Ni/Au pattern for bonding the CMOS/cantilever wafer to the micro-mover wafer is formed with help of electroplating at the end of the process. Due to excellent stress control of the structural layers, minimal deflection of the cantilever structures is observed after HF release. Typical initial bending is about 0.5 µm. The tips are connected to the CMOS circuitry with help of Pt traces, which have a suspended portion (air bridge) above the torsional suspension beams. Each cantilever cell has size of about 150 × 150 μm. The fabricated prototypes have about 600 cantilevers on each chip. 3.3. PROCESS INTEGRATION CHALLENGES Although there are several process integration tasks that had to be addressed the two major challenges were related to integration of media stack deposition into the micro-mover fabrication process and integration of MEMS cantilevers with tips and CMOS electronics. In order to obtain memory stack with required properties the deposition has to be done at temperatures as high as 600–800ºC. As the deposition temperature is too high, it can not be done at the end of micro-mover fabrication process. Therefore, the mover wafer process flow was modified to deposit the memory stack on the initial Si wafers and protect it with two layers. The first layer, deposited directly on PZT, is a semiconductor material and the second layer is silicon dioxide. Silicon dioxide film makes the wafer fully compatible with standard fab processes. The semiconductor film preserves the media stack in the micro-mover process including the step of silicon dioxide removal and the film can be completely removed at the end of the process without affecting media stack or any components of the micromover. Low-temperature micro-mover process does not cause inter-diffusion of the semiconductor film material and PZT. Fabrication of MEMS cantilevers with sharp tips on top of CMOS read channel circuitry is necessary to minimize noise associated with parasitic capacitance of conductors connecting tips with the circuitry and achieve high signal-to-noise ratio. There are several challenges in CMOS-MEMS process integration, including: (a) selection of high-quality mechanical material, which can be deposited at CMOScompatible temperatures and used as a structural material and (b) selection a set of processes that can be used for MEMS processing without affecting CMOS circuitry.

54

N. BELOV ET AL.

SiGe is an attractive solution for the structural material because it has good mechanical properties and high-quality films of SiGe can be deposited at 400–450ºC making the deposition process compatible with CMOS electronics. Testing of CMOS circuits after fabrication of MEMS structures shows no degradation of digital circuit parameters. Characterization of analog front end circuits including read channel was not completed by the time the paper was submitted for publication. 3.4. PACKAGING AND TESTING The memory device requires a custom package for both integration of magnetic circuit and providing a required mechanical protection of the die. A 120-pin 20-mm QFP-style package developed for prototyping of the Nanochip memory devices is compliant with JEDEC guidelines. The package has a frame-shaped body molded of a liquid crystal polymer material and two identical lids – a floor and a cover. Being a part of the magnetic circuit, the lids are made from Alloy 42 to provide required magnetic properties and to minimize difference in thermal expansion coefficients with silicon. Overall thickness of the packaged device is below 3.0 mm. Design of the package allows using standard testing equipment in high-volume manufacturing. Volume manufacturing of probe storage devices requires customized solutions for functional testing of both cap-mover and cantilever wafers before bonding.

Figure 13. Natural resonance frequency measured by mechanical–optical method (top two screens) and by electrical actuation of the same micro-mover (two bottom screens).

A MEMS-BASED ULTRA-HIGH DATA DENSITY MEMORY DEVICE

55

Electrical testing of micro-movers is not possible at this stage because the bond pads located between the cap and mover are not accessible. Therefore, mechanical– optical testing is used: motion of a chuck with a mover wafer causes oscillations of the moveable plate at the natural resonance frequency, which is measured using optical tools. Figure 13 shows results of resonance frequency measurements for the same micro-mover obtained by both mechanical–optical and electrical methods. Electrical testing of individual cantilevers in the array is challenging because of the large number of cantilevers. Instead electro-optical testing can be used: large groups of cantilevers can be electrically actuated and pattern recognition technique can be used to evaluate response of the cantilever array.

4. Electronics and system aspects A Nanochip device provides storage at the system level by delivering data through an error free interface and eliminates the need to manage device inherent idiosyncrasies such as mapping defects, data block wear leveling, and block erase management. In comparison, NAND flash memory is a component used to build storage devices leaving the task of components management to system designers and integrators. In many respects a Nanochip device is similar to an HDD because it delivers error free data at the interface, plus the additional advantage of higher Input/Output Operations per Second (IOPS) at lower power. Nanochip storage device has the same throughput for both read and write IOPS because there is no requirement to pre-erase data prior to performing a write operation (direct overwrite recording), data can be overwritten without affecting adjacent data, furthermore repeated read operations to the same data zone does not disturb nearby already written data. A Nanochip storage device consists of two components: MEMS memory chip referred on the figures as nChip and a data management controller. The controller can be connected to one or more MEMS memory chips (see Figure 14). The controller provides the data path from / to the MEMS memory chips including error correction and a host interface such as SATA. The MEMS memory chip contains micro-mover and array of cantilevers formed on top of CMOS Analog Front End (AFE) electronics. The AFE electronics integrates the servo control system (SVC) and the read–write front-end channel electronics (RWC). The AFE provide interface to the MEMS micro-mover and the Nanochip digital controller (see Figure 15). The AFE electronics are built using TSMC 0.18 μm HV CMOS process. Cantilevers are connected to the top CMOS metal with help of more than 10,000 vias. Figure 16 shows floor plan of the CMOS circuitry built under the array of MEMS cantilevers. The data rate supported by the storage device is governed by many factors, one of which is the number of read channels. Nanochip has over 270 read channels located under array of cantilevers. Each read channel supports a group of up to 20 cantilevers. Such group is called bit group. The number of tips in a bit group is limited by the parasitic capacitance of all tips connections

56

N. BELOV ET AL.

Figure 14. Nanochip storage device block diagram.

Figure 15. Analog front-end electronics.

A MEMS-BASED ULTRA-HIGH DATA DENSITY MEMORY DEVICE

C 1

D1

C

A 1

D1

C 1

RW-CTL

A2

A 1

A2

RW-CTL

C 2

2

CH

CH

CH

CH

CH

CH

CH

C

A2 CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

C 1

D1

CH

A 1

CH

2

C

CH

D1

A 1

A2

2

C 1

57

C 3

M1

M2

CH

M3

CH

CH CH

M4

S1

CH CH CH

CH CH M5 CH

C 1

1

R

C 1

D1

D1

A 1 2

A2

2

C

A 1 C

A2 A 1

2

CH

C 1 D1

CH

CH

2.14

9.49

CH

CH

C

CH

CH

C 1

D1

2

A 1

A2

A2

RW-CTL

C

RW-CTL

Figure 16. CMOS circuitry floor plan, center of die is occupied by an array of read channels.

to a single channel. Only one cantilever per bit group can be active at any time – cantilever selection performed mechanically by actuating/loading a cantilever onto the surface of the memory medium. Mechanical multiplexing is implemented by combining one cantilever from each bit group into larger actuation groups. Number of actuation groups is equal to number of cantilevers supported by a single read channel. All cantilevers from each actuation group can be simultaneously actuated vertically. Beside, the array of cantilevers is divided into four quadrants. Each quadrant has one quarter of the read channels assigned to it. This approach reduces power consumption in case of processing small block requests – only quadrants containing the data will be powered to service the request. The data are interleaved over the four quadrants to insure high performance for sequential data access for block requests greater than four. 4.1. SERVO SYSTEM A closed loop servo is used to position a micro-mover in X and Y over a range of ±120 μm to within 0.5 nm of a commanded position. The servo system is divided into two parts: the servo control system (SVC), which is a part of AFE electronics, and the servo management subsystem located on the controller chip. The SVC located on the periphery of the CMOS die (RW-CTL blocks in Figure 16) is responsible for closing the servo loop at a commanded track. The servo management

58

N. BELOV ET AL.

subsystem managed by a DSP provides the interface between the servo and the controller data management/host interface. The servo DSP handles tasks such as servo error recovery, responding to external shock, calibration and factory servo formatting. The SVC (see Figure 17) contains analog and digital circuitry serving the four capacitive position sensors. The analog portion (ASVC) has charge amplifiers (CA), band pass filters (BPF), coil driver, sine generator and analog-to-digital converters (ADCs), while the digital section (DSVC) contains DSP functions (synchronous demodulation, low pass filter, position error signal generator etc). The Servo Analog Interface (SAI) is the positioning control system. Figure 18 illustrates the concept of a positioning servo system applied to one axis of micromover motion. The micro-mover is translated by applying current through moving

Figure 17. Nanochip servo control system.

Figure 18. One-axis position control system.

A MEMS-BASED ULTRA-HIGH DATA DENSITY MEMORY DEVICE

59

coils operating in a fixed magnetic field. The SAI front end provides quantized measurements of planar motion from four capacitive position sensors allowing for a position error signal (PES) to be calculated. The SAI back end provides current to the coils located on the micro-mover that produce electro-mechanical force to position the micro-mover. Figure 8 provides more details on the orientation of the coils and sensors. A current in the top and bottom coils produces X-axis motion that can be sensed by the X1 and X2 position sensors. A current in the right and left coils produces Y axis motion that can be sensed by the Y1 and Y2 sensors. Electrodes of the capacitive sensors on the micro-mover (transmitters) are driven with 200 kHz sine-wave carrier signals TX1 and TX2 (Figure 17) and motion of the plate is sensed by four stationary electrodes (pick-ups) on the Cap. Therefore, each position sensor generates four signals (N1, N2, Q1, and Q2) that are used to extract information about position of the moveable plate. The position sensors are designed to have capacitance variation as a sinusoidal function of the X and Y micro-mover displacement. The position information is amplitude-modulated by the capacitance variation between the transmitter and the pick-up electrodes. The modulated 200 kHz pick-up signal is converted to voltage by a low noise charge amplifier and subsequently demodulated by sampling the positive and negative peaks of the resulting voltage waveform. Sampling clock working at 400 kHz is synchronized to the transmit carrier signal. The amplitude of the transmit carrier signal is well-controlled and capable of adjustment over a 5:1 range to optimize the input swing to the ADCs. The servo control system can operate in various modes, including: calibration, track seeking & track keeping, scanning, ramping up & down to the scanning velocity. Among the many aspects of the servo design, loop settling and stability, dynamic range, and position resolution are the essential system parameters. Different modes of operation and system specs determine target SVC performance parameters. For example, the precision requirement (PES specification) is the result of system requirements for a bit-error-rate (BER) of 10− 4 pre-ECC (Error Control Coding). As the target track width is 25 nm for writing and 20 nm for reading, in order to achieve BER = 10− 4, the peak PES shall be less than 2 nm, from which PES (RMS) = 0.5 nm is specified. 4.2. READ CHANNEL FRONT END ELECTRONICS Read channel front-end is shown in Figure 19. It contains a sense amplifier connected to the probe via two wires. One wire is connected to the active tip and the other is attached to an inactive tip to provide a differential input to a fully differential low noise amplifier (LNA). The output of the LNA feeds into an Integrate and Dump circuit. The servo system provides bit timing information. Detected data is sent from the AFE to the controller as a non-return to zero data stream.

60

N. BELOV ET AL.

Figure 19. Read channel front-end electronics.

4.3. NANOCHIP CONTROLLER The Nanochip controller provides an interface between a Host and the MEMS based storage device. In addition the controller manages all aspect of data recording and formatting very similar to an HDD controller. The block diagram of the controller is shown in Figure 20. Data stored on a Nanochip storage device as Logical Blocks (LBA), data access is via a host command control data block identifying starting LBA and length. The controller implements a multitude of electronic circuitry and sophisticated firmware to support the different component required to function. The Nanochip controller contains a Host Interface block, Digital Signal Processing Engine, Micro Controller with MAC Unit, buffer manager block, Nano-Track Formatter, ECC engine block, Servo Control Block, Servo Processing Block, and a Read Channel control block, and multiple peripherals such as UART to support firmware debug (see Figure 20). The Nanochip utilizes a two dimensional RS-ECC, the ECC engine view the group of active tips as a two-dimensional array of bits grouped into rows and columns of symbols, the data is provided by the formatter from the active group of tips to form a single user Physical Block Address (see Figure 21), when logically mapped will result in an LBA (Logical Block Address). There are no tips dedicated as spares, all tips in a group are covered by the code word. The 2D implementation can tolerate the loss of 4 to 8 tips without degrading ECC performance.

A MEMS-BASED ULTRA-HIGH DATA DENSITY MEMORY DEVICE

Figure 20. Controller block diagram.

Figure 21. Physical block address construction from media tracks and ECC processing.

61

62

N. BELOV ET AL.

The hardware can detect permanently damaged tips and mark their location, knowing the location of a damaged tip is fed to the ECC engine for erasures correction, which extend the power capability of the ECC. Fabricated prototypes (see Figure 22) have die size of 15.0 × 13.7 mm with about 100 mm2 dedicated to the area covered by memory stack. A close-loop control system allows for positioning of the micro-mover with sub-nanometer accuracy. Only limited number of cantilevers was used for read/write operations in testing of the prototypes. Writing and reading was done at scanning speeds of 10–20 mm/s.

Figure 22. Prototype of nanochip memory device in a ceramic cavity package.

4.4. TARGET PRODUCTS, EXPECTED PERFORMANCE PARAMETERS AND MARKET OPPORTUNITIES FOR PROBE STORAGE DEVICES Higher capacity data storage, both volatile and non-volatile, has been in persistent demand in many fields including internet data centers, personal computing, MP3 players, cell phones and other consumer electronics. Magnetic hard discs (HDD), transistor-based flash memory and optical storage devices, as CD and DVD, are currently dominating in the market. Demand for higher capacity has pushed conventional memory devices to the technological limits in all these areas and attracted efforts of scientists and engineers to technologies that can provide even higher data density and higher capacity for storage devices while maintaining high reliability and low power consumption. MEMS-based probe storage technology has been among the promising candidates for high-capacity memory devices. Initially probe storage devices can occupy an intermediate position between the flash memory and hard discs. Competing against flash memory, probe storage devices can offer higher capacity, lower cost per GB, better retention and much lower cost associated with increasing data density while providing data rate, power consumption and form factor sufficient for many applications. At the same time probe storage devices can offer lower power consumption, ability to handle many more input/output operations per second, faster response, better reliability and lower

A MEMS-BASED ULTRA-HIGH DATA DENSITY MEMORY DEVICE

63

floor cost per unit than HDDs while providing required capacity. As a result, probe storage technology can successfully compete for market share in applications that require the best possible cost per unit of capacity and cost per unit of performance. Figure 23 illustrates this potential in which a storage device based on an array of probe storage units is compared to incumbent technology devices. The capacityperformance space used in the graph reflects cost of two important parameters of the storage devices: capacity and number of input/output operations per second (IOPS) [14]. The cost numbers include both the purchase price and cost of energy consumed by the storage device in five years. The graph shows place of different storage devices in capacity-performance space. The square markers are for two different 3.5″ form-factor HDDs optimized for maximum capacity. One of the HDDs having lower capacity is chosen as a benchmark. The two axes crossing at this marker split the graph into four quadrants. Devices located inside the top-right quadrant have both larger cost per GB and larger cost per IOPS. Any devices that will appear in the bottom-left quadrant will have better performance than the benchmark device and, most likely, will become market winners. Devices located in the remaining two quadrants have one of the parameters better than the benchmark device and therefore can compete for some market niches.

Figure 23. Comparison of costs for storage device technologies in capacity-performance space.

The triangular markers are two different ‘enterprise class’ HDDs in the 2.5″ form-factor. The rhombus markers are for two different classes of Flash based SSD storage devices in a 2.5″ form-factor. The LP SSD is a low performance version whereas the Log SSD has resources to manage a log structured file system for much higher performance but at higher cost. The circular marker is for a hypothetical array of ten MEMS based probe storage units in a form-factor equivalent to 2.5″ HDD storage device, which can offer 160–600 GB capacity, data rate of 20 MB/s and

64

N. BELOV ET AL.

1,500 IOPS. The dotted lines denote market prices for the respective memory components. Street or market prices at the end of 2008 are used as the basis. For applications requiring the largest possible capacity and best possible performance for a dollar, MEMS-based probe storage technology offers compelling potential value. Applications such as enterprise servers, solid state disk drives, storage devices for laptop computers and USB drives can be served. Coupled with efficient MEMS-based manufacturing costs the technology can eventually deliver a family of dominate mass storage products.

5. Conclusions The results achieved by Nanochip show that major drawbacks of the earlier probe storage concepts can be overcome and shows that commercialization of this type of memory devices is possible. Ultrahigh data densities in the range of 2–4 Tb/in2 can be achieved using the memory material and the recording technique developed by Nanochip. All major components and a prototype demonstrating basic functions of a memory device have been built and tested. Currently work is continued on design of a memory device with target user capacity of 32 GB. It will have about 5,000 actuated cantilevers and more than 270 read–write channels providing data rate close to 20 MB/s. Power consumption of the device is expected to be in the range of 500–750 mW dominated by electronics. MEMS actuators are expected to consume less than 10% of the power. Acknowledgements The authors are grateful to G. Dunbar, W. Hassler, U. Iflok, N. Franklin, Q. Tran, Z. Tao, N. Tayebi, and S. Yang for technical support and/or fruitful discussions.

References 1. 2. 3. 4. 5. 6. 7. 8. 9.

G. Binning et al. “The Millipede – a nanotechnology-based AFM data-storage system”, in Handbook of Nanotechnology, ed. B. Bhushan, 2nd ed, 2006, pp. 1457–1486. A. Pantazi et al. “Probe-based ultrahigh-density probe technology”, IBM J. Res. & Dev., v. 52, No. 4/5, July/September 2008, pp. 493–511. US patent 6,930,368 “MEMS having a three wafer structure” (Hewlett–Packard). US patent 7,050,320 “MEMS probe-based memory” (Intel). US patent application 2007/0153430 A1 “Micro actuator and data storage apparatus employing the same” (Samsung Electronics). US patent application 2009/0010144 A1 “Transducer assembly and data storage apparatus including the transducer assembly” (Seagate Technology). US patent application 2008/0316906 A1 “Read/write transducer for a ferroelectric storage medium and corresponding storage device and method” (ST Microelectronics). US patent application 2007/0030791 A1 “Probe memory device and positioning method therefor” (Hitachi). T. Tybell, C. H. Ahn, and J.-M. Triscone, Appl. Phys. Lett., 72(12), 1454 (1998).

A MEMS-BASED ULTRA-HIGH DATA DENSITY MEMORY DEVICE

65

10. B. Kim, D. Adams, G. Tchelepi, Q. Tran, Q. Ma and V. Rao, “Scanning Probe Charge Reading of Ferroelectric Polarization with Nanoscale Resolution”, 2009 NSTI Nanotechnology Conference and Expo, May 3–7, Houston, TX, (2009). 11. B. Kim, D. Adams, Q. Tran, Q. Ma, V. Rao, “Scanning probe charge reading of ferroelectric domains”, Appl. Phys. Lett., v. 94(6), 063105, 2009. 12. N. Belov et al., “Thin-layer Au-Sn solder bonding process for wafer-level packaging, electrical interconnections and MEMS applications”, Int. Interconnect Technology Conf., Sapporo, 2009. 13. S. Severi et al., “CMOS compatible poly-SiGe cantilevers with read/write system for probe storage device”, Transducers 2009, Denver, June 2009. 14. S. Hetzler “Storage chasm: implications for the future of HDD and solid-state storage”, IDEMA Symposium “What’s in store for storage, the future of non-volatile technologies”, Dec 2008, www.idema.org.

LOW COST SILICON CORIOLIS’ GYROSCOPE PAVES THE WAY TO CONSUMER IMU BENEDETTO VIGNA, FABIO PASOLINI, ROBERTO DE NUCCIO, MACRO CAPOVILLA, LUCIANO PRANDI, AND FABIO BIGANZOLI STMicroelctronics s.r.l., Via Tolomeo 1, Cornaredo, Italy, E-mail: [email protected]

Abstract During the last two years MEMS linear accelerometers have reinvented the way of playing a game, protecting your sensitive data on HDD, using your mobile devices smartly or making your washing machine less power hungry. Consumer and Industrial Markets have taken advantage from “The MEMS Consumerization Wave”, driven by STMicroelectronics, which introduced a wide portfolio of two and three-axis motion sensors meeting customer requirements in terms of size, performances, quality and price. What’s next? More and more applications in the Consumer and Industrial markets are coming up with the need of sensing motion along multiple axes degree of freedom. Linear motion detection is requested to be combined with angular rate sensing along pitch, yaw and roll axis in the space to address a wide range of applications where four to six degree of freedom sensing feature is required. One example is related to Inertial Measurement Unit (IMU) or Inertial Navigation Unit (INU) where accelerometer and gyroscopes are each other complementary to detect linear and angular motion in several applications including image stabilization, enhanced user interface for mobile phones, games and pointers/ remote controllers, pedestrian and car navigation for location based services and fitness/wellness people monitoring. As seen for the accelerometer, once again size, performances and price are the driving factors for gyroscope success in Consumer & Industrial market.

Keywords: Accelerometer, gyroscope, Inertial Navigation Unit (INU), Inertial Measurement Unit (IMU), micromachining, MEMS.

1. Introduction 1.1. WHY MEMS? Micro-Electro-Mechanical-Systems are becoming an irremissible part of our life, for example inside cars, mobile phones, portable music players, notebooks and white goods. On the contrary of other technologies, micromachining has created a E. Gusev et al. (eds.), Advanced Materials and Technologies for Micro/Nano-Devices, Sensors and Actuators, DOI 10.1007/978-90-481-3807-4_5, © Springer Science + Business Media B.V. 2010

67

68

B. VIGNA ET AL.

“tsunami” in the Consumer Market, being able to introduce in very high volumes reliable linear accelerometers with the right performances, size and price with the clear result of opening new amazing applications. MEMS gyros share the same technology platform of the linear accelerometers. MEMS gyros can lever on the “lesson learned” from accelerometers, but at the same time they are much more challenging, since they are made by two different sections: dedicated actuation interface (that is using mechanical resonance frequency to create an electromechanical oscillator in closed loop configuration) and a transducer interface to convert angular rate in electric signal. Gyros as stand alone components can go down the same successful path of linear accelerometers, in terms of miniaturization, cost effectiveness and performances. Moreover, the technology shared with linear accelerometer allows to speedup the integration of multiple sensing axes (angular and linear) in single package. 1.2. WHAT’S NEXT? MEMS PAVES THE WAY TO MINIATURIZED CONSUMER IMUs The next challenge we are currently facing is the combination of the accelerometer and gyroscope in a single miniature module (Figure 1) with the embedded processing capability (Figure 2) of running complex algorithms (Kalman filters) to

Figure 1. IMU including accelerometer and gyro (Source: Micronews, May09).

15 cm3

50 mm3 Figure 2. Complete IMU with processing capabilities.

LOW COST SILICON CORIOLIS’ GYROSCOPE

69

detect demanding applications from the dead reckoning in personal and car navigation to the U/I and gesture recognition in the portable devices for fitness/ sport and gaming/pointing.

2. Consumer IMUs open the door to new applications Multiple axes degree of freedom MEMS sensors are the right answer for a wide range of applications in the Consumer and Industrial Markets. Inside Inertial Measurement Unit (IMU) or Inertial Navigation Unit (INU), linear acceleration motion detection is asked to be combined with angular rate sensing along pitch, yaw and roll axes to address enhanced applications that need four to six degrees of freedom. For example, IMU/INU can be implemented for image stabilization, enhanced user interface for mobile phones, games and pointers/remote controllers, pedestrian and car navigation for location based services and fitness/wellness people monitoring. In Image Stabilization (IS) applications, IMU can be used to track an object where in the images the subject slurs due to vibrations applied to the devices. IS system can be implemented using pixel tracking by intensity movement or frame tracking. The IMU is usually embedded in video or into system with Pan-Tilt and Zoom capabilities or mounted on moving platforms in surveillance [1]. Motion activation and image stabilization are features aimed to improve picture or video quality. IMU enhances user interface for mobile phones/portable devices: playing tracks can easily been done by flicking the phone. Moreover the playlist can be shuffled by shaking the device. In addition, six-axis can introduce advanced features in handheld devices like gesture recognition, making the interface for gaming, pointers or remote controllers more user friendly and more powerful. Inertial Navigation Unit (INU) in pedestrian/car navigation is used for Dead Reckoning (DR) to estimate user’s current location based upon a previously determined position, when no GPS signal is available or its quality is very poor. The information coming from the sensor cluster is processed through complex Kalman filters to estimate the current position of the user. This powerful feature open the doors to a wide variety of applications based on the user’s actual location (the so called LBS, Location Based Services), making easier our everyday life.

3. A deeper look to gyro technologies Gyroscopes are devices able to measure angular rate of a moving object with respect to a fixed reference frame. The working mode is based on different technologies, including electro-optic (EO) and mechanical (M) or Micromechanical (MM). Electo-Optical gyro are based on Sagnac effect [2, 3]. These devices are usually used in the inertial navigation systems on aircrafts and spacecrafts, where the highest performances are required.

70

B. VIGNA ET AL.

EO gyros are characterized by the absence of moving parts, that represents an advantage, in terms of reliability improvement, insensitivity to acceleration, compared to mechanical devices. Mechanical gyroscope are based on Coriolis law. Consider a spinning wheel with an angular momentum L directed along Xaxis. When an external mechanical torque (M) along Y-axis is applied, the system will try to align the spin axis of the wheel with the input torque one having a precession Ω along the Z-axis. The orthogonal external torque is not able to change the amplitude of the angular momentum, but only its direction (Figure 3). Z

Ω

M Y

Li X

L Figure 3. Mechanical gyro basic principle.

Micromechanical Gyro: Historically micromechanical gyroscope sensor was developed on piezoelectric technology. This cheap technology was low performance (in term of stability and reliability) and difficult assembly in particular for multi-axes sensors. The next step expensive quartz gyro sensors are higher performance but they need non standard package. Moreover as drawback it’s more difficult the modular approach towards multi axes sensors. The new generation of capacitive MEMS gyroscopes has reached the goal in terms of low price, standard package and higher performances. Moreover they have better stability and reliability compared with the other sensor technologies.

4. STMicroelectronics’ Gyroscope STMicroelectronics’ Gyroscopes are based on micro-machining technology. The MEMS gyroscope can be considered as composed by an “accelerometer” and an actuator integrated in a single micro machined structure [4, 5]. STMicroelectronics’ MEMS gyroscope is a combination in the same package of mechanical sensor and dedicated interface ASIC. The mechanical sensor is made of one actuator, electrostatically actuated, and a sensing element, capacitive sensed, integrated in a single micromachined structure. Mechanical element is composed by a mass, kept in continuous oscillating movement and able to react when an angular rate is applied based on the Coriolis principle. Gyroscope working principle can be explained by a body with the mass m brought into vibration with

LOW COST SILICON CORIOLIS’ GYROSCOPE

71

the velocity v. When the gyro is rotated with the angular rate Ω, the mass will experience an additional displacement caused by the Coriolis force (Figure 4). Mechanical architectures can be classified into tuning fork and wheel structure (Figures 5 and 6): different design approaches can be implemented but the working principle based on the Coriolis effect remains valid. The tuning fork scheme, consists on replicating the single mass structure but applying opposite driving speeds (v).

FCoriolis = -2mΩz Λ v Driving mode Driving actuation

(3)

Sensing mode Sensing electrodes

Figure 4. Coriolis force and Gyro basic principle.

Rotational Wheel structure

Driving mode

Translational Tuning fork

Sensing mode

Figure 5. Rotation and translation sensing structure.

72

B. VIGNA ET AL. Sensing mass

Driving mass y

z

x

B

A

Driving direction

Fc

z

A′ A′

x

A′

y

z x

y

Driving capacitive plates

Fc

B′′ B B′′

(No Angular rate)

(Angular rate applied)

Capacitance variation due to angular rate applied is read by the electronic interface

Figure 6. Rotation sensing structure.

When angular rate acts, the two masses move towards opposite directions. Differential reading is then used to sense the capacitive variation ∆C. On the contrary, when linear acceleration is applied both movable masses move towards the same direction and so ∆C = 0. MEMS gyros were designed on two actuation strategies: open loop and close loop architecture. Gyros based on open loop architecture involve dedicated oscillator circuits not taking into consideration the sensor changes (temperature, power supply, etc). So this architecture is usually considered as low performance. Gyros based on close loop drive architecture use internal resonance frequency of the micro-mechanical element. This allows focusing the activation energy on a sharp spread that reduces power consumption. Moreover, this architecture allows the integration of the oscillator circuits and a cost reduction at manufacturing using the same technological platform. Closed loop architectures are related to adaptive structure where oscillation frequency fits with the sensor’s resonance frequency also when changes over temperature, power supply, aging effects, etc. Standard closed loop drive systems, usually at atmospheric pressure, use charge pump to amplify supply voltage into actuation circuit that increases power supply consumption and die size (additional external component are required). One of the challenges of STMicroelectronics’ design was to develop a closed loop drive system based on resonance frequency of structure in medium/high vacuum condition with very low energy transfer. STMicroelectronics has introduced advanced design based on single driving loop for multiple axis system to reach higher performances in terms of stability, weak cross-axis interaction, lower power consumption and smaller size. Another key challenge is the control of the quadrature error (cross axis between drive and sensing interface) internally compensated by dedicate circuit (STM patents). This dedicated circuit allows to reduce global noise effects and so to improve the performances of the device.

LOW COST SILICON CORIOLIS’ GYROSCOPE

73

5. MEMS IMUs: key factors for system accuracy STMicroelectronics has designed and manufactured single and multiple axis accelerometers and gyros with the goal of producing devices with high output accuracy. The accuracy is one of the main elements for success related to IMUs in applications like personal navigation where performances are a key requirement. During the last years a big effort has been put in place in terms of sensor design and manufacturing to optimize device accuracy. The major contribution to MEMS accelerometer and gyro accuracy are noise effect, zero rate level offset error, sensitivity error and non linearity. Accuracy evaluation can be modeled taking into account internal, environmental factors and system noise. Internal factors Linear acceleration and angular rate measurement are affected by several “internal” parameters including residual error after calibration, output non linearity, packaging tolerance, ageing effects: Factory calibration residual error: at the end of manufacturing process, after factory calibration, a residual error is still present on zero-g level/zero rate level and sensitivity as addressed in the datasheet. Mechanical data.zero-g level/ zero-rate level offset error & sensitivity error are due to sensor and ASIC (drive & sense). STMicroelectronics calibrates and test in factory 100% of the sensors through dedicated and optimized equipments, reducing the intrinsic offset and sensitivity errors. Soldering and assembling effects: soldering and assembling process will also affect the above mentioned parameters by mechanical and thermal stress that can modify internal coupling capacity of the sensing structure. Ageing effects: during device lifetime, MEMS sensor performance can face a slight change. So ageing effects known as long term accuracy effects are presents. STMIcroelectronics’ design, manufacturing and qualification have worked to minimize the drift and enlargement of key parameters distributions, due to ageing effects. As result, the Market has accepted with excellent feedback in terms of quality and reliability the several hundreds million motion sensors shipped till today. Non linearity: output signal is proportional to acceleration/rate input. Anyway a slight non linearity is present on the output signal usually lower then 1%. So this effect can be considered in high precision applications. Non linearity (signal distortion) is in generally due to linearity change of internal passive component related to amplitude of output signal. Cross-axis error: For accelerometer, assembling alignment tolerance during packaging and pcb mounting produce a cross-axis error: active axes parallel to the substrate (usually X/Y axis) are more affected than orthogonal one (Z-axis). In gyroscope, cross axis is generated by uniformity process spread due to manufacturing. In particular two cross-axis effects: between actuation and transduction structure (known as Quadrature error) and cross axis between two or more transduction structures.

74

B. VIGNA ET AL.

Environmental factors are mainly related to temperature and power supply range, impacting on both sensor and ASIC. Noise effects Noise effects are mainly due to mechanical thermal noise and driving & sensing interface noise: The classical transfer function of the mechanical sensor colors the white noise produced by mechanical thermal noise, so to be filtered by sensing interface. Driver noise is evaluated by the system as phase jitter Noise. STM design’s goal is to reduce drive noise by architecture patents based on advanced Phase Locked Loop circuit (PLL). Advance STM’s CMOS technology is able to control as secondary effect in the signal output, improving the performances of the device.

6. Conclusion People are becoming more and more used to interact in a smarter way with products of everyday life. Enhanced man–machine interfaces based on multi sensing degree of freedom IMUs and dedicated algorithms will allow to open the door to new amazing applications like personal navigation/location based services, gesture recognition in portable devices or image stabilization. A key factor to make this happen is to design and manufacture the right IMUs for consumer market in terms of size, power consumption and price. Micromachined capacitive gyros are the right answer: they share the same technology platform of linear accelerometers, already successful in the consumer Market, and can be easily integrated with other sensors to build low cost, small and less power hungry IMUs.

References 1. 2. 3. 4.

5.

I. Cohen, G. Medioni: “Detecting and tracking moving objects in video surveillance,” Proc IEEE Conf Computer Vision and Pattern Recognition 1999; II: 319–325 Georges Sagnac: L’éther lumineux démontré par l’effet du vent relatif d’éther dans un interféromètre en rotation uniforme, in: Comptes Rendus 157 (1913), S. 708–710 Georges Sagnac: Sur la preuve de la réalité de l’éther lumineux par l’expérience de l’interférographe tournant, in: Comptes Rendus 157 (1913), S. 1410–1413 Antonello, R Oboe, R Prandi, L Biganzoli, F: Automatic mode-matching in MEMS vibrating gyroscopes using extremum seeking Control, Industrial Electronics, IEEE Transactions On : Accepted For Future Publication, ISSN: 0278-0046 First Published: 2009-04-21 Oboe, R. Antonello, R. Lasalandra, E. Durante, G.S. Prandi, L.: Control of a Z-axis MEMS vibrational gyroscope, Dept. of Mech.&Struct.Eng., Univ. of Trento, Italy; Mechatronics, IEEE/ASME Transactions on Publication Date: Aug. 2005 Volume: 10, Issue: 4

MICROWAVE AND MILLIMETRE WAVE DEVICES BASED ON MICROMACHINING OF III–V SEMICONDUCTORS

ALEXANDRU MÜLLER 1 , DAN NECULOIU 2 , GEORGE KONSTANTINIDIS 3 , AND TAUNO VÄHÄ-HEIKILÄ 4 1

IMT-Bucharest, 32B, Erou Iancu Nicolae Street, R-077190, Bucharest, Romania, E-mail: [email protected] 2 “Politehnica” University Bucharest, 313, Splaiul Independentei Street, Bucharest, Romania, E-mail: [email protected] 3 FORTH-IESL-MRG Heraklion, PO Box 1527, Crete, Greece, E-mail: [email protected] 4 VTT Technical Research Centre of Finland, Tietotie 3, 02044, Espoo, Finland, E-mail: [email protected]

Abstract A review of recent developments of membrane supported millimeter wave circuits based on GaAs micromachining, performed in authors’ labs. is presented. Coupled line band pass filters for 35 GHz, Yagi–Uda antennae for 60 GHz having as support a 2 μm thin GaAs membrane are presented. Also the manufacturing direct, video-type receiver module having the Yagi–Uda antenna and Schottky diode monolithic integrated on the same GaAs membrane is presented. The very good results obtained on the measurements of these circuits have demonstrated the high capabilities of GaAs micromachining in manufacturing of high performances millimeter wave circuits and the potential advantage of these technologies for the sub-millimeter wave frequency range were other solutions are not available.

Keywords: Filter, receiver, antenna, micromachining, membrane.

1. Introduction The technology of membrane supported millimeter wave passive circuit elements based on silicon micromachining was developed starting more then 15 years ago at Ann Arbor Univ. Michigan [1–4]. Micromachining of GaAs is an exciting alternative for manufacturing of components and modules for high performance communication systems in the microwave and millimetre wave frequency range.

E. Gusev et al. (eds.), Advanced Materials and Technologies for Micro/Nano-Devices, Sensors and Actuators, DOI 10.1007/978-90-481-3807-4_6, © Springer Science + Business Media B.V. 2010

75

76

A. MÜLLER ET AL.

GaAs technology allows monolithic integration of micromachined passive circuit elements with active devices manufactured on the same chip. III–V compound semiconductor heterostructure layers grown by MBE and MOCVD provide flexibility in micromachining. Due to the different composition, these layers can be etched by wet or dry techniques, with a very good selectivity. Some dry and wet etching systems exhibit etching rates of GaAs orders of magnitude higher then for AlxGa1−xAs and vice versa (if x ≥ 0.5). Commonly AlGaAs is used as an etch-stop layer for GaAs. The typical thickness of the etch stop layer is 0.1–0.2 μm. Millimetre wave filter structures supported on GaAs membranes were manufactured in the last years by groups involving the authors of this paper [5, 6]. Substrateless Schottky diodes for applications in the terahertz frequency range were manufactured in the last years [7, 8]. These diodes have as main advantages the reduction of series resistance, less influence of skin effect, and increase of power handling capabilities. A monolithically integration of a folded slot antenna with a Schottky diode, on the same thin GaAs membrane, in a millimeter wave direct (video-type) receiver module, was reported by the authors [9]. First results regarding the integration of a membrane Schottky diode with a micromachined Yagi–Uda antenna were reported by us [10]. Some circuits for applications in the sub-millimeter wave range, based on GaAs micromachinig, are described in [11]. This work will review some recent contributions of the authors in the developing of GaAs technologies for manufacturing of membrane supported millimeter wave circuits. In the second chapter it is presented a GaAs membrane supported band pass filter structure for 45 GHz. In the third chapter there is presented a GaAs membrane supported Yagi–Uda antenna for 60 GHz operating frequency and in fourth chapter it is presented the monolithic integration of a Yagi–Uda antenna with a Schottky diode on the same GaAs membrane in direct (video-type) receiver structure for 60 GHz. In the last chapter there are the conclusions of the work.

2. GaAs membrane supported filters Filters were the first millimeter wave circuits that proved the major advantages of micromachining technologies over the classical technologies. First coupled line filter structures having as support a 1.5 μm thin dielectric membrane obtained by silicon micromachining were reported by Chi and Rebeiz [12]. The bandwidth of 40% with losses between 0.7 and 2 dB at 14–15 GHz. High performance planar silicon micromachined filters for 37 and 60 GHz were reported by Blondy et al. [13]. A folded stub filter configuration on micromachined silicon substrate was developed in our group [5]. Losses of about 1.5 dB were obtained. A coupled line filter structure for 45 GHz operating frequency was also developed and losses lower then 1 dB were obtained [14]. We have developed the first GaAs membrane supported filters starting with a folded stub configuration for 38 and 77 GHz [5], followed by a coupled line configuration [15].

MICROWAVE AND MILLIMETRE WAVE DEVICES

77

We will present the design, the technological development, and the measurement results for a coupled line configuration filter structure for 35 GHz. The filter has as support a thin GaAs membrane. The selection of the coupled line configuration is very important for the filter response [16, 17]. In this design, the single lines are connected at the diagonal opposite ports of the coupled line. The main steps of the design methodology are as follows: (i) membrane-supported single and coupled transmission lines characterization; a database for CPW lines with different values for the geometrical parameters (width, separation, gap, etc.) was created; (ii) analytical design using the image parameters and optimization of the filter frequency responses using circuit simulations were employed; (iii) filter layout design and optimization using intensive electromagnetic simulations was created. The electromagnetic simulations were performed using Zeland IE3D software packages [18]. The electromagnetic analysis includes dispersion, discontinuities, surface waves, higher order modes, metallization loss, dielectric loss and radiation loss. The software package includes an optimisation engine that is very useful for fine adjustment of the layout dimensions. Conventional and Low Temperature (LT) III–V MBE growth was used to fabricate the GaAs/AlGaAs/GaAs heterostructure. Semi-insulating GaAs wafers (ρ = 107 Ωcm), with a thickness of 460 μm, were used as substrate. The MBE process started with a very thin (50 nm) buffer GaAs layer deposition. Over this layer, a 0.2 μm thin AlxGa1−xAs etch stop layer (with x = 0.6) was deposited. Over the AlGaAs layer, a low temperature (LT), high resistivity (ρ > 106 Ωcm), 2 μm thin GaAs layer, was deposited. The growth experiments were performed in a VG80 horizontal MBE chamber with a background pressure of 10–10 mbar. During growth, the chamber pressure was 10–7 mbar. The MBE layer structure is shown in Figure 1.

Figure 1. The MBE layer structure used in filter and antenna manufacturing.

Conventional contact lithography, e-gun evaporation and lift-off techniques were used to define the filter structure. A 500 Å Ti/7000 Å Au metallization was used, then the wafers were mounted face-down on special glass plates and the GaAs substrate was thinned down to 150 μm by lapping technique.

78

A. MÜLLER ET AL.

The etching pattern for the membranes was defined by backside alignment contact photolithography. The membranes were fabricated in a Vacutec 1350 Reactive Ion Etching (RIE) chamber using CCl2F2. End point detection and optical (visual) detection was used during the RIE process. After the selective etching, the thickness of the membrane is about 2.2 μm. A SEM photo of the GaAs membrane (after RIE) used as support for the filter structure is presented in Figure 2. A top photo of the GaAs membrane supported coupled line filter is presented in Figure 3. The results of S parameter measurements are presented in Figure 4. Losses smaller then 0.9 dB were obtained. The very good performances obtained for the 35 GHz filter structures together with the results obtained for the 45 GHz filter structure [15] demonstrate the capability of micromachining technologies of GaAs, the reliability of the structures and the possibility to obtain high performance millimetre wave circuits using GaAs MEMS type devices.

Figure 2. SEM photo of the GaA membrane used as support for the filter and antennae structures; the profile of the etched walls obtained by dry etching is visible.

Figure 3. GaAs membrane supported coupled line filter – top photo.

MICROWAVE AND MILLIMETRE WAVE DEVICES

79

Figure 4. S parameter measurements for the micromachined coupled line filter for 35 GHz. Losses as low as 0.8 dB have been obtained.

3. GaAs membrane supported Yagi–Uda antennae First membrane supported antennas were proposed by Rebeiz et al. [19]. The antenna was a dipole, suspended in an etched pyramidal cavity on a 1 µm silicon oxi-nitride membrane. Micromachined microstrip antennas were first presented in [20, 21]. One solution for many millimeter wave applications is the use of the double-folded slot antenna. First micromachined folded slot antennae were developed by Neculoiu et al. [22]. All these structures were broadside –type antennae (the radiation pattern is perpendicular to the antenna plane). Endfire antennae have the radiation pattern along the plane of the antenna structure. For the millimeter wave range recent studies [23, 24] have demonstrated that the Yagi–Uda configuration is a very good solution for millimeter-wave frequencies and above. The Yagi–Uda endfire antenna is a traveling-wave structure that, as the number of elements increases, has improved directivity, gain and frontto-back ratio. Using micromachining techniques it is possible to fabricate Yagi– Uda antennae on a very thin dielectric membrane. The overall dimensions of the antenna are comparable with the free space wavelength, so this approach is very well suited for millimeter -wave and sub-millimeter-wave frequency range, up to the terahertz region. Using the Zeland IE3D software the Yagi–Uda antenna was designed by optimization of the layout dimensions (driver, directors and reflector parameters, in terms of spacing, length and width). The main target parameter was the antenna gain, which is in close connection with the antenna reflection losses and the radiation pattern. Antenna gain must be maintained at reasonable values across the entire operating bandwidth centered on 45 GHz. The final optimization of the antenna layout includes the CPW-slotline transition parameters (the length of the slots, the length of the slotline, etc.).

80

A. MÜLLER ET AL.

Similar MBE grown wafers like for the filter structures have been used. The major difference in the technology was determined by the idea to obtain a so called “three edges membrane” supporting the end-fire antenna structure. The bulk GaAs wall surrounding the membrane supported antenna on the four edges structure was removed on one edge, in the main radiation direction of the antenna. This topology creates optimum propagation conditions. Conventional contact lithography, e-gun evaporation and lift-off techniques were used to define the antenna structure. A 500 Å Ti/7000 Å Au metallization was used. Then, a front side wet etching was employed in order to define the periphery of the antenna chip and also to locally remove the AlGaAs etch stop layer. Then the same procedure, used for the backside processing for used for the filters was employed for the antenna structures. Due to the local removal of the AlGaAs etch stop layer, the antenna chips are individually formed in the RIE chamber. Top and bottom photos of the antenna structures mounted on the PBC are presented in Figure 5.

Figure 5. Top (left) and bottom (right) view of the membrane supported Yagi–Uda antenna for 45 GHz mounted on the printing board.

Figure 6. Return losses vs frequency for 60 GHz Yagi–Uda antenna.

MICROWAVE AND MILLIMETRE WAVE DEVICES

81

The microwave measurements were performed using an “on wafer” measuring set-up equipped with Cascade Microtech coplanar probes and a Vector Network Analyzer. The antennae chips were placed on an empty plastic box to assure the almost free space conditions. Gain measurements were performed by “on wafer” measurements using a method developed in [25]. The measured gain was about 6.7 dBi at 60 GHz (the simulated value was 7.5 dBi). The agreement between the predicted and measured resonance frequencies is very good for the 60 GHz antenna (Figure 6).

4. Monolithic Integration of a Schottky diode with a Yagi–Uda antenna on the same GaAs membrane GaAs micromachining is very interesting due to the easy monolithic integration of micromachined passive circuit elements with active devices manufactured on the same chip. The monolithic integration of a membrane-supported antenna with a detecting Schottky diode is a practical solution for building very compact and lowcost receivers for the millimetre and sub-millimetre wave frequency range. We will describe results obtained with the monolithic integration of a membrane supported Yagi–Uda antenna with a “membrane” Schottky diode. These devices were integrated on the same 2.2 µm thin GaAs membrane in a direct (video-type) receiver structure. The design approach of the receiver front-end splits the circuit into the membrane supported circuit block (micromachined antenna monolithically integrated with the millimeter-wave Schottky diode) and the bulk GaAs supported circuit block (low-pass filter for video output). Each block is modelled and designed using the full-wave electromagnetic (EM) simulation software Zeland IE3D. The MBE structure used in the manufacturing of the receiver structure is presented in Figure 7. An eight mask process, to manufacture the receiver structures, was developed. The first two masks are the mesa masks, which define the diode. There are squares

Figure 7. The MBE heterostructure used for the receiver manufacturing.

82

A. MÜLLER ET AL.

with the side of 36 µm and respectively 10 µm. The second square is centered in the first. It follows the mask which defines the ohmic metallization which has to reach over the big mesa in one margin and to define the antenna. Rapid thermally annealed ([Au/Ge]×4/Ni/Au – with a total thickness of 0.2 μm) is used for the ohmic contact formation. In order to obtain an 1 µm thin gold layer, it is necessary to use an overlay mask which is used to lift-off the gold over the ohmic contact. The fifth mask defines the poliymide necessary to avoid the short-circuit between the future Schottky contact with the big mesa (a “polyimide bridge” will be created). The sixth mask is used to define the Schottky metallization performed by lift-off technique and is the most critical process. The dimensions of the Schottky contacts on the mask are 3.5 µm × 3.5 µm. The seventh mask is used to define the receiver structures on the top and to make possible to achieve a “three edges” topology by a short etching from the top. The last mask is the membrane mask which is used to define the membranes from the bottom of the wafer. Selective RIE process with CCl2F2 and end point and optical detection were used for the formation of the membrane.

Figure 8. Photo of a GaAs wafer containing monolithic integrated receiver structures with the Yagi–Uda antenna and the Schottky diode supported on the same 2.2 μm thin GaAs membrane.

A top photo of the receiver structure is presented in Figure 8. An optical photo of the Schottky diode region, including the polyimide-bridge (the Schottky diode is placed in the feeding point of the antenna-between the drivers’ arms) is presented in Figure 9. The diode parameters were extracted from the I–V measurements and also from microwave measurements of test structures placed on the same chip with the receiver structure (Figure 9). We have determined IS = 10–13–10–12 A; the ideality factor n = 1.24–1.27; the series resistance Rs = 15–20 ohm, the zero-voltage junction capacitance Cjo = 10–20 fF; junction potential Vj = 0.7–0.85 V. The

MICROWAVE AND MILLIMETRE WAVE DEVICES

83

receiver front-end was measured using the Yagi–Uda antenna from the previous section as an emitter. The antenna was feed with microwave signal from a millimeterwave power generator via on wafer probe tips. The amplitude-modulated signal was emitted into free-space, was captured by the receiver antenna and was detected by the diode. An oscilloscope displayed the video signal.

Figure 9. Detail with the membrane supported Schottky diode area. The diode is placed between the two drivers of the antenna.

Figure 10. Experimental set-up for receiver characterization.

The experimental characterization of the Yagi–Uda antenna receiver was performed using the measuring set-up presented in Figure 10 [9]. A standard V-band horn antenna was placed in the same plane with the receiver structure in far field conditions. The antenna was connected to an amplitude modulated millimeter-wave signal generator and operated as an emitter. The modulation frequency was set to 1 kHz. The receiver structure collects the signal and detects the low frequency component that is amplified by a low-noise video amplifier and then displayed using a digital oscilloscope. The gain of the video amplifier was about 10 and the bandwidth was between 10 Hz and 10 kHz. The generator power was 20 dBm and the distance between the horn antenna and the receiver structure was set to 153 mm.

84

A. MÜLLER ET AL.

The measured detected voltage as a function of frequency for a constant bias current of 10 µA is presented in Figure 11. The membrane-supported Yagi–Uda antenna receiver radiation pattern of was measured for the first time in an anechoic room. In this case it was not possible to use a amplitude modulated millimeter-wave signal, so only the DC detected signal was used. As an effect, the dynamic range of the measured detected voltage was limited to about 20 dB. The results were normalized to the maximum value. The operating frequency was 60 GHz. The E-plane radiation pattern is presented in Figure 12 (E-plane is the plane that contain the receiver metallization). Using this receiver structure, the very exciting concept of millimetre wave identification (MMID) was demonstrated [26]. There are several advantages of

Figure 11. Experimental detected voltage as a function of frequency at constant bias current.

Figure 12. Experimental E-plane normalized radiation pattern (linear scale, normalized to maximum values).

MICROWAVE AND MILLIMETRE WAVE DEVICES

85

MMID over RFID. At millimeter waves, e.g., 60 GHz, high data-rate communications with even gigabit data rates can be implemented. An interesting application would be batteryless wireless mass memories that can be read in a few seconds with high data rates. Furthermore, at millimeter waves, directive antennas are small. A reader device with a small directive antenna would provide the possibility of selecting a transponder by pointing toward it. This is not possible in today’s UHF RFID systems because directive antennas are too large. A directive reader antenna would help in locating transponders in high-density sensor networks or other places where transponders are densely located, e.g., in item level tagging. Finally, there are already applications where millimeter-wave radars are used, as in automotive radars. These radars could, in principle, be used as MMID reader devices that could communicate with the transponders. Imagine a transponder in a child’s clothing that gives a warning to oncoming cars, thus preventing a fatal accident. These receiver structures demonstrate the capabilities of micromachining technologies of compound semiconductors, to integrate passive and active circuit elements in complex millimeter wave circuits. This is very important especially when frequency increases, in the submillimeter or THz range and other technologies and materials can not be used.

5. Conclusions This paper has presented some new results regarding the design manufacturing and characterization of GaAs membrane supported millimetre wave circuits (filters, antennae and monolithic integrated receiver structures). The very good results have demonstrate the possibilities of GaAs micromachining technologies in manufacturing of high performance circuits. These types of circuits are devoted to emerging communication systems, operating in the millimetre and sub-millimetre frequency range. Acknowledgments The authors acknowledge the support of the European Commission through the FP6 European Project 507352 “AMICOM”. The Romanian authors also acknowledge the support of the European Commission through the FP7 European project 202897 “MIMOMEMS” and to the Romanian Agency for Research and Inovation through the projects MIMFOMEMS and GIGASABAR.

References 1.

Weller TM, Rebeiz GM and Katehi LP (1993) Experimental results on microshield transmission line circuits. IEEE-MTT-S International Simposium Digest 2:827–830.

86 2. 3. 4. 5.

6. 7. 8.

9. 10. 11. 12. 13. 14.

15.

16. 17. 18. 19. 20. 21.

A. MÜLLER ET AL. Drayton RF, Katehi LP (1992) Development of miniature microwave circuit components using micromachining techniques. IEEE-MTT-S International Simposium Digest 1:225– 228. Drayton RF, Katehi LP (1995) Development of self-packaged high frequency circuits using micromschining techniques. IEEE Trans. on MTT 43:2073–2080. Katehi LP, Rebeiz GM (1996) Novel micromachined approaches to MMIC’s using lowparasitic, high performance transmission media and environments. IEEE MTT-S Digest: 1145. Müller A, Konstantinidis G, Giaccomozzi F, Lagadas M, Deligeorgis G, Iordanescu S, Petrini I, Vasilache D, Marcelli R, Bartolucci G, Neculoiu D, Buiculescu C, Blondy P, Dascalu D (2001) Micromachined filters for 38 and 77 GHz supported on thin membranes. J. Micromech. Microeng. 11:1–5. Konstantinidis G et al. (2001) MEMS Components and Applications for Industry, Automobiles, Aerospaces and Communication. Proceeding of SPIE 4559:157–161. Siegel PH, Smith RP, Martin S, Gaidans M (1999) 2.5-THz GaAs Monolithic MembraneDiode Mixer. IEEE, Trans. Microwave Theory Tech, 47: 596–604. Ichizli V, Rodriguez-Girones M, Lin CI, Szeliga P and Hartnagel HL (2001) The Effect of Gas Plasma on the Deposition Quality of Schottky Metals and Interconnect Metallisation for Planar Diodes Structure for THz Applications. 9TH Intern. Conf. on THz Electronics, Charlottesville, Virginia. Konstantinidis G, Neculoiu D, Lagadas M, Deligiorgis G, Vasilache D and Müller A (2003) GaAs membrane supported millimeter wave receiver structures. J. Micromech. Microeng. 13:353–358. Neculoiu D, Müller A, Konstantinidis G (2006) Electromagnetic modelling of GaAs membrane supported mm-wave receivers. Journal of Physics: Conference Series 34:28–33. Siegel PH (2002) Terahertz technology. IEEE Trans on MTT 50:910–928. Chi CY, Rebeiz GM (1995) Planar microwave and millimeter-wave lumped elements and coupled-line filters using micro-machining techniques. IEEE Trans on MTT 43:730–738. Blondy P, Brown A, Cross D, Rebeiz GM (1998) Low- Loss Micromachined Filters for Millimeter Wave Communications Systems. IEEE Trans. on MTT 46: 2283–2288. Neculoiu D, Bartolucci G, Pons P, Bary L, Vasilache D, Buiculescu C, Vladoianu F, Dragoman M, Petrini I, Müller A and Plana R (2003) Low-losses coupled-lines silicon micromachined band-pass filters for the 45 GHz frequency band. Proc of the IEEE International Semiconductor Conference CAS 2003 1:109–112. Pantazis A, Neculoiu D, Hazoupulos Z, Vasilache D, Lagadas M, Dragoman M, Buiculescu C, Petrini I, Müller A A, Konstantinidis G, Müller A (2005) Millimeter-wave passive circuit elements based on GaAs micromachining. Journal of Micromech. Microeng., 15:S53–S59. Bartolucci G, Neculoiu D, Dragoman M, Giacomozzi F, Marcelli R, Muller A (2003) Modeling, Design and Realisation of Micromachined Millimeter Wave Band-pass Filters. Int. Journal of Circuit Theory and Applications 31:529–539. Neculoiu D, Bartolucci G, Pons P, Bary L, Vasilache D, Müller A and Plana R (2004) Compact membrane-supported bandpass filter for millimeter-wave applications. Electronics Letters 40:180–182. IE3D User’s Manual, Release 14, Zeland Software Inc., Freemont, CA, 2008. Rebeiz GM, Kasilingam DP, Guo Y, Stimson PA, Rutledge DB (1990) Monilithic Millimeter-Wave Two-Dimensional Horn Imaging Arrays. IEEE Trans. on AP 38:1473– 1482. Gauthier GP, Courtay A, Rebeiz GM (1997) Microstrip Antennae on Synthesized Low Dielectric-Constant Substrates. IEEE Trans. on AP 45:1310–1314. Gauthier GP, Raskin JP, Katehi LP, Rebeiz GM (1999) A 94-GHz Aperture-Coupled Micromachined Microstrip Antenna. IEEE Trans. on AP 47:1761–1766.

MICROWAVE AND MILLIMETRE WAVE DEVICES

87

22. Neculoiu D, Pons P, Plana R, Blondy P, Müller A, Vasilache D (2001) MEMS antennae for millimeter wave applications. Proceeding of SPIE, San Francisco 4559:66–73. 23. Neculoiu D, Pons P, Vasilache D, Bary L, Müller A, Plana R (2003) Membrane-supported Yagi–Uda Antennae for Millimeter-Wave Applications. Proceeding of 3rd ESA Workshop, Espoo, Finland, 1:603–608. 24. Müller A, Saadaoui M, Pons P, Bary L, D.Neculoiu, Giacomozzi F, Dubuc D, Grenier K, Vasilache D and Plana R (2003) Fabrication of silicon based micromachined antennae for millimeter-wave application. Proc of MEMSWAVE workshop, Toulouse, 1:D15–18. 25. Neculoiu D, Pons P, Bary L, Saadaoui M, Vasilache D, Grenier K, Dubuc D, Müller A and Plana R (2004) Membrane Supported Yagi–Uda Antennae for Millimeter-Wave Applications. IEE Proc. on Microwave, Antennas and Propagation 151:11–314. 26. Pursula P, Vähä-Heikkilä T, Müller A, Neculoiu D, Konstantinidis G, Oja A and Tuovinen J (2008) Millimetre Wave Identification — A new short range radio system for low power, high data rate applications. IEEE Trans on MTT 56:2221–2228.

MONOCRYSTALLINE-SILICON MICROWAVE MEMS DEVICES Multi-Stable Switches, W-Band Phase Shifters, and MEMS Tuneable Frequency-Selective Surfaces

JOACHIM OBERHAMMER* *, MIKAEL STERNER, AND NUTAPONG SOMJIT

Royal Institute of Technology (KTH), School of Electrical Engineering, Microsystem Technology Laboratory

Abstract Monocrystalline silicon is still the material of first choice for robust MEMS devices, because of its excellent mechanical strength and elasticity, and the large variety of available standard processes. Conventional RF MEMS components consist of thin-film metal structures which are prone to plastic deformation and limit the power handling. The microwave MEMS devices presented in this work utilize monocrystalline silicon as the structural material of their moving parts, and even prove that highresistivity silicon is a good dielectric material in the W-band. A very low insertion loss, mechanically multi-stable, static zero-power consuming, laterally moving microswitch concept completely integrated in a 3D micromachined transmission line is presented. Furthermore, a multi-stage phase shifter utilizing high-resistivity monocrystalline silicon as dielectric material for the MEMS-actuated moving block loading the transmission line is shown. Finally, a tuneable high-impedance surface based on distributed MEMS capacitors with a transfer-bonded monocrystalline silicon core is presented. Prototypes of these devices were fabricated and characterization results of the microwave and their actuator performance are given.

Keywords: :RF MEMS, phase shifter, microswitch, high-impedance surface, monocrystalline silicon.

1. Introduction Micro-electromechanical systems (MEMS) are integrated microdevices combining electrical components with passive (sensing) and active (actuationn) interface functions to their physical surroundings. Typical examples for sensors include pressure sensors, microphones, accelerometers, gyros, gas sensors, and bolometers; and examples for actuator functions are inkjet print-head nozzles, gas valves, microswitches, and optical micromirror arrays for projection devices. The actuation and sensing functions might

______

** Joachim Oberhammer, Tel.: +46 8 790 62 50 Fax: +46 8 100 858; E-mail: joachim.oberhammer @ee.kth.se

E. Gusev et al. (eds.), Advanced Materials and Technologies for Micro/Nano-Devices, Sensors and Actuators, DOI 10.1007/978-90-481-3807-4_7, © Springer Science + Business Media B.V. 2010

89

90

J. OBERHAMMER, M. STERNER AND N. SOMJIT

be integrated on the same chip, as for a gas flow controller, or a reciprocal mechanism combining sensing and actuation in one and the same element might be employed, such as an ultrasonic transducer [1–3]. The market potential and impact on society of MEMS devices is enabled by their fabrication being based on standard, mature high-volume semiconductor manufacturing processes and materials offering high miniaturization, large product uniformity, and low cost in high volumes; and by the existing capacity of high volume production facilities and logistics. RF MEMS are MEMS devices which are interacting with electrical signals from DC up to sub-millimeter waves, by switching, modulating, matching, tuning, and filtering. Typical devices are micromachined switches [4, 5], mechanically tuneable capacitors [6], micromachined inductors [7], micromechanical resonators for filters and as frequency base [8], tuneable loaded lines for phase shifters [9] or impedance matching circuits [10], reconfigurable antennas [11], and 3D micromachined transmission lines [12]. In general, RF MEMS devices are characterized by near ideal signal handling performance in terms of insertion loss, isolation, linearity, large tuning range, and by keeping these performance parameter over a very large bandwidth [4, 13]. On the other hand, the commercialization of RF MEMS devices is delayed by reliability issues [14], packaging and integration requirements [13], limited power handling capability, and by the fact that established competing low-cost technologies often offer sufficient performance for large volume key applications especially in the lower price segment. Microwave MEMS are RF MEMS devices which operate with signal frequencies above 30 GHz. With applications moving to higher and higher frequencies, the performance advantages of MEMS devices over their competitors are getting larger. Also, at frequencies where the signal wavelengths are getting closer to the device dimensions, it is possible to miniaturize a complete RF system on a chip, and different ways of interaction between the microwave signals and the micromechanics lead to new classes of RF MEMS devices [15]. Even if, in recent years, silicon micromachining has been rapidly augmented with new material and processes [2], monocrystalline silicon, besides silicon carbide, still is the most robust and reliable structural material for micromachined devices. Its yield strength exceeds steel by a factor of 2–3, and it maintains its elastic properties under large stress levels even when exposed to elevated temperatures [16]. Monocrystalline silicon is available as high-purity low-cost substrate, can be supplied in a large variety of doping levels, and has good thermal conductivity. Because of these advantages, in combination with silicon offering the largest variety of wafer-scale micromachining processes, silicon is still the best suitable material for integrated microsystems with high demands on mechanical reliability [1]. Monocrystalline silicon has been successfully applied to a variety of MEMS devices including pressure sensors, accelerometers [17], undeformable sub-nm-flatness micromirror arrays [18], and robust microrelays [19, 20]. Conventional RF MEMS devices for microwave applications are based on movable thin metallic bridges, either employed as capacitive switches [21] or as tuneable capacitors for distributed MEMS transmission line phase shifters [9]. In contrast to silicon, such metallic bridges have the disadvantage of being susceptible to plastic deformation, especially at slightly elevated temperatures above 80 ◦ C where gold, the most favored material because of its low resistivity, quickly looses its elastic properties. Furthermore, these bridges must be thin enough for actuation at acceptable actuation voltages which drastically limits the power handling. Besides silicon being an excellent structural material for MEMS moving elements, high-resistivity silicon (HRS) is also a promising substrate material for RFIC tech-

MONOCRYSTALLINE-SILICON MICROWAVE MEMS DEVICES

91

nology. HRS substrates, including silicon-on-insulator (SOI) wafers, are available at relatively low cost with a controllable bulk resistivity as high as 8 k Ω cm, which guarantees for sufficiently low losses even if not reaching the resistivity of good microwave GaAs or quartz substrates of 107 k Ω cm. However, for transmission lines fabricated on HRS substrates, free carriers within the interface between the silicon and the silicon dioxide layer on the surface reduce the effective resistivity by more than one order of magnitude, which necessitates the application of surface passivation techniques [22]. The present work describes microwave MEMS devices developed at the Royal Institute of Technology, Stockholm, Sweden, during 2005–2008. All devices are based on monocrystalline bulk silicon as the structural and in some cases also as the dielectric material. A very low insertion-loss, mechanically multi-stable, static zero-power consuming, laterally moving microswitch concept with its actuation mechanism integrated into a coplanar waveguide is presented in Section 2. Furthermore, in Section 3, a loaded-line phase shifter is discussed which utilizes high-resistivity monocrystalline silicon as dielectric material for a moving block, proving the good microwave properties of HRS by its excellent performance throughout the whole W-band. Finally, in Section 4, a tuneable high-impedance surface based on distributed MEMS capacitors with a transfer-bonded monocrystalline silicon core for high-reliability is presented.

2. Mechanically multi-stable, CPW embedded microswitches The presented electrostatically actuated metal-contact RF MEMS switch concept, illustrated in Figure 1, combines the following special features in a very unique way: – Mechanical multi-stability The switch designs are fully mechanically stable in both the on-state and in the off-state, i.e. the states are maintained without applying any external actuation energy, resulting in true static zero-power-consumption. External voltage only needs to be applied for the transition between the stable states. Conventional MEMS switches need external driving voltage at least in one of the states, and even if very low-power electrostatic actuation is employed, the driving circuitry of such switches consumes a considerable amount of energy. The mechanical bi-stability of the presented single-pole-single-through (SPST) twoport designs is achieved by perpendicularly arranged cantilevers with interlocking hooks. The actuation sequence for interlocking and for unlocking the cantilevers in

Figure 1. Conceptual illustration of the presented static zero-power-consumption coplanarwaveguide integrated metal-contact MEMS switch.

92

J. OBERHAMMER, M. STERNER AND N. SOMJIT

Switch OFF

Switch ON

IN

IN

OUT

OUT

Figure 2. Actuation phases illustrating the sequence of the transition between the two mechanically stable states of the presented co-planar waveguide integrated switches [23].

–

–

–

–

the transition between the on and the off-state is shown in Figure 2. The singlepole-double-through (SPDT) three-port devices as shown in Figure 3d consist of cantilevers for each output port which can be interlocked with the cantilever(s) of the input port [24, 25]. Coplanar-waveguide signal-line integration: Since the current in a coplanar waveguide transmission line is confined to the edges of the metal conductors, the inside of the signal line is field-free. Thus, the complete switch mechanism is placed inside the signal line of a coplanar waveguide transmission line, which results in much lower impact on the wave propagation in the slots, as compared to conventional MEMS switches where the actuator is built on top of the transmission line. Two switch interlocking cantilever mechanisms are placed symmetrically on each side of the signal line to maintain a balanced wave propagation mode in the two signalto-ground gaps. The transmission line employed in this design is a 3D micromachined coplanar waveguide, where, in contrast to planar coplanar waveguides were the current is crowded in the thin edges of the metal lines, the currents are propagating in the metalized side-walls of the 30 µm deep trenches. This reduces dielectric substrate losses, since most of the electric field lines are concentrated in the open space and not penetrating into the substrate, and also decreases ohmic losses since the skin-depth limits the current mainly laterally [23]. Active opening capability: For the present concept, the transition from the off-state of the on-state is done by actively separating the contacts by electrostatic forces, in contrast to most MEMS switches which are passively opened by a very limited restoring spring force. The active opening capability ensures large opening forces potentially improving the contact reliability and allowing for soft metal contacts with low contact resistance and low material resistivity, such as gold [26]. Uncomplicated fabrication of the switches together with the 3D transmission lines by bulk micromachining deep reactive ion etching of the structures 30 µm deep into the device layer of a high-resistivity silicon (>4 k Ω cm) SOI wafer, followed by a wet release of the moving parts by underetching the burried-oxide (BOX) layer in hydrofluoric acid, by a mask-less gold sputtering deposition, and by an electrochemically-assisted selective gold etching process [27]. This fabrication procedure involves only a single photolithographical step and very few process steps, as compared to more complicated multi-mask surface-micromachined fabrication of conventional MEMS switch concepts. Mono-crystalline silicon is used as structural material for all moving parts, providing the best possible mechanical reliability, substantially better than deposited amorphous SiN or SiO2 or electroplated metal structures as used in conventional switch designs. Also, the symmetrical Au–Si–Au metallization of the cantilevers

MONOCRYSTALLINE-SILICON MICROWAVE MEMS DEVICES

(a)

G

(b)

(c)

(e)

(f)

93

G

OUT1 S

S OUT2 G

G G

S

G

IN

(d)

Figure 3. SEM pictures of fabricated microswitches: (a–c) different embodiments A, B, and C of the two-port design (SPST) [23]; (d) three-port device (SPDT) [25]; (e) SPST device with locked cantilevers; (f) with unlocked cantilevers.

drastically eliminates susceptibility to changes in the operation temperature, a typical problem of multi-layer surface micromachined switches. – All-metal switch design: In conventional switches, dielectric layers are employed for preventing short-circuit between the actuation electrodes. Dielectric materials are prone to charging effects resulting in non-reproducible actuation voltages up to rendering the switches inoperable. The present design does not utilize any dielectric layers but uses stopper structures for preventing short-circuit, and all walls are covered with metals [26]. Figure 3 shows scanning electron microscopy (SEM) pictures of three two-port (SPST) and a three-port (SPDT) design, the latter embedded into the T-junction of 3D micromachined coplanar waveguides. Figure 3e, f show the SPST design variant A in its locked and unlocked state. In these close-up views, the 3D structrures of the laterally moving cantilevers and the deep-etched grooves in the transmission lines are visible. For the two-port devices, the two cantilevers of each interlocking-mechanism pair are designed for a deflection of 2.5 and 4.5 µm, and the DC actuation voltages were measured to 23 and 39 V, respectively. The total DC resistance of the closed switches including their 500 µm long transmission line pieces is between 0.9 and 1.2 Ω . The mechanical robustness of the laterally moving switch cantilevers has been verified up to 1.5 × 108 switch cycles at signal current of 1.5 µA and a switching frequency of 3 kHz, after which the tests were discontinued without observing any failure. The RF performance is summarized in Figure 4a, showing the isolation and reflected power of the three SPST design variants in their off state. Figure 4b–d compare the insertion loss and reflections of the three SPST design variants in their closed states to each other and also to straight transmission line pieces and signal lines shaping the geometry of the switch mechanism. The total insertion loss of the best design, variant C, including its transmission line was measured to less than

94

J. OBERHAMMER, M. STERNER AND N. SOMJIT 500 µm

494 µm

440 µm

Reflections S11

Transmission S21 B A C

0.0 -20

(a)

-0.2 -0.3 -0.4 -0.5

switches OPEN

design A

design B

-0.6

design C

0

5

10 15 frequency in GHz

C B A 20

S21 in dB

S11 in dB

-0.1

-30 -40 -50

0

Reflections S11

5

10 15 frequency in GHz

20

Transmission S21 0.0

(b)

B C A

-30 -40

-0.1 S21 in dB

S11 in dB

-20

-0.2

C B A

-0.3 -0.4 -0.5

switches CLOSED

-50

design A

design B

design C

0

5

10 15 frequency in GHz

-0.6

20

Reflections S11

design B

design C

B

-40

A

S11 in dB

S11 in dB

design A

-30

-50

10 15 frequency in GHz

20

-0.1

C

discontinuity in T-line

5

Transmission S21

0.0

-20

(c)

0

-0.2

C B A

-0.3 -0.4 -0.5 -0.6

0

5

10 15 frequency in GHz

20

0

Reflections S11

5

10 15 frequency in GHz

20

Transmission S21 0.0

(d) pure T-line

-30 -40

design B

design C

-0.1

C A B

-0.2 -0.3 -0.4 -0.5

-50

design A

C A B

S11 in dB

S11 in dB

-20

0

5

10 15 frequency in GHz

20

-0.6

0

5

10 15 frequency in GHz

20

Figure 4. RF measurement results of the SPST design variants, as compared to straight transmission line pieces and lines with a geometry corresponding to the switch designs [23].

–0.15 and –0.35 dB at 2 and 10 GHz, respectively. The isolation for the same design was determined to –45 and –25 dB at 2 and 10 GHz, respectively. The 3D micromachined transmission lines alone where found to have a loss of less than –0.4 dB/mm up to 10 GHz. When taking into account the losses of the straight transmission line pieces alone, the geometry and the switch mechanism of design variant C has an insertion loss of less than –0.08 dB up to 20 GHz, which demonstrates the low intrusive RF design. For the T-junction SPDT switches, the isolation in the open state was measured to –43 and –22 dB at 1 and 10 GHz, respectively. The total insertion loss of the closed switch including the T-junction was determined to –0.31 and –0.68 dB at 1 and 10 GHz, respectively, and the line reflections in the on-state are –29 and –22 dB at these frequencies. Reference measurements show that the insertion loss of a solid signal line in the T-junction amounts to the major part of the losses with –0.15 and –0.43 dB at 1 and 10 GHz, respectively.

3. W-band 4.25 bit MEMS moving dielectric-block phase shifter The concept of a single stage of the novel phase shifter concept is depicted in Figure 5. A monocrystalline high-resistivity silicon (>4 k Ω cm) dielectric block is placed on top

MONOCRYSTALLINE-SILICON MICROWAVE MEMS DEVICES

95

Figure 5. Concept of the MEMS movable dielectric block phase shifter [28].

of a 1 µm thick gold coplanar waveguide. The relative phase shift ∆φ is achieved by vertically moving the dielectric block above the transmission line by electrostatic actuation, which results, due to the modulation of the capacitive load of the line, in varying propagation constants of the microwave signal in the transmission line. Silicon is a very suitable material for this task because of its high dielectric constant of 11.9, resulting in high sensitivity to the block position. The 50 µm deep etched slots into the high-resistivity silicon substrate decrease substrate loss and decrease the effective ǫr of the transmission line, thus further increasing the sensitivity to the silicon dielectric block. The length of the dielectric block is chosen to be λ/2 at the nominal frequency of 75 GHz to minimize the RF signal reflection from both edges of the dielectric block. For digital-type operation (up-state or pulled-in), an initial distance of the block of 5 µm to the transmission line is chosen, which is an optimum operation point compromising high phase-shift sensitivity with a displacement realizable by MEMS electrostatic actuators. The silicon blocks are fabricated by polymer transfer bonding [29] of a complete 30 µm thick silicon device layer from an SOI wafer to the target wafer, by subsequent removing of the SOI handle wafer and by structuring the block with its mechanical springs by different deep-reactive-ion etching steps. Dielectric charging of the block in the downstate is avoided by small SiN distance keepers [28].

(a)

(b)

Figure 6. (a) SEM picture of a 45◦ , a 30 ◦, and a 15 ◦ stage in series; (b) 7-stage phase phase shifters at 75 GHz: binary coded 5 × 45◦ + 30◦+15◦ phase shifter (left), and 7 × 45◦ linear coded phase shifter (right).

96

J. OBERHAMMER, M. STERNER AND N. SOMJIT

(a)

(c)

(b)

(d)

Figure 7. Performance of the binary coded phase shifter for the W-band: (a) insertion loss and return loss for actuating 1–7 stages; (b) phase shift per length and phase shift per loss. Nonlinearity investigation: (c) relative phase shift of a 45◦ stage depending on signal power; (d) intermodulation product and intercept point of third order.

For releasing the silicon block, the polymer sacrificial layer is etched through etchholes in the block. When properly choosing the etch-hole sizes, which are in the order of 100 times smaller than the wavelength, the effective dielectric constant of the block can be tailor-made, giving the possibility of designing phase-shifter stages of different relative phase shifts out of the same material. Figure 6a shows a SEM picture of three stages with different etch-hole sizes, resulting in a 45◦ , a 30◦ , and a 15◦ phase shift. Figure 6b presents multi-stage phase shifters constructed with these stages: a 4.25 bit binary coded phase shifter with 15◦ resolution and a maximum phase shift of 270◦ at 75 GHz, consisting of 5×45◦ +1×30◦ +1×15◦ stages, and a linear coded 3 bit phase sifter with a resolution of 45◦ and a maximum phase shift of 360◦ at 75 GHz, created by 7 × 45◦ stages. Figure 7a, b summarize the performance of the binary coded phase shifter: the maximum insertion loss and return loss at the design frequency of 75 GHz is –3.5 and –17 dB, respectively, and the maximum insertion and return loss in the whole 75–110 GHz band are better than –4 and –12 dB. The phase shift per loss is 71.05 and 98.3 ◦ / dB at 75 and 110 GHz, respectively, and the phase shift per length is 490 and 716 ◦ /cm at these frequencies. These results of the first prototypes show the best

MONOCRYSTALLINE-SILICON MICROWAVE MEMS DEVICES

97

maximum loss per bit and return loss ever reported for the whole W-band, 1 clearly proving the potential of this novel phase shifter concept. As any (MEMS) phase shifter, the moving parts in the up-state are susceptible to self-modulating their deflection, since the voltage on the signal line also exerts an attracting force, if the signal line voltage is modulated with a frequency lower than the mechanical resonance frequency (60 kHz for the presented designs). This demodulation effect of the RF signal is caused since the electrostatic force is proportional to the square of the voltage. Figure 7c shows the measured change in phase shift for a 45 ◦ stage in the up-state, depending on the signal line power. The phase error at 35 dBm signal power is still below 2%, but reaches quickly 4% at 40 dBm. This behavior results in an intermodulation intercept point of third order of 48 dBm up to a signal power of 30 dBm, which emphasizes the excellent linearity behavior of the device (Figure 7d). All moving parts, including the blocks and the mechanical springs, are fabricated out of the same monocrystalline silicon block, and no other materials are employed. This guarantees best reliability, which was proved by life-cycle tests. All tested devices could be actuated to 1 billion cycles in a nonhermetic environment without any failure, and after which the tests were discontinued. Also, in contrast to conventional MEMS phase shifters where the power handling is limited by the critical current density in the thin metallic bridges, the power handling of this phase shifter concept is not limited by the moving parts, but just by the actual transmission lines and the substrate as a heat sink.

4. MEMS tuneable high-impedance surfaces High-impedance surfaces (HIS) exhibit unnaturally high surface impedance approaching ±j∞ at their resonance frequency and have attracted attention because of their promising applications in improvement of antenna radiation patterns, suppression of surface waves [32] and phase shifting [33].

(a)

(b)

Figure u r 8. Illustration of (a) MEMS tuneable high-impedance surface; (b) reflective beam-steering with MEMS HIS [15].

______

1 Except for [30] which has better performance at its nominal frequency only, but performs worse for the rest of the W-band, and is fabricated on glass substrate.

98

J. OBERHAMMER, M. STERNER AND N. SOMJIT

(a)

(b)

Figure 9. (a) Cross-section of a single element [15]; (b) RF characterization [15, 31].

The concept of using distributed MEMS actuators for local tuning of the surface resonance frequency is illustrated in Figure 8a, along with the application in reflective millimeter-wave beam steering by a single chip, utilizing the phase-shifting effect of the surface since the reflection coefficient has a steep phase transition between +180◦ and –180 ◦ around its resonance frequency [34]. The micromachined elements uniquely unify electromechanical tuneability with microwave functionality in one and the same distributed high-impedance surface elements, thus presenting a new class of microsystems interacting with microwaves. The high-impedance surfaces presented in this section are composed of an array of electrostatically tuneable elements, based on vertically moveable conductive membranes and conductive patches on the surface of a ground-backed 100 µm thick low-loss glass substrate (Figure 9a). The process design of the membranes is quite unique in contrast to conventional MEMS tuneable capacitors which are based on thin metallic bridges: A 1 µm thick monocrystalline silicon core is used for the membrane to provide mechanical robustness and for optimized membrane flatness, and is transfer-bonded to the target substrate by adhesive bonding [29]. For electrical purpose, the membrane is clad on both sides by 0.5 µm gold, the top layer before and the bottom layer after the transfer bonding.

Figure 10. SEM pictures of a fabricated high-impedance surface array with close-up views [15].

MONOCRYSTALLINE-SILICON MICROWAVE MEMS DEVICES

99

This symmetric deposition is designed for high process robustness, since it guarantees a stress-free sandwich structure without having to tune the stress in the metallic layers. The membrane is electrically and mechanically connected by meander shaped springs to the supporting metal posts, before free-etching of the membranes by plasma-etching the polymer bonding layer is done. Figure 10 shows SEM pictures of a fabricated prototype device, an array of a size of 70 × 18.5 mm 2 with 200 × 52 elements. The reflective properties of the surfaces were evaluated by back-short termination of a rectangular WR-10 waveguide, showing the characteristic phase transition of over 245◦ at 112 GHz, shown in Figure 9b [15, 31]. The actuation voltage was measured to 15.9 V, well corresponding to the 15.4 V predicted by FEM simulations.

Acknowledgements Funding for some parts of the work is provided through the NORDITE Scandinavian ICT Programme (VINNOVA, TEKES, RCN) and the European Community’s Seventh Framework Programme FP7/2007–2013 under grant agreement no. 224197.

References 1. G. T. A. Kovacs, Micromachined Transducers Sourcebook, 1st ed. New York: McGrawHill, 1998. 2. C. Liu, Foundations of MEMS. Pearson Prentice Hall, 2006. 3. M. J. Madou, Fundamentals of Microfabrication: the science of miniaturization, 2nd ed. Boca Raton, London, New York, Washington D.C.: CRC Press, 2002. 4. G. M. Rebeiz, RF MEMS Theory, Design and Technology, 1st ed. Hoboken, New Jersey: Wiley, 2003. 5. E. Brown, “RF-MEMS switches for reconfigurable integrated circuits,” IEEE Transactions on Microwave Theory and Techniques, vol. 46, no. 11, pp. 1868–1880, 1998. 6. H. D. Nguyen, D. Hah, P. R. Patterson, R. Chao, W. Piyawattanametha, E. K. Lau, and M. C. Wu, “Angular vertical comb-driven tunable capacitor with high-tuning capabilities,” IEEE Journal of Microelectromechanical Systems, vol. 13, no. 3, pp. 406–413, June 2004. 7. H. Jiang, Y. Wang, J.-L. Yeh, and N. Tien, “On-chip spiral inductors suspended over deep copper-lined cavities,” IEEE Trans. on Microwave Theory and Techniques, vol. 48, no. 12, pp. 2415–2423, Dec. 2000. 8. C. T.-C. Nguyen, “MEMS technology for timing and frequency control,” IEEE Transactions on Ultrasonics, Ferroelectrics, and Frequency Control, vol. 54, no. 2, pp. 251–270, Feb 2007. 9. G. M. Rebeiz, G.-L. Tan, and J. S. Hayden, “RF MEMS phase shifters: design and applications,” IEEE Microwave Magazine, vol. 3, no. 2, pp. 72–81, June 2002. 10. J. Papapolymerou, K. Lange, C. Goldsmith, A. Malczewski, and J. Kleber, “Reconfigurable double-stub tuners using MEMS switches for intelligent RF front-ends,” IEEE Trans. on Microwave Theory and Techniques, vol. 51, no. 1, pp. 271–278, Jan. 2003. 11. B. Cetiner, J. Qian, H. Chang, M. Bachman, G. Li, and F. De Flaviis, “Monolithic integration of RF MEMS switches with a diversity antenna on PCB substrate,” IEEE Trans. on Microwave Theory and Techniques, vol. 51, no. 1, pp. 332–335, Jan. 2003. 12. I. Llamas-Garro and A. Corona-Chavez, “Micromachined transmission lines for millimeterwave applications,” in Electronics, Communications and Computers, 2006. CONIELECOMP 2006. 16th International Conference on, 2006, pp. 15–15. 13. H. A. C. Tilmans, W. De Raedt, and E. Beyne, “MEMS for wireless communications: ‘‘from RF-MEMS components to RF-MEMS-SiP’,” IOP Journal of Micromechanics and Microengineering, vol. 13, no. 4, pp. S139–S163, July 2003. 14. J. DeNatale and R. Mihailovich, “RF MEMS reliability,” in Proc. Transducers 2003, Boston, MA, USA, June 8–12, 2003, pp. 943–946.

100

J. OBERHAMMER, M. STERNER AND N. SOMJIT

15. M. Sterner, D. Chicherin, A. V. R¨ ais¨ anen, G. Stemme, and J. Oberhammer, “RF MEMS high-impedance tuneable metamaterials for millimeter-wave beam steering,” in Proceedings IEEE/ASME Micro-Electro-Mechanical Sytems MEMS 2009, Sorrento, Italy, Jan. 25–29, 2009, pp. 896–899. 16. K. Petersen, “Silicon as a mechanical material,” Proceedings of the IEEE, vol. 70, no. 5, pp. 420–457, May 1982. 17. T. Fujita, Y. Fukumoto, F. Suzuki, and K. Maenaka, “SOI-MEMS sensor for multienvironmental sensing-system,” in Proc. IEEE Networked Sensing Systems, 2007, Braunschweig, Germany, June 6–8, 2007, pp. 146–149. 18. F. Niklaus, S. Haasl, and G. Stemme, “Arrays of monocrystalline silicon micromirrors fabricated using CMOS compatible transfer bonding,” IEEE Journal of Microelectromechanical Systems, vol. 12, no. 4, pp. 465–469, Aug. 2003. 19. M. Sakata, Y. Komura, T. Seki, K. Kobayashi, K. Sano, and S. Horiike, “Micromachined relay which utilizes single crystal silicon electrostatic actuator,” in Proc. IEEE Micro Electro Mechanical Systems 1999, Orland, FL, USA, Jan. 17–21, 1999, pp. 21–24. 20. A. Weber, J. Lang, and A. Slocum, “{111} Si etched planar electrical contacts for power MEMS-relays,” in 53rd IEEE Holm Conference on Electrical contacts – 2007, Pittsburgh, PA, USA, Sept. 16–19, 2007, pp. 156–159. 21. C. Goldsmith, J. Ehmke, A. Malczewski, B. Pillans, S. Eschelmann, Z. Yao, J. Brank, and M. Eberly, “Lifetime characterization of capacitive RF MEMS switches,” in Proc. IEEE MTT-S Int. Microwave Symposium, Phoenix, AZ, USA, May 20–25, 2001, pp. 779–808. 22. D. Lederer and J.-P. Raskin, “New substrate passivation method dedicated to HR SOI wafer fabrication with increased substrate resistivity,” IEEE Electron Device Letters, vol. 26, no. 11, pp. 805–807, Nov. 2005. 23. M. Sterner, N. Roxhed, G. Stemme, and J. Oberhammer, “Coplanar-waveguide embedded mechanically-bistable DC-to-RF MEMS switches,” in IEEE/MTT-S International Microwave Symposium (IMS), Honolulu, HI, USA, June 3–8, 2007, pp. 359–362. 24. J. Oberhammer, M. Tang, A.-Q. Liu, and G. Stemme, “Mechanically tri-stable, true singlepole-double-throw (SPDT) switches,” Journal of Micromechanics and Microengineering, vol. 16, no. 11, pp. 2251–2258, September 2006. 25. M. Sterner, N. Roxhed, G. Stemme, and J. Oberhammer, “Mechanically tri-stable SPDT metal-contact MEMS switch embedded in 3D transmission line,” in 37th European Microwave Conference (EuMC), Munich, Germany, Oct. 8–12, 2007, pp. 1225–1228. 26. J. Oberhammer and G. Stemme, “Active opening force and passive contact force electrostatic switches for soft metal contact materials,” Journal of Microelectromechanical Systems, vol. 15, no. 5, pp. 1235–1242, 2006. 27. M. Sterner, N. Roxhed, G. Stemme, and J. Oberhammer, “Maskless selective electrochemically assisted wet etching of metal layers for 3d micromachined soi rf mems devices,” in IEEE 21st International Conference on Micro Electro Mechanical Systems (MEMS), Jan. 2008, pp. 383–386. 28. N. Somjit, G. Stemme, and J. Oberhammer, “Novel concept of microwave MEMS reconfigurable 7 ×45◦ multi-stage dielectric-block phase shifters,” in Proc. IEEE/ASME Micro Electro Mechanical Systems 2009, Sorrento, Italy, Jan. 25–29, 2009, pp. 15–18. 29. F. Niklaus, P. Enoksson, P. Griss, E. K¨ alvesten, and G. Stemme, “Low-temperature waferlevel transfer bonding,” IEEE Journal of Microelectromechanical Systems, vol. 10, no. 4, pp. 525–531, 2001. 30. J. Hung, G. Dussopt, and M. Rebeiz, “Distributed 2- and 3-bit W-band MEMS phase shifters on glass sustrates,” IEEE Transactions on Microwave Theory and Techniques, vol. 52, no. 2, pp. 600–606, Feb. 2004. 31. D. Chicherin, S. Dudorov, J. Oberhammer, M. Sterner, and A. V. R¨ ais¨ anen, “Microfabricated high-impedance surface for millimeter wave beam steering applications,” in Proc. of 33rd International Conference on Infrared, Millimeter, and Terahertz Waves, Pasadena, CA, USA, Sept. 15–29, 2008. 32. D. Sievenpiper, “High-impedance electromagnetic surfaces,” Ph.D. dissertation, Dept. Elect. Eng., Univ. of California, Los Angeles, 1999. 33. J. Higgins, H. Xin, A. Sailer, and M. Rosker, “Ka-band waveguide phase shifter using tunable electromagnetic crystal sidewalls,” IEEE Trans. Microw. Theory and Techniques, vol. 51, no. 4, pp. 1281–1288, April 2003. 34. D. Chicherin, S. Dudorov, D. Lioubtchenko, V. Ovchinnikov, and A. R¨ ais¨ anen, “Millimetre wave phase shifters based on a metal waveguide with a MEMS-based high-impedance surface,” in Proceedings of the 36th European Microwave Conference, September 2006, pp. 372–375.

THREE-DIMENSIONAL PHOTONIC CRYSTALS BASED ON OPAL-SEMICONDUCTOR AND OPAL-METAL NANOCOMPOSITES

VALERY G. GOLUBEV Ioffe Physical-Technical Institute RAS, 26 Polytekhnicheskaya street, St Petersburg 194021, Russian Federation, E-mail: [email protected]

Abstract This paper presents an overview of our recent activity on fabrication and investigation of three-dimensional opal-semiconductor and opal-metal photonic crystals. The main goal of our work is to create materials where functional properties of opal pore fillers could be combined with unique features of photonic crystals based on synthetic opals. The novel properties of such materials open new possibilities to mould and control emission and propagation of light in visible and near-infrared photonic and optoelectronic devices.

Keywords: Photonic crystal, synthetic opal, photonic band gap, semiconductor, metal, emitting properties, optical switching, phononic band gap.

1. Introduction Photonic crystals (PCs) – materials with a periodical modulation of dielectric permeability on the scale of the order of the light wavelength – are most promising candidates for making photonic microchips. The photonic band structure of such materials is determined by the PCs lattice period and symmetry and also by the dielectric contrast, i.e., the ratio between dielectric permeabilities of the components that comprise the PCs. Similar to the forbidden band gap structure of atomic crystals, the PCs have frequency regions (photonic band gaps – PBGs) in which light propagation inside the PC is suppressed in one direction or all crystallographic directions (a complete PBG). PBG results from Bragg diffraction of electromagnetic waves from the periodic PC structure [1–4]. It is just the PBG that allows control of spontaneous emission and leads to light localization. This opens up the way to application of PCs in optical communication and information transmission systems, laser technology, quantum computers, etc. A good example of a 3D PC, i.e., a crystal possessing a PBG, is synthetic opal. Synthetic opals have a face-centered cubic (fcc) lattice made up of closely packed monodisperse amorphous SiO2 (a-SiO2) spheres with a diameter varying in E. Gusev et al. (eds.), Advanced Materials and Technologies for Micro/Nano-Devices, Sensors and Actuators, DOI 10.1007/978-90-481-3807-4_8, © Springer Science + Business Media B.V. 2010

101

102

V.G. GOLUBEV

the range of 100–1,000 nm. The PBG position and width can be changed from the ultra-violet to near-infrared regions by varying the a-SiO2 sphere size and by filling the interconnected opal pores with various functional materials having a refractive index different from that of a-SiO2 [4]. This report presents experimental results on spontaneous emission and its control with a specially synthesized three-dimensional (3D) PCs based opal-Er [5] and opal-phosphor [6, 7] nanocomposites. The report describes also experimental demonstration of a femtosecond control of light beams in high-contrast opal-Si [8, 9] and opal-VO2 [10, 11] PCs where the complete PBG can be implemented. An ultrafast control of light beams is achieved by changing the dielectric permeability of a semiconductor at photoexcitation when free carriers are generated in it. As a result, the optical properties of the nanocomposites can be governed by an external light source, which is promising for all-optical switching applications. The periodicity of dielectric constants in opals is accompanied by a periodicity of acoustic impedance. The elastic coupling between a-SiO2 spheres composing opal films brings forth 3D periodic structures which, in addition to the PBG, are predicted to exhibit complete phononic band gaps. In this report, the influence of elastic crystal vibrations on the photonic band structure studied by injection of coherent hypersonic wave packets generated in a metal transducer by subpicosecond laser pulses is demonstrated. These studies show that light with the energies close to the PBG is efficiently modulated by hypersonic waves [12].

2. Luminescence properties of opal–erbium nanocomposites In the present study, the trivalent erbium ion Er3+ was chosen as an emitting center to be embedded in an opal matrix. Erbium-containing materials enjoy broad application in telecommunications and optoelectronics [13]. The wavelength of the main Er3+ ground-state transition, 1.54 µm, coincides with the standard wavelength in use in optical telecommunication systems determined by the quartz waveguide transparency window. The Er3+ ion can also efficiently emit light at other discrete wavelengths in the visible and near-IR spectral regions determined by the structure of the excited states of this ion [13]. It is essential that the optical transitions occur in the 4f 11 inner shell of the Er3+ ion, which is screened by the outer electronic shells; therefore, the spectral widths of the corresponding emission lines are narrower than the opal PBG width. We chose synthetic opals with a polydomain structure as the starting matrices. The size of a domain with a highly ordered a-SiO2 sphere arrangement was 30–100 µm. Samples were platelets 5 × 5 × 0.1 mm in size cut parallel to the opal (111) plane. The SiO2 sphere diameter was 230 ± 5 nm. The dimensions of interconnected octahedral and tetrahedral pores were roughly 90 and 45 nm, respectively. The opal pores were initially filled with erbium nitrate in the form of a water solution at room temperature. Subsequent thermal decomposition of the erbium nitrate (at 500°C over 1 h) produced erbium oxide Er2O3 in the pores. The volume

THREE-DIMENSIONAL PHOTONIC CRYSTALS

103

fraction of filled opal pores was determined gravimetrically to be approximately 11% of the total pore volume. Because of the use of a water solution, the Er2O3 formed in pores contained a large amount of hydroxyl groups, which are strong quenchers of Er photoluminescence (PL) [13]. To reduce the concentration of hydroxyl groups and increase the PL intensity, the samples were annealed in air at 850°C for 1 h. To study the emitting properties of the opal–Er composite, PL spectra were measured at nitrogen temperature in the visible and near-IR ranges. The Er3+ photoluminescence was excited with an Ar+ laser at a wavelength of 488 nm (in the vicinity of the 4I15/2 → 4F7/2 transition in the 4f11 shell of the Er3+ ion). The laser beam was focused on the sample to a spot 0.5 mm in diameter. The incident power density did not exceed 5 W/cm2.

Figure 1. Photoluminescence spectrum of the opal–Er composite obtained at nitrogen temperature in the (a) visible and (b) near-IR region. The sample was annealed in air at T = 850°C for 1 h. Peaks 1–5 are Er3+ photoluminescence lines corresponding to the transitions 4 S3/2 → 4I15/2 (550 nm), 4S3/2 → 4I13/2 (860 nm), 4I11/2 → 4I15/2 (980 nm), 4S3/2 → 4I11/2 (1240 nm), and 4I13/2 → 4I15/2 (1540 nm) respectively.

It has been shown that Er is contained in two phases, one of which is amorphous, in the form of a layer on the surface of a-SiO2 spheres, and the other is polycrystalline, in filled pores whose fraction is small. Electron microscope studies revealed that Er is deposited on the pore surface as a thin amorphous coating (presumably, Er2Si2O7) in practically all pores. This permits one to maintain that it is this phase that Er predominantly enters. Only a small fraction of pores is filled completely with polycrystalline Er2O3. Optical measurements showed that the synthesized opal–Er composite retains the PBG properties of the original opal matrix.

104

V.G. GOLUBEV

When pumped resonantly at a wavelength of 488 nm (4I15/2 → 4F7/2 transition), erbium in the composite efficiently emits light in the visible and near IR regions at several discrete wavelengths corresponding to the radiative transitions (Figure 1). Thus, opal–Er nanocomposites combine the PBG properties of opal with the luminescence of Er and can serve as a model object to study the effect of the PBG on the spontaneous emission of radiating centers [5].

3. Electroluminescent three-dimensional photonic crystals based on opal-phosphor nanocomposites In this section, electroluminescent PCs produced by synthesizing the phosphors Zn2SiO4:Mn and ZnS:Mn in opal pores are presented. High luminosity of the emission of these phosphors is due to the intracenter electron transition 4T1 → 6A1 in the 3d-shell of a Mn2+ ion. The transition energy depends on the symmetry of the crystal field, in which this ion is localized. For example, the electroluminescence (EL) peak of Zn2SiO4:Mn is in the green region while that of ZnS:Mn is in the orange region. Details of fabrication of opal-phosphor nanocomposites can be found elsewhere [6, 7]. EL structures were made from synthesized composites by depositing a conductive semitransparent indium-tin oxide layer on one PC facet and a layer of BaTiO3 powder dispersed in an organic compound on another, followed by deposition of a silver paste layer [6]. The structures were excited by an AC electric field, whose characteristics were well below the breakdown threshold (strength ~104–105 V/cm, frequency 0.1–2 kHz). To study the PBG properties of the composites, we measured the angular resolved spectra of Bragg reflection from the (111) surface. The study of the PBG effect on the EL spectra requires that the PBG positions of the composites be overlapped by their emission spectra. The modification of the EL spectrum due to the change of the registration angle is presented in Figure 2a with reference to opal-GaN-ZnS:Mn. One can see that there is a dip in the emission spectrum in the region where the (111) reflection peak (Figure 2b) overlaps with its EL spectrum. When the detection angle increases relative to the normal to the surface, the dip in the EL spectrum is shifted to shorter wavelengths following the shift of the reflection maximum, which obeys Snell’s formula [14]. The sulfide (ZnxCd1−xS:Mn and ZnxCd1−xS:Ag) phosphors were also synthesized directly inside the pores of synthetic opal by chemical bath deposition and their emission spectra are considerably modified by the PC structure to become anisotropic in accordance with the PBG angular dispersion [7]. To summarize, chemical bath deposition was used to produce 3D electroluminescent PCs based on opal-phosphors composites. We have demonstrated the possibility to excite visible light by applying an AC electric field to these PCs and to control the shape of emission spectra by varying the PBG position.

THREE-DIMENSIONAL PHOTONIC CRYSTALS

105

Figure 2. The composite opal-GaN-ZnS:Mn: (a) the EL spectra registered at various angles relative to the normal to the (111) surface of the composite: 1 – 10°, 2 – 20°, 3 – 30°, 4 – 40°, 5 – 50°; (b) the spectra of reflection from the (111) composite surface at various light incidence: 1 – 10°, 2 – 20°, 3 – 30°, 4 – 40°, 5 – 50°.

4. Femtosecond all-optical switching in opal-Si photonic crystals One of the most interesting potential applications of PCs is all-optical switching. A light pulse from an external light source can change the complex dielectric constant and correspondingly change the PBG position and its width, thus, realizing all-optical switching. In this chapter, the results on the transient change in reflectivity of a-nc-Sibased 3D PCs induced by strong irradiation of a femtosecond light pulse are demonstrated. A sketch of our structure is shown in the inset to Figure 3. As a filling substance amorphous-nanocrystalline Si (a-nc-Si) is further advantageous because of its high index of refraction and its suitability to be integrated into microelectronic technology. The voids of the opal were filled with mixed a-nc-Si

106

V.G. GOLUBEV

up to a filling factor close to 100% by thermal decomposition of a 5%-SiH4–Ar gas mixture. The sample was cut in a 0.5-mm thick plate almost parallel to the (111) surface. Further details of the sample fabrication can be found in Ref. [15].

Figure 3. Measured (□) and calculated (––) spectra of Bragg diffraction efficiency of an a-nc-Sibased PC. Insert shows a sketch of the fcc opal-Si structure.

The stationary Bragg reflectance spectra were measured with a halogen lamp and detected by a spectrometer equipped with a CCD. All time-resolved reflectivity measurements were performed by a conventional pump-probe technique [8, 9]. The temporal evolution of the relative transient change in the Bragg reflection ∆R(t)/R induced by a strong (5 mJ/cm2) optical pump pulse is shown for three probe wavelengths in Figure 4, the solid curve at 780 nm (PBG region), and the dashed at 760 nm and dotted curves at 850 nm (wings of the PBG). The reflection signal shows an abrupt decrease directly after the arrival of the pump pulse (t = 0) and partly recovers on a picosecond timescale. The changes in the Bragg reflection are maximum at the PBG where they reach ∆R(t)/R = –46%. The inset to Figure 4 displays the time trace of ∆R(t)/R measured at λ = 800 nm at a lower pump power density (70 µJ/cm2) and higher temporal resolution. Here, the amplitude of the relative changes in reflectivity is ∆R/R = −1.2 × 10−2. The initial peak in ∆R/R occurs when pump and probe overlap in time and can be explained by the instantaneous Kerr effect. The decay at longer delays appears to have a multi-exponential shape with the time constants τ ~ 0.5 ps and τ ~ 5 ps. The fact that the ultrafast switching takes place within 30 fs suggests that induced changes are caused by photoexcited carriers in a-nc-Si. Photoinduced changes in the real and imaginary parts of the a-nc-Si refractive index suppress the Bragg interference of the light inside the PC and diminish the Bragg reflection. This results in a rapid switching of the reflectivity of the opal-a-nc-Si nanocomposites on the detected wavelength.

THREE-DIMENSIONAL PHOTONIC CRYSTALS

107

Figure 4. Time-resolved transient differential reflection ∆R(t)/R at 760 nm (- - -), 780 nm (––), and 850 nm (······) in case of high-power (5 mJ/cm2) optical pulse excitation. Insert shows ∆R(t)/R at 800 nm in case of moderate (70 µJ/cm2) optical pulse excitation, measured with a higher temporal resolution (30 fs).

In conclusion, we have demonstrated a strong ultra-fast response in the reflectivity of a-nc-Si-based 3D PCs. It is shown that the switching time is less than 30 fs and determined by the pump pulse duration. The recovery time is in the order of several picoseconds. The observed transient changes in the Bragg reflectivity at high excitation power density can be as high as 46%. Our results are relevant for realizing an all-optical switching device based on a-nc-Si and operated at the sub-picosecond timescale.

5. Subpicosecond switching of the photonic band gap in opal-VO2 photonic crystal governed by a photoinduced semiconductor– metal phase transition One way to switch the spectral position of a PBG is to use a photoinduced phase transition, accompanied by permittivity changes of the constituents forming the 3D PC. The excitation of the PC material by intense laser pulses with a photon energy higher than its fundamental band gap generates hot carriers which, in turn, induces the phase transition directly or indirectly via generation of phonons. In both cases the temporal and spatial evolutions of the photoinduced phase transition during and after the laser pulse are governed by the kinetic properties of the photoexcited quasiparticles (electrons, phonons, plasmons, etc.). In this chapter, we present femtosecond shifting of the PBG in a synthetic opal filled with vanadium dioxide (VO2). The samples were fabricated from an opal template composed of 240 µm diameter monodispersed (±5%) a-SiO2 spheres. The voids of the opal were impregnated with VO2. The details of the fabrication

108

V.G. GOLUBEV

method and the linear optical properties can be found elsewhere [12]. We take advantage of the structural phase transition in VO2 at Tc = 67°C that can take place on the subpicosecond time scale [16]. In the spectral region of red light, the transition is accompanied by changes in the real part of the refractive index from n(VO2) ≈ 2.9 in the “cold” semiconductor phase to n(VO2) ≈ 2.3 in the “hot” metallic phase. The reflectivity spectrum from the (111) facet of the opal-VO2 composite shows a peak with a maximum at the energy position of the PBG. The inset in Figure 5 shows two spectra measured under steady-state conditions at T = 30 and 90°C, corresponding to the semiconductor and metal phases of VO2, respectively. The high-energy shift of the spectrum and therefore of the PBG at elevated T is due to changes in the average permittivity of the composite, induced by the phase transition. As the reflectivity spectra are not symmetric, for a quantitative description of energy shifts, the first moments of the measured spectra were analyzed and associated with the PBG spectral position. Figure 5 shows the hysteresis loop of the measured shift ∆E(T) relative to the energy in the semiconductor phase. We observe a shift up to 90 meV, which is the maximum possible value for the used technology of pore filling with VO2. The hysteresis behavior of ∆E(T) in the heating and/or cooling cycle is governed by the properties of the phase transition

Figure 5. Hysteresis loop for the temperature dependence of the Bragg reflectivity peak energy in the opal-VO2 composite measured in steady-state experiments. Inset: Reflectivity spectra in the semiconductor (T = 30°C) and metallic (T = 90°C) phases.

THREE-DIMENSIONAL PHOTONIC CRYSTALS

109

in the opal-VO2 composite, the details of which can be found elsewhere [14]. The observation of a hysteresis behavior is a strong evidence of the high quality of the VO2 in the opal pores, as confirmed also by x-ray and Raman studies. Time-resolved pump-probe experiments were carried out using a pulsed Ti:sapphire laser with a regenerative amplifier (wavelength, 800 nm; pulse duration, 200 fs; and maximum pulse energy 10 µJ). For the probe, a sapphire plate was used to convert it into a broad band “white light” pulse. The pulse repetition rate was less than 10 kHz to provide thermal recovery of the sample between pulses. The pump beam density on the sample surface was W = 10–25 mJ/cm2. The spot sizes of the focused pump and probe beams on the sample surface were 100 and 20 µm, respectively. A variable optical delay line was used to adjust the separation t between pump and probe, providing a temporal resolution more than 100 fs [10, 11]. The spectral position of the reflectivity maximum shifts rapidly to higher energies within a time less than a picosecond and then continues to move further on a longer time scale. The inset in Figure 6 shows the temporal evolution of the spectral shift ∆E(t) = E(t) − E0 (E0 is the first moment of the reflectivity in the semiconductor phase) in 125 fs steps. The initial shift of ∆Ei = 25 meV occurs almost instantaneously with the laser pump pulse. The shift shown in the main panel of

Figure 6. Temporal evolution of the Bragg peak energy in the reflectivity spectrum for a pump excitation with W = 20 mJ/cm2. The horizontal arrows show the values of the ultrafast shift (∆Ei) and quasistationary shift (∆Et). The inset does the same with a high temporal resolution in the early time range.

110

V.G. GOLUBEV

Figure 6 has been measured using a longer time step. After the subpicosecond spectral shift of ∆E(t), the shift to higher energies goes on and then tends to saturate at a level ∆Et = 60 meV after a few hundreds of picosecond. Our analysis of the experimental results is based on the fact that the photoinduced phase transition of the VO2 in the opal pores starts in a boundary layer with thickness dc of the optically excited PC surface. The value of dc is on the order of the penetration depth la of the pump light into the opal-VO2 composite. The ultrafast PBG shift due to the photoinduced phase transition in VO2 is determined by two quantities: dc and the fraction α of VO2 in each pore in the excited boundary layer which has undergone the phase transition. For instance, if all VO2 material in this layer become metallic, then α = 1. Otherwise α < 1, which means that not all VO2 crystallites are metallic within the thickness dc. The PBG shift would be equal to the one observed under continuous excitation only if α = 1 and dc were large enough to form a PBG such as in a uniform PC. The kinetics of the PBG shift is governed by the time evolution of dc and of α [11]. In conclusion, we have shown that the ultrafast kinetics of the PBG shift governed by a photoinduced phase transition in a 3D PC has two components. The first one is a subpicosecond shift which takes place almost instantaneously with the femtosecond laser pulse. The second component has a transient time about 100 ps and is governed by spatial redistribution of the semiconductor and metal phases inside the material volume which undergoes phase transition.

6. Hypersonic modulation of light by three-dimensional photonic and phononic band-gap material The periodicity of the dielectric constants in artificially grown structures is generally accompanied by a periodicity of the acoustic impedance. With regard to their acoustic properties they may therefore behave as phononic crystals, in analogy to PCs for light. If the structure acts as a PC operating in the visible, then it shows the features typical of phononic crystals for hypersonic (~1010 Hz) acoustic waves. The combination of optical and hypersonic properties in a single highly ordered periodic structure leads therefore to a new object comprising a photonic and phononic crystal. The opal films with 1 cm2 area were grown by a vertical deposition method [17] on a silica substrate. The a-SiO2 spheres formed a fcc opaline matrix with the (111) plane parallel to the substrate surface. Two samples (1 and 2) were investigated. The sphere diameter in the colloidal suspension was D = 360 nm for both samples. From the scanning electron microscopy it is shown that neighboring spheres are penetrating each other, which is a result of the sintering during the opal formation process. Thus there is a considerable elastic coupling, which may result in formation of a phononic band structure. The elastic coupling parameter χ in the formed photonic–phononic crystal can be defined as χ = D/2a − 1, where 2a is the distance between the centers of neighboring spheres [18].

THREE-DIMENSIONAL PHOTONIC CRYSTALS

111

The idea of the experiment is to inject into the sample a picosecond coherent elastic wave packet from a hypersonic transducer and to make time-resolved measurements of the corresponding changes of the optical Bragg reflectivity spectrum. An aluminum film with a thickness of 100 nm was deposited on an opal sample surface. This metal film played the role of the hypersonic transducer for generation of a picosecond strain pulse to be injected into the opal film. For excitation, 0.3 ps pulses from a Ti:sapphire laser with a regenerative amplifier (λ = 800 nm, repetition rate 250 kHz, and maximum energy per pulse 1 µJ) were used. The pump beam was sent along a variable delay line and focused (200 µm spot diameter) on the metal transducer. The probe pulse was split from the same laser beam and was focused onto the silica substrate exactly opposite to the pump spot [12]. Figure 7a shows the measured reflectivity changes ∆R(t)/R0 for the two samples. R0 is the reflectivity of the probe beam in the absence of pump excitation at a wavelength of 800 nm on a flank of the Bragg peak. After a sharp rise at t = 0, pronounced oscillations of ∆R(t)/R0 are observed. When the background is subtracted, in both cases the oscillatory part of the measured signal cannot be described by a single period and depends on the sample.

Figure 7. (a) Measured ∆R(t)/R0 signals for the two samples. (b) Fourier transforms of the signals in (a). Open circles and dots correspond to samples 1 and 2, respectively.

112

V.G. GOLUBEV

The origin of the oscillations in ∆R(t)/R0 is the elasto-optical effect. Coherent elastic vibrations modulate the period of the opal structure, which consequently results in modulation of the spectral position and width of the PBG. When the probe light wavelength corresponds to one of the spectral wings of the Bragg reflection spectrum the efficiency of the hypersonic light modulation increases enormously. This gives an essential advantage to the use of photonic–phononic crystals for light modulation over traditional acousto-optical materials. The experimentally observed peak at ~11 GHz (Figure 7b) has a frequency close to the purely radial Lamb mode (l = 1, n = 0) of the isolated a-SiO2 sphere at ν1,0 = 10.8 GHz. No distinct peak in the measured spectrum at ν2,0 = 9 GHz which corresponds to the fundamental quadruple mode (l = 2, n = 0) is observed. This frequency would represent the lower limit, if the spheres were decoupled. The exciting experimental fact is that the measured ∆R(t)/R0 spectrum (Figure 7b) clearly shows vibrations with frequencies well below the lowest quadruple mode ν2,0. Elastic vibrations with frequencies below the Lamb modes can exist only if the vibrational modes spread over a distance exceeding the extension of an isolated sphere. Thus the experimental results clearly evidence that the spheres are considerably coupled with each other and the vibrational modes demonstrate phononic crystal behavior. In summary, in 3D opal based photonic–phononic crystals light with a wavelength close to the PBG can be strongly modulated by hypersonic vibrations with frequencies of about 10 GHz [12]. The measured vibrational spectra consist of frequencies lower than the Lamb modes of isolated a-SiO2 spheres. This underlines the importance of elastic coupling between the elementary blocks forming the 3D photonic–phononic crystal. With such a joint system ultrafast manipulation and control of light beams by hypersonic waves in structures which have complete 3D photonic and phononic band gaps may become feasible, promising a new generation of acousto-optical devices.

7. Conclusion This paper reviewed the results on 3D opal-based photonic crystals preparation and optical studies. In order to provide functionality to photonic crystals fabricated, the synthetic opal samples were embedded with Er, phosphors, Si, and VO2. We showed some examples where opal-based photonic crystals were used to modify and control light propagation, since this could have considerable impact on novel photonic and optoelectronic devices. We have also demonstrated that opals possess properties of 3D photonic–phononic crystals. It opens the way for application of opals to micro-nano acousto-optic devices. Acknowledgments The work was supported by the Russian Academy of Sciences and the RFBR (project 08-02-00450a).

THREE-DIMENSIONAL PHOTONIC CRYSTALS

113

References 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11.

12. 13. 14 15.

16. 17. 18.

Photonic crystals. Advances in design, fabrication, and characterization. Ed. By K. Busch, S. Lölkes, R.B. Wehrspohn, and H. Föll. Wiley-VCH Verlag GmbH&Co. KGaA, Weinheim, 2004. J.-M. Lourtioz, H. Benisty, V. Berger, J.-M. Gerald, D. Maystre, and A. Tchelnokov. Photonic crystals. Towards nanoscale photonic devices. Springer-Verlag Berlin Heidelberg, 2005. J.D. Joannopolous, S.G. Johnson, J.N. Winn, R.D. Meade. Photonic crystals. Molding the flow of light. Second edition. Prinston University Press. Prinston and Oxford, 2008. C. López. Materials aspects of photonic crystals. Adv. Mater. 15, 1679–1704 (2003). G.N. Aliev, V.G. Golubev, A.A. Dukin, D.A. Kurdyukov, A.V. Medvedev, A.B. Pevtsov, L.M. Sorokin, and J.L. Hutchison. Structural, photonic band-gap, and luminescence properties of the opal–erbium composite. Phys. Solid State 44, 2224–2231 (2002). S.F. Kaplan, N.F. Kartenko, D.A. Kurdyukov, A.V. Medvedev, and V.G. Golubev. Electroluminescent three-dimensional photonic crystals based on opal-phosphor composites. Appl. Phys. Lett. 86, 071108-1-3 (2005). S.F. Kaplan, N.F. Kartenko, D.A. Kurdyukov, A.V. Medvedev, A.G. Badalyan, and V.G. Golubev. Photo- and electroluminescence of sulfide and silicate phosphors embedded in synthetic opal. Photonics Nanostruct. Fundam. Appl. 5, 37–43 (2007). D.A. Mazurenko, R. Kerst, J.I. Dijkhuis, A.V. Akimov, V.G. Golubev, D.A. Kurdyukov, A.B. Pevtsov, and A.V. Sel`kin. Ultrafast optical switching in three-dimensional photonic crystals. Phys. Rev. Lett. 91, 213903-1-4 (2003). D.A. Mazurenko, R. Kerst, A.V. Akimov, A.B. Pevtsov, D.A. Kurdyukov, V.G. Golubev, A.V. Sel`kin, and J.I. Dijkhuis. Femtosecond Bragg switching in opal-a-nc-Si photonic crystals. J. Non-Cryst. Solids 338–340, 215–217 (2004). D.A. Mazurenko, R. Kerst, J.I. Dijkhuis A.V. Akimov, V.G. Golubev, A.A. Kaplyanskii, D.A. Kurdyukov, and A.B. Pevtsov. Subpicosecond shifting of the photonic band gap in a three – dimensional photonic crystal. Appl. Phys. Lett. 86, 041114-1-3 (2005). A.B. Pevtsov, D.A. Kurdyukov, V.G. Golubev, A.V. Akimov, A.A. Meluchev, A.V. Sel`kin, A.A. Kaplyanskii, D.R. Yakovlev, and M. Bayer. Ultrafast stop band kinetics in a 3D opal-VO2 photonic crystal controlled by a photoinduced semiconductor–metal phase transition. Phys. Rev. B 75, 153101-1-4 (2007). A.V. Akimov, Y. Tanaka, A.B. Pevtsov, S.F. Kaplan, V.G. Golubev, S. Tamura, D.R. Yakovlev, and M. Bayer. Hypersonic modulation of light in three-dimensional photonic and phononic band-gap materials. Phys. Rev. Lett. 101, 033902-1-4 (2008). A. Polman. Erbium implanted thin film photonic materials. J. Appl. Phys. 82, 1–39 (1997). V.G. Golubev, V.Yu. Davydov, N.F. Kartenko, D.A. Kurdyukov, A.V. Medvedev, A.B. Pevtsov, A.V. Scherbakov, and E.B. Shadrin. Phase transition governed opal-VO2 photonic crystal. Appl. Phys. Lett. 79, 2127–2129 (2001). V.G. Golubev, J.L. Hutchison, V.A. Kosobukin, D.A. Kurdyukov, A.V. Medvedev, A.B. Pevtsov, J. Sloan, and L.M. Sorokin. Three-dimensional ordered silicon-based nanostructures in opal matrix: preparation and photonic properties. J. Non-Cryst. Solids 299–302, 1062– 1069 (2002). A. Cavalleri, Cs. Tóth, C.W. Siders, J.A. Squier, F. Ráksi, P. Forget, and J.C. Kieffer. Femtosecond structural dynamics in VO2 during an ultrafast solid-solid phase transition. Phys. Rev. Lett. 87, 237401-1-4 (2001). P. Jiang, J.F. Bertone, K.S. Hwang, and V.L. Colvin. Single-crystal colloidal multilayers of controlled thickness. Chem. Mater. 11, 2132–2140 (1999). G.M. Gajiev, V.G. Golubev, D.A. Kurdyukov, A.V. Medvedev, A.B. Pevtsov, A.V. Sel’kin, and V.V. Travnikov. Bragg reflection spectroscopy of opal-like photonic crystals. Phys. Rev. B 72, 205115-1-9 (2005).

MEMS DEVICE AND RELIABILITY PHYSICS

PULL-IN DYNAMICS OF ELECTROSTATICALLY

ACTUATED BISTABLE MICRO BEAMS

1

SLAVA KRYLOV AND NIR DICK

2

1

Microsystems Design and Characterization Laboratory School of Mechanical Engineering, Faculty of Engineering, Tel Aviv University, Ramat Aviv, 69978, Israel, e-mail: [email protected] 2 Microsystems Design and Characterization Laboratory School of Mechanical Engineering, Faculty of Engineering, Tel Aviv University, Ramat Aviv, 69978, Israel, e-mail: [email protected]

Abstract Bistable micro and nano structures integrated into microsystems exhibit clear functional advantages including the existence of several stable configurations at the same actuation force, extended working range and tunable resonant frequencies. In this work, after a short review of various operational principles of bistable micro devices, we present results of a theoretical investigation of the transient dynamics of an initially curved bistable micro beam actuated by distributed electrostatic and inertial forces. The unique combination of mechanical and electrostatic nonlinearities results in the existence of sequential mechanical (snap-through) and electrostatic (pull-in) instabilities. A phase plane analysis performed using a consistently derived lumped model along with the numerical reduced order model results indicate that the dynamic character of loading may have significant influence on the stability range of the beam. Critical voltages corresponding to the dynamic snap-through and pull-in instabilities are lower than their static counterparts while the minimal curvature required for the appearance of the dynamic snap-through is higher than in the static case.

Keywords: Curved micro beam, electrostatic actuation, dynamic stability, dynamic snapthrough, dynamic pull-in, bistability, phase-plane analysis.

E. Gusev et al. (eds.), Advanced Materials and Technologies for Micro/Nano-Devices, Sensors and Actuators, DOI 10.1007/978-90-481-3807-4_9, © Springer Science + Business Media B.V. 2010

117

118

S. KRYLOV AND N. DICK

1. Introduction Many mechanical structures exhibit bistable behavior, namely, the existence of two different stable configurations at the same loading. The transition between two stable states is commonly refereed as a snap-through buckling. The reason for bistability is geometric nonlinearity and a non-monotonous stiffness – deflection characteristic resulting in the stiffening of the structure in the post-buckling configuration, Figure 1a. The analysis of structures liable to snap-through buckling is a wellestablished topic and widely reported in literature [1–3]. Since bistability could be beneficial in micro devices, significant efforts were devoted to development of bistable micro structures. Generally speaking, bistable microstructures could be subdivided into two groups – mechanically bistable and electrostatically bistable structures. 1 Mechanically bistable devices utilize snap-through buckling associated only with mechanical nonlinearity [4–13]. The loading is typically independent of displacement and realized as mechanical force [4] or provided by magnetic [5–7], thermal [8, 9] or electrostatic comb drive actuators [10–12] or kinematic excitation [13]. Electrostatic bistability is related to the nonlinear dependence of the electrostatic force on the deflections. The transition between two stable states is accompanied by an electrostatic pull-in instability arising due to the generic softening influence of the electrostatic force [14]. When the actuating voltage exceeds a pull-in value, the structure collapses on the electrode. However, if a mechanical constraint is provided limiting the displace-

(a)

(b) Force

Electrode

Stopper

Curved beam

Force

Pull-in

Release

Stopper Endpoint deflection

Snap-through

Release

Midpoint deflection

Beam

Voltage

Figure 1. (a) Mechanically bistable structure: arch-shaped beam. (b) Electrostatically bistable structure: cantilever actuated by a close-gap electrode and a stopper limiting the end point deflection. Gray lines represent an additional stable equilibrium, dashed lines correspond to the unstable configurations.

______ 1

Similar considerations are applicable to magnetically bistable structures which are not considered here.

PULL-IN DYNAMICS OF BISTABLE MICRO BEAMS

119

ment and preventing the contact with the electrode an additional stable equilibrium may exist beyond the pull-in point [15–20] and the system is bistable, Figure 1b. Note that implementation of suspensions with a stiffening force–deflection dependence permits realization of the electrostatic bistability without contact. For example, initially curved microbeam loaded by an electrostatic end force applied along the beam is shown to be bistable in [21]. Pull-in collapse is followed by a straightening of the beam and a steep increase in the mechanical stiffness resulting in an appearance of an additional stable equilibrium. An additional example is a double-clamped straight beam symmetrically actuated by two electrodes [22]. On the other hand, a special arrangement of the electrodes in microactuators may lead to a stiffening rather than softening characteristic of the electrostatic force [23] providing an additional restoring force necessary for the stabilization of the device after pull-in. A bistable tilting micromirror actuated by vertical comb drives was reported in [24]; non-contact electrostatic bistable actuator incorporating slit structures was presented in [25], and the feasibility of multistability in a tilting actuator with multiple close-gap electrodes was theoretically shown in [26]. In all cases, the structures’ suspensions were mechanically linear and bistability appeared only due to the the electrostatic force. In this work we analyze dynamic stability of an initially curved clamped–clamped micro beam actuated by a distributed electrostatic force. The beam is probably the simplest example of the mechanically bistable structure undergoing nonlinear deflection-dependent electrostatic loading (a multistable circular membrane was studied in [27], an electrostatically actuated bistable string was reported in [28]). It was shown theoretically [29, 30] and experimentally [31, 32] that a sufficiently curved electrostatically actuated beam may exhibit sequential snap-through buckling and pull-in instability. The snap-through is followed by a stiffening of the structure and the appearance of an additional stable equilibrium in the post-buckling configuration. Note that interest in this kind of structure is motivated by its functional advantages, mainly in switch-type devices for optical or radio-frequency (RF) applications [33] as well as in micro- and nanomechanical memory devices [34, 35]. Stable deflection of a curved bistable beam is significantly larger and the operational voltages lower than that of a straight beam of similar dimensions. On the other hand, an electrostatically actuated micro beam can be viewed as a kind of benchmark problem, and was intensively investigated (e.g., see reviews [36–38]). Here dynamic snap-through and pull-in instabilities are analyzed mainly for the case of step-function excitation by a suddenly applied voltage. A reduced order model of the device is built using the Galerkin decomposition. A phase plane analysis is performed using a consistently derived single degree of freedom model, the numerical results are obtained using the reduced order model. We show that the presence of two sequential (snap-through and pull-in) instabilities results in rich dynamic behavior of the structure while the response is essentially influenced by an initial curvature of the beam.

120

S. KRYLOV AND N. DICK

zˆ Electrode

xˆ Anchor

zˆ0 ( xˆ )

hˆ L

g0

V

Anchor

dˆ

Figure 2. Model of an initially curved beam actuated by a distributed electrostatic force.

2. The model of a curved beam We consider an initially curved double clamped prismatic micro beam of length L, with a rectangular cross-section of area A and second moment of area Iy . The beam is made of isotropic±¡linear elastic material with an effective (plane strain) modulus ¢ of elasticity E˜ = E 1 − ν 2 , where ν is Poisson’s ratio. The beam is actuated by an electrode located at a distance g0 from the beam’s ends, Figure 2. The initial shape ˆ 0(xˆ) such that max [z0 (xˆ)] = 1, where hˆ is is described by the function zˆ0 (xˆ) = hz the initial elevation (hats denote dimensional quantities). In addition the beam is subjected to a distributed inertial loading ρ Anz gz (where gz = 9.81 m/s2 ) acting in the zˆ-direction due to an accelerated motion of the support (see [13, 39]). The motion of the beam considered in the framework of the Euler–Bernoulli theory and the shallow arch approximation [40] is described by the non-dimensional differential equation (see [31] for the development) IV

Z1

(2hz00 w0 − w02 )dx(hz000 − w00 ) =

w¨ + cw˙ + w − α 0

β (t) + γ (1) (1 + hz0 (x) − w(x,t))

completed by homogeneous boundary conditions. Here w(x,t) is the non-dimensional deflection, ( )0 = ∂ /∂ x, ( ˙ ) = ∂ /∂ t and non-dimensional quantities used in the formulation are listed in Table 1. We assume linear viscous damping and use parallel capacitor approximation for the electrostatic force. Equation 1, which, for a given initial shape z0 (x), contains five control parameters – h, c, α , β , γ – served as a basis for the dynamic stability analysis of the shallow curved beams. TABLE 1. Non-dimensional quantities used in the development. ˆ 0 Coordinate h = h/g Elevation

x = x/L ˆq ˜ y /ρ AL4 Time t = tˆ EI w = w/g ˆ 0 ˆ 0 b = b/g ˆ 0 d = d/g ∗

α = (g20 A)/(2Iy ) ˆ 4V 2 )/(2EI ˜ y g30 )∗ Deflection β = (ε0 bL ˜ y g0 ) ρ AL4 )/(EI Width γ = (nz gzq ˜ y Thickness c = cL ˆ 2 / ρ AEI

ε0 = 8.854 × 10−12 F/m - permittivity.

Stretching parameter Voltage parameter Inertial loading parameter Damping parameter

PULL-IN DYNAMICS OF BISTABLE MICRO BEAMS

121

The dynamic behavior of the beam is analyzed using a reduced-order model based on the Galerkin decomposition. Substitution of the approximation w (x,t) ≈ n

∑ qi (t)ϕi (x) (where ϕi (x) are linear undamped eigenmodes of a straight beam [41]

i=1

such that max [ϕi (x)] = 1) into Eq. 1 followed by the usual Galerkin procedure x ⊂[0,1]

yields the system of nonlinear coupled ordinary differential equations (2) Mq¨ + cMq˙ + Bq + 2α h2 z0 T qz0 − T T T e γ α hq Sqz0 − 2α hz0 qSq + α q SqSq = β F + γ F © ª Here, q = q j (t) is the vector of generalized coordinates and ( )T denotes the matrix transpose. The expressions for the elements of the vector z0 = [z0i ], of the diagonal bending stiffness matrix B = [bi j ], of the symmetric stretching related matrix S = [si j ], and of the diagonal mass matrix M = [mi j ] along with the generalized electrostatic force vectors Fe = { fie } can be found in [31]. The vector of generalized © γª R γ inertia force is Fγ = fi where fi = 01 ϕi (x)dx.

3. Model results 3.1. SINGLE DEGREE OF FREEDOM MODEL In order to highlight the leading dynamical phenomena through the analysis of simplified expressions, we first consider the single DOF undamped system (lumped model). We consider the initial shape described by the first mode, i.e., z0 (x) = ϕ1 (x). In addition, we set ϕ1 (x) ≈ (1/2)[1 − cos(2π x)] in the expression for fie and obtain the approximation f1e ≈ (1/2)(1 + h − q)−3/2 (see [42] for a straight beam). In view of the aforementioned, Eq. 2 takes the form

β˜ d2q 2 2 3 ˜ ˜ ˜ p +F(q) = 0 where α h )q − 3 α hq + α q − F(q)=(1 + 2 −γ˜ (3) dτ 2 (1+h−q)3 p γ Here q = q1 , τ = t b11 /m11 , α˜ = α s211 /b11 , β˜ = β /(2b11 ) and γ˜ = γ f1 /b11 . Note γ that for the adopted base functions, b11 = 198.462, s11 = 4.878, m11 = 0.396, f1 = 0.523. One observes that for the constant values of α and h the response of the beam is parameterized by the voltage and the inertial loading parameters β and γ . Fixed points q∗ of Eq. 3 are found from the condition F (q ∗) = 0. Bifurcation diagrams for the case γ = 0 are shown in Figure 3a. One observes that in the case of a sufficiently curved beam, four real roots and two sequential instabilities – snapthrough and pull-in – may exist within the range 0 ≤ q1∗≤ 1 + h. The corresponding values of the deflection and the voltage parameter are denoted qS , βS and qPI , βPI , respectively; qR , βR corresponds to the release (snap-back) configuration (see [31] for the detailed static stability analysis).

122

S. KRYLOV AND N. DICK (a)

1

(b)

1

0.9 0.8

0.8

0.6

0.6

0.5

q/(1+h)

q/(1+h)

0.7

0.4

0.4

0.3 0.2

1

2

0 0

(c)

100

0.2

3

0.1

β

200

(d)

0.9 0.8

0 0

300

200

300

300

Pull−in

Release

Snap−through

β

q/ (1+h)

β

100

0

0.4

Release

0.3

0.1 0

100

1

200

0.6

0.2

2

Pull−in

0.7

0.5

3

−100

Snap−through

100

200

γ

300

400

−200 0

100

200

γ

300

400

Figure 3. (a) Bifurcation diagram for the curved micro beam for γ = 0 and different initial elevations: 1 – h = 0, 2 – h = 0.35 and 3 – h = 0.45. (b) Bifurcation diagrams for the curved micro beam for h = 0.45 and different values of the inertial loading:1 – g = 0, 2 – g = 100, 3 – g = 150. Solid lines correspond to stable equilibria; dashed lines represent unstable equilibria. (c) Critical deflections and (d) critical values of the voltage parameter for h = 0.45 as a function of the inertial loading parameter. Non-dimensional parameters correspond to the L = 1,000 µm long d = 3 µm thick and b = 30 µm wide beam and g0 = 10 µm.

The influence of the inertial loading is illustrated in Figure 3b–d. The support is assumed to move at a constant acceleration while actuation voltage increases quasistatically (see [39] for the shock loading). One observes that while the presence of acceleration results in a decrease of the critical voltages, its influence on the snapthrough voltage is more pronounced. Note that the meaning of a negative β is that the electrostatic force acts in the direction opposite to the inertial loading. The conclusions about the nature of the fixed points are made based on the eigenvalue analysis of Eq. 3 linearized around the fixed points. The eigenvalues λ1,2 = ±iλ are pure imaginary for q∗ < qS and qR < q∗ < qPI (the fixed point is a center), λ1,2 = 0 for q∗ = qS or q∗ = qPI (cusp) and λ1 < 0, λ2 > 0 for qS < q∗ < qR or qPI < q∗ < 1 + h (saddle). Figure 4a, b illustrate the dependence of λ on q ∗ and the voltage parameter β , respectively. Due to the bistability of the beam, the frequency may have two different values at the same actuation voltage. One observes also that the frequency can be efficiently tuned by the voltage in a very large range.

PULL-IN DYNAMICS OF BISTABLE MICRO BEAMS (a)

2

(b)

1

λ

λ

1

1.5

1

2

2

2 0.5 0

2 2

1

1.5

123

0.5

0

0.2

0.4

0.6

q/(1+h)

0.8

0

1

0

50

100

β

150

200

250

Figure 4. Eigenvalue λ of Eq. 3 linearized around the fixed points q∗ for the case of a straight beam h = 0 (curve 1) and an initially curved beam for h = 0.35 (curve 2). The fundamental frequency of the initially curved unloaded beam is higher than of the straight beam.

The snap through and pull-in instability are dynamic phenomena and cannot be described by the quasi-static approach. In order to illustrate the influence of the dynamic character of loading, we consider a beam subject to a voltage suddenly applied at t = 0 (i.e., β (t) = β H(t) where H(t) is the Heaviside step function), zero initial conditions q(0) = 0, q˙(0) = 0 and in absence of the inertial loading γ = 0. Calculating first integral of Eq. 3 we obtain 1 2 where U = (1 + 2α˜ h2 )

µ

dq dτ

¶2

= H −U

(4)

q2 q4 2β˜ − α˜ hq3 + α˜ − √ 2 4 1+h−q

(5)

is the √potential energy and H is Hamiltonian (for zero initial conditions, H = −2β˜ / 1 + h). The trajectories on the phase plane, Figure 5a, the solution along a trajectory, Figure 5b and the non-dimensional period T are given by the expressions

p dq = ± 2(H −U) dτ

Z qmax

Zqmax

τ= 0

dq p 2(H −U)

T =2

p 0

dq 2(H −U)

(6)

One observes that in the case of a moderately curved beam the behavior is similar to a straight beam: step-function excitation by a voltage lower than the dynamic pull-in value β < βDPI results in a periodic motion around a stable node on the phase plane. An increase in the voltage beyond the dynamic pull-in, which corresponds to the separatrix on the phase plane, results in dynamic instability and divergent motion.

124

S. KRYLOV AND N. DICK

5

5 4

5

4

2

3

1

h= 0.45

h= 0.35

h= 0.3

3 4

1

4

5

5

2

4

3

4

3

3

2

1

5

3

1

2 5 4

Figure 5. Influence of an initial elevation h on the dynamic responses of the bell-shaped beam subjected to a suddenly applied voltage: (a) phase plane trajectories and (b) time histories. Different curves correspond to different actuation voltages:1 – β < βDS ; 2 – β = βDS < βS ; 3 – β = βS ; 4 – β = βDPI < βPI ; 5 – β = βPI . Non-dimensional parameters correspond to the L = 1000 µm long d = 3 µm thick and b = 30 µm wide beam and g0 = 10 µm. Some trajectories cannot be reached under zero initial conditions.

For higher values of the initial elevation, dynamic snap-through may occur (the corresponding voltage parameter is denoted βDS ) in addition to the dynamic pullin. In this case the phase plane contains two separatrices. The first one is a homoclinic connection emerging from a saddle corresponding to the dynamic snapthrough. Within each of two stable regions “low amplitude” periodic motion is possible around stable nodes corresponding to two stable equilibrium configurations. The second separatrix corresponds to the dynamic pull-in instability. In the case βDS < β < βDPI , a “high amplitude” periodic motion is possible around two stable nodes corresponding to the two stable configurations before and after the snapthrough. 2 At larger values of the initial elevation, βDS > βDPI and the phase plane contains two separatrices corresponding to the dynamic snap-through and dynamic pull-in. It was shown in [31] that, under quasi-static operation, the relative initial elevation h/d should be higher than a certain value in order to reach the snap-through buckling. Phase plane analysis suggests that the minimal initial elevation required for the appearance of the dynamic snap-through is higher that in the static case. As

______

2

At some specific value of the initial elevation, βDS = βDPI and two separatrices corresponding to the dynamic snap-through and the dynamic pull-in may merge into one trajectory combining homoclinic and heteroclinic connections.

Pull−in

Dyn. pull−in

200

0.6

Pull−in

β

q/(1+h)

0.8

Dyn.pull−in

0.4

Dyn.snap−through

150 Snap−through

0.2

0 0

Dyn. sn ap−thro

(b) 250

(a) 1

125

ugh

PULL-IN DYNAMICS OF BISTABLE MICRO BEAMS

Snap−through 0.1

0.2

0.3

h

0.4

0.5

0.6

100 0

0.1

0.2

0.3

h

0.4

0.5

0.6

Figure 6. Critical values of the displacement (a) and the voltage parameter (b) corresponding to the snap-through, pull-in, dynamic snap-through and dynamic pull-in. Non-dimensional parameters correspond to the 1,000 µm long, 3 µm thick beam, the distance to electrode is g0 = 10 µm. One observes that dynamic snap through appears at higher elevations than static snap-through while the dynamic critical voltages are lower than their static counterparts.

a result, a situation is possible when the beam is bistable under the static operation but the dynamic snap-through is not present. Note that the suppression of the snap-through under dynamic operation was reported in [29] where an electrostatically actuated curved beam was analyzed numerically using a combination of finite elements and boundary elements methods. The results of the present work, obtained by means of the phase-plane analysis, provide an explanation for this kind of behavior and present a quantitative estimation of the initial curvature required for the appearance of dynamic snap-through. Figure 6 illustrates the location of the critical points, in terms of deflections and actuation voltages, corresponding to the static and dynamic snap-through and pull-in instabilities. One observes that the interval of the initial elevation exists where the beam is statically bistable but the dynamic snap-through is suppressed.

3.2. NUMERICAL RESULTS Finally we present numerical results obtained using the RO model. The system of Eq. 2 was solved numerically using the solver ode15s integrated into Matlab package. In all cases, the parameters of the beam used in calculations were L = 1,000 µm, dˆ = 3 µm, distance to electrode g 0 = 10 µm. The response was obtained using the RO model with five base functions. The responses of an undamped and damped micro beam undergoing a suddenly applied voltage are presented in Figure 7a, b respectively. In the damped system decaying vibrations around one of two stable equilibrium configurations are

S. KRYLOV AND N. DICK

Midpoint deflection (µm)

(a) 14 5

12 10 8

4

6

3

4 2

2 0 0

(b)

14

Midpoint deflection (µm)

126

12

1

50

100

Time (µs)

150

10 8 4

6

3

4 2

2 0 0

200

5

1

50

100

150

Time (µs)

200

Figure 7. (a) Time history for the undamped micro beam in the case of a step function actuation. Different curves correspond to different applied voltages: 1 − V = 110 V; 2 − V = 116.1 V < VDS ; 3 −V = 116.3 V > VDS ; 4 −V = 120 V < VDPI ; 5 −V = 121.8 V > VDPI . (b) Time history for the damped beam: 1 −V = 110 V ; 2 −V = 120 V < VDS ; 3 −V = 120.3 V > VDS ; 4 −V = 122 V < VDPI ; 5 −V = 126 V > VDPI . The initial elevation is hˆ = 3.85 µm, quality factor is Q = 10.

(b) 14

14 12 10

4

Midpoint deflection (µm)

Midpoint deflection (µm)

(a)

3

8 6

2

4 2 0 0

1

50

100

Time (µs)

150

200

12

3

4

2

10

1

8 6 4 2 0 0

50

100

Time (µs)

150

200

Figure 8. (a) Time history for the undamped micro beam in the case of a step function actuation and hˆ = 3.2 µ m. Different curves correspond to different applied voltages: 1 −V = 100 V ; 2 −V = 110 V ; 3−V = 123 V < VDPI ; 4−V = 125 V > VDPI . (b) Time history in the case of a ramp function actuation and maximal voltage of VS < 125 V < VPI . Different curves correspond to different time of the voltage increase: 1 −t0 = 100 µ s; 2 −t0 = 95 µs; 3 −t0 = 50 µs; 4−step function excitation. Dashed lines represent the damped response corresponding to the quality factor Q = 10. Gray lines schematically illustrate the character of the applied voltage.

PULL-IN DYNAMICS OF BISTABLE MICRO BEAMS

127

observed, depending on the applied voltage. Similarly to the case of a straight beam, dynamic snap-through and dynamic pull-in voltages in the damped system are consistently higher than in the undamped case. Figure 8a illustrates undamped response of a beam with the initial elevation h = 0.32. Since the beam does not exhibit dynamic snap-through under zero initial conditions, no large amplitude low frequency motion in the vicinity of the separatrix is observed (compare Figure 7a, curve 3). Influence of the dynamic character of the loading is illustrated in Figure 8b. In this loading scenario, the voltage V (tˆ) = V0tˆ/tˆ0 increases linearly for tˆ ≤ tˆ0 and remains constant for tˆ > tˆ0 . One observes that the snap-through instability is suppressed for t0 smaller that a certain value (see [29]) and dynamic pull-in instability followed by divergent motion is observed.

Acknowledgements The research is supported by The Israel Science Foundation (Grant No. 1426/08).

References 1. Simitses GJ (1989) Dynamic stability of suddenly loaded structures. Springer-Verlag, New York 2. Singer J, Arbocz J, Weller T 1(998–2002) Buckling experiments: experimental methods in buckling of thin-walled structures. Wiley, Chichester New York 3. Timoshenko SP, Gere JM (1961) Theory of elastic stability. 2nd ed McGraw-Hill 4. Qui J, Lang JH, Slocum AH (2004) A curved beam bistable mechanism. J Microelectromech Syst 13:137–146 5. Vangbo M, B¨acklund Y (1998) A lateral symmetrically bistable buckled beam. J Micromech Microeng 8:29–32 6. Han JS, Ko JS, Kim YT, Kwak BM (2002) Parametric study and optimization of a microoptical switch with a laterally driven electromagnetic microactuator. J Micromech Microeng 12:939–947 7. Seunghoon P, Dooyoung H (2008) Pre-shaped buckled-beam actuators: Theory and experiments. Sens Act A: Phys 148:186–192 8. Michael A, Kwok CY (2006) Design criteria for bi-stable behavior in a buckled multi-layered MEMS bridge. J Micromech Microeng 16:2034–2043 9. Qui J, Lang JH, Slocum AH, Weber AC (2005) A bulk-micromachined bistable relay with U-shaped thermal actuators. J Microelectromech Syst 14:1099–1109 10. Saif MTA (2000) On a tunable bistable MEMS – theory and experiment. J Microelectromech Syst 9:157–170 11. Sulfridge M, Saif T, Miller N, Meinhart M (2004) Nonlinear dynamic study of a bistable MEMS: model and experiment . J Microelectromech Syst 13:725–731 12. Casals-Terre´ J, Fargas-Marques A, Shkel AM (2008) Snap-action bistable micromechanisms actuated by nonlinear resonance. J Microelectromech Syst 17:1082–1093 ´ E, Collard D (2007) Post-buckling dynamic behavior of self13. Buchaillot L, Millet O, Quevy assembled 3D microstructures. Microsyst Technol 14:69–78 14. Pelesko JA, Bernstein DH (2002) Modeling of MEMS and NEMS. Chapman&Hall A CRC Press Company, London New York Washington DC 15. Gorthi S, Mohanty A and Chatterjee (2006) A Cantilever beam electrostatic MEMS actuators beyond pull-in. J Micromech Microeng 16:1800–1810 16. Hung ES, Senturia SD (1999) Extending the travel range of analog-tuned electrostatic actuators. J Microelectromech Syst 8:497–505

128

S. KRYLOV AND N. DICK

17. Krylov S and Barnea D (2005) Bouncing mode electrostatically actuated scanning micromirror for video applications. Smart Mater Struct 14:1281–1296 18. Krylov S, Maimon R (2004) Pull-in dynamics of an elastic beam actuated by continuously distributed electrostatic force. J Vib Acoust 126:332–342 19. McCarthy B, Adams GG, McGruer NE, Potter DA (2002) Dynamic model, including contact bounce, of an electrostatically actuated microswitch. J Microelectromech Syst 11:276–283 20. Zhang J, Zhang Z, Lee YC, Bright VM, Neff J (2003) Design and investigation of multilevel digitally positioned micromirror for open-loop controlled applications. Sens Act A: Phys 103:271–283 21. Krylov S and Bernstein Y (2006) Large displacement parallel plate electrostatic actuator with saturation type characteristic. Sens Act A: Phys 130131:497–512 22. Elata D and Abu-Salih S (2005) Analysis of a novel method for measuring residual stress in micro-systems. J Micromech Microeng 15:921–927 23. DeMartini BE, Rhoads JF, Turner KL, Shaw SW, Moehlis J (2007) Linear and nonlinear tuning of parametrically excited MEMS oscillators. J Microelectromech Syst 16:310–318 24. Hah D, Patterson PR, Nguyen HD, Toshiyoshi H, Wu MC (2004) Theory and experiments of angular vertical comb-drive actuators for scanning micromirrors. IEEE J Sel Top Quantum Electron 10:505–513 25. Lee KB (2007) Non-contact electrostatic microactuator using slit structures: theory and a preliminary test. J Micromech Microeng 17:2186–2196 26. Shmilovich T, Krylov S (2009) A single-layer tilting actuator with multiple close-gap electrodes. J Micromech Microeng 18 (in press) 27. Pelesko JA, Chen XY (2003) Electrostatically deflected circular elastic membranes. J Electrostat 57:1–12 28. Krylov S, Seretensky S (2006) Higher order corrections of electrostatic pressure and its influence on the pull-in behavior of microstructures. J Micromech Microeng 16:1382–1396 29. Das K, Batra RC (2009) Pull-in and snap-through instabilities in transient deformations of microelectromechanical systems. J Micromech Microeng 19: pap 035008 30. Krylov S, Seretensky S (2006) (2006) Pull-in and multistability analysis of an initially curved beam. in Digest Tech Papers Asia-Pacific Conf of Transducers and Micro-Nano Technol APCOT 2006, Singapore, June 25–28 2006, pap D-27 31. Krylov S, Ilic BR, Schreiber D, Seretensky S, Craighead H (2008) Pull-in behavior of electrostatically actuated bistable microstructures. J Micromech Microeng 18: pap 055026 32. Zhang Y, Wang Y, Li Z, Huang Y, Li D (2007) Snap-through and pull-in instabilities of an arch-shaped beam under an electrostatic loading. J Microelectromech Syst 16:684–693 33. Rebeiz GM (2003) RF MEMS : theory, design, and technology. Wiley-Interscience, Hoboken NJ 34. Charlot B, Sun W, Yamashita K, Fujita H, Toshiyoshi H (2008) Bistable nanowire for micromechanical memory. J Micromech Microeng 18:1–7 35. Tsai Chun-Yin, Kuo Wei-Ting, Lin Chi-Bao, Chen Tsung-Lin (2008) Design and fabrication of MEMS logic gates. J Micromech Microeng 18:pap 045001 36. Batra RC, Porfiri M, Spinello D (2007) Review of modeling electrostatically actuated microelectromechanical systems. Smart Mater Struct 16: R23-R31 37. Fargas-Marques A, Costa CR, Shkel AM (2005) Modelling the electrostatic actuation of MEMS:state of the art 2005. Technical Report. 38. Nayfeh AH, Younis MI, Abdel-Rahman EM (2005) Reduced-order models for MEMS applications. Nonlin Dyn 41:211–236 39. Younis MI, Alsaleem F, Jordy D (2007) The response of clampedclamped microbeams under mechanical shock. Int J Non-Lin Mech 42:643–657 40. Villagio P (1997) Mathematical models for elastic structures. Cambridge Univ Press, Cambridge 41. Blevins RD (1979) Formulas for natural frequency and mode shape. Van Norstrand Reinhold, New York 42. Pamidighantam S, Puers R, Baert K, Tilmans HAC (2002) Pull-in voltage analysis of electrostatically actuated beam structures with fixedfixed and fixedfree end conditions. J Micromech Microeng 12:458–64

PATH FOLLOWING AND NUMERICAL CONTINUATION METHODS FOR NON-LINEAR MEMS AND NEMS

1

2

PETER G. STEENEKEN AND JIRI STULEMEIJER 1

NXP-TSMC Research Center, NXP Semiconductors, HTC 4, 5656 AE Eindhoven, the Netherlands, E-mail: [email protected] 2 Epcos Netherlands, 6546 AS Nijmegen, The Netherlands, E-mail: [email protected]

Abstract Non-linearities play an important role in micro- and nano-electromechanical system (MEMS and NEMS) design. In common electrostatic and magnetic actuators, the forces and voltages can depend in a non-linear way on position, charge, current and magnetic flux. Mechanical spring structures can cause additional non-linearities via material, geometrical and contact effects. For the design and operation of non-linear MEMS devices it is essential to be able to model and simulate such non-linearities. However, when there are many degrees of freedom, it becomes difficult to find all equilibrium solutions of the non-linear equations and to determine their stability. In this paper a generic methodology to analyze MEMS devices using path following methods is described. Starting from the energy and work expressions of electromechanical systems (Section 1), the equations of motion, the equilibrium and stability conditions are derived (Sections 2, 3 and 6). The basics of path following are introduced in Section 4. Using several examples it is discussed how path following can be implemented in Mathematica, M ATCONT and in the FEM package C OMSOL (Sections 5–8).

Keywords: Non-linear MEMS, capacitive MEMS, finite-element method.

1. Energy and work in electromechanical systems In this paper a generic methodology to analyze the static equilibria of MEMS and NEMS is discussed, which can be summarized as follows: • Determine the expressions for internal energy and work. • Derive the equations of motion and equilibrium conditions using the Hamilton equations. • Start from an initial equilibrium state and determine the other states and their stability using path following.

E. Gusev et al. (eds.), Advanced Materials and Technologies for Micro/Nano-Devices, Sensors and Actuators, DOI 10.1007/978-90-481-3807-4_10, © Springer Science + Business Media B.V. 2010

129

130

P.G. STEENEKEN AND J. STULEMEIJER

MEMS and NEMS devices can usually be treated using classical physics in the quasistatic electromagnetic approximation, if the system dimensions are small compared to the electromagnetic wavelength and are large enough to neglect quantum effects. In these approximations the total internal energy of the system Utot = ∑ U and total work done by external sources Wtot = ∑ W can be expressed as a sum over different types of energy and work, given by Eqs. 1–10:

Ukin = Ugrav =

Z Z

V

V

p2m,i 1 1 p2m dV ≈ ∑ 2 ρm 2 i mi

(1)

1 G 1 VG ρe dV ≈ ∑ mi ∑ m j 2 2 i r j ij

!

! 1 1 −1 J · AdV ≈ ∑ Φi ∑ Li j Φ j Umag = 2 i V 2 j ! Z 1 1 V ρe dV ≈ ∑ Qi ∑ Ci−1 Uel = j Qj 2 i V 2 j ! Z 1 1 Ustrain = ε · σ dV ≈ ∑ xi ∑ ki j x j 2 i V 2 j Z

Wkin = Wgrav = Wmag = Wel = Wstrain =

Z Z pm V

0

Z Z ρm V

0

Z Z A V

0

0

Z Z ε V

0

i

Z pm,i

VG,ext dρm dV ≈ ∑ i

Jext · dAdV ≈ ∑ i

Z Z ρe V

vext · dpm dV ≈ ∑

Vext dρe dV ≈ ∑ i

σ ext · dε dV ≈ ∑ i

0

Z xi 0

Z Φi 0

Z Qi 0

Z xi 0

vext,i dpm,i

mi gext,i dxi

(2) (3) (4) (5) (6) (7)

Iext,i dΦi

(8)

Vext,i dQi

(9)

Fext,i dxi

(10)

The expressions are given to show that there is a striking similarity between energy and work equations in different physical domains. As a result of this, their physics can be analyzed by the same mathematical methods. The energy and work expressions in each of the equations can be written in terms of continuum volume V integrals over energy densities. As shown on the right side, the integrals can also be approximated by sums over lumped or finite elements which can be treated numerically by finite element methods. Note that the expressions in Eqs. 1–5 are only valid in the linear regime, intrinsic non-linearities can modify the expressions. The variables in Eqs. 1–10 are given as follows. ρm is the mass density, pm is the mass momentum density. VG is the gravitational potential and G is the gravitational constant. V is the electric potential, ρe is the charge density, J is the total current

PATH FOLLOWING AND NUMERICAL CONTINUATION METHODS

131

density and A is the magnetic vector potential. σ and ε are the mechanical stress and strain. The expressions on the right side of the equations are written as sums over discrete charges Qi , magnetic fluxes Φi and masses mi at positions xi and with mass momentum pm,i , which are coupled via effective springs k ij , gravitational potential G/ri j , capacitors Ci j and inductors Li j . The components of the inverse capacitance and inductance matrices C−1 and L−1 relate potential to charge −1 V j = ∑i Ci−1 j Qi and relate current to magnetic flux I j = ∑i Li j Φi . The total work Wtot supplied to the system is a sum of the work from external gravitational VG,ext , current density Jext , electric Vext , magnetic Aext and stress σ ext fields. The kinetic work term Wkin is needed to account for a relative speed difference vext between the frame of reference of the system and the frame of the observer. The work can also be performed on discrete elements by external gravitational acceleration gext,i , current Iext,i or voltage Vext,i sources or external (stress) forces Fext,i . For more details on Eqs. 1–10 the reader can refer to standard texts on classical mechanics and electromagnetics. External thermal sources at temperature Text , which add heat Qh to the system, can be treated by similar methods, although this requires keeping track of the entropy S and temperature T in the system. According to the first lawR of thermodynamics (dUtot = δ Qh + δ Wtot ), this requires adding an integral Qh = 0S Text dS to the work equations. The internal thermal energy of the material is in essence a sum of the kinetic energy R R of the atoms which can be expressed by a thermal energy term Utherm,kin = V 0T c(T )ρm dT dV , where c(T ) is the specific heat capacity. The work provided by Ran electrical Rsource in Eq. 9 can be rewritten using integration by parts: W el = V (Vext ρe − 0Vext ρe dV ext ) dV . It is often convenient to define the coenergyR or complementary energy as the Legendre transform of the R R work such that Uel∗ ≡ V Vext ρe dV − Wel = V 0Vext ρe dVext dV . Figure 1 shows how energies and coenergies can be represented graphically for a voltage controlled capacitive MEMS switch example which is treated in Section 5 and Figure 3. This figure shows how a consideration of the energy and work in a system can provide insight and additional information compared to a consideration of the forces only. Moreover, as will be shown in the next section, transduction mechanisms between different physical domains, like the electrostatic force, can be derived from the energy and work expressions.

2. Equations of motion and energy conservation The Hamiltonian H is the difference between the total internal energy Utot and the total supplied work Wtot . It can be described by a set of generalized coordinates qi with (i = 1 , . . ., N) and corresponding generalized momenta pi : H (q1 , . . . , qN , p1 , . . . , pN ) = Utot − Wtot

(11)

From the Hamilton equations the generalized forces Fi and speeds vi are given by:

132

P.G. STEENEKEN AND J. STULEMEIJER

Figure 1. Energy and coenergy diagrams of a voltage controlled capacitive MEMS switch. Left: The solid black line represents the static equilibrium states of a capacitive MEMS switch which will be calculated in Section 5. The areas represent the internal electric energy Uel , strain energy Ustrain and coenergy Uel∗ = Vext Q −Wel . Right: If the device is voltage controlled, it will follow the arrows at the pull-in Vpi and release Vre voltage. As a result work Wel will be converted to kinetic energy during pull-in Ukin,close and similarly strain energy from the spring will be converted to kinetic energy Ukin,open at release. The sum of both energies Ukin,close + Ukin,open is the dissipated energy during one switching cycle. Thus energy diagrams constructed from static simulations can provide information on the dynamics and dissipation of the device.

Fi = p˙i =

−∂ H ∂H , vi = q˙i = ∂ qi ∂ pi

(12)

The total internal energy Utot in the system equals the total work Wtot done on the system and therefore the Hamiltonian H , which is the difference between internal energy and work H = Utot − Wtot , is conserved. This follows from the Hamilton equation 12 because:   dH ∂H ∂H =∑ (13) q˙i + p˙i = 0 dt ∂ qi ∂ pi i Let us choose as generalized mechanical coordinates the position qmech,i = xi with as corresponding generalized momentum pmech,i = pm,i , and for the generalized electromagnetic coordinates the charge qem,i = Qi with the magnetic flux pem,i = Φi as corresponding generalized momentum. −1 If the parameters ki j , L−1 i j and Ci j are constants, applying the Hamilton equations 12 to Eqs. 1–11 gives the equations of motion: Fmech,i = p˙m,i = − ∑ ki j x j + mi gext,i + Fext,i , vmech,i = x˙i = pm,i /mi

(14)

−1 ˙ Fem,i = Φ˙ i = − ∑ Ci−1 j Q j + Vext,i , vem,i = Qi = ∑ Li j Φ j + Iext,i

(15)

j

j

j

PATH FOLLOWING AND NUMERICAL CONTINUATION METHODS

133

This gives us Newton’s second law, Hooke’s law and Faraday’s law of electromagnetic induction. However, if for example the spring constants, inductance and capacitance pa−1 rameters ki j , L−1 i j and Ci j depend on the mechanical positions xi , which is often the case in electromechanical systems, the mechanical and electromagnetical problems become coupled and the mechanical forces become: Fmech,i = − ∑ ki j x j − j

1 ∂ ki j 1 ∂ Ci j 1 ∂ Li j Φi Φ j (16) xi x j − ∑ Qi Q j − ∑ ∑ 2 i, j ∂ xi 2 i, j ∂ xi 2 i, j ∂ xi −1

−1

+mi gext,i + Fext,i This shows that if the parameters depend on xi the generalized mechanical force Fmech,i becomes the sum of coupling forces from different physical domains, like the spring force, electrostatic and magnetostatic forces. In equilibrium this sum of coupling forces is zero. A similar equation applies for the generalized voltage Fem,i .

3. Electromechanical equilibrium The system is defined to be in electromechanical equilibrium if all generalized forces Fi are zero. In equilibrium, the gradient of the Hamiltonian is therefore also zero as shown by Eqs. 17 and 18: −∂ H =0 ∂ qi   ∂H ∂H =0 F = −∇q H = − ,..., ∂ q1 ∂ qN Fi = p˙i =

(17) (18)

For a specific set of generalized momenta pi and generalized external parameters Fgen = {mgext , Fext ,Vext , Iext }, Eq. 17 gives N generalized force equations with N unknowns which can be solved to obtain the equilibrium state of the system. If the energy function has only one variable parameter F and all other parameters are fixed, the equilibrium state q eq,0 at F = F0 thus satisfies: F(qeq,0 , F0 ) = −∇q H (qeq,0 , F0 ) = 0

(19)

Often equilibria exist for which all generalized speeds vi are zero. These equilibria are called static equilibria or stationary states. The equilibrium solutions of a non-linear system can be found using a powerful mathematical technique, which is called path following or numerical continuation [1, 5].

134

P.G. STEENEKEN AND J. STULEMEIJER

4. Path following and numerical continuation methods Finding all equilibrium states of an electromechanical system is a difficult problem that cannot be solved in general because it requires one to check the whole N dimensional coordinate space for solutions of Eq. 17, for each value of the external parameters Fgen and momenta pi . However, when an equilibrium solution of the Eq. 17 is known for a certain set of parameters pi , Fgen , it is possible to efficiently find additional solutions using numerical path following techniques [1, 5]. Recently it has been shown that path following techniques can be very useful for the analysis of electrostatic MEMS devices with non-linear contact forces [12]. The technique can in fact be applied to almost any non-linear electromechanical system described by energy equations 1–10. Alternatively, it can be directly applied without the energy equations if the equilibrium conditions (19) are known. In MEMS and NEMS devices, the system is usually controlled by a single external parameter F , which can for example be the voltage or current from an external source for electromechanical actuators, but can also be an acceleration or gas pressure force in sensor systems. The 1-dimensional external parameter F with the N-dimensional coordinate space q form a (N + 1)-dimensional space. The implicit function theorem implies [1, 5] that if one equilibrium solution qeq,0 with F(qeq,0 , F0 ) = 0 exists at external parameter value F0 , then it has to be part of a continuous 1-dimensional equilibrium solution curve qeq (F ) at parameter values F in (N + 1)-dimensional space with qeq,0 = qeq (F0 ). It is therefore often possible to start at a known equilibrium solution qeq (F0 ) and determine the other solutions by following the curve (qeq (F ), F ). Path following methods usually employ a predictor-corrector algorithm [1] to follow an equilibrium curve. In the predictor step, a new solution is predicted, usually by taking a step in the direction of the tangent to the solution curve. In the corrector step, the predicted point is brought back on the solution curve, usually by an iterative method. For the predictor step the tangent direction to the solution curve can be determined as follows. Let us assume that there exists an infinitesimal vector tangent to the solution curve dqeq,0 (dF0 ), with a corresponding infinitesimal parameter change dF0 such that there is another equilibrium state at (qeq (F ), F ) = (qeq,0 + dqeq,0 , F0 + dF0 ). Because the new state should also satisfy Eq. 18 the predictor algorithm can determine the tangent direction vector (dqeq, 0 , dF0 ) in N + 1 dimensional space by solving the N equations: F(qeq,0 + dqeq,0 , F0 + dF0) − F(qeq,0 , F0 )

(20)

= JF(qeq,0 ,F0 ) dqeq,0 = −HH (qeq,0 ,F0 ) dqeq,0 = 0 Where JF(qeq,0 ,F0 ) is the Jacobian of F at (qeq,0 , F0 ). HH is the Hessian matrix of the Hamiltonian, which is the Jacobian of the gradient of the Hamiltonian. Besides the tangent direction, the predictor algorithm also needs to specify the steplength of the vector. The curve (q eq (s),F (s)) can be parametrized by a parameter s, such that the steplength is given by |(∂ q eq /∂ s, ∂ F /∂ s)| × ∆ s. If parameter

PATH FOLLOWING AND NUMERICAL CONTINUATION METHODS

135

continuation is used, the parameter s is proportional to the external parameter such that s = α F , this however leads to problems when two equilibrium solutions exist at the same value of F . In the commonly used pseudo-arclength continuation algorithm, the parameter s is parametrized by the length along the curve R s = 0s α |(∂ qeq /∂ s, ∂ F /∂ s)|ds such that the steplength is always finite. Note that in order to use path following methods to obtain equilibrium solutions, it is required to start from an initially known equilibrium solution. It is therefore essential that an initial solution can be found, this can sometimes be difficult since there is no general efficient method to find these initial solutions.

5. Example of path following method As an example of the methodology discussed in Sections 1–4 we consider the problem of finding the equilibra of a voltage controlled capacitor connected to a spring from its energy and work equations. A schematic picture of this system is shown in Figure 2.

Figure 2. An electrostatically actuated capacitor of which one plate is connected to a spring.

The system has two generalized coordinates x and Q. The internal energy and work of the system can be used to derive the Hamiltonian: 1 Q2 (g − x) H = Ustrain + Uel − Wel = kx2 + − 2 2Aε0

Z Q 0

Vext,eq (Qeq )dQeq

(21)

Note that for the conservation of H to be valid, it is necessary that the external voltage Vext,eq (Qeq ) is applied such that the system is always in equilibrium along the path, otherwise the kinetic energy of the system would become non-zero. In other words, the path following method will determine the function Vext,eq (Qeq ) which satisfies this condition. The generalized force vector F is found from the gradient of the Hamiltonian:

136

P.G. STEENEKEN AND J. STULEMEIJER

F = −∇H = − =



∂H ∂H , ∂x ∂Q



(22)

Q2eq Qeq (g − xeq) −kxeq + ,Vext,eq (Qeq ) − 2Aε0 Aε0

!

=0

The Hessian matrix of the Hamiltonian is found1 to be:

−HH (xeq ,Qeq ) = JF = −

∂ 2H ∂ x2 ∂ 2H ∂ Q∂ x

, ,

∂ 2H ∂ x∂ Q ∂ 2H ∂ Q2

!

=

−k , Qeq A ε0

,

∂ Vext,eq ∂ Qeq

Qeq A ε0

−

(g−xeq ) A ε0

!

(23)

Figure 3. This script in Mathematica shows how the Veq − Q curve of an electrostatically actuated MEMS switch with a non-linear exponential spring contact can be obtained using path following as described in Section 5 and Figure 2. The spring energy is given by 1 2 2 kx + exp (c1 (x − g + δ )), the electrical energy is Q2 /2C and the capacitance C = Aε0 /(g − x), with k = g = Aε0 = 1, c1 = 100 and δ = 0.1. The path is followed starting from the solution x = V = Q = 0. The Veq − Q curve is identical to that in Figure 1. The x − Q curve is also plotted.

Thus by applying the matrix (23) on the infinitesimal vector (dxeq , dQeq ) along the equilibrium path, Eq. 20 gives us: −HH (dxeq , dQeq ) = (24) Qeq Qeq (g − xeq) ∂ Vext,eq (−kdxeq + dQeq , dxeq + dQeq ) = 0 dQeq − Aε0 Aε0 ∂ Qeq Aε0 Dividing these two equations by dQeq and taking the limit gives after rearranging:

______

1

Alternatively the generalized voltage constraint Qeq = Ceq Vext, eq from Eq. 22 can be used to eliminate the charge degree of freedom as was done in [12].

PATH FOLLOWING AND NUMERICAL CONTINUATION METHODS

Qeq dxeq = dQeq kAε0 Q2eq dVext,eq 1 = − 2 2 dQeq C kA ε0

137

(25) (26)

At an equilibrium point at coordinate (xeq , Qeq ,Vext,eq ) Eqs. 25 and 26 provide dx dVext,eq the tangent vector to the solution curve ( dQeqeq dQeq , dQeq , dQ dQeq ). In Figure 3 eq we show how the equations in this section can be implemented in a Mathematica [10] script to determine the V − Q curve of an electrostatically actuated MEMS switch with a non-linear exponential spring contact (note that the exponential function is only an approximation, see e.g. [13] for a more accurate function). In this example we have used the NDSolve function in Mathematica to follow the solution path solely from the tangent vector function, without using a corrector method. The different types of energy in this system are shown in Figure 1. Dedicated interactive numerical path following packages [8] like M ATCONT [9] and AUTO [2] include corrector methods and stability analysis. They are therefore more robust and convenient to treat complex problems (see Section 7).

6. Stability The system is in a static equilibrium state qeq when the sum of all forces is zero and all generalized momenta are zero. This equilibrium is only stable if for all possible infinitesimal displacement vectors dqeq , the Hamiltonian increases such that H (qeq + dqeq ) > H (qeq ). Any displacement would therefore violate the conservation of energy and thus the system will remain in state qeq forever. The local Taylor expansion of the Hamiltonian is given by: 1 H (q + dq) = H (q) + ∇H (q) · dq + dq · HH (q)dq 2

(27)

At a static equilibrium point, the gradient of H is zero according to Eq. 19, so the system is stable if the right term of Eq. 27 is positive for all dq. The vector dq can be written as dq = ∑Ni adq,i qˆ H,i , where qˆ H,i are the eigenvectors of the Hessian matrix with corresponding eigenvalues λ i. Therefore in Eq. 27 the term 21 dq·HH (q) dq = 12 ∑Ni λi a2dq,i qˆ 2H,i , is always positive if all eigenvalues λi of the Hessian matrix are positive (the Hessian matrix is positive definite). Points at which λi = 0 are called folds or bifurcations. At bifurcations there is more than one solution dqeq,0 of Eq. 20. Since these zero crossings of λ i cause a sign change of an eigenvalue, the stability of the system usually changes at these points. Note that the Hessian matrix used in Eq. 27 for stability determination can be different from that for path following in Eq. 24. As an example, to determine the stability of an equilibrium condition under voltage control, the voltage Vext,eq is kept constant, such that in this case ∂ Vext,eq / ∂ Qeq = 0 in Eq. 21. It is found that in this example the stability changes at

138

P.G. STEENEKEN AND J. STULEMEIJER

(xeq = g/3) at which the determinant of the matrix is zero, because the determinant is the product of all eigenvalues. If the charge Q ext on the device in Section 5 is kept constant, no work is done such that Wel = 0. It is found that xeq = Q2ext /2kAε0 is always stable (det H = k). 1 0.9

LP LP

H

0.8 0.7

x2

0.6 0.5 0.4

H

LP

0.3 0.2 0.1

LP 0

0

0.1

0.2

0.3

0.4

0.5 x1

0.6

0.7

0.8

0.9

1

Figure 4. Left: Model equations in M ATCONT for two identical uncoupled switches with the same parameters as the switch in Figure 3. Right: Calculated equilibrium curves. Folds (LP) and bifurcations (H) are automatically detected by the software. The folds (LP) correspond to the pull-in and release instabilities of one switch, at bifurcations (H) both switches are unstable for pull-in or release.

7. Numerical path following in MATCONT As an example of the use of M ATCONT for path following, we take two identical uncoupled switches with the same parameters as in Figure 3 and enter the force and momentum equations (12) as shown on the left side of Figure 4. To improve convergence of the calculation a mass and damping term have been added to the force equations. On the right side of Figure 3 the calculated path following curves are shown. Path following programs like M ATCONT monitor the eigenvalues of the Hessian on the equilibrium path to determine the stability of the system and plot the folds (LP) and bifurcation points (H) as shown in Figure 4. As an example two identical capacitive MEMS switches are simulated in in Figure 4. All eigenvalues of the Hessian are positive on the line from (0,0)-H. At the bifurcation point H ( 13 , 31 ), two eigenvalues become zero and both switches become unstable towards pull-in. On the paths H-LP only one switch is unstable and the other is open (one negative eigenvalue), on the path H-H both switches are unstable (two negative eigenvalues). On segments LP–LP between the release and pull-in point of one of the switches and on the segment H-(1,1), where both switches are closed, the system is stable and all eigenvalues are positive. More details on path following simulations of two uncoupled switches can be found in [12].

PATH FOLLOWING AND NUMERICAL CONTINUATION METHODS

139

8. Finite element method path following simulations The examples given up to now have a low number of degrees of freedom, such that their energy equations can be entered manually. To model continuous systems, for which the energy and work equations are given by the volume integrals in Eqs. 1–10, dedicated finite element method (FEM) software is available. These packages mesh the volume and construct partial differential equations that provide the equations of motion for all degrees of freedom. Moreover they provide efficient solvers, such that systems with thousands or even millions of degrees of freedom can be solved.

15

4 D

10 C B

5 A

0

0

50

100

A B C D E

3 Deflection (µm)

Capacitance (fF)

E

2 1 0 -1 -2

150

(a)

200

250

300 350 Voltage (V)

-3

0

20

40

60

(b)

80 Position (µm)

100

Figure 5. Simulation of the equilibria of a voltage actuated single clamped Euler beam (adapted from [12]). (a) The capacitance voltage curve shows two pull-in (A,C) and two release (B,D) instabilities. The pull-in voltage at point A corresponds to the transition from no contact (float) to contact with a single point (pinned). The pull-in at point C corresponds to the transition from single point contact (pinned) to contact over a finite length (flat). The stable equilibria are indicated by solid lines and the unstable by dotted lines. (b) The displacement shape of the beam at 5 points (A–E) on the C −V curve.

Some finite element packages do provide basic path following methods to solve non-linear problems, however the control over the followed path and the detection of stability is less advanced than in the dedicated path following packages [8] discussed in the previous section. To analyze non-linear MEMS systems with path following methods in a FEM package (for more examples see [3, 6, 12]), we have written a script for C OMSOL [4]. The script is similar to that presented in [11] and predicts the initial condition for the next calculation and uses the solver of C OMSOL as a corrector. The prediction direction is a linear extrapolation based on the two previous solutions. The predicted steplength is based on the previous steplength and the curvature of the path. The obtained corrected solution is discarded if its direction or distance is too far from the predicted point. Since C OMSOL provides direct access to the stiffness matrix k = −HH , the stability of the solutions can be determined by checking the sign of the eigenvalues of this matrix. By making use of the stiffness matrix, more sophisticated predictor algorithm scripts can be developed.

140

P.G. STEENEKEN AND J. STULEMEIJER

In Figure 5 an example of a FEM simulation of a voltage actuated single clamped beam is shown, which was obtained using the C OMSOL script. The results correspond well to the analytical results in [7]. More details and examples of FEM numerical path following can be found in [12]. Although this example is still relatively simple, the FEM path following method can theoretically be applied to analyze any non-linear system of which the Hamiltonian H can be written in terms of the Eqs. 1–10.

9. Conclusions A generic methodology to analyze the static equilibria of MEMS and NEMS has been discussed. It was shown that path following can be a powerful mathematical tool to determine the equilibrium solutions of electromechanical systems and their stability from the energy and work expressions. The path following of the electromechanical equilibrium solutions can be performed by analytical methods, dedicated numerical software or finite element method software.

References 1. Allgower, E.L. and Georg, K.: Numerical path following. In: Cialet, P.G., Lions, J.L. (eds.) Handbook of Numerical Analysis 5, pp. 3207. Elsevier, Amsterdam (1997) 2. AUTO , http://indy.cs.concordia.ca/auto/ 3. Batra, R. C., Porfiri, M. and Spinello, D.: Analysis of Electrostatic MEMS Using Meshless Local Petrov-Galerkin (MLPG) Method. Engineering Analysis with Boundary Elements, 30, 949–962 (2006) 4. C OMSOL, http://www.comsol.com 5. Doedel, E.J.: Lecture Notes on Numerical Analysis of Nonlinear Equations. In: Krauskopf, B., Osinga, H.M. and Galn-Vioque, J. (eds.) Numerical Continuation Methods for Dynamical Systems, pp. 1–49. Springer, Dordrecht (2007) 6. Gerson, Y., Krylov, S., Ilic, B. and Schreiber, D.: Large displacement low voltage multistable micro actuator. In: Proc. IEEE MEMS 2008, pp. 463–466 (2008) 7. Gorthi, S., Mohanty, A. and Chatterjee, A.: Cantilever beam electrostatic MEMS actuators beyond pull-in. J. Micromech. Microeng., 16, 1800–1810 (2006) 8. Govaerts, W. and Kuznetsov, Y.A.: Lecture Notes on Numerical Analysis of Nonlinear Equations. In: Krauskopf, B., Osinga, H.M. and Galn-Vioque, J. (eds.) Numerical Continuation Methods for Dynamical Systems, pp. 51–76. Springer, Dordrecht (2007) 9. M ATCONT, http://www.matcont.ugent.be 10. Mathematica, http://www.wolfram.com/ 11. M¨oller J.: Bifurcation analysis using C OMSOL multiphysics. In: Proc. Nordic C OMSOL Conf., pp. 1541–1544 (2006) 12. Stulemeijer, J., Bielen, J.A., Steeneken, P.G. and van den Berg, J.B.: Numerical Path Following as an Analysis Method for Electrostatic MEMS. J. Microelectromech. Systems, 18, 488–499 (2009) 13. Suy, H.M.R., Herfst, R.W., Steeneken, P.G., Stulemeijer, J. and Bielen J.A.: The static behavior of RF MEMS capacitive switches in contact. In: Proc. NSTI Nanotech 2008 Vol. 3, pp. 517–520 (2008)

THE IMPACT OF DIELECTRIC MATERIAL AND TEMPERATURE ON DIELECTRIC CHARGING IN RF MEMS CAPACITIVE SWITCHES

GEORGE PAPAIOANNOU Solid State Physics Section, Physics Department, University of Athens, Panepistimiopolis Zografos, Athens 15784, Greece, E-mail: [email protected]

Abstract The present work attempts to provide a better insight on the dielectric charging in RF-MEMS capacitive switches that constitutes a key issue limiting parameter of their commercialization. The dependence of the charging process on the nature of dielectric materials widely used in these devices, such as SiO2, Si3N4, AlN, Al2O3, Ta2O5, HfO2, which consist of covalent or ionic bonds and may exhibit piezoelectric properties is discussed taking into account the effect of deposition conditions and resulting material stoichiometry. Another key issue parameter that accelerates the charging and discharging processes by providing enough energy to trapped charges to be released and to dipoles to overcome potential barriers and randomize their orientation is the temperature will be investigated too. Finally, the effect of device structure will be also taken into account.

Keywords: Dielectrics, charging, RF MEMS.

1. Introduction The dielectric charging constitutes a major problem that still inhibits the commercial application of RF MEMS capacitive switches. The effect arises from the presence of the dielectric film (Figure 1) and macroscopically is manifested through the shift [1–4] or/and narrowing [5, 6] of the pull-in and pull-out voltages window thus leading to stiction and device failure. The first qualitative characterization of dielectric charging within capacitive membrane switches and the impact of high actuation voltage upon switch lifetime were presented by C. Goldsmith et al. in [7] who reported that the dependence of number of cycles to failure on the peak actuation voltage follows an exponential relationship [7]. Particularly it was reported that the lifetime improves by an order of a decade for every 5 to 7 V decrease in applied voltage. Presently it is well known that the commonly quoted number of cycles to failure does not constitute a good measure of the reliability of switches suffering from charging. W.M. van Spengen et al. [8] have shown that E. Gusev et al. (eds.), Advanced Materials and Technologies for Micro/Nano-Devices, Sensors and Actuators, DOI 10.1007/978-90-481-3807-4_11, © Springer Science + Business Media B.V. 2010

141

142

G. PAPAIOANNOU

number of cycles to failure is severely affected by the actuation frequency and duty cycle. Further they have shown that since the failure is purely due to charging, the contact time (down position gives rise to charge injection) is equal for all. Since the cycling method does not provide essential information on the failure mechanisms, the investigation on dielectric charging was extended by involving MIM (Metal–Insulator–Metal) capacitors to determine the stored charge, charging and discharging times constants as well as the [3, 9] as well as to monitor the various charging mechanisms [10], since these devices approximate MEMS switches in the pull-down state. Another method that approximates more precisely the charging through asperities and surface roughness in MEMS is the Kelvin Probe Force Microscopy. This method has been employed to investigate the charging and discharging through the measurements of the dielectric film surface potential [11, 12].

Figure 1. Simplified model of a capacitive switch based on parallel plate model.

The dielectric charging occurs independently of the actuation scheme and the ambient atmosphere [5]. Up to now the effect has been attributed to the charge injection during the pull-down state [2, 4, 6, 13] and dipoles orientation [12–14], which are present in the dielectric material. In order to minimize and control the dielectric charging and obtain devices with high capacitance aspect ratio, several materials, such as SiO2 [3], Si3N4 [4, 14], AlN [17, 18], Al2O3 [19, 20], Ta2O5 [21], HfO2 [22, 23], have been used. The selection has been made taking into account the maturity of low temperature deposition method and the magnitude of dielectric constant. Although these materials exhibit excellent insulating properties little attention was paid on the fact that their lattice is formed by either covalent or ionic bonds, which affect significantly the dielectric polarization/charging. It is worth noticing that among these materials, the crystalline AlN exhibits piezoelectric properties, which seems to increase significantly the device lifetime [19].

THE IMPACT OF DIELECTRIC MATERIAL AND TEMPERATURE

143

A key issue parameter that affects significantly the electrical properties of dielectrics and may prove to constitute a valuable tool for the determination of device lifetime is the device operating temperature. This is because temperature accelerates the charging [14–16, 24] and discharging [25] processes by providing enough energy to trapped charges to be released and to dipoles to overcome potential barriers and randomize their orientation. Finally, the presence or absence [26] of dielectric film as well as its expansion on the film on the insulating substrate [27] constitute a key issue parameter that influences the charging process. The aim of the present work is to attempt to provide a better understanding of the impact of the material properties on the dielectric charging. The basic polarization mechanisms in dielectrics will be presented in order to obtain a better insight on the effect of the ionic or covalent bonds of the dielectrics used in capacitive MEMS. The deviation from stoichiometry, due to low temperature deposition conditions, will be taken into account. Finally, the effect of temperature on the charging and discharging processes will be discussed in order to draw conclusions on the possibility of identification and predict of charging mechanisms and their relation to the deposition conditions.

2. Polarization/charging mechanisms The polarization of a solid dielectric submitted to an external electric field occurs through a number of mechanisms involving microscopic or macroscopic charge displacement. According to the time scale of polarization build up we can divide the polarization mechanisms in two categories, the instantaneous and the delayed time dependent polarization. The instantaneous polarization mechanisms, which play no important role in MEMS, consist of: The electronic polarization which is the fastest process requiring about 10−15 s and results from the deformation of the electronic shell The atomic polarization requiring about 10−14 to 10−12 s and results from the atomic displacement in molecules with heteropolar bonds constituting another deformation process The other polarization mechanisms [28–32], which are responsible for the “dielectric charging” effects are characterized by a time constants that may be as low as 10−12 s or as large as years, so that no relaxation is observed under the conditions of observation. These mechanisms are called slow and may occur through a number of processes involving either microscopic or macroscopic charge displacement. The slow polarization mechanisms, a summary of which is presented in Figure 2, are as follows: The dipolar or orientational polarization occurs in materials containing permanent molecular or ionic dipoles. In this mechanism depending on the frictional resistance of the medium, the time required for this process can vary between picoseconds to even years. The dipolar polarization of inorganic crystals may be caused by structural properties of the crystal lattice or it may be due to

144

G. PAPAIOANNOU

lattice imperfection or doping, for example in impurity vacancy dipole systems. The structural interpretation of the dielectric processes occurring in many polar materials is usually approached by assuming impaired motions or limited jumps of permanent electric dipoles. In molecular compounds for example, relaxation can be considered as arising from hindered rotation of the molecule as a whole, of small units of the molecule or some flexible group around its bond to the main chain, while in ionic crystals, it can be mainly associated with ionic jumps between neighboring sites (ion-vacancy pairs). From conventional dielectric measurements it is known that materials obeying the classical Debye treatment with a single relaxation time are rather rare.

(a)

(b)

Figure 2. Summary of polarization mechanisms under (a) non contacting and (b) contacting charging.

The space charge or translational polarization is observed in materials containing intrinsic free charges such as ions or electrons or both. The space charge polarization arises from macroscopic charge transfer towards the electrodes that may act as total or partial barriers. Moreover, the charging of space-charge electrets may be achieved by injecting (depositing) charge carriers. Other methods consist in the generation of carriers within the dielectric by light, radiation or heat and simultaneous charge separation by a field. The space charge polarization causes the material to be spatially not neutral (Figure 2) hence is a much more complex phenomenon than the dipolar polarization. The interfacial polarization, which sometimes is referred as Maxwell– Wagner–Sillars (MWS) polarization, is characteristic of systems with heterogeneous structure. It results from the formation of charged layers at the interfaces due to unequal conduction currents within the various phases. In structurally heterogeneous materials, such as complicated mixtures or semi-crystalline products, it can be expected that field-induced ionic polarization will obey more closely an interfacial model of the Maxwell–Wagner–Sillars type than a space-charge model of the barrier type [33]. There the action of an electric field can achieve a migration charge by (a) bulk transport of charge carriers within the higher conductivity phase and (b) surface migration of charge carriers. As a consequence surfaces, grain boundaries, interphase boundaries (including the surface of precipitates) may charge. Charges “blocked” at the interface between two phases with different

THE IMPACT OF DIELECTRIC MATERIAL AND TEMPERATURE

145

conductivity give a contribution to the net polarization of the body exposed to the electric field. In most of the theoretical treatments, the polarized material is assumed to be free of charge carriers, so that the internal field and the dipolar polarization can be considered as space independent. In practice, however, dipolar and space charge polarizations often coexist and the electric field and polarization must then be considered as averaged over the thickness of the sample. Finally, the simultaneous displacement of free charges and dipoles during the polarization process may lead to a particular situation where the internal electric field is nearly zero, so that no preferred orientation of dipoles occurs.

3. Material considerations As already mentioned the dielectric materials used in MEMS capacitive switches are as SiO2, Si3N4, AlN, Al2O3, Ta2O5 and HfO2. The charging mechanisms in each dielectric will depend on the material structure and for this reason each one will be discussed separately. So far the dielectric charging has been intensively investigated in SiO2 and Si3N4. Regarding the other materials i.e. Ta2O5, HfO2 and AlN there is little information on their impact on the reliability of MEMS devices. In the case of Ta2O5 [21] and HfO2 [22, 23], although the materials are attractive due to their large dielectric constant, the knowledge on the charging processes is still limited and arises from the study of MIM and MIS capacitors, the latter for MOSFET gate applications. Both materials exhibit ionic conduction and in the case of Ta2O5 it has been shown that under high electric field space charge arises due to formation of anodic–cathodic vacancy pair, (Frenkel pair dissociation) [35]. Moreover, isothermal current transients in chemical vapor deposited material revealed that protons are incorporated in the structure and the current transient arises from proton displacement [36]. For HfO2 it has been shown that hole trapping produces stable charge [37]. The trapped charge density was found to be strongly sensitive on the deposition methods and the work-function of the gate electrodes. In thin layers (≤10 nm) it was shown that charge trapping follows a logarithmic dependence on time [38]. On the other hand the detrapping rate was found to depend on the film thickness, with a power law behavior as a function of time. α-Al2O3 is a wide-gap insulator with a direct energy gap of about 8.3 eV [39]. The O–Al bonds in the compound exhibit highly ionic nature and theoretical calculations have shown that the valence band is well separated into two parts, with the lower part consisting of O 2s states and the upper part being dominated by O 2p states. The lower part of the conduction band is in general believed to be dominated by Al 3s states. Regarding the electrical properties and charging behavior the dc behavior of alumina has been little investigated. The experimental I(t) curves have shown that the ‘quasi’ steady-state current is reached for time ranging from 104 to 105 s [40]. The transient current was reported to consist of two

146

G. PAPAIOANNOU

parts, the first one that arises mainly from the polarization of dipoles in the dielectric which dominate at short time, whereas the second part was found to correspond to the carriers transport mechanism. Moreover the conduction mechanism in the high field regime was reported to obey the space charge limited current law. The conduction mechanism high temperatures has been found to be dominated by carriers emitted from deep traps while the low temperatures one by carriers emitted from discrete shallow traps or transport in the band tails [41, 42]. Here it must be pointed out that the characteristics of the charge traps introduced during deposition depend strongly on the deposition conditions [41]. Aluminum nitride (AlN) piezoelectric thin film is very popular in RF micromachined resonators and filters MEMS devices. The advantages arise from its high resistivity and piezoelectric coefficient, which is the largest among nitrides as well as the possibility to be deposited at temperatures as low as 500°C and patterned using conventional photolithographic techniques. AlN generally exhibits smaller piezoelectric and dielectric constant and differs from PZT materials in that it is polar rather than ferroelectric. Theoretical results have indicated that nitride semiconductors possess a large spontaneous polarization [42], associated with which are electrostatic charge densities analogous to those produced by piezoelectric polarization fields. In wurtzite structure the polar axis is parallel to the c-direction of the crystal lattice that may give rise to a macroscopic spontaneous polarization, which can reach values up to 0.1 C/m2. This macroscopic lattice polarization is equivalent to two dimensional fixed lattice charge densities with values between 1013 and 1014 e/cm2 located at the two surfaces of a sample [43]. Finally, in inhomogeneous alloy layers, variations in composition are expected to create non-vanishing and spatially varying spontaneous and piezoelectric polarization fields and associated charge densities that can significantly influence the material properties. Thus in contrast to the single crystalline material, the sputtered one exhibit near-zero, positive or even negative piezoelectric response indicating a change in crystalline orientation, grain size, concentration of defects or even a complete reversal of dipole orientation [43, 44]. Recently, AlN has been introduced in MEMS switches [45] and reliability tests have proved that under low pull-in bias or certain polarity the device degradation may be extremely low. Assessment of MIM capacitors with crystalline AlN dielectric has indicated that this behavior has to be attributed to the presence of a spontaneous polarization arising from dislocations that may induce a surface charge of the order of 6.6 × 10−7 C/cm2, which is much smaller than the theoretically predicted spontaneous polarization [18]. The SiO2 and Si3N4 are the most important dielectrics used in modern siliconbased electronic devices. In spite of the five decades of intensive investigation, the gained knowledge has not be effectively applied in MEMS capacitive switches. The reasons behind this deficiency lie on the fact that in MEMS capacitive switches technology the dielectric film is deposited on rough metal surfaces at low temperatures (≤300°C). Thus the film surface morphology is affected by the substrate and the low temperature leads to significant deviation of stoichiometry. The latter allows us to describe silicon oxide and nitride as SiOx and and SiNx

THE IMPACT OF DIELECTRIC MATERIAL AND TEMPERATURE

147

with x < 2 and x < 1.33 respectively. The low temperature deposition gives rise to formation of silicon nanoclusters and/or nanocrystals in both materials due to the fact that Si excess is high and the phase separation mechanism is not nucleation and growth as in the case of low Si excess, but spinodal decomposition [48]. Figure 3a shows clearly the percolation of nanocrystal after 1 min annealing at 1,000°C under Ar ambient. A simplified schematic diagram illustrating the twodimensional structure of SiNx [49] shows in Figure 3b (bottom) the regions of silicon phase, stoichiometric silicon nitride, and subnitrides and (top) the corresponding energy band profile. Similar is the behavior of SiOx [50, 51].

(a)

(b)

Figure 3. (a) Cross-sectional energy-filtered TEM image of Si-ncs embedded in SiNx layers deposited with a gas flow that corresponded to 21% Si excess [48] and (b) representation of material non-homogeneity and band gap fluctuation [49].

Although these materials consist of covalent bonds, in substoichiometric silicon oxide the Eδ' defect gives rise to the formation of dipoles by trapping holes [52]. Although these dipoles were observed after gamma ray irradiation, their presence in the SiOx used in MEMS capacitive switches cannot be overruled. Moreover, the presence of such structures cannot be rejected in SiNx. Taking all these into account we can conclude that the charging mechanisms taking place in insulating films used in MEMS capacitive switches can be summarized in Table 1. So, in all cases the space charge polarization due to presence of free charges or injected charges as well as the dipolar polarization constitutes the major charging mechanisms. The presence of nanoclusters or nanocrystals is expected to give rise to a random distribution of dipolar polarization and in the same time is expected to give rise to interfacial polarization; a fact that needs to be experimentally demonstrated. Presently, due to above analyzed effects, there is still no clear information on the charging of thin dielectric films used in MEMS capacitive switches. The electrical properties of these dielectrics obviously depend strongly on the deposition

148

G. PAPAIOANNOU

methods and conditions. Due to the absence of standardization of deposition methodology, the study of dielectric charging, employing MEMS and MIM devices, still leads to no concrete results. A key issue parameter, towards the solution of this problem, seems to be the dielectric film temperature since it accelerates the charging and discharging processes by providing enough energy to trapped charges to be released and to dipoles to overcome potential barriers and randomize their orientation. The effect of temperature will be analyzed in the following. TABLE 1. Charging mechanisms. Material SiO2 Si3N4 Al2O3 AlN HfO2 Ta2O5

Ionic – – D D D D

Dipolar (D) (D) D D D D

Space charge D D D D D D

(D) Due to deviation from stoichiometry.

4. Effect of temperature In insulators, the time and temperature dependence of polarization and depolarization processes are, in the case of dipolar polarization, determined by the competition, between the orienting action of the electric field and the randomizing action of thermal motion. In the case of space charge polarization the processes are far more complex because several mechanisms can be involved simultaneously [29]. In spite of these, the charging and discharging process time constant is thermally activated described by τ (T ) = τ 0 exp ⎛⎜ E A ⎞⎟ . This allows us to plot the depend-

⎝ kT ⎠

ence of room temperature normalized relaxation time constant on activation energy of relaxing mechanism (Figure 4a). Here it must be pointed out that the time constant normalization has been performed with respect to time constant at 450 K, which is considered for the sake of simplicity is assumed to be τ 450 K = 1 . This dependence has been demonstrated through thermally stimulated depolarization current measurements on MIM capacitors with SiNx materials deposited under different conditions [53, 54] (Figure 4b) In the case of MEMS switches, the pull-up transient is affected by to persisting electrostatic force due to dielectric charging. Thus the fast mechanical response is followed by a slow transient which is corresponds to the dielectric film discharging process. The discharge transient was found to follow the stretched β ⎡ ⎤ exponential relaxation law Δ C (t ) = Δ C 0 exp ⎢ − ⎛⎜ t ⎞⎟ ⎥ [25] (Figure 5a), where β ⎢⎣ ⎝ τ ⎠ ⎥⎦

THE IMPACT OF DIELECTRIC MATERIAL AND TEMPERATURE

149

is the stretch factor (0 ≤ β ≤ 1) that indicated the deviation from the Debye law and τ the process relaxation, which dependence on temperature has been described above. The recording of pull-up transient as a function of temperature allows us to draw the Arrhenius plot and determine the process activation energy hence to determine the “signature” of the corresponding discharging mechanism or mechanisms in the case there are several [25] (Figure 5b). Here it must be emphasized that the activation energy allows us to predict the behavior of a charging/ discharging mechanisms through the Arrhenius plot. If further the investigation is extended on materials deposited with different methods and/or conditions, the sensitivity of the activation energy on the deposition conditions will allow us to draw conclusions on the nature of the charging mechanism. 6

10

5

10

6

5

10

[sec]

[τ450=1]

10

4

10

3

3

10

2

10

10

2

10

τ300K

τ300 / τ450

4

10

1

10

LF loc LF dis MF loc MF dis HF loc HF dis Ref. 10 Ref. 11

E1

E2

E3

1

10

0

10 0.0

0

10 0.0

0.2

0.4

EA

0.6

0.8

1.0

0.2

0.4

EA

[eV]

(a)

0.6

0.8

[eV]

(b)

Figure 4. (a) normalized room temperature time constant vs activation energy and (b) dependence of room temperature relaxation times on the corresponding polarization mechanism activation energy [54].

The transient itself provides information only on the activation energy of charging mechanism. The nature of the dominant charging mechanism i.e. dipolar or space charge polarizations, the latter arising from charge injection or intrinsic free charges, can be only obtained from the shift of the bias at minimum of z σ capacitance-voltage characteristic, V min = − d , where σ is the average

ε0

value of equivalent surface charge, zd the dielectric film thickness and ε0 the vacuum dielectric constantan. Drawing both the Arrhenius and shift of Vmin with temperature in the same figure allows us to determine the activation energy and charge origin of each contributing mechanism (Figure 5b).

G. PAPAIOANNOU

0.14

10

10

0

10

5 0

-1

10

0V -40V

-5

-2

1

10

t

[sec] (a)

10

[x10-8C/cm2]

0.16 0.15

1

[sec]

0.17

15

0.54eV

0.45eV

T = 310K

τ

COFF

[pF]

0.18

2.2

2.4

2.6

2.8

1000/T

3.0

3.2

σ

150

3.4

[K]

(b)

Figure 5. (a) Pull-up transient and (b) simultaneous drawing of Arrhenius plot and shift of Vmin [25].

5. Conclusions The present work attempted to provide a better insight on the dielectric charging in RF-MEMS capacitive switches. It was shown that the dielectric material properties play a key issue role in the dielectric charging process. It was shown that in ionic materials the ionic/dipolar polarization as well as the space charge polarization is the dominant charging mechanisms. In the case of the well established SiNx and SiOx dielectric materials the covalent bonds prevent the dipolar polarization. On these materials are Si-rich and the significant deviation from stoichiometry gives rise to the formation of Si nanoclusters and nanocrystals which in turn allows the formation of defects that exhibit dipole properties, hence giving rise to dipolar polarization in addition to the space charge one. The dependence of both polarization mechanisms on temperature allows drawing conclusions on the nature of charging mechanisms. This can be achieved by monitoring both the Arrhenius plots of discharging or charging mechanisms as well as the polarity of the dielectric film equivalent surface charge.

References 1. 2. 3.

Rebeiz, G. M., “RF MEMS,” in Theory, Design and Technology. Hoboken, NJ: Wiley, 2003, pp. 185–192 J. Wibbeler, G. Pfeifer and M. Hietschold, Parasitic charging of dielectric surfaces in capacitive microelectromechanical systems (MEMS), Sensors and Actuators A 71, 74–80 (1998) X. Yuan, S. Cherepko, J. Hwang, C. L. Goldsmith, C. Nordquist and C. Dyck, Initial Observation and Analysis of Dielectric-Charging Effects on RF MEMS Capacitive Switches, International Microwave Symposium, pp. 1943–1946, 2004

THE IMPACT OF DIELECTRIC MATERIAL AND TEMPERATURE 4. 5. 6. 7. 8. 9.

10. 11.

12. 13. 14. 15.

16. 17. 18. 19. 20.

151

S. Melle, F. Flourens, D. Dubuc, K. Grenier, P. Pons, F. Pressecq, J. Kuchenbecker, J. L. Muraro, L. Bary, and R. Plana, in Proc. 33rd Eur. Microwave.Conf., Oct. 2003, pp. 37–40. P. Czarnecki; X. Rottenberg; R. Puers; I. de Wolf, “Effect of Gas Pressure on the Lifetime of Capacitive RF MEMS Switches”, 19th IEEE Interna Microtional Conference on Electro Mechanical Systems, 2006. MEMS 2006 Istanbul, p. 890–893 Z. Olszewski, R. Duane and C. O’Mahony, “A study of capacitance-voltage curve narrowing effect in capacitive microelectromechanical switches”, Applied Physics Letters 93, 094101 2008 C. Goldsmith, J. Ehmke, A. Malczewski, B. Pillans, S. Eshelman, Z. Yao, J. Brank, and M. Eberly, Lifetime Characterization of Capacitive RF MEMS Switches, IEEE MTT-S Digest pp. 227–230, 2001 W.M van Spengen, R. Puers, R. Mertens and I. de Wolf, A low frequency test-up for the reliability assessment of capacitive RF MEMS switches, J. of Micromechanics and Microengineering 13, pp. 604–612, 2003 M. Lamhamdi, P. Pons, U. Zaghloul, L. Boudou, F. Coccetti, J. Guastavino, Y. Segui, G. Papaioannou and R. Plana, Voltage and temperature effect on dielectric charging for RF-MEMS capacitive switches reliability investigation, Microelectronics Reliability 48, pp. 579–582, 2008 G. Papaioannou, J. Papapolymerou, P. Pons and R. Plana, Dielectric charging in radio frequency microelectromechanical system capacitive switches: A study of material properties and device performance, Applied Physics Letters 90, pp. 233–507, 2007 R.W. Herfst, P.G. Steeneken, J. Schmitz, A.J.G. Mank and M. van Gils, Kelvin probe study of laterally inhomogeneous dielectric charging and charge diffusion in RF MEMS capacitive switches, 46th Annual International Reliability Physics Symposium, Phoenix, pp. 492–495, 2008 A. Belarni, M. Lamhamdi, P. Pons, L. Boudou, J. Goustavino, Y. Segui, G. Papaioannou and R. Plana, Kelvin probe microscopy for reliability investigation of RF-MEMS capacitive switches, Microelectronics Reliability 48, pp. 1232–1236, 2008 J.R. Reid and R.T. Webster, “Measurements of charging in capacitive microelectromechanical switches”, Electron. Lett. 38 (24) (2002), pp. 1544–1545 G. Papaioannou, M. Exarchos, V. Theonas, G. Wang and J. Papapolymerou, IEEE Trans. on Microwave Theory and Tech. 53, 3467 (2005) G. J. Papaioannou M. Exarchos, V. Theonas, J. Psychias, G. Konstantinidis, D. Vasilache, A. Muller, and D. Neculoiu, Effect of space charge polarization in radio frequency microelectromechanical system capacitive switch dielectric charging, Applied Physics Letters vol 89, pp. 103512-1 to 4, 2006 G. J. Papaioannou, G. Wang, D. Bessas and J. Papapolymerou, Contactless Dielectric Charging Mechanisms in RF-MEMS Capacitive Switches, 1st European Microwave Integrated Circuits Conference EuMW, pp. 513–516, 2006 G. J. Papaioannou and T. Lisec, Dielectric charging process in AlN RF-MEMS capacitive switches, Proceedings of the 2nd European Microwave Integrated Circuits Conference, pp. 540–543, 2007 E. Papandreou, G. Papaioannou and T. Lisec, “A correlation of capacitive RF-M.EMS reliability to AlN dielectric film spontaneous polarization”, International Journal of Microwave and Wireless Technologies 1, 43–47, (2009) E. Berland, T. Delage, C. Champeaux, P. Tristant, A. Catherinot, and P. Blondy, “Dielectric materials in MEMS switches: a comparison between BST and Al2O3,” Proceedings of the MEMSWAVE, Toulouse, 2003 P. Blondy, A. Crunteanu, A. Pothier, P. Tristant, A. Catherinot, C. Champeaux, Effects of Atmosphere on the Reliability of RF-MEMS Capacitive Switches, European Microwave Integrated Circuits Conference, EuMW, pp. 548–551, 2007

152

G. PAPAIOANNOU

21. X. Rottenberg, H. Jansen, P. Fiorini, W. De Raedt, H. A. C. Tilmans, “Novel RF-MEMS capacitive switching structures”, 32nd European Microwave Conference, 1–4, 2002. 22. J.K. Luo, M. Lin, Y.Q. Fu, L. Wang, A.J. Flewitt, S.M. Spearing, N.A. Fleck, W.I. Milne, “MEMS based digital variable capacitors with a high-k dielectric insulator”, Sensors and Actuators A 132 (2006) 139–146 23. J. Tsaur, K. Onodera, T. Kobayashi, Z.-J. Wang, S. Heisig, R. Maeda, T. Suga , “Broadband MEMS shunt switches using PZT/HfO2 multi-layered high k dielectrics for high switching isolation”, Sensors and Actuators A 121 (2005) 275–281 24. R. Daigler, G. Papaioannou, E. Papandreou and J. Papapolymerou, “Dielectric Charging in RF-MEMS Capacitive Switches - Effect of Dielectric Film Thickness”, International Microwave Symposium 1275–8, 2008 25. G. Papaioannou, E. Papandreou, J. Papapolymerou, R. Daigler, “Dielectric Discharging processes in RF-MEMS Capacitive Switches”, Asia-Pacific Microwave Conference, 2007. APMC 1–4, 2007 26. D. Mardivirin, A. Pothier, A. Crunteanu, B. Vialle and P. Blondy, IEEE Trans. on Microwave Theory and Tech. 57, 231 (2009) 27. P. Czarnecki, X. Rottenberg, P. Soussan, P. Ekkels, P. Muller, P. Nolmans, W. De Raedt, H.A.C. Tilmans, R. Puers, L. Marchand, I. DeWolf, “Effect of substrate charging on the reliability of capacitive RF MEMS switches”, Sensors and Actuators A in press 28. J. van Turnhout in: G.M. Sessler (Ed.) Topics in Applied Physics: “Electrets”, vol. 33, ch. 3, pp. 81–216, Springer-Verlag, Berlin, 1987 29. J. Vandershueren and J. Casiot, Topics in Applied Physics: Thermally Stimulated Relaxation in Solids, P. Braunlich, Ed. Berlin, Germany: Springer-Verlag, 1979, vol. 37, ch. 4. 30. E. Barsoukov and J. Ross Macdonald, “Impedance Spectroscopy Theory, Experiment, and Applications”, John Wiley & Sons, Inc., Hoboken, New Jersey, 2005 31. Kwan Chi Kao, “Dielectric Phenomena in Solids, With Emphasis on Physical Concepts of Electronic Processes”, Elsevier Academic Press 2004 32. C.J.F. Böttcher, “Theory of electric polarization”, Elsevier, Amsterdam 1952 33. V. V. Daniel, “Dielectric Relaxation” (Academic Press, New York, 1967) 34. A. Toriumi, K. Tomida, H. Shimizu, K. Kita and K. Kyuno, Far- and mid-infrared absorption of HfO2/SiO2/Si system, in Silicon Nitride, Silicon Oxide Thin Insulating Films and Other Engineering Dielectrics VIII, by R. E. Sah et al. editors, 471–481, 2005 35. S. Duenas, H. Castan, J. Barbolla, R.R. Kola, P.A. Sullivan, Electrical characteristics of anodic tantalum pentoxide thin ®lms under thermal stress, Microelectronics Reliability 40 (2000) 659±662 36. K.-H. Allers, P. Brenner, M. Schrenk, Dielectric reliability and material properties of Al2O3 in metal insulator metal capacitors (MIMCAP) for RF bipolar technologies in comparison to SiO2, SiN and Ta2O5, Proceedings of the Bipolar/BiCMOS Circuits and Technology Meeting, 2003, 35–38, 2003 37. M. Strømme Mattsson and G. A. Niklasson, Isothermal transient ionic current as a characterization technique for ion transport in Ta2O5, J. of Applied Physics 85, 8199–8204, 1999 38. V.V. Afanas’ev, A. Stesmans, Injection induced charging of HfO2 insulators on Si, Materials Science and Engineering B 109 (2004) 74–77 39. G. Puzzilli and F. Irrera, Long time transients in hafnium oxide, Microelectronic Engineering 84 (2007) 2394–2397 40. C M Fang and R A de Groot, “The nature of electron states in AlN and α-Al2O3”, J. Phys.: Condens. Matter vol. 19 pp. 386223 1–6, 2007 41. F. Talbi, F. Lalam and D. Malec, “DC conduction of Al2O3 under high electric field”, J. Phys. D: Appl. Physics vol. 40, pp. 3803–3806, 2007 42. Cheng Rong Li, Li Jian Ding, Jin Zhuang Lv, You Ping Tu and Yang Chun Cheng, “The Relation of Trap Distribution of Alumina with Surface Flashover Performance in Vacuum”, IEEE Trans. on Dielectrics and Electrical Insulation vol. 13, pp. 79–84, 2006

THE IMPACT OF DIELECTRIC MATERIAL AND TEMPERATURE

153

43. E. Papandreou, A. Crunteanu, G. Papaioannou, P. Blondy, F. Dumas-Bouchiat, C. Champeaux and A. Catherinot , Investigation of dielecric charging mechanisms in Al2O3 RF mems capacitive switches, MEMSWAVE 2008, Herakleio Crete 44. F. Bernardini, V. Fiorentini, and D. Vanderbilt, “Spontaneous polarization and piezoelectric constants of III-V nitrides”, Phys. Rev. B 56 (1997), R10024-7. 45. A. Zoroddu, F. Bernardini, P. Ruggerone and V. Fiorentini, “First-principles prediction of structure, energetics, formation enthalpy, elastic constants, polarization, and piezoelectric constants of AlN, GaN, and InN: Comparison of local and gradient-corrected densityfunctional theory” Physical Review B 64 (2001), 045208-1–045208-6 46. J.A. Ruffner, P.G. Clem, B.A. Tuttle, D. Dimos and D.M. Gonzales, “Effect of substrate composition on the piezoelectric response of reactively sputtered AlN thin films”, Thin Solid Films 354 (1999), 256–261 47. M. Stutzmann et al., “Playing with polarity”, Physica Status Solidi (b) 228 (2001), 505–512 48. T. Lisec, C. Huth and B. Wagner, Dielectric Material Impact on Capacitive RF MEMS Reliability, 12th GAAS Symposium European Microwave Week, 471–4, 2004 49. M. Carrada, A. Zerga, M. Amann, J.J. Grob, J.P. Stoquert, A. Slaoui, C. Bonafos, S. Scham, Structural and optical properties of high density Si-ncs synthesized in SiNx:H by remote PECVD and annealing, Materials Science and Engineering B 147 (2008) 218–221 50. V. A. Gritsenko, D. V. Gritsenko, Yu. N. Novikov, R. W. M. Kwok and I. Bello, Shortrange order, large scale potential fluctuations and photoluminescence in amorphous SiNx, Journal of Experimental and Theoretical Physics, Vol. 98, No. 4, 2004, pp. 760–769 51. F. Iacona, C. Bongiorno, C. Spinella, Formation and evolution of luminescent Si nanoclusters produced by thermal annealing of SiOx films, J. of Applied Physics 95, 2004, 3723 52. K. Yoshida, I. Umezu, N. Sakamoto, M. Inada and A. Sugimura, Effect of structure on radiative recombination processes in amorphous silicon suboxide prepared by rf sputtering, J. of Applied Physics 92, 2002, 5936 53. D. M. Fleetwood et al., Dipoles in SiO2: Border traps or not?, in Silicon Nitride, Silicon Oxide Thin Insulating Films and Other Engineering Dielectrics VII, by R. E. Sah et al. editors, 291, 2003 54. E. Papandreou, M. Lamhamdi, C.M. Skoulikidou, P. Pons, G. Papaioannou and R. Plana, Structure dependent charging process in RF MEMS capacitive switches, Microelectronics Reliability 47, pp. 1812–1817, 2007

ADVANCED PROCESSES AND MATERIALS

DEVELOPMENT OF DRIE FOR THE NEXT GENERATION OF MEMS DEVICES

H. ASHRAF, J. HOPKINS AND L.M. LEA SPP Process Technology Systems UK Limited, Imperial Park, Newport, UK, E-mail: [email protected]

Abstract This paper describes methods to increase the aspect ratio of features whilst maintaining a high throughput using DRIE technology. The component parts of the Bosch process are considered with the aim to increase the efficiency of each step. By controlling process parameters within a cycle and cycle to cycle, etch rate and aspect ratio can be increased.

Keywords: DRIE (deep reactive ion etching), HAR (high aspect ratio), MEMS, silicon, parameter ramping.

1. Introduction The Bosch process [1] has been fundamental in enabling the commercialisation of MEMS devices. Before this pioneering technique, plasma processing used a mixture of gases in a continuous mode to etch material. This proved to have limitations on etch rate and selectivity. To limit isotropic etching, the lateral etch rate has to be inhibited at the same time as maintaining vertical etching. This would typically involve having high bias to enable the feature base to be kept free of etch inhibitors whilst simultaneously protecting the sidewalls from etching. Examples of such processes are BCl3/Cl2 used in GaAs etching [2] and SF6/O2 used in Si etching [3]. The process parameters (gas flow rates and composition, ICP coil power, bias power and pressure) are used to control the profile and etch rate. For the commercialisation of MEMs devices in silicon, the Bosch process or DRIE (deep reactive ion etching) has become the mainstay for the majority of applications due to its’ versatility. The process consists of three parts; deposition, removal of deposition at the feature base and etch (Figure 1). This cyclical approach enables anisotropic features to be etched in silicon with higher etch rates and increased selectivities compared to the continuous non switched technique (Table 1). The downside to the Bosch approach is that the switched cyclical nature gives rise to sidewall roughness or “scallops” however with optimization of the process recipe this effect can be minimised. In this paper, each aspect of the DRIE process is considered with the aim of developing the process for the next generation of devices where higher throughputs and increased aspect ratio are essential. E. Gusev et al. (eds.), Advanced Materials and Technologies for Micro/Nano-Devices, Sensors and Actuators, DOI 10.1007/978-90-481-3807-4_12, © Springer Science + Business Media B.V. 2010

157

158

H. ASHRAF, J. HOPKINS AND L.M. LEA

(a)

(b)

(c)

Figure 1. Schematic of the Bosch Process (DRIE) (a) deposition of CFx layer; (b) removal of deposition; (c) etching of silicon. TABLE 1. Comparison of Bosch and continuous mode processes for silicon etching [3–6]. Continuous

DRIE

Typical etch rates (µm/min)

1–10

4–50

Typical selectivity

<30:1

50-300:1

20

20-1000

Silicon: mask (photoresist) Sidewall roughness (µm)

2. Experimental In order to increase the overall throughput, it is necessary to maximise the efficiency of each of the three parts of the DRIE process. This has been done by splitting the DRIE process into an etch phase, deposition phase, removal of the deposition and investigating individually. The work carried out predominantly used an ICP source (inductively coupled plasma) [5]. The coil powers used were in the region 1,000–3,000 W at a frequency of 13.56 MHz. Blanket etch tests were used for monitoring the silicon etch rate by measuring the etch depth using a KLA Tenkor P10 profilometer. The DRIE etch rates were calculated using etch depths measured on a LEO 440 SEM (scanning electron microscope) after etch. Deposition removal rates were derived by depositing a polymer on blank Si wafers using a C4F8 plasma with typical conditions used in a DRIE process. The deposition thickness was measured pre and post removal plasma using a Scientific Computing Ltd FilmTek 4000A. A predefined pattern was used to ensure measurement at the same positions on the wafer.

3. Results and discussion 3.1. MAXIMISING THROUGHPUT

3.1.1. Maximising Si etch rate In order to maximise throughput, all the component parts of the DRIE process have to be as efficient as possible. This requires increasing etch rate of the silicon by optimising the process parameters (flow, pressure, power) in addition to optimising the design of the ICP source. Modeling techniques can be useful in

DEVELOPMENT OF DRIE FOR THE NEXT GENERATION

159

providing guidance for the optimum window and chamber design by verifying the species generated. Figure 2 compares F generation from a 0-D model available from Quantemol [7] which allows the chemistry of the plasma including gas volume and surface reactions to be modeled. The F generation can be related to etch rate of the silicon assuming the etch product is SiF4. Figure 2 shows the relationship between plasma parameters for gas flow, ICP power and pressure. These trends are in agreement with the data collected from varying ICP source configurations/parameters [3]. Figure 3 contains silicon etch rate data from blanket etch rate tests. There is a discrepancy between the theoretical etch rate, Figure 2a and

4000-4500

4500

3500-4000

4000

3000-3500 2500-3000

3500

2000-2500

F production 3000 (sccm)

1500-2000

2500 2000

400

200

Pressure (mT)

600 168.75

137.5

1000 800 106.25

75

1500

SF6 flow (sccm)

(a) Fixed Power

5000

4000-5000

4000

3000-4000

3000

F production 2000 (sccm)

6000 5000

1000

4000

0

1000-2000 0-1000

3000

500mT

2000 300mT

100mT

Pressure (mT)

2000-3000

Power (W)

1000

(b) Fixed SF6 flow Figure 2. Plasma modeling data comparison of F generation: (a) fixed power; (b) fixed SF6 flow.

160

H. ASHRAF, J. HOPKINS AND L.M. LEA

actual etch rate obtained as the 0-D model does not take into account effects at wafer level, only what occurs in the source region. Nevertheless the general trends can be used. For maximum etch rates, high flow rates with accompanying higher coil powers and pressures are required. Obviously there will be limitations on the power that can be delivered to a system due to temperature control capabilites. This paper will not be discussing the deposition step of the process, however for maximum throughput, the minimum time spent on depositing a CFx layer is advantageous. Tuning the process parameters [7] along with minimising wafer temperature will increase deposition rate, Figure 4.

8-10

10

6-8 4-6

8

Etch rate (µm/min)

2-4

6

0-2

4 1000

2 0 600 75

SF6 flow (sccm)

106.25

400

200

Pressure (mT)

Figure 3. Silicon etch rate data (150 mm diameter wafer, 95% exposed area) for an ICP source.

7000

Deposition rate (A/min)

6000 5000 4000 3000 2000 1000 0 -25

-20

-15

-10

-5

0

5

10

15

Temperature (Degree C)

Figure 4. Effect of wafer support temperature on deposition rate.

DEVELOPMENT OF DRIE FOR THE NEXT GENERATION

161

3.1.2. Removal of deposition In order to increase the overall etch rate, the time required to remove the deposition from the base of a feature should be minimised. Typically this is done by increasing the bias to remove the passivation. An investigation of the influence of gas chemistry, pressure and bias power on the removal of blanket deposition films was carried out. The general trends observed by etching blanket films were similar to the effects observed when etching the deposition on the base of a trench although as may be expected by the reduced flux of species at the base of a feature [8], the typical etch rates will be higher on blanket features. Figure 5 demonstrates the effect of the chemical reaction on the deposition removal by measuring deposition thickness pre and post plasma etch at 0 W applied bias power. This

Etch rate of deposition (nm/min)

2000 1800 1600 1400 1200

SF6

1000

O2

800 600 400 200 0 0

150

Platen Power (W)

(a) Comparison of etch rate of CFx polymer using SF 6 or O 2 at different platen powers. 1400

Etch rate of PR (nm/min)

1200 1000 800

SF6 O2

600 400 200 0 0

150

Platen Power (W)

(b) Comparison of photoresist etching using SF6 or O2 at different platen powers. For both cases the etch parameters were identical. Figure 5. Etching of CF x or photoresist using SF6 or O2 plasmas.

162

H. ASHRAF, J. HOPKINS AND L.M. LEA

clearly shows that although both SF6 and O2 plasmas will etch CFx polymer readily, the O2 plasma is more efficient. This is in agreement with the literature [9–11]. The O2 plasma is more isotropic in its behavior and will etch the sidewall passivation coating more readily than SF6 [12]. The ion sputtering effect can be tested by using a chemically inert gas, Figure 6 shows the effect of using noble gases and chemically reactive gases versus bias power. Although the inert gas plasma does etch the polymer layer, the etch rate is much less than that observed for the O2 or SF6 plasma. An increase in applied power increases the etch rate of the deposition, Figure 6. This demonstrates that a ion-enhanced chemical reaction results in the fastest etch rate of the polymer and therefore will aid overall throughput of a DRIE process. The downside for the use of an O2 plasma is that sidewall passivation is removed more quickly with the O2 plasma at 0W bias and photoresist also etches faster compared to the use of a SF6 plasma (Figure 5b), indeed O2 plasmas are often used to strip photoresist masks [14].

Etch rate of deposition (nm/min)

2500

SF6 O2

2000

Ar Kr

1500

1000

500

0 0

50

100

150

200

Platen Power (W)

Figure 6. Effect of platen power and gas type on deposition etching rate.

3.2. INCREASING ASPECT RATIOS For many MEMS applications, higher aspect ratios (HAR) are required as device sizes shrink [6, 15] in addition to maintaining a high throughput. As is well documented, the flux of species into a feature decreases with increasing depth [16]. This will affect the rate of silicon etching as not only will the number of F radicals available for etching be reduced but the number of ions available for deposition removal will also be diminished by loss to sidewalls [16]. Although the deposition will also be decreased at the base of a feature [9, 16], it will still need to be etched. As the process progresses, the flux of neutral and ionic species

DEVELOPMENT OF DRIE FOR THE NEXT GENERATION

163

will change. This impacts the end result. Not only is the etch rate reduced but effects such as feature bowing and pitting occur. In order to enable high aspect etching, the following effects need to be taken into account: a. Ion and neutral flux b. Charging effects c. Transport of etchant species and reaction products The ability to control the individual parts of the Bosch cycle become essential for enabling the etching of HAR features. The results from Section 3.1.2 play an important role in the etching of high aspect ratio features. As the feature is etched deeper, enhanced collimation of the etching species is required. A spread in the ion angular distribution will increase the reentrance of the feature being etched and may cause other effects such as bowing due to the erosion of the passivation where ions strike the sidewall and enable lateral etching in this area. As discussed in Section 3.1.2, higher bias in addition to lower pressure increase the etch rate of the deposition on blanket features. Simply increasing the bias/lowering pressure throughout the whole of the etch cycle will increase the reentrance, reduce etch rate and reduce the selectivity to the mask but will help to prevent bowing or etch stop for HAR features [17, 18]. By only applying the low pressure/high bias to the portion of the etch step that is required for the removal of the deposition, not only is a higher etch rate maintained by increasing the F concentration when the silicon is exposed but a profile with closer to parallel walls and a higher selectivity to mask can be obtained due to the decrease in ion energy in the main part of the etch step. Figure 7a demonstrates this effect on the profile of a trench. With increasing etch depth the “ideal” process parameters will vary. By tuning each portion of the DRIE process over the process duration [19], high aspect ratios can be obtained. Figure 7b shows a trench with ramping used to obtain a fast etch rate with a reentrant profile. Figure 8 is a schematic of how this approach works in practice through setting the appropriate plasma conditions and then adjusting these conditions within cycle and cycle to cycle as the process progresses.

(a) HAR trench 55:1

(b) Fast Etch rate (>18 µm/min)

Figure 7. SEMS of features demonstrating the advantage of using parameter ramping.

164

H. ASHRAF, J. HOPKINS AND L.M. LEA

Dep

Etch

Dep

Etch

Pressure (a) Bias

Time

Pressure (b)

Low pressure/high bias for deposition removal

Bias

Time Pressure

Pressure decreasing

High pressure to maintain etch rate

(c)

Bias

Bias increasing Time

Figure 8. Schematic for ramping technique: (a) basic Bosch technique; (b) changing parameters within cycle; (c) changing parameters within cycle and cycle to cycle.

4. Conclusion In order to increase throughput for the DRIE process, each step of the process needs to be optimised for efficiency; this requires the maximisation of the chemical etch for silicon, ensuring the maximum deposition rate to increase the etch:deposition cycle time ratio and ensuring that the deposition is removed as quickly as possible. This paper has discussed various approaches to enhance the removal rate of the deposition through chemical and physical approaches. The ability to dynamically

DEVELOPMENT OF DRIE FOR THE NEXT GENERATION

165

change the conditions within cycle and cycle to cycle whether it be through the plasma parameters or the use of an additional gas or a combination of both allows more challenging aspect ratios to be etched whilst maintaining a higher etch rate than could be otherwise achieved.

Acknowledgments The authors would like to acknowledge the Process and R&D groups in STS for their contribution to the ongoing development of the DRIE process.

References 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. 12. 13. 14. 15. 16. 17. 18. 19.

F. Larmer, R. Schlip, German Patent DE4241045. C. C. Wang, Y. L. Lin, S. K. Lin, C. S. Li, H. K. Hiuang, C. L. Wu, C. S. Chang, Y. H. Wang, Journal Vacuum Science and Technology, B 25 (2), 312–317 (2004). M. J. de Boer, J. G. E. Gardeniers, H. V. Jansen, E. Smulders, M. Gilde, G. Roelofs, J. N. S. Sasserath, M. Elwenspoek, Journal Microelectromechanical Systems, 11(4), 385–401 (2002). B. N. Chapman, Glow Discharge Processes, New York, Wiley Press (1980). www.stsystems.com S. Gomez, R. J. Belen, M. Kiehlbauch, E. S. Aydil , Journal Vacuum Science and Technology, B 22 (3), 893–901 (2004). www.quantemol.com C. B. Labelle, V. M. Donelly, G. R. Bogart, R. L. Opila, A. Kornblit, Journal Vacuum Science and Technology, A 22 (6), 2500-2507 (2004). H. Rhee, H. M. Lee, Y. M. Namkoung C. Kim, H. Chae, Y. W. Kim, Journal Vacuum Science and Technology, B 27 (1), 33–40 (2009). J. Min, G. Lee, J. Lee, S. H. Moon, Journal Vacuum Science and Technology, B 22 (3), 893-901 (2004). M. A. Blauw, T. Zijlstra, E. van der Drift, Journal Vacuum Science and Technology, B 19 (6), 2930–2934 (2001). R. Abdolvand, F. Ayazi, Sensors and Actuators A, 144, 109-116 (2008). M . A. Blauw, G. Craciun, W. G. Sloof, P. J. French, E. van der Drift, Journal Vacuum Science and Tecnology, B 20 (6), 3106–3110 (2002). A. Grill, Cold Plasma in Materials fabrication From Fundamentals to Applications, IEEE Press (1994). Yole Report, MEMS for Mobiles (2006). I. W. Rangelow, Journal Vacuum Science and Technology, A 21 (4), 1550–1562 (2003). J. Hopkins, H. Ashraf, J. K. Bhardwai, A. M. Hynes, I. Johnston, J. N. Shepherd, Proceedings of Materials Research Society Symposium on Materials Science of Microelectromechanical Systems (MEMS) Devices, 546, 63–68 (1999). A. A. Ayon, X. Zhang, R. Khanna, Sensors and Actuators, A 91, 381–385 (2001). J. Bhardwaj, H. Ashraf, B. Khamesphour, J. Hopkins, M. Ryan, D. Haynes, US Patent 6051503.

LOW-TEMPERATURE PROCESSES FOR MEMS DEVICE FABRICATION

JYRKI KIIHAMÄKI*, HANNU KATTELUS, MARTTI BLOMBERG, RIIKKA PUURUNEN, MARI LAAMANEN, PANU PEKKO, JAAKKO SAARILAHTI, HEINI RITALA, AND ANNA RISSANEN VTT Technical Research Centre of Finland, Espoo, Finland

Abstract The high temperatures typical in semiconductor and conventional MEMS fabrication limit the material choices in MEMS structures. This paper reviews some of the low-temperature processes and techniques available for MEMS fabrication and describes some characteristics of these techniques and practical process examples. The techniques described are plasma-enhanced chemical vapour deposition, atomic layer deposition, reactive sputtering, vapour phase hydrofluoric acid etching of low-temperature oxides, and low-temperature wafer bonding. As a practical example of the use of these techniques, the basic characteristics of a MEMS switch and other devices fabricated at VTT are presented.

Keywords: MEMS, thin film technology, fusion bonding, amorphous metals, HF-vapour etching.

1. Introduction The high process temperatures typical in semiconductor [1] and conventional MEMS fabrication [2] limit the material choices in MEMS structures. However, there is wide interest in post-CMOS processing and compatibility with aluminium metallization. Silicon direct bonding with subsequent high-temperature annealing is a standard method for the fabrication of silicon-on-insulator wafers for MEMS and sensor applications. VTT has long experience in low-temperature direct bonding of silicon substrates based on plasma activation of the bonding surfaces, and several activation processes have been developed for our set of plasma tools [3]. Strong bonding can be achieved even at temperatures as low as 200°C, which

______ *

Jyrki Kiihamäki, e-mail: [email protected]

E. Gusev et al. (eds.), Advanced Materials and Technologies for Micro/Nano-Devices, Sensors and Actuators, DOI 10.1007/978-90-481-3807-4_13, © Springer Science + Business Media B.V. 2010

167

168

J. KIIHAMÄKI ET AL.

enables the bonding of wafers of dissimilar temperature coefficients of expansion, or bonding of wafers containing metal structures. This technology has been utilized, for example, in wafer-scale packaging and for the fabrication of MEMS devices with internal vacuum cavities. Silicon dioxide is one cornerstone of silicon-based MEMS fabrication. However, thermal growth of oxides and low-pressure chemical vapour deposition (LPCVD) of oxides typically require higher temperatures than are tolerated in many applications. Plasma-enhanced chemical vapour deposition (PECVD) offers a low-temperature (<200°C) option for silicon dioxide and silicon nitride deposition. These films are relatively free of pinholes for thicknesses above 100 nm and the thickness uniformity is around ±1%, but the step coverage is limited. A modern alternative for the growth of oxides is the atomic layer deposition (ALD) method. Insulating Al2O3 and semi-insulating TiO2 layers can be grown conformally at temperatures as low as 110°C. In addition to utilizing the electrical, optical and chemical properties of the pure oxides, the properties of films can be further optimized by using Al2O3/TiO2 nanolaminate layers where the electrical (dielectric constant, resistivity) and optical (refractive index) properties can be accurately tailored. To replace silicon as a mechanical material we have studied the use of lowtemperature materials like co-sputtered amorphous metallic alloys. Mo-Si-N films offer good stability and excellent elastic properties compared to elemental metals. The low deposition temperature widens the choice of the underlying sacrificial materials. The electrical properties of amorphous metals are better than what is achievable with polycrystalline silicon films [4]. Finally, one of the key issues in the fabrication of surface-micromachined MEMS is the release of the mechanical structures. Sacrificial oxides are typically removed with aqueous solutions of hydrofluoric acid or with anhydrous HFvapour. Polymers such as photoresist or polyimides [5] offer a low-temperature solution as a sacrificial layer material. They can be dry-released in oxygen plasma at temperatures below 150°C. Also, “stiction” of released structures can be avoided by a dry release process. As a practical example of the use of these techniques, the basic characteristics of a MEMS switch and a novel Fabry–Perot interferometer (FPI) fabricated at VTT are presented.

2. Technologies suitable for low-temperature fabrication In this chapter the low-temperature processing techniques available at VTT are described. VTT has a high-quality clean room fully equipped for CMOS and MEMS fabrication. The process line uses only CMOS-compatible materials. In this paper we do not discuss plasma etching generally, though it is a room-temperature process.

LOW-TEMPERATURE PROCESSES FOR MEMS DEVICE FABRICATION

169

2.1. THIN FILM TECHNOLOGIES Chemical vapour deposition (CVD) and sputtering are the conventional methods of depositing the thin films used in semiconductor manufacturing [1]. Atomic layer deposition is a novel option for the deposition of high-quality films of a wide selection of materials [6].

2.1.1. Plasma-enhanced chemical vapour deposition of silicon dioxide and silicon nitride With plasma-enhanced CVD one can deposit in lower temperatures compared to conventional low-pressure CVD. Deposition temperatures from 100°C to 300°C are suitable for good-quality film growth. The plasma power and frequency give an extra degree of freedom in the tuning of the film characteristics. Our tool (the Oxford Plasmalab System 100) is configured for SiH4 and tetraethylorthosilicate (TEOS) processes. With silane-based SiO2 processes the deposition rate is adjustable from 10 to 150 nm/min. It has uniform optical film properties, while the refractive index is controllable from 1.455 to 1.52. The breakdown voltage is up to 5 MV/cm. Compressive mechanical stress is less than −0.3 GPa. It also provides a durable mask material for subsequent dry-etching processes. Silicon nitride deposited from silane has deposition rates from 10 to 80 nm/min depending on the deposition process parameters. The optical refractive index is controllable from 1.8 to 2.0. The breakdown voltage is about 5 MV/cm. The deposition process produces stable film properties even at very low deposition temperatures (~100°C). Film quality at low temperatures can be improved and the mechanical film tensile stress controlled from +50 to +300 MPa through the use of HF/LF frequency mixing. The TEOS-based SiO2 processes are available at deposition temperatures of 350°C to 400°C. It is capable of producing very high quality, conformal films for MEMS structures. The optical properties are uniform, with a refractive index ranging from 1.44 to 1.46. The control of film stress by pulsed HF/LF frequency power mixing is available from zero mechanical stress (±0 MPa) to both compressive (−300 MPa) and tensile (+100 MPa). This makes it possible to deposit very thick SiO2 layers, up to 2.5 µm, to be used as sacrificial layers. The step coverage is very good, better than +75% for an isolated step. The uniformity and repeatability of the deposition processes are around 2%.

2.1.2. Atomic layer deposition of aluminium oxide and titanium dioxide The atomic layer deposition (ALD) technique is based on separate, repeated chemisorption reactions (irreversible and saturating) of at least two gaseous compounds on the growth surface [6]. An example of a classical ALD process is the trimethyl

170

J. KIIHAMÄKI ET AL.

aluminium + water process to grow aluminium oxide: Al(CH3)3 (g) + H2O (g) Æ Al2O3 + CH4 (g), also in use at VTT. ALD is a surface-controlled process, and it results in highly reproducible growth and highly uniform and conformal thin films, even in complex 3-D structures. At VTT, Al2O3 and TiO2 are used, but ALD process chemistries are known for numerous other compound materials (oxides, nitrides, sulphides, etc.) and some single-element films (metals) as well [6]. Insulating Al2O3 and semi-insulating TiO2 layers are grown at VTT as standard at 300°C and often at temperatures as low as 110°C. An overview of the implementation of VTT’s ALD layers in MEMS was recently published [7]. In addition to utilizing the electrical, optical and chemical properties of the pure oxides, the properties of films can be further optimized by using Al2O3/TiO2 (ATO) nanolaminate layers. With ATO nanolaminates, the electrical (dielectric constant, resistivity) and optical (refractive index, RI) properties can be accurately tailored. Figures 1 and 2 depict examples of adjustable properties achieved with ALD ATO nanolaminates. By using ATO nanolaminates, dielectric constants beyond 20 have been achieved while sftill maintaining the insulating characteristics of the film (Figure 1). The RI of ATO nanolaminates is a linear function of the TiO2 volume fraction (Figure 2).

DC resistivity (Ohm cm) at 0.1 MV/cm

1.0E+14 1.0E+12 1.0E+10 1.0E+08 1.0E+06 1.0E+04 1.0E+02 1.0E+00 0

1

2

3

4

Al2O3 sub-layer thickness (nm) in ATO nanolaminate

Figure 1. Resistivity of ATO nanolaminates as a function of Al2O3 sub-layer thickness for TiO2 thickness of 3 nm and 200°C deposition.

2.1.3. Reactive sputtering of amorphous metals Metallic films can be formed at close to room temperature using, for example, sputtering or electroplating techniques. We initiated our studies in amorphous metal micromachining by investigating Mo-N and Mo-Si-N alloys. Mo-N can be deposited from an elemental sputtering target by introducing a controlled flow rate of nitrogen. In Figure 3 the X-ray description spectra are shown for Mo-N

Refractive index

LOW-TEMPERATURE PROCESSES FOR MEMS DEVICE FABRICATION

2.5 2.4 2.3 2.2 2.1 2 1.9 1.8 1.7 1.6 1.5 0.00

0.20

0.40

0.60

0.80

171

1.00

TiO2 volume fraction Figure 2. Refractive index of ATO nanolaminates as a function of the estimated TiO2 volume fraction.

Figure 3. X-ray diffraction spectra for Mo–N films with compositions varying between Mo and Mo2N.

film with a varying N-content. Films having 13–17% nitrogen can be considered X-ray amoprphous. Further stabilization of film characteristics can be achieved with ternary Mo-Si-N alloys made by cosputtering of silicon and molybdenum [4]. Some mechanical key parameters of sputtered amorphous films are tabulated in the Table 1.

172

J. KIIHAMÄKI ET AL.

TABLE 1. Mechanical propoerties of Mo, Mo-N (Mo76N24) and Mo-Si-N (Mo31Si18N45O6) films. Mechanical propertities of thin films

Mo

Mo-N

Hardness (GPa)

9.5

18

12

Elastic modulus (GPa)

220

240

190

Thermal expansion coefficient ppm/K

5a

ND

3.7b

Density (g/cm3)

9.7

8.7

5.1

a

Mo-Si-N

Bulk value. b Thin film data [8].

2.2. ETCHING OF SACRIFICIAL LAYERS One of the key issues in the fabrication of surface-micromachined MEMS is the release of the mechanical structure from the substrate. This is typically done as the final part of the fabrication process with the help of a sacrificial layer that defines which area of the structure will be released. It also defines the air gap thickness between the substrate and the moving mass, which usually also defines the coupling capacitance of an electrostatic actuator. Many different materials (silicon dioxide, polysilicon, metals) can be used as sacrificial layers. The sacrificial layer should be stable during the preceding steps, and it should be easily removable by selective etching. A common choice for sacrificial layer material is thermal oxide which can be removed with a hydrofluoric acid solution. In this short review we take a look at options to substitute thermal oxide as a sacrificial layer material.

2.2.1. Etching of CVD oxides using anhydrous HF The use of anhydrous HF in the vapour phase for sacrificial oxide layer etching is a tempting choice [9]. According to our experience, HF-vapour etching is an excellent method for the stictionless release of slender structures fabricated on SOI wafers. Even aluminum can be present when etching thermally oxidized films. Oxide films deposited at lower temperatures tend to etch faster than thermally grown silicon dioxide, see Figure 4. The LPCVD oxide deposited from TEOS is an exception. The etch rate of oxides can be tuned by thermal annealing or subsequent high-temperature steps like polysilicon deposition at 580°C. Without thermal treatment the etch rates of CVD oxides are relatively high and somewhat unpredictable. The uniformity oxide etch rate is highly dependent of the surface conditions and humidity during the etching. The etch rate needs to be characterized carefully for each process sequence and for new material combinations [10].

2.2.2. Use of polymers as sacrificial layer Another dry method for releasing mechanical structures is to use isotropic plasma etching of the polymer layer, typically with oxygen plasma to remove a sacrificial photoresist layer. Photoresist is an ideal material choice for low-temperature MEMS

LOW-TEMPERATURE PROCESSES FOR MEMS DEVICE FABRICATION

173

3500

Etch rate nm/min

3000 2500 2000 1500 1000 500 0 LPCVD TEOS (pSi)

PECVD PECVD TEOS (p- TEOS (Al) Si)

LPCVD SiH4 (pSi)

PECVD SiH4 (pSi)

TOX (pSi)

Figure 4. Etch rates of 1 µm thick silicon dioxide films under a polysilicon layer (deposited at 580°C), and under sputtered metal [label: PECVD-TEOS (Al)].

as it can be processed and dry-released at temperatures below 150°C. Using photoresist is also cost effective, as it is very fast to apply by spin-coating and, as a photodefineable material, it requires fewer process steps compared to other materials. Also, the common problem in MEMS processing, the stiction of released structures, can be avoided by a dry release process in oxygen plasma at low temperature (150°C). Sometimes this method can be used for diced components. However, care should be taken in device design to prevent damage from the electromagnetic fields present in the plasma chamber. Unintentional antenna structures can cause failures or stiction in sensitive parts or devices during plasma processing. (VTT has realized first visible spectrum Fabry–Perot interferometers (FPIs) using photoresist sacrificial layers together with low-temperature ALD technology.) A new option for a sacrificial layer in MEMS is the use of polyimide [Anna]. Polyimide processing can also be done at relatively low temperatures (<400°C). The advantage of polyimide is that its transition to glass (TG) temperature can be tuned to 350–400°C to match the post-processing limit temperature. Some polyimides also have a very small thermal expansion coefficient (CTE of ~3–6 ppm), which, together with materials with similar CTE and low-temperature processing, enables better control of the internal stress in the realized MEMS structures. Polyimides are usually not photodefineable, so a hard mask is needed for patterning. A structure on a polyimide layer can be dry-released in an oxygen plasma.

174

J. KIIHAMÄKI ET AL.

2.3. LOW TEMPERATURE BONDING Silicon direct bonding with subsequent high-temperature annealing is a standard method for the fabrication of silicon-on-insulator wafers for MEMS and in sensor applications. A typical SOI wafer bonding anneal process for MEMS devices involves a temperature of around 1,100°C. This is clearly beyond the regime of lowtemperature processing. Low-temperature bonding processes have been developed to circumvent this. In low-temperature bonding, special attention should be paid to the pre-bond activation of bondable surfaces. The most common activation methods used for low-temperature silicon direct bonding are based on exposing the wafers to low-pressure plasma treatment. Typically, the gases used are Ar, O2 and N2. Different chemical activation methods have also been published, but they are not as effective as plasma activation. By utilizing plasma activation, strong bonding can be achieved even at 200°C, which enables the bonding of wafers of dissimilar temperature coefficients of expansion or wafers containing metal structures. The prerequisites of achieving good results are that bonding surfaces are clean, smooth and particle-free. Residues on bonding surfaces may lead to detrimental outgassing in annealing processes. Particles may create voids with sizes on the order of cm2 in bonding interfaces. Excessive roughness prevents attachment of wafers. Sufficient smoothness (2–3 Å) can be achieved with the CMP process [11].

3. Sample devices processed using low-temperature methods To demonstrate that the methods described above work in practice, two sample devices utilizing those are presented here. The first one is an RF switch for space and communication applications [12]. The metal structures of the switch do not tolerate high processing temperatures. Another application shown here is a new kind of electrostatically tunable surface-micromachined Fabry–Perot interferometer (FPI) structure and a process flow which was successfully used to fabricate devices for the visible wavelength range. 3.1. RF SWITCH An RF switch is, in principle, a very simple device, but the requirements for low insertion loss, low parasitic capacitances and long lifetime makes it a challenging device. The mechanical strength of the moving parts should be high, and at the same time the electrical resistance should be low. In our solution we have used an amorphous metal as the mechanical material and fabricated the device on a fused silica substrate [12]. The process is fully CMOS compatible and a low-temperature process excluding the bias lines formed from polysilicon. The bias line resistor material could be replaced with a sputtered material. The device showed low loss,

LOW-TEMPERATURE PROCESSES FOR MEMS DEVICE FABRICATION

175

good matching and demonstrated reliability. The loss of a four-element cantilevertype device was 1.2 dB in the up-state at 110 GHz, resulting in 0.3 dB per element, and the matching was better than −25 dB up to 110 GHz. A detail of a processed MEMS switch structure is shown in Figure 5.

Figure 5. A detail of switch/varactor structures in distributed MEMS transmission line device [13].

3.2. FABRY–PEROT INTERFEROMETER FOR VISIBLE LIGHT VTT has recently developed fabrication technology for visible light and nearinfrared Fabry–Perot interferometers (FPI) using completely different mechanical and optical materials for MEMS mirrors [14]. The novel low-temperature fabrication process is based on using a polymeric sacrificial layer. Fabricated devices have five-layer dielectric mirrors made of atomic layer deposited Al2O3 and TiO2 thin films. Optical measurements made for the finished devices indicate that AC voltage control and integrated series capacitance enable a tuning range of the FPI etalon in excess of 60%. According to the optical measurements, the FWHM (Full Width at Half Maximum) of the 4th order transmission is 5.4 nm, with the maximum transmission being about 67% at λ = 500 nm. The maximum transmission was limited by the widening of the transmission peaks due to bending of the mirrors. A Fabry–Perot interferometer is an optical resonator consisting of two parallel mirrors. The passband wavelength of the FPI can be controlled by adjusting the distance between the mirrors, i.e. the width of the air gap. The first commercially capitalized micromechanical FPIs were made with traditional polycrystalline silicon-based surface micromachining techniques [15].

176

J. KIIHAMÄKI ET AL.

At visible and ultraviolet wavelengths the optical layers of the FPI need to be thin. Thin membranes often contain pinholes. Such thin membranes can easily get damaged during wet etching. Therefore, it is difficult to produce electrically tunable Fabry–Perot filters for the visible and ultraviolet ranges using the previously published polysilicon-based micromachining technology. The structure of the new FPI is schematically shown in Figure 6. Both mirrors are five-layer dielectric stacks made of ALD Al2O3 and TiO2 thin films, optically λ/4 thick each. The central wavelength of the processed devices is about λ = 500 nm. Electrically conductive tuning electrodes made of 20 nm thick sputterdeposited aluminum thin films are covered with semi-insulating ALD TiO2. By using AC control it is possible to extend the passband tuning range of practical devices. According to the measurements made it was possible to tune the gap between mirrors from 1,300 nm to less than 500 nm. Typical transmission properties of the processed devices are shown in Figure 4. As can be seen, the FWHM of the 4th order transmission is about 5.4 nm, with the maximum transmission being about 73% at 500 nm. The novel tunable Fabry– Perot filter for visible and UV wavelength ranges offers a variety of new low-cost application opportunities in many important fields, such as the monitoring of different industrial processes, environmental measurements and food/water quality analysis and monitoring.

TiO 2

Fused Silica

Ccontrol

Cfixed

Al 2O3 Al Polymer

Figure 6. Cross-section of a Fabry–Perot Interferometer.

4. Conclusions We have studied low-temperature materials and MEMS fabrication technologies. We have been able to develop processing techniques and to tune the material properties to meet the preliminary specifications. However, to fully exploit the processes there is much progress to be made in further characterization of the materials, processes and process integration. Some of the materials and technologies are quite mature already, but when trying to integrate those into complex device processes, many unpredictable problems, interactions and incompatibilities between materials arise. We have made some demonstrators successfully and others are under development.

LOW-TEMPERATURE PROCESSES FOR MEMS DEVICE FABRICATION

0,8

Vpp=0V

2nd order 4th order

Vpp=17V

177

3rd order

Vpp=21V

0,7

Vpp=26V Vpp=27V

0,6

Vpp=28.5V

Transmission

Vpp=29V

0,5 0,4 0,3 0,2 0,1 0 450

475

500

525

550

Wavelength (nm) Figure 7. Transmission of FPI at varying voltage and order.

Acknowledgements This paper consists of results from several research projects with main funding from Tekes and VTT. We are grateful to our industrial partners (VTI Technologies, Okmetic, Vaisala, Picosun and many others) for participation in our projects and bringing interesting challenges to us.

References 1. 2. 3. 4. 5.

C. Y. Chang, S. M. Sze, “ULSI Technology”, (McGraw-Hill Higher Education, New York, 1996). S. Franssila, “Introduction to Microfabrication”, (John Wiley & Sons, England, 2004). T. Suni, K. Henttinen, A. Lipsanen, J. Dekker, H. Luoto, M. Kulawski, “Wafer Scale Packaging of MEMS by Using Plasma-Activated Wafer Bonding”, J. Electrochem. Soc., 153 (1), G78–G82 (2006). H. Kattelus, M. Ylönen, M. Blomberg, “Amorphous Mo–N and Mo–Si–N films in microelectromechanical systems” Fatigue Fract. Eng. Mater. Struct. 28 (8) 743–749M (2005). A. Bagolini, L. Pakula, T.L.M. Scholtes, H.T.M. Pham1, P.J. French, P.M. Sarro, “Polyimide sacrificial layer and novel materials for post-processing surface micromachining”, J. Micromech. Microeng. 12, 385–389, (2002).

178 6. 7. 8.

9. 10. 11. 12. 13. 14. 15.

J. KIIHAMÄKI ET AL. R. L. Puurunen, “Surface chemistry of atomic layer deposition: a case study for the trimethylaluminum/water process”, Journal of Applied Physics, 97, 121301 (2005). R. L. Puurunen, J. Saarilahti, H. Kattelus, “Implementing ALD layers in MEMS processing”, Electrochemical Society Transactions, 11 (7), 3–14 (2007). H Kattelus, M. Ylönen, M. Blomberg, “Characterization of amorphous electrically conductive Mo-Si-N films for micromechanical applications”, Proceedings of the International Conference on Advanced Technology in Experimental Mechanics 2003, Nagoya, JP, 10–12 Sept., 2003. The Japan Society of Mechanical Engineers (JSME-MMD). ATEM 03. W. I. Jang, C. A. Choi, M. L. Lee, C. H. Jun, Y. T. Kim, “Fabrication of MEMS devices by using anhydrous HF gas-phase etching with alcoholic vapour”, J. Micromech. Microeng. 12, 297–306 (2002). H. Ritala, J. Kiihamäki, M. Heikkilä, “Studies on aluminium corrosion during and after HF vapour treatment”, manuscript submitted to Microelectronic Engineering. T. Suni, Direct wafer bonding for MEMS and microelectronics, (VTT Publications 609, Espoo, 2006). M. Ylönen, T. Vähä-Heikkilä, H. Kattelus, “Amorphous metal alloy based MEMS for RF applications”, Sensors and Actuators A 132 283–288 (2006). T. Vähä-Heikkilä, M. Ylönen, “G-band distributed microelectromechanical components based on CMOS compatible fabrication”, IEEE Transactions on Microwave Theory and Techniques, 56 (3), 720–728 (2008). M. Blomberg, H. Kattelus, A. Miranto “Electrically Tunable Surface Micromachined Fabry–Perot interferometer for Visible Light”, to be published in Eurosensors 2009. M. Blomberg, A. Torkkeli, A. Lehto, “Electrically Tuneable Micromachined Fabry–Perot Interferometer in Gas Analysis”, Physica Scripta, T69 119–121 (1997).

HIGH-TEMPERATURE STABLE AU–SN AND CU–SN INTERCONNECTS FOR 3D STACKED APPLICATIONS Advanced Processes and Materials NILS HOIVIK, HE LIU, KAIYING WANG, GUTTORM SALOMONSEN AND KNUT AASMUNDTVEIT Institute of Microsystems Technology, Vestfold University College, Norway, E-mail: [email protected]

Abstract The desire to directly integrate MEMS with ASICs in a 3D stack is the main motivation behind the development of a bonding technology suitable for both interconnects and seal rings. SLID (Solid–Liquid Inter-Diffusion) bonding processes based upon Au–Sn and Cu–Sn (high melting point metal/low melting point metal) are therefore investigated. SLID bonding allows for repeated high temperature processing cycles as in the case for chip stacking, or for interconnections and seal rings bonded at different process steps. This work describes results obtained for fluxless bonding of SLID Au–Sn and Cu–Sn interconnects and seal rings, where a thin layer of intermetallic compound (IMC) on the Cu or Sn surface protects the metal surfaces from oxidizing at elevated temperatures. To evaluate the bond strength, test dies bonded at various temperatures were subjected to SEM/EDX bond line analysis, and shear testing at both room and elevated temperatures. Au–Sn samples bonded at 280°C re-melt at elevated temperatures; whereas samples bonded at 350°C remain intact past the initial bonding temperature. For the Cu–Sn samples, the measured shear strength is comparable to conventionally bonded interconnects. In order to remain within the uniformity requirements for SLID bonding, the pattern density of electroplated interconnects and seal rings require an optimized layout which can be calculated based upon the effective area.

Keywords: MEMS, 3D integration, wafer level packaging, SLID bonding, wafer bonding.

1. Introduction The recent advances within 3D IC integration and packaging to create a system in a package (SIP) have become a main driving factor for miniaturization and integration of future MEMS-based sensor systems. The desire to directly integrate MEMS with ASICs in a 3D stack is the main motivation behind the development of a bonding technology which is suitable for both interconnects and seal rings. For a MEMS-based SIP, the performance, or sensing functionalities, may be E. Gusev et al. (eds.), Advanced Materials and Technologies for Micro/Nano-Devices, Sensors and Actuators, DOI 10.1007/978-90-481-3807-4_14, © Springer Science + Business Media B.V. 2010

179

180

N. HOIVIK ET AL.

improved without increasing the overall size. Since, in a 3D package the sensor die, ASIC, and passives are stacked in the third dimension which reduces the size of the final product and shorten the signal path between the individual parts 1, 2]. The stacked approach also enables high I/O density, if required, which reduces cost and allows for optimization of the MEMS sensor performance. Furthermore, to combine the stacking process with the cavity sealing process is becoming realistic, i.e., one can make the electrical connection, mechanical attachment, and cavity sealing process within a single chip stacking step, as illustrated in Figure 1. Traditionally, the final processing step in MEMS fabrication is hermetic sealing of the fragile devices, followed by dicing. The ASIC and MEMS devices are then mounted in a 2D package and interconnected using wire bonds, as shown in Figure 1a. 3D integration and packaging enables an appealing alternative since MEMS devices may be directly sealed during bonding to the ASIC, in one process step, as shown in Figure 1b, where they combined create a complete package. Correct packaging and integration techniques for microsystem devices are crucial to ensure reliable MEMS devices. It is worth mentioning that packaging of microsystems, in particular the hermeticity requirements, significantly increase the total cost of a final product. Therefore, with 3D stacking and direct sealing, time and cost can be saved, and performance of the product can be improved.

Wire bonds

(a) (b) Figure 1. Illustration of (a) traditional microsystem package with discrete devices mounted on a lead frame and (b) sealed and interconnected microsystem where the ASIC and MEMS combined creates a complete package.

Hermetic sealing combined with interconnects which are stable at elevated temperatures is important for several applications, such as automotive applications, engine or combustion control, oil and gas extraction to mention a few. High temperatures may also be experienced during subsequent processing of the bonded parts, for example getter activation for high-vacuum cavities. These getters typically require an activation temperature of 350°C, or higher, which poses a challenge to the bond integrity. Other examples include dies which are to be stacked and bonded to a substrate in subsequent processing steps. Thus, the bonds need to be stable at higher temperatures than the initial bonding temperature, so that the initial bonds do not melt when the bonding process is repeated.

HIGH-TEMPERATURE STABLE AU–SN AND CU–SN INTERCONNECTS

181

2. Cu–Sn and Au–Sn SLID bonding In this project, bonding techniques using Solid Liquid Inter-Diffusion (SLID) with Cu or Au together with Sn have been studied [1–8]. The benefit of these metallurgies is that a bond will initially form at the melting point of Sn (232°C), whereas the final intermetallic compound (IMC) AuxSny and CuxSny will have a higher melting point. This allows for subsequent bonding cycles in the case of chip stacking, or bonding of interconnections and seal rings at different fabrication steps. The non-eutectic intermetallic compound (Cu3Sn) has a melting point at 676°C, whereas the eutectic Au–Sn (80 wt% Au) alloy melts at 278°C. Since the eutectic Au–Sn composition has a relatively low melting/re-melting temperature we will attempt to target Au-rich intermetallic compounds, which have higher melting points than the eutectic composition. Thus once the joint is made, it can stand fairly high temperature during the succeeding process, such as molding, secondlevel packaging, etc. Compared to thermocompression bonding, such as Cu-to-Cu which requires temperatures as high as 400°C, the bonding pressure and temperature used in SLID bonding is quite favorable in conjunction with sensitive MEMS devices. SLID bonding using Cu–Sn has been demonstrated without pressure applied to the two surfaces [3], which does however require intimate contact between all bonding partners. Furthermore, both the intermetallic Cu3Sn and AuxSnx IMCs have been observed to be quite inert when exposed to humidity and moisture, so it is a good candidate material for both interconnects and hermetic seal rings [3]. Table 1 provides a comparison of common interconnect technologies demonstrated for 3D stacked applications. TABLE 1. Comparison of metallic interconnect technologies demonstrated at wafer-level for 3D stacked applications. Interconnect technology Eutectic soldera Thermo compressionb SLID a

Process temperature Low Medium– high Medium

Process pressure Low

Fluxless No

Topography requirements NA

3D stacking No

High

Yes

Nm

Yes

Low Yes μm Commonly used Sn-based Pb-free solders. b Referring to Cu–Cu and Au–Au.

Yes

The Au–Sn and Cu–Sn phase diagrams are shown in Figure 2 and 3, respectively. The Au–Sn phase diagram illustrates the complexity and the large number of intermetallic compounds (IMC) for this metallurgy. All of the phases have a higher melting point than pure Sn, and in particular the δ and the ζ/ζ′ phases have a melting point above the eutectic composition at 419°C and 521°C, respectively. For applications where the bond is to resists higher temperature, either one of the IMCs may be appropriate. However, if there remains a surplus of Au in a bond after formation of an IMC, a bond made of the δ phase may be susceptible to be converted to a eutectic, or near-eutectic, structure over time due

182

N. HOIVIK ET AL.

to Au–Sn interdiffusion. This would lead to a bond-line with a lower melting point. However, a bond with the ζ/ζ′ phases present is not expected to convert into lower-melting phases over time. It is noteworthy to point out that the eutectic composition does consist of both the δ and the ζ/ζ′ phases present at the same time at a ratio corresponding to 80 wt% Au and 20 wt% Sn.

Au5Sn/ AuSn2

Si

Si

AuSn Au Si

Figure 2. Au–Sn phase diagram. The insert illustrates a sample bond line with various phases present between pure Au (phase diagram adapted from [4]).

Compared to Au–Sn IMC bond lines, which may be rather complex and form various phases, Cu–Sn SLID interconnects initially form two distinct phases: ηCu6Sn5 and ε-Cu3Sn.With reference to the Cu–Sn phase diagram shown in Figure 3, at a bonding temperature above the melting point of Sn (232°C) interdiffusion processes form these two phases. At first, the molten Sn starts to dissolve Cu and the first IMC η-phase which is meta-stable, is formed. This particular phase actually forms even at room temperature; however no other phases are formed unless the temperature is elevated [10]. Upon complete transformation of all available Sn to the η-phase, the second IMC ε-phase (Cu3Sn) is formed when the η-phase reacts with Cu. The insert in Figure 3 shows a SEM cross-section images of a bonded sample where both the ε- and η-phases are present in the bond line. The IMC formation process will terminate upon complete transformation of all IMCs to the stable Cu3Sn ε-phase, which will suppress any further phase growth, even at elevated temperatures up to 676°C. The benefit of SLID bonding for interconnects, and especially for 3D applications is quite apparent. With interconnects or bond lines stable for a large temperature variation, subsequent bonding steps, processing at elevated temperatures, or thermal annealing to for instance activate getter materials, will not compromise the initial bonds and integrity of the package.

HIGH-TEMPERATURE STABLE AU–SN AND CU–SN INTERCONNECTS

183

Si Cu

Cu 3Sn

Cu6Sn5 Cu 3Sn

676 oC Cu

Si 415 oC

ε

η

Cu

Sn

Figure 3. Cu–Sn phase diagram [9]. The insert illustrates a bond-line with both the ε and η-phase present. The IMC formation process will eventually terminate upon complete transformation to the stable ε-phase in the bond-line.

This work presents an alternate method to achieve fluxless bonding for SLID Au/Sn and Cu/Sn bonding processes by protecting the metal surfaces from oxidizing at elevated temperatures using a thin layer of IMC on the Cu or Sn surface. To evaluate the bond strength, test dies bonded to Au and Cu patterned substrates were subjected to SEM/EDX bond line analysis. Shear testing was performed at room temperature for Cu–Sn bonded dies and both room- and elevated temperatures for the Au–Sn samples.

3. Fabrication of test vehicles for fluxless bonding For any metallic bonding to be successful, a key requirement is to remove, or prevent, any oxides on the surface of the material. Various fluxes have been used as critical process steps to ensure an oxide-free metallic surface, and any bonding process which can be done without this added process step is called fluxless or flux-free. In particular, Cu is prone to oxidation, which is accelerated at elevated temperatures. Since it is not self-passivating process, the oxide will continue to grow in thickness unless inhibited from forming. Sn oxides are somewhat easier to manage in SLID bonding as they are thinner than Cu oxides, and bonding is possible without active removal of this layer as some of the Sn oxides will be dissolved into the alloy. However, the Cu–Sn bonding process is performed after either an acid etch of the Cu oxide (with 5% HCl solution), or reduction using formic acid vapor in a nitrogen atmosphere. Both methods require a rinse step in DI water afterwards to remove any residual compounds. Bonding must also be performed in an inert atmosphere, or in vacuum, to avoid any re-oxidation of the metal surfaces at elevated temperatures.

184

N. HOIVIK ET AL.

This work presents an approach to achieve fluxless bonding for SLID Au–Sn and Cu–Sn interconnects and seal-rings without wet pre-cleaning of the metal surfaces or bonding in vacuum. This is particularly important for wafers with released, and free-standing, MEMS devices where a wet pre-cleaning step is not compatible. Thus, in order to protect the metal surfaces from oxidizing at elevated temperatures a nm-thick sandwich-multilayer (100–200 nm) are electroplated on the interconnects and seal rings followed by a pre-bonding anneal process step to form a thin layer of IMC on the Cu or Sn surface [11, 12]. Earlier approaches have been successfully demonstrated for Sn-based soldering using Ag-Sn [13] and In-Ag [14]; however the Sn-rich solders are less stable at elevated temperatures. Another approach using Cu to cap the Sn layer to create Cu6Sn5 and Au to protect the Cu layer was demonstrated in [10]. However the final bond line will then consist of both Au–Sn IMCs and Cu3Sn, and hydrogen atmosphere was required to shield the samples from any oxygen penetration during bonding. 3.1. Au–Sn Fluxless bonding of Au–Sn electroplated layers (using a thin Au layer on top of Sn), with a resulting bondline of the IMC AuSn2 was previously reported in [11]. The present work investigates the possibility to use Au-rich Au–Sn compounds for SLID-type bonding, with the ultimate goal of obtaining higher temperature stability. Oxidized (300 nm oxide) silicon wafers with sputtered TiW/Au adhesion/seed layers were purchased from Reinhardt Microtech AG, Switzerland. The thickness of the TiW adhesion layer is 60 nm, and the Au seed layer is 100 nm. These metalized wafers were patterned with photoresist AZ4562 for electroplating metallic layers in the shape of rectangular bonding frames. Gold electroplating was performed in gold cyanide solution at a temperature range of 60–65°C, with a current density 5.4 mA/cm2. Sn electroplating (on top of the gold layer) was deposited in a Sn sulphate-based solution at room temperature, with a current density 10 mA/cm2. Figure 4 illustrates the layered structures which were fabricated with a single Au layer: 4.0 µm and multilayer Au/Sn/Au: 4.0/2.0/0.1 µm, respectively. None of the samples have exposed Sn, which will minimize the chance for any oxidation, and makes fluxless bonding possible. The layer structure of the samples gives an overall composition of 8 wt% Sn (13 at% Sn) which gives a surplus of Au relative to the eutectic point, and also a small surplus of Au relative to the ζ’ phase (Au5Sn). Pairs of samples, consisting of one Au-layered chip and one Au/Sn/Au-layered chip were bonded. The bonding was carried out in two steps. First, a flip chip bonder (MAT-6400), was used for pick and place and pre-bond at room temperature in air (applying a force of 30 N for 30 s), then the positioned sample pair was SLID bonded, using a hotplate at 350°C in a vacuum chamber at 5 mBar. Other samples were bonded directly on the flip-chip bonder in formic acid saturated nitrogen atmosphere at 280°C. Samples were bonded using different bonding times (2, 10, 20 and 30 min).

HIGH-TEMPERATURE STABLE AU–SN AND CU–SN INTERCONNECTS

185

Silicon substrate Silicon substrate

Au Sn TiW/Au

Au

AuxSny

Silicon substrate

Silicon substrate

(a) (b) Figure 4. Schematic illustration of the (a) layered electroplated Au (4.0 µm) and Au (4.0 µm)/Sn (2.0 µm)/Au (0.1 µm) structures for fluxless SLID bonding. After bonding (b) the joint comprise of various IMC and Au.

3.2. Cu–Sn Similarly to the Au–Sn samples, the Cu–Sn test vehicles were fabricated by first electroplating Cu on oxidized Si wafers with sputtered TiW/Au and Ti/Au adhesion and seedlayers. The thickness of the adhesion layer was 100 nm and the Au seedlayer 500 nm. Photoresist AZ4562 was used to define the interconnect pattern. Ar+O2 Plasma treatment was carried out before the plating process to ensure a clean seed layer surface. The Cu and Sn features were electroplated using a commercial Cu- and Sn sulphate-based solution at room temperature, with a current density of 10 mA/cm2. Pulse-reverse current was applied to ensure good uniformity across the wafer. Figure 5 illustrates the fabricated interconnects with Cu (5.0 µm)/Sn (0.1 µm) and Cu (5.0 µm)/Sn (3.0 µm) structures for fluxless Cu– Sn SLID bonding. Silicon substrate

Silicon substrate Silicon substrate

Cu Sn

TiW/Au

Cu3Sn Cu

Silicon substrate (a)

Silicon substrate (b)

Silicon substrate (c)

Figure 5. Schematic illustration of (a) layered Cu/Sn structures with Cu (5.0 µm)/Sn (0.1 µm) and Cu (5.0 µm)/Sn (3.0 µm) structures for fluxless SLID bonding. (b) The thin Sn layer is then converted to ε-phase Cu3Sn by annealing, and (c) bonded to create a single phase IMC/Cu interconnects.

186

N. HOIVIK ET AL.

The technique of using an intermediate layer to protect the Cu layer from oxidizing is not new, and has been demonstrated earlier using Au, as well as allowing a thin Sn layer of Cu6Sn5 form on the Cu surface [10]. However, it has been determined that the corrosion behavior of Cu6Sn5 is almost as corrosive as pure Cu, whereas the stable Cu3Sn phase is completely inert for the same test conditions [3]. Therefore, a very important annealing step is introduced (as shown in Figure 5b) to ensure that the IMC is completely converted to ε-phase Cu3Sn. This is done in vacuum (2 mBar) at 250°C for 5 min. The ability of Cu3Sn to protect the Cu from oxidation was further verified by electroplating a 0.1–0.2 μm thin Sn layer on a 4.0 μm thick Cu layer which was annealed in vacuum to convert the top Sn layer to Cu3Sn. The samples were then further annealed in ambient air at various temperatures and times, together with electroplated Cu films at the same conditions for verification. As expected, a large color change was observed on the Cu films due to oxidation, whereas the Cu3Sn films retained the same color appearance. Both surfaces were then examined using EDX which identified a stable oxygen level in the Cu3Sn film compared to the Cu samples. Fluxless bonding of the Cu/Cu3Sn to Cu/Sn dies was carried out on a MAT 6,400 flip-chip machine in ambient atmosphere at 260°C for 10 min with a pressure of 7 MPa. Same conditions were used for test dies using formic acid saturated nitrogen atmosphere. After bonding, the samples were removed from the hot bonding stage and allowed to naturally cool down to room temperature.

4. Results and discussion To evaluate the bond strength, test dies bonded to Au and Cu patterned substrates carried out at different conditions, such as temperature, pressure, flux, etc. were subjected to SEM/EDX bond line analysis and shear testing at both room and elevated temperatures. The bond strength at room temperature was characterized using standard die shear testing methods, using a Delvotec 5000. The test dies were diced into smaller pieces prior to die shear testing to permit the maximum force (50 N) to be sufficient to test the bond destructively. To determine the stability of bonded samples at elevated temperatures, two independent experiments were set up using a hot plate and an oven [12]. For the hot plate, the dies were positioned in a recess shallower than the die thickness and a shear force of around 2 N was applied to the top die. For the oven, dies were mounted in a fixture giving a constant shear force in the order of 5 N. These experiments were both designed to reveal any melting of the bonding layer since the top die would be pushed off if the bonding layer melts. 4.1. BONDING RESULTS AND SHEAR STRENGTH After bonding, samples were cut and polished for optical inspection and SEM/ EDX verification of the various IMC phases present in the bond lines. Figure 6

HIGH-TEMPERATURE STABLE AU–SN AND CU–SN INTERCONNECTS

187

shows two optical micrographs of the cross-sections of both metallurgies which were bonded. In both images the bond lines is seen to be uniform and appears as a grayish colored phase. For the Cu–Sn sample, the bond line is thinner than expected since the pressure was continuously applied during the bond cycle, whereas the Au–Sn sample was bonded without any pressure applied. The bond pressure applied affects the final bond line thickness since it squeezes out the liquid Sn from between the two bond pads. Silicon substrate

Au

Au5Sn

Silicon substrate Cu

SiO2/TiW Cu3Sn

Silicon substrate

SiO2

(a)

SiO2/Ti

Silicon substrate

(b)

Figure 6. Optical micrographs of cross-sectioned bonded samples, (a) Au–Sn sample bonded at 350°C for 2 min [12] and (b) Cu–Sn sample bonded at 260°C for 10 min. The IMC compositions were verified using EDX inspection.

For the multilayered Au–Sn test dies bonded at 350°C, the bond strength at room temperature for the sample with 10 min bonding time was measured to exceed 60 MPa, as compared to a shear strength of 11 MPa for samples bonded at 280°C. This is a very high shear strength compared to previously reported values in the literature; however it is believed that the single-phase bond line obtained by bonding at 350°C contributes to the increased strength. Further bonding experiments and analysis are in progress to evaluate this further. High-temperature integrity of the Au–Sn samples was evaluated by shear testing on a heated stagewith shear forces up to 2 N. Samples bonded at 280°C did not survive testing at elevated temperatures, indicating that the Au–Sn IMC layer melted. However, samples bonded at 350°C showed no delamination or movement of the uppermost chip within the temperature testing range. This is valid for all samples, independent of the bonding time, which indicates that bonding at higher temperatures shifts the IMC composition towards the Au-rich region of the phase diagram, as compared to samples bonded at lower temperatures which comprise of various, and more Sn-rich, IMC phases. The strength of the multilayered Cu–Sn test dies were only tested at room temperature since both Cu–Sn IMC phases have higher melting points than 350°C. Thus, conventional Cu–Sn SLID dies bonded using formic acid vapor flux was fabricated using the same conditions to offer a direct comparison. A total of eight pairs of test dies were bonded with a measured shear strength exceeding 9 MPa, which is the upper limit for the test system for the given interconnect area on the test dies. For conventional Cu–Sn/Cu test dies bonded with flux the measured shear strength range from 9 to 16 MPa. Table 2 presents a comparison of bond integrity of both metallurgies and bonding temperatures.

188

N. HOIVIK ET AL.

TABLE 2 Comparison of bond integrity of Au–Sn and Cu–Sn test dies bonded at various temperatures with and without flux. Au–Sn Flux

Cu–Sn

Yes

No

Yes

No

Bonding temperature

280°C

350°C

260°C

260°C

Shear strength at 20°C

11 MPa

> 60 MPa

9–16 MPa

>9 MPa

Solid bond at 280°C

No

Yes

–

–

Solid bond at 350°C

No

Yes

–

–

4.2. INTERCONNECT AND BOND FRAME UNIFORMITY REQUIREMENTS One particular challenge to SLID bonding, and especially at wafer-level, is the lack of a collapsible or reflow process, thus the height uniformity of the electroplated features will significantly affect the bond quality and yield. As mentioned earlier, for many 3D MEMS/ASIC heterogeneous integration applications, a sealing ring is usually required in conjunction with interconnects, which makes the uniformity of the deposited metal thickness even more critical [2]. Electroplating process control together with pattern layout optimization is therefore crucial to increase the overall yield for wafer-level integration and packaging. It is well known that smaller features (such as interconnects) often end up thicker than larger features (such as seal rings) when electroplated. Since there is a linear relationship between current density and electroplated thickness, the height of electroplated features can be estimated by simulating the variation of current densities in a mask [15]. Both seal rings and interconnects must be arranged with optimized areas, and pitch (p), as to minimize any height differences. Figure 7 shows the simulated height differences between interconnects and seal rings for an array of bumps with diameter ranging from 75 to 250 μm together with a seal Interconnect height/Ring height

3.5

1st row; p = 1.2 x W 4th row; p =1.2 x W 1st row; Optimized pitch 4th row; Optimized pitch

3

4th row

2.5

p

2

1st row

1.5

p

1

W

0.5 0.2

0.4

0.6

0.8

1

1.2

Seal ring width = W

Interconnect diameter/Ring width

Figure 7. Simulated height variation for electroplated interconnects and seal ring as a function of bump diameter and pitch. The dashed lines represent permissible height variation for SLID bonding using 5 μm Cu and 3 μm thick Sn bonding features.

HIGH-TEMPERATURE STABLE AU–SN AND CU–SN INTERCONNECTS

189

ring 250 μm wide. With an optimized pitch (equal pattern density), interconnects down to 150 μm in diameter can be used in conjunction with a 250 μm wide ring while still remaining within the permissible height variation for SLID bonding.

5. Summary Technological advances within 3D IC integration and packaging continue to push miniaturization and integration of future MEMS-based sensor systems. Integrating MEMS with ASICs in a 3D stack requires a bonding technology suitable for both interconnects and seal rings. SLID bonding of Au–Sn and Cu–Sn which incorporates a 100–200 nm thick protective IMC layer to prevent oxidization of the surfaces at elevated temperatures is investigated. This is particularly important for wafers with released, and free-standing, MEMS devices where a wet pre-cleaning step is not compatible. It is important to keep the protective IMC layer intentionally thin as not to interfere with the inter-diffusion process during bonding. For bonded Cu–Sn samples, with a thin Cu3Sn layer to protect the Cu surface, the measured shear strength is comparable to conventionally SLID bonded interconnects. For Au–Sn samples bonded at 350°C, no bond delamination was observed up to 350°C which is 70°C higher than the eutectic point. Varying the bonding time (in the range of 2–30 min) does not have significant effect on the result. The bonding structure is expected to be stable over time, and not to change composition due to interdiffusion of Au and Sn. The investigated bonding method therefore has potential for high-temperature applications and as a bonding method to tolerate hightemperature processes, such as chip stacking and getter activation, after bonding. Acknowledgements This project is funded by RCN BIA project No. 174320, “3DHMNS – 3D Heterogeneous Micro Nano Systems”. The authors wish to thank Zekija Ramic, Ellen M. Husa and Tormod Vinsand at VUC for laboratory assistance.

References 1. 2. 3. 4.

P. Ramm and A. Sauer, “3D integration technologies for ultrasmall wireless sensor systems The e-Cubes project”, Future Fab International, Nr. 23, pp. 80–82, (2007). N. Marenco, S. Warnat and W. Reinert, “Interconnect Challenges in Highly Integrated MEMS/ASIC Subsystems”, Proceedings of DTIP 2007, Stresa Italy, 25–27 April, 2007. H. Huebner, S. Penka, B. Barchmann, M. Eigner, W. Gruber, M. Nobis, S. Janka, G. Kristen, and M. Schneegans, “Microcontacts with sub-30 [mu]m pitch for 3D chip-onchip integration,” Microelectronic Engineering, vol. 83, pp. 2155–2162, 2006. L. Yin a, S. J. Meschter b, T. J. Singler, “Wetting in the Au–Sn System”, Acta Materialia Vol. 52, pp. 2873–2888, 2004.

190 5. 6. 7. 8. 9. 10. 11. 12. 13. 14. 15.

N. HOIVIK ET AL. R.S. Forman and G. Minogue, “The Basics of Wafer-Level AuSn Soldering,” Chip Scale Review, Vol. 8, pp. 55–59, 2004. C.C. Lee and C.Y. Wang, “A low temperature bonding process using deposited gold tin composites”, Thin Solid Films, 208, pp. 202–209, 1992. D.Q. Yu, H. Oppermann, J. Kleff and M. Hutter, “Interfacial metallurgical reaction between small flip-chip Sn/Au bumps and thin film Au/TiW metallizatgion under multiple reflow”, Scripta Materials, 58, pp. 606–609, 2008. L. Dietrich, G. Engelmann, O. Ehrmann and H. Reichl, “Gold and gold-tin wafer bumping by electrricchemical deposition for flip chip and TAB”, EuPac’98, Nürnberg, pp. 28–31, 1998. FactSage Thermochemical Software and Databases - http://www.crct.polymtl.ca/fact/. C.C. Lee and Y.C. Chen, “High temperature tin-copper joints produced at low process temperature for stress reduction”, Thin Solid Films, Vol. 286, pp. 213–218, 1996. K. Wang, K. Aasmundtveit, and H. Jakobsen, “Surface Evolution and Bonding Properties of Electroplated Au/Sn/Au,” Proceedings of The 2nd Electronics System-Integration Technology Conference (ESTC), 2008. K. Aasmundtveit, K. Wang, N. Hoivik, J. G. Graff and A. Elfving, “Au–Sn SLID Bonding: Fluxless Bonding with High Temperature Stability, to Above 350oC”, Proceedings of IEEEEMPC 2009, Rimini, Italy – June 14–17, 2009. J. Kim and C. Lee, “Fluxless Sn-Ag bonding in vacuum using electroplated layers”, Matererial Science and Engineering, Vol. A 448, pp. 345–350, 2007. J. Kim, P. Wang and C. Lee, “Fluxless Bonding of Si Chips to Ag-Copper using Electroplated Indium and Silver Structures”, Proc. IEEE Advanced Packaging and Materials Symposium, pp. 194–199, 2007. H. Liu, E. M. Husa, Z. Ramic, A. Munding, K. Aasmundtveit and N. Hoivik, “Uniformity requirements for electroplated Cu–Sn interconnects used in heterogeneous 3-D MEMS/ ASIC stacks”, in Proceedings of IMAPS Nordic, IMAPS, 2008.

3D INTEGRATION OF MEMS AND IC: DESIGN, TECHNOLOGY AND SIMULATIONS

Advanced Processes and Materials MAAIKE M.V. TAKLO, KARI SCHJØLBERG-HENRIKSEN, NICOLAS LIETAER SINTEF ICT, Gaustadalléen 23C, 0373 Oslo, Norway, E-mail: [email protected]

JOSEF PRAINSACK Infineon Technologies, Babenbergerstr. 10, A-8020 Graz, Austria

ANDERS ELFVING SensoNor, Knudsrødveien 7, N-3192 Horten, Norway

JOSEF WEBER, MATTHIAS KLEIN Fraunhofer IZM, Hansastr. 27d, 80686 Munich/Gustav-Meyer-Allee 25, 13355 Berlin, Germany

PETER SCHNEIDER, SVEN REITZ Fraunhofer IIS/EAS, Zeunerstr. 38, 01069 Dresden, Germany

Abstract A 3D integrated silicon stack consisting of two MEMS devices and two IC devices is presented. The MEMS devices are a pressure sensor and a bulk acoustic resonator (BAR). The stack was constructed for a tire pressure monitoring system (TPMS) which was one out of three demonstrators for an EU funded project called e-CUBES. Thermal simulations were performed to check the level of thermo-mechanical stresses induced on the pressure sensor membrane during extreme environmental conditions. Additional simulations were made to calculate the exact temperature on the BAR device during operation as this was important for the operational frequency. This paper presents and discusses the technology choices made for the stacking of the pressure sensor and the BAR. Results are given from simulations, initial short-loop experiments and for the final stacking.

Keywords: MEMS, 3D integration, wafer level packaging, design, wafer bonding, gold stud bump bonding, TSV, simulation.

E. Gusev et al. (eds.), Advanced Materials and Technologies for Micro/Nano-Devices, Sensors and Actuators, DOI 10.1007/978-90-481-3807-4_15, © Springer Science + Business Media B.V. 2010

191

192

M.M.V. TAKLO ET AL.

1. Introduction Wafer level packaging and 3D integration emerge as an enabling solution for miniaturization of future sensor systems. Densely packaged MEMS devices tightly integrated with the required IC chips and passives can add to the actuating or sensing functionalities of a system without increasing its footprint. However, most MEMS devices available on the market today are not readily prepared for such integration. One of the targets within the EU funded project e-CUBES [1] was to include MEMS devices in miniaturized, 3D integrated sensor nodes. This paper describes the technology for 3D integration of a tire pressure monitoring system (TPMS) with two MEMS devices included: a pressure sensor and a bulk acoustic resonator (BAR). The two main technologies needed for 3D integration are through-silicon/ substrate vias (TSVs) and electrical and mechanical interconnection. Within the integrated circuit (IC) community, substantial research has been carried out in these two areas [2–5]. However, the solutions developed for conventional ICs are not necessarily transferable to MEMS. High TSVs densities with pitches <50 μm for conventional ICs require thinning of the silicon wafer down to at least 30–100 µm thickness for acceptable TSV aspect ratios. Thinning may not be a viable option for MEMS like pressure sensors and resonators, since the full wafer thickness may be needed to ensure the mechanical stability and performance of the device. On the other hand, the TSV density and I/O count is relatively low for most MEMS devices, which gives more flexibility in TSV and interconnect solutions for MEMS than for IC 3D integration. Finally, MEMS sensors need to interact with the environment and such access must be ensured also when the sensors are 3D integrated. Some TSVs for wafer thicknesses of 200–300 µm are presented in the literature. PlanOptik [6] produces glass wafers with conductive silicon vias. Silex [7] manufactures silicon wafers with silicon vias, isolated by a dielectric. SINTEF has presented hollow vias in 300 µm thick silicon wafers where the conductive layer is doped polysilicon isolated by thermal SiO2 [8]. Filled vias with doped polysilicon conductor and thermal SiO2 as isolation have been presented by groups at Stanford [9], Georgia Institute of Technology [10], and VTT [11]. TSVs through thick wafers with Cu conductors are also possible, and have been published for example by DIMES [12]. Reliable interconnection technologies used in 3D integration include Cu–Cu bonding [2], CuSn–Cu bonding [3], microbumps [4], and Ni-based conductors [5]. Conventional Au stud bump bonding is also an option. Previous results on the TPMS demonstrator have been presented earlier [13– 18]. This paper will focus on the TSV and interconnection technologies selected for 3D integration of the pressure sensor and BAR device in the developed TPMS demonstrator. Both simulations and experimental results will be presented.

3D INTEGRATION OF MEMS AND IC: DESIGN, TECHNOLOGY

2.

193

Experimental

In addition to the pressure sensor and the BAR device, a transceiver ASIC and a microcontroller ASIC were required silicon devices for the TPMS demonstrator. The silicon devices were 3D integrated and stacked on top of each other as shown in Figure 1.

Figure 1. A sketch of the 3D integrated stack of silicon devices required for the automotive demonstrator of e-CUBES.

2.1. PRESSURE SENSOR DESIGN The pressure sensor in the TPMS was a bulk micromachined device with a pressure inlet, a membrane with piezoresistors and a hermetically sealed reference cavity. The sensor was originally designed to be mounted next to a microcontroller with wire bonded interconnects, and the overall size of the TPMS was ~36 cm3. However, a size reduction to <1 cm3 was targeted as this would allow the TPMS system to be mounted on the inner facing of the tire rather than on the rim as today. To achieve such a substantial miniaturization, the silicon devices would have to be packaged as bare dices and the sensor would have to be wafer level packaged, meaning that it should be ready for surface mounting after final dicing. Modifications in the design were required; the wire bonds were replaced by TSVs in the cap wafer and interconnection bumps on the surface of the cap wafer. Having TSVs in the cap wafer required a wafer level bonding method assuring both electrical connection between the TSVs and the sensor and a hermetically sealed reference cavity. Schematic cross sections of some of the suggested designs and the finally selected solution can be compared in Figure 2. The main wafer level bonding methods of interest were AuSn eutectic bonding, plasma activated direct wafer bonding and regular glass–silicon bonding. The main drawback with AuSn wafer bonding was the need for plating of both cap and sensor wafer and a rather large (~10 µm) and not so well defined stand-off height. The demand for an extremely small surface roughness (<5 Å RMS) of the surfaces

M.M.V. TAKLO ET AL.

194

to be bonded was the major argument for not choosing the plasma activated direct wafer bonding. Chemical mechanical polishing would be needed and it was uncertain if the mechanical integrity of the wafers at this stage in the process sequence would be sufficient. AuSn bonding and hollow vias

Direct wafer bonding and Planoptik vias Inlet die Sensor die Cap die

Glass-silicon bonding and Planoptik vias Glass Silicon

Selected solution

Glass

Figure 2. Two suggested versions (top) and the finally selected version (bottom) for wafer level packaging of the pressure sensor. The sensor would in all cases be ready for surface mounting after final dicing.

The cap and inlet wafers could be either glass (borosilicate glass) or silicon. In case of silicon cap wafers, hollow vias as a TSV solution developed at SINTEF could be implemented [8, 13]. Lately, TSV aspect ratios of 1:60 are possible at SINTEF thanks to improvements in deep reactive ion etching (DRIE) technology with both satisfactory etch speed (6.7 µm/min) and uniformity. The TSV development is shown in Figure 3. Etching is performed with an Alcatel AMS 200 “I-Productivity” tool. The “filled” vias are narrow enough to be completely filled using the same processes as for the larger “hollow” vias (1 µm thermal oxidation, deposition of 2 µm polysilicon with POCl3 doping). The TSV dimensions are shrank for smaller pitches resulting in increased resistivity. In case of a glass cap wafer, silicon-glass compound wafers as delivered by Planoptik [6] were found to be suitable. The TSVs in this wafer were doped silicon pins electrically isolated by a glass matrix. Images of a silicon-glass test compound wafer prepared by Planoptik are shown in Figure 4. It is illustrated how the amount of silicon areas compared to glass areas could be varied rather freely across the wafer without causing problems for the polishing steps involved. Tungsten–glass compound wafers (HermeS™) by Schott [19] would probably also have been suitable, but were not available at the time of design. These could have offered a significant reduction in TSV electrical resistance. The lower resistance of W would have been important for e.g. an RF device, but was uncritical for the pressure sensor.

3D INTEGRATION OF MEMS AND IC: DESIGN, TECHNOLOGY

195

20 expected from DRIE results measured

Resistance [Ohm/via]

15

10

hollow

filled 5

0 20

40

60

80

100

120

140

160

Min pitch [µm]

Figure 3. Development of TSVs for MEMS cap or interposer wafers. Expected (based on recent DRIE results) and measured TSV resistance versus minimum pitch is shown for 300 µm silicon substrate thickness and 2 µm polysilicon “filling”.

Figure 4. Images of a silicon-glass compound wafer designed by SINTEF and prepared by Planoptik. Each device measures roughly 1 mm. Dark areas are glass and light areas are silicon.

A glass–silicon cap wafer was finally selected. A glass inlet wafer was therefore implemented to balance thermo-mechanical stress in the package and minimize distortions on the pressure sensor induced by processing and ambient temperatures. Glass bonding to the sensor wafer in combination with electrical contacting was already an established technology. Nevertheless, some process modifications were needed when applying silicon-glass compound wafers rather than standard glass wafers. A layer of 1 µm pure aluminum was patterned on the surface of the cap wafer after wafer bonding. The backside of the stack had to be kept dry during this processing due to the inlets. This challenge was overcome by a combination of special wafer holders and the application of regular dicing tape covering the inlets. Electrical tests of the sensors were performed on wafer level after the

M.M.V. TAKLO ET AL.

196

aluminum patterning. The results were compared with values obtained for the unbonded sensor wafer to check the influence of the added TSVs and interconnects. The last process step before wafer dicing was bumping with Au stud bumps on the aluminium pads by Kulicke and Soffa [20]. Au stud bump bonding was selected since this process was completely dry. Most alternative bumping processes (like e.g. microbumps) would require plating and wet processing of the wafers which would be complicated due to the pressure inlets. 2.2. BONDING OF PRESSURE SENSOR AND BAR DEVICE Similar to the pressure sensors, the BAR devices were Au stud bumped on wafer level before final dicing. The sensor and BAR devices were bonded side by side onto transceiver ASIC dies that had previously been bonded onto microcontroller ASIC wafers as shown in Figure 1. Further details describing the bonding of the ASIC stack can be found in Ref. [18]. The pressure sensor and BAR devices were flip-chip bonded. A picture of the complete MEMS and ASIC stack is seen in Figure 5. BAR device Pressure sensor

Microcontroller wafer

Transceiver ASIC die

Figure 5. Pressure sensors and BAR devices bonded side by side on top of the transceiver ASIC dies bonded to the microcontroller ASIC wafer.

The flip-chip bonding was done on an experimental flip-chip bonding tool at Datacon [21]. Both thermocompression and thermosonic bonding of the sensor and BAR devices were investigated. Whereas thermocompression bonding is known to work well for Au stud bump bonding, it has a relatively low throughput as the required bonding time per die is relatively long. By adding ultrasonic energy during bonding, the bonding time can be significantly reduced as well as the applied pressure and temperatures. Table 1 compares typical process parameters that were used for thermocompression and thermosonic stud bump bonding. Cross-sectioning was an important tool for the evaluation and optimization of initial bonding tests. Bonded test samples were embedded in an epoxy resin and grinded/polished to reveal the cross-sections of the stud bumps. Electrical testing of daisy chains and shear testing were also employed to verify the bonding quality. Thermal cycling

3D INTEGRATION OF MEMS AND IC: DESIGN, TECHNOLOGY

197

(1,000 cycles, −40°C to 150°C) and high temperature annealing (30 min at 260°C) were included between measurements to provoke failures and reveal samples bonded with non-optimal parameters. TABLE 1. Typical process parameters used for thermocompression and thermosonic stud bump bonding. Method Bond force (N) (32 bumps) Bond time per die (s) Tool temperature (°C) Chuck temperature (°C)

Thermocompression 20–30 10 200 120–140

Thermosonic 12–20 2 20 120–140

Epotek 353ND underfiller was dispensed onto the transceiver die prior to bonding of the sensor in order to obtain a good adhesion. The effect of including or excluding an O2/H2O plasma treatment before dispense was also tested during process optimization. For the BAR device, which was bonded after the sensor, no underfiller was used in order to avoid interference with the operation of the bulk acoustic resonator. The sensor had 32 stud bumps distributed along its periphery whereas the BAR had 16 stud bumps evenly distributed over its surface. Prior to bonding, the Au stud bumps had a diameter of approximately 50 µm and a height of 30 µm. 2.3. INSPECTION AND PROCESS CONTROL OF BONDED DEVICES From a production perspective, it is important to consider yield issues, process control possibilities and the availability of known good dies when several layers are stacked sequentially. Standard electrical parameters were tested on wafer level for the pressure sensor and BAR wafers before stud bump bonding. In addition, a special test structure was designed for process control after bonding onto the underlying transceiver ASIC dies. The test structure was a daisy chain consisting of 16 Au stud bumps and probing was done manually on pads positioned on the redistribution layer of the transceiver die. None of the tested bumps would later be used for signal control, but a low resistivity for the daisy chain was used as an indication of a good alignment of the chip and a satisfactory bonding result overall. X-ray imaging was performed by Fraunhofer IZM in Berlin as an additional nondestructive inspection method for the flip-chip bonded MEMS devices. Both devices that were functional and non-functional after bonding were inspected. Shear tests were performed for some BAR devices to verify the X-ray results. 2.4. SIMULATED STACK Due to the high integration density in 3D systems a variety of physical phenomena has to be considered within the design process and also for the prior assessment of

198

M.M.V. TAKLO ET AL.

choices for the integration technology. Dedicated modeling methods for 3D stacks, developed in the e-CUBES project, enable a flexible and efficient analysis of electrical, electro-thermal, mechanical and thermo-mechanical effects in 3D stacks. Two main areas have been of particular interest for the presented TPMS demonstrator: the thermal behavior of the entire stack and the influence of TSVs and bonding contacts on signal propagation and power distribution [23]. Both topics have been studied by simulations. The aim for the thermal analysis of the TMPS stack was to investigate hot spots and temperature distributions in the entire 3D system. Realistic boundary conditions (e.g. temperature of rim and air within the tire) and periodic activity of electronics for several operation modes had to be considered. A modular modeling approach [22, 24] was applied to generate the complex model of the TPMS stack structure. Accordingly, the thermal finite element model of the entire TPMS stack could be composed of basic modules. Every basic module was fully parameterizable enabling an easy change of geometrical and material parameters. Modules of every single component of the sensor system and finally of the package were necessary for the entire model. We obtained the geometry model shown in Figure 6 by assembling all basic modules with more than 100 parts. For a better view and comparison with the sketch depicted in Figure 1, the package and other modules are not shown.

Figure 6. Geometry model of the 3D integrated stack of silicon devices for the TPMS demonstrator (package and other modules are not shown).

Due to the large temperature range from –40 up to 125°C in which the sensor system has to operate, temperature dependent thermal material parameters were considered. Comparative simulations revealed significant differences in the temperature distributions between temperature dependent and constant material parameters, especially for materials with “strongly” temperature dependent material parameters (heat conductivity k, density r, heat capacity Cp at constant pressure). The focus was set on silicon and the air in the tire. Material databases were used to obtain the tabular dependencies which were approximated with first and second order polynomials in the temperature range of –25°C to 125°C. These polynomials were integrated as nonlinear material properties in ANSYS. The resultant nonlinear FEM model had about 76,500 degrees of freedom.

3D INTEGRATION OF MEMS AND IC: DESIGN, TECHNOLOGY

199

3. Results and discussion 3.1. TEST RESULTS BEFORE FLIP-CHIP BONDING Electrical testing of the pressure sensors was performed after wafer level bonding of the cap and sensor wafer and patterning of the aluminum routing. Parameters that were measured included bridge resistance, zero point signal and leakage current. The same parameters had been measured also for the un-bonded sensor wafer, thus the influence of the added TSVs and interconnects was revealed. The parameters were all found to be within the specified limits after wafer level bonding, except a slightly too large series resistance. The higher resistivity was found to be related to a slightly too mild sintering process for the aluminum pads on the silicon TSVs in the Planoptik wafers. More sintering could not be added after including the Au stud bumps on the wafer, but the higher resistance values were easily compensated by programming of the microcontroller at a later stage. 3.2. TEST RESULTS AFTER FLIP-CHIP BONDING Depending on the bonding parameters, bump heights were found from cross sections to vary from 8 to 21 µm (30 µm before bonding), whereas the bump diameter varied from 60 to 100 µm (50 µm before bonding). Correlation with electrical test showed that the bumps had to be squeezed to a height of 15 µm or less in order to obtain reliable electrical interconnects. In some cases underfiller residue was observed at the interface between the stud bump and the metallization of the transceiver die (Figure 7, left). Based on these observations the amount of underfiller dispensed prior to bonding of the sensor dies was optimized. Figure 7, right, shows a cross-section for a fully optimized bonding process. Au-Al intermetallic regions are found on both sides of the Au bump and the bump height is approximately 12 µm whereas the diameter is about 76 µm.

Figure 7. Cross sections of Au stud bumps after bonding: before (left) and after (right) optimization of the bonding process.

Electrical tests revealed that an O2/H2O plasma treatment performed on the transceiver dies prior to stud bump bonding significantly improved the bonding results. When measuring the resistance of daisy chains with 16 bumps, the variation on the resistance values was significantly higher for samples that had not

200

M.M.V. TAKLO ET AL.

undergone this plasma treatment. On the non-treated samples, the resistance of the daisy chain was also dramatically increased following thermal cycling. Samples that had undergone the plasma treatment were hardly affected by either thermal cycling or high temperature annealing. After optimization of the bonding parameters, an electrical resistance of 0.10 Ω per bump was measured. The daisy chains included in the sensor design for process control after Au flip-chip bonding were measured manually. The process control allowed an early adjustment of chip alignment and tool pressure settings. From the X-ray inspections performed on complete 3D integrated stacks, the quality of the stud bump bonding could be correlated to the shape of the bumps and the alignment of the chip. A good alignment in X/Y direction was known to be critical for achieving a good flip-chip bonding, but the parallelism of the two bonding planes was later also recognized as highly important. The planarity of the tool pressing the sensor and the BAR down during flip-chip bonding onto the underlying transceiver chips was critical. If the tool was not perfectly flat itself or coming down in a skew manner, the bumps would be squeezed too much on one side and not enough on the other side, i.e. they are over-bonded on one side and weakly bonded on the other. Typical failures related to over-bonding are shortcircuit between adjacent bumps or the damage of chip or substrate structures close to the contact. A comparison of a BAR device that was not functional and another one that was functional after bonding is given in Figure 8.

Figure 8. X-ray images of a not functional (left) and functional (right) BAR device after flip-chip bonding. The sizes of the bumps are more equal for the well bonded BAR device (right).

Shear tests were performed on BAR devices that were not working properly after bonding. The fracture surfaces confirmed the observations made by X-ray imaging; the stud bumps were not homogeneously squeezed for devices that were nonfunctional after bonding. The flip-chip bonding process was optimized accordingly and X-ray inspection considered as a versatile tool for process control. Finally, a number of 58 TPMS stacks with BAR and sensor devices were success-fully bonded. Half of the stacks were bonded using thermocompression and the other half using thermosonic bonding. An image of a finally packaged TPMS demonstrator with the 3D integrated silicon stack inside is shown in Figure 9.

3D INTEGRATION OF MEMS AND IC: DESIGN, TECHNOLOGY

201

3D integrated stack

Figure 9. An image showing the complete 3D integrated stack mounted onto a PCB board placed inside a molded interconnected device (the transparent version to the right was made for demonstration purposes).

3.3. SIMULATION RESULTS Temperature distributions in the entire system for extreme combinations of boundary conditions were of particular interest for the thermal simulations of the TPMS. For example, the tire could be at 0°C while the air in the tire could be at 125°C, which occurs if a previously hot tire is rolling over ice. The temperature distributions in the entire TPMS and on the membrane level of the pressure sensor under such conditions are shown in Figure 10. The temperature distribution across the membrane and resulting thermo-mechanical stresses were studied because the measurement principle of the sensor is based on pressure induced mechanical stresses in the membrane. Fortunately, no significant differences in temperature (approx. 0.1 K), and correspondingly low thermo-mechanical stress differences, were found for the individual sensing elements (four piezoresistors) on the membrane.

Figure 10. Left: temperature distribution in the TPMS when a previously hot tire rolls over ice. Right: resulting temperature distribution on the membrane level of the pressure sensor.

M.M.V. TAKLO ET AL.

202

The temperature of the BAR device has a considerable influence on its resonance frequency and it is desired to measure the BAR temperature. Unfortunately, the BAR temperature could not be measured directly. Instead, temperature measuring structures were located at two places on the ASICs and the maximum temperature difference between the BAR and ASIC as a function of time was examined by simulations. There were about seven regions on the ASICs with significant power loss, i.e. hotspots. In the transient case, the hotspots are active in a periodic cycle. At a time of about 4.5 ms into the duty cycle the temperature will be measured, and between 6.2 and 7.8 ms the BAR device has to work at a correct frequency. The maximum difference between the BAR and the two ASIC temperature sensor locations was calculated to be 0.27 K. This dynamic offset had to be taken into account for compen-sation. More details related to the compensation were presented in Ref. [25].

4. Conclusions A 3D integrated stack consisting of two MEMS devices and two IC devices was successfully realized for a TPMS demonstrator. A key to success was a thorough study and a range of short-loop tests before final technology and material selections were made. TSVs of silicon in glass combined with Au stud bumping and flip-chip bonding were found to be the optimal stacking technologies for this application. Thermal simulations were made to assure that no significant asymmetric thermomechanical stresses were induced on the pressure sensor membrane even for extreme boundary conditions. The actual BAR device temperature during operation was examined by modeling and important compensation schemes could be defined to adjust the BAR frequency.

References 1. 2. 3. 4. 5. 6. 7.

www.eCUBES.org. Gupta, S., Hilbert, M., Hong, S., and Patti, R., “Techniques for producing 3D ICs with high-density interconnect”, Proceedings of the 21st International VLSI Multilevel Interconnection Conference, Waikoloa Beach, HI, USA, September 2004. Ramm, P. et al., “3D system integration technologies”, MRS Symposium Processings, Vol. 766, pp. 3–14, 2003. Knickerbocker, J.U. et al., “Development of next-generation system-on-package (SOP) technology based on silicon carriers with fine-pitch chip interconnection”, IBM Journal of Research and Development, Vol. 49, pp. 725–753, 2005. Enquist, P., “High density bond interconnect (DBI) technology for three dimensional integrated circuit applications”, MRS Symposium Processings, Vol 970, pp. 19–24, 2007. http://www.planoptik.com/produkte/produkte_en.html. http://www.silexmicrosystems.com/pages/.

3D INTEGRATION OF MEMS AND IC: DESIGN, TECHNOLOGY 8. 9. 10. 11. 12. 13. 14. 15. 16.

17. 18.

19. 20. 21. 22. 23. 24. 25.

203

Lietaer, N., Storås, P., Breivik, L., Moe, S., “Development of cost-effective high-density through-wafer interconnects for 3D microsystems”, Journal of Micromechanics and Microengineering, Vol. 16, pp. S29–S34, 2006. Chow, E.W. et al., “Process compatible polysilicon-based electrical through-wafer interconnects in silicon substrates”, Journal of Microelectromechanical systems, Vol. 11, pp. 631–640, 2006. Ok, S. J., Kim, C., Baldwin, D.F., “High density, high aspect ratio through-wafer electrical interconnect vias for MEMS packaging”, IEEE Transactions on advanced packaging, Vol. 26, pp. 302 – 309, 2003. Ji, F. et al., “Fabrication of silicon based through-wafer interconnects for advanced chip scale packaging”, Proceedings of Eurosensors XX, Contribution M3C-P1, Gothenburg, Sweden, 2006. Tian, J., Sosin, S., Iannacci, J., Gaddi, R., Martek, M., “RF-MEMS wafer-level packaging using through-wafer interconnect”, Sensors and Actuators A, Vol. 142, pp. 442–451, 2008. Taklo et al., “Technologies enabling 3D stacking of MEMS”, IEEE workshop on 3D System Integration, München, Oct 01–02, 2007. Taklo et al., “MEMS Sensor/IC Integration for Miniaturized TPMS (e-CUBES)”. Oral presentation at SEMATECH meeting “Manufacturing and reliability challenges for 3D ICs using TSVs”, San Diego, California, sep 25–sep 26, 2008. Taklo et al., “3D MEMS and IC Integration”, MRS fall meeting (Symposium E: Materials and Technologies for 3-D Integration), Boston-MA, des 01–des 05, 2008. Lietaer, N., Taklo, M.M.V., Klumpp, A., Ramm, P., “3D Integration Technologies For Miniaturized Tire Pressure Monitor System (TPMS)”, oral presentation at IMAPS 5th International Conference and Exhibition on Device packaging, Scottsdale, Arizona, 10–12 March 2009. Taklo et al., “3D stacked MEMS and ICs in a miniaturized sensor node”, DTIP 01–03 April, Rome, Italy, 2009. K. Schjølberg-Henriksen, et al., “Miniaturised sensor node for tire pressure monitoring (eCUBES)”, in Advanced Microsystems for Automotive Applications - Smart systems for safety, sustainability, and comfort, edited by G. Meyer, J. Valldorf, W. Gessner, Springer, Berlin, pp. 313–332, 2009. http://www.schott.com/epackaging/english/auto/others/hermes.html. www.kns.com. http://www.datacon.at/. Schneider, P.; Reitz, S.; Stolle, J.; Martin, R.: Design Aspects of 3D Integration of MEMSbased Systems. Design, Test, Integration and packaging DTIP 2009, Rome, Italy, April, 2009. Stolle, J.; Reitz, S.; Schneider, S.; Wilde, A.: Modular Modeling of RF Behavior of Interconnect Structures in 3D Integration. DATE 2009, Nice, France, 20–24 April, pp. 251– 253, 2009. Schneider, P.; Reitz, S.; Martin, R.; Stolle, J.: Modeling and Simulation for 3D Design Support. Journal Future Fab International, Issue 25, pp. 105–110, April 2008. Prainsack et al., “Design Issues of BAW employment in 3D integrated Sensor Nodes”, DTIP 01–03 April, Rome, Italy, 2009.

LOW-FREQUENCY ELECTRONIC NOISE IN THE BACK-GATED AND TOP-GATED GRAPHENE DEVICES GUANXIONG LIU, QINGHUI SHAO, AND ALEXANDER A. BALANDIN∗ Nano-Device Laboratory, Department of Electrical Engineering and Materials Science and Engineering Program, Bourns College of Engineering, University of California – Riverside, Riverside, California 92521, USA, E-mails: [email protected], [email protected], [email protected]

WILLIAM STILLMAN AND MICHAEL SHUR Center for Integrated Electronics and Department of Electrical, Computer and Systems Engineering, Rensselaer Polytechnic Institute, Troy, New York 12180, USA, E-mail: [email protected]

SERGEY RUMYANTSEV A.F. Ioffe Physico-Technical Institute, The Russian Academy of Sciences, St. Petersburg, 194021 Russian Federation and Center for Integrated Electronics and Department of Electrical, Computer and Systems Engineering, Rensselaer Polytechnic Institute, Troy, New York 12180 USA, E-mail: [email protected]

Abstract Graphene, which is a planar single sheet of sp2-bonded carbon atoms arranged in honeycomb lattice with superior electrical and heat conducting properties, has been proposed as material for future electronic circuits, sensors and detectors. Practical applications of graphene devices require an acceptable level of the low-frequency 1/f γ electronic noise (f is frequency). We fabricated and investigated electronic noise characteristics in a set of back-gated and top-gated graphene field-effect transistors, which used single-layer and bi-layer graphene as the electrically conducting channel, and SiO2 and HfO2 as gate dielectrics. The Hooge parameter αH, which characterizes the noise level, for the single and bi-layer graphene devices is on the order of αH ~ 10− 4–10−3, which is comparable to that in the state-of-the-art devices made of conventional semiconductors. The generation – recombination (G-R) – type bulges in the noise spectra of some graphene devices suggest that the noise is of the carrier-number fluctuation origin and is caused by the charge carrier trapping and de-trapping by defects in graphene and SiO2 layer. The obtained experimental results are important for electronic and sensor applications of graphene.

______

∗ Alexander A. Balandin, Department of Electrical Engineering, University of California, Riverside, CA 92521 U.S.A.; e-mail: [email protected], web-site: http://ndl.ee.ucr.edu, Fax: +1 (951) 827-2425, Phone: +1 (951) 827-2351 E. Gusev et al. (eds.), Advanced Materials and Technologies for Micro/Nano-Devices, Sensors and Actuators, DOI 10.1007/978-90-481-3807-4_16, © Springer Science + Business Media B.V. 2010

205

206

G. LIU ET AL.

Keywords: Graphene, graphene transistors, top-gate graphene devices, low-frequency noise, flicker-noise, 1/f noise, carrier number fluctuation, Hooge parameter of graphene, electron mobility.

1. Introduction Graphene is defined as a planar single sheet of sp2-bonded carbon atoms arranged in honeycomb lattice. Few atomic layer graphene (FLG), e.g. bi-layer graphene (BLG), also revealed unique electronic properties. Since it first mechanical exfoliation by the Manchester, U.K. – Chernogolovka, Russia research group [1], graphene attracted tremendous attention world-wide [1–6]. Specific characteristics of single-layer graphene (SLG), such as its extraordinary high room temperature (RT) carrier mobility, up to ~27,000 cm2 V −1 s−1 [1–3], over 200,000 cm2 V −1 s−1 cryogenic mobility [4] and extremely high thermal conductivity exceeding ~3,000 W/mK [5–8] near RT make this material appealing for the electronic, sensor, detector, and interconnect applications [9, 10]. For comparison the RT thermal conductivity of silicon (Si) is 145 W/mK and that for diamond is ~1,000–2,200 W/mK depending on the quality. In terms of heat conduction graphene can outperform not only the best bulk materials but also carbon nanotubes (CNTs), which have the RT thermal conductivity in the range from ~1,500 to 3,500 W/mK (see a direct comparison in Ref. [7]). Owing to its extraordinary properties, graphene has been also proposed as material for the future microelectromechanical systems (MEMS) and nanoelectromechanical systems (NEMS) [11]. MEMS/NEMS technology offers miniaturization thereby realizing significant reduction in weight, size and power consumption. At the same time, the thermal conductivity of materials structured at nanometer scale usually undergoes significant degradation. For example, the thermal conductivity of Si nanowires is about an order of magnitude smaller than that of bulk Si [12]. Therefore, the extremely high thermal conductivity of graphene offers major advantages. The proposed MEMS/NEMS applications of graphene are facilitated by its planar flat geometry and demonstrated integration with Si and Si/SiO2. Graphene atomic planes suspended across trenches in Si/SiO2 wafers have been used for a variety of experimental studies [5, 6]. Graphene and FLG, e.g. thin graphite, appear to be excellent materials for fabrication of NEMS resonators [11]. Graphene, like CNTs, is extremely strong and stiff compared to Si based materials. Its chemical inertness and tunable electronic properties are also advantageous. Graphene membranes of macroscopic size (~100 μm in diameter) have sufficient stiffness to support extremely large loads, millions of times exceeding their own weight [13]. The latter is a major benefit for the MEMS/NEMS applications. The micrometer-size sensors made of graphene are capable of detecting individual molecules owing to its extraordinary high electron mobility and its one-atomic-layer thickness [14]. Many envisioned electronic and system-on-a-chip applications of graphene require low levels of flicker noise, which dominates the noise spectrum at frequencies f below 30 to 100 kHz. The flicker noise spectral density is proportional

LOW-FREQUENCY ELECTRONIC NOISE

207

to 1/fγ, where γ is a constant close to 1. The unavoidable up-conversion of flicker noise in electronic systems limits many real live applications. For example, MEMS technology has a potential for realizing RF variable capacitors with the performance that is superior to conventional solid-state diodes in terms of nonlinearity, flicker noise and losses. Thus, the low-frequency noise level in graphene has direct relevance to the development of graphene MEMS/NEMS technology. In the MEMS thermal shear-stress sensors, the flicker noise and thermal conduction properties are of particular relevance. The sensitivity of graphene sensors may be limited by 1/fγ noise [14]. Thus, it is important to investigate the noise spectrum density, noise origin and sources in graphene layers and graphene devices in order to find the methods for noise reduction. 1/fγ noise characteristics can provide valuable information about the electronic phenomena in graphene and can be used for quality control of graphene devices. Electrically gated graphene devices present a unique test bed for investigating the noise origin. The extremely high electron mobility (limited at RT by defects rather than by phonon scattering) makes graphene particularly well suited for distinguishing between two distinct noise mechanisms: the carrier density fluctuation and mobility fluctuation [15]. Here, we report on fabrication of SLG and BLG devices and analysis of the low-frequency noise in these devices. The devices fabricated for this study utilized several designs including the doped-substrate back-gate as well as conventional top gate transistor designs with the graphene layers acting as transistor channels. We discuss possible noise mechanisms using measured noise spectra and their bias dependence. BLG graphene devices are expected to have distinctive properties from those of SLG devices owing to a band-gap, which can be opened through application of the perpendicular electric field. Prior research on noise in graphene devices was focused on BLG back-gated transistors [16, 17].

2. Graphene preparation Graphene samples were produced by the mechanical exfoliation from three different types of initial graphitic material: (i) bulk highly oriented pyrolitic graphite (HOPG), (ii) Kish graphite and (iii) high-pressure high-temperature (HPHT) graphitic layers. Graphene HPHT synthesis was recently reported by us [18]. We did not observe a systematic difference in the properties of graphene produced by these different techniques. All graphene flakes were placed on the standard Si/SiO2 substrates during exfoliation using the standard procedure [1, 2] and initially identified with an optical microscope. SLG and BLG sample were selected using micro-Raman spectroscopy through the 2D-band deconvolution [19–23]. The spectra were measured with a Renishaw spectrometer under 488-nm laser excitation in the backscattering configuration. In order to prevent local heating the excitation power was kept below 2.0 mW [19, 20]. The spectra were recorded with the 1,800 lines/mm grating. We have described in detail the procedure of counting the number of atomic layers in graphene using Raman spectroscopy elsewhere [19–21].

208

G. LIU ET AL.

3. Graphene device fabrication We used Leo1550 electron beam lithography (EBL) to define the source and drain areas through the contact bars with the help of pre-deposited alignment marks. The 10 nm Cr/100 nm Au metals were sequentially deposited on graphene by the electron-bean evaporation (EBE). In this design, the degenerately doped Si substrate acted as a back gate. The micro-Raman inspection was repeated after the fabrication and electrical measurements to make sure that graphene’s crystal lattice was not damaged. Figure 1 shows optical microscopy images of typical back-gated graphene device structures showing several graphene flakes contacted by metal electrodes. The black region on the left panel is graphitic piece on the wafer after mechanical exfoliation of graphene. The gray regions are graphene flakes, some of which are attached to the graphitic pieces. On the left panel one can clearly see a single-layer graphene flake (blue–gray color) of approximately constant width contacted by four metal gates (bright yellow color). Note that these two images are from different optical microscopes, and the contrast of SLG is therefore different. In order to fabricate the top gated graphene devices we deposited HfO2 on top of the graphene channel. For these devices EBL was used to define the regions for the top gate oxide on the graphene flake. It was followed by the low temperature atomic layer deposition (ALD). The thickness of HfO2 directly deposited on top of graphene channel was ~20 nm. A second step of EBL defined the source, drain and the top gate, and was followed by EBE to make Cr/Au electrodes. This sequence helped us to avoid possible damages to the contacts during to the long ALD process in the presence of H2O and precursor environment. The schematic of the top-gated devices and optical microscopy of typical structures are shown in Figure 2. In the schematic and optical image, the brown color indicates SiO2 layer, yellow color corresponds to the metal electrodes and green marks HfO2 top gate insulator.

Figure 1. Optical microscopy images of typical back-gated graphene device structures showing several graphene flakes contacted by metal electrodes. The scale bars in the images are 2 μm.

LOW-FREQUENCY ELECTRONIC NOISE

209

The current–voltage (I-V) characteristics were measured both at UCR and RPI using a semiconductor parameter analyzer (Agilent 4156B). Approximately half of the fabricated devices were robust and retained their I-Vs over the period of testing (about two weeks) at ambient conditions. Representative I-V curves for a topgated BLG device are shown in Figure 3. One can see the Dirac charge-neutrality point where the minimum conductance was observed at VD ~ 13 V. We fabricated a large set of the top gated graphene devices with the source–drain separation LSD in the range from ~2 to 13 μm and the graphene channel width in the range from W = 0.3 to 5 μm. The mobility for these devices was extracted through the Drude formula used previously for graphene devices [1–4].

μ = (σ (VBG ) − σ (VD )) /(C (VBG − VD )) , where C = εoεr/t is the gate capacitance, t is the oxide thickness, σ is the conductivity, VD and VBG are the Dirac point and back-gate bias, respectively.

Figure 2. Schematic and optical microscopy image of typical top-gate graphene device structures. A long graphene flake is seen as gray horizontal ribbon under the top-gate oxide (green color) and metal contacts (yellow color).

The mobility for the back-gated devices varied in the range from μ ~ 2,500 to μ ~ 7,500 cm2 V−1 s−1. The wide range was attributed to the fabrication process variations and width and quality of graphene channels. The mobility for the topgated devices was lower (μ ~ 1,550 cm2 V−1 s−1 for electrons and μ ~ 2,220 cm2 V−1 s−1 for holes at RT). The mobility degradation in the top gate devices is expected due to the effect of the top gate oxide deposited on graphene.

4. Noise measurements and discussion Following the I-V characterization the low-frequency noise was measured using the SRS 760 FFT spectrum analyzer. The device bias was applied with a “quiet” battery–potentiometer circuit. The electronic noise was measured in the frequency

210

G. LIU ET AL.

Source - Drain Current (A)

range from 1 Hz to 30 kHz for a set of gate and source-drain biases. Figure 4 presents characteristic noise spectral density measured at Vds = 20 mV and different gate biases changing from 0 to 53 V. The noise spectral density is on the − − order of SI ~ 10 23–10 22 A2/Hz at f = 1 kHz for the examined biases, which is a rather low value. The spectral noise density is close to the 1/f noise at frequency f > 10 Hz and small gate voltages. At high gate voltages and at f < 10 Hz the spectral noise density decreases with the frequency as 1/f 2 or even 1/f 3. This suggests a major contribution from the generation-recombination (GR) noise with a small characteristic frequency below 0.1 Hz. The normalized current noise density SI/I2 for the top-gated graphene transistor is presented in Figure 5. The data is shown for the back-gate bias in the range from zero to 40 V. Drain–source bias was kept at 0.05 V. As one can see SI/I2 is very close to 1/f for this type of devices.

80 mV 4.0x10

-5

40 mV

2.0x10

VD

60 mV

-5

20 mV

0.0 -60

-40

-20

0

20

40

60

Back Gate Bias (V) Figure 3. Current–voltage characteristics of the back-gated BLG device in the vicinity of the Dirac point. Drain–source bias changes from 20 to 100 mV.

The amplitude of the 1/f noise in semiconductors, metals and semiconductor devices is often characterized by the empirical Hooge parameter

αH =

SI fN I2

LOW-FREQUENCY ELECTRONIC NOISE

211

where N is the total number of carriers in the sample. Since the contribution of contacts and access regions to measured noise is substantial, we can only get an estimate of the upper bound for Hooge parameter (which can be also affected by a non-uniform electric field distribution for the contact configurations shown in Figures 1 and 2). Taking for the total number of carriers N=L2/Rqμ (here L is distance between contacts, R is the resistance, q is the elemental charge and μ is – the mobility) we obtained the Hooge parameter on the order of αH ~ 10 4 for the –3 back-gated devices and αH ~ 10 for the top-gated graphene devices. Such value of the Hooge parameter is typical for good quality semiconductors and metals [15]. -16

-17

10

2

Noise Spectral Density SI (A /Hz)

10

45 V 35 V

bilayer back-gated graphene device

-20 V

-18

10

-19

10

20 V

1/f

13 V 0V

-20

10

-21

10

-22

10

-23

10

-24

10

1

10

100

1000

10000

Frequency (Hz) Figure 4. Current noise spectral density as a function of frequency for the back-gated BLG device. The 1/f spectrum is indicated with the dashed line. Note the deviation from 1/f at lower frequencies.

The deviation of the noise spectral density from the pure 1/f-type dependence suggests that the low-frequency noise is of the carrier-number fluctuation origin [15]. This type of noise, commonly described by McWhorter model [24], appears as a result of the fluctuation in the number of charge carriers in the channel due to trapping and de-trapping of the carriers by defects. The defects, e.g. lattice imperfections or impurities, can be located inside the graphene bi-layer, at the graphene/SiO2 interface, or inside the gate oxide. Since 1/f 2–3 noise was found at very low frequencies, it is dominated by very “slow” traps with the time constants τ > 1/(2πfo) ~ 0.3–1.1 s. This implies that the contributions from the irregular shape peripherals of the graphene flake or from the bulk of the gate oxide were

212

G. LIU ET AL.

significant. Based on our analysis, the noise in BLG transistors implemented with the state-of-the-art technology seems to be mostly influenced by the trap distribution and contact quality rather than by the specifics of BLG electronic band structure. Understanding of how the width of graphene channels and additional defects introduced during ALD affect the noise level in graphene devices requires a separate systematic investigation and is reserved for future work.

top-gated single-layer graphene device

-1

Normalized Noise Density (Hz )

1E-7

1E-8 VG=0 V VG=10 V

1E-9

VG=20 V VG=30 V

1/f

1E-10

VG=40 V

1E-11

1E-12

1

10

100

1000

10000

Frequency (Hz) Figure 5. Normalized current noise spectral density as a function of frequency for the top-gated SLG device. The 1/f spectrum is indicated with the dashed line.

5. Conclusions Practical applications of graphene devices require an acceptable level of the lowfrequency 1/f γ electronic noise (f is frequency and γ is a parameter close to one). We fabricated and investigated electronic noise characteristics in a set of backgated and top-gated graphene devices, which used single-layer and bi-layer graphene as the conducting channel. It was established that the Hooge parameter αH for the – – single and bi-layer graphene devices is on the order of αH ~ 10 4–10 3, which is comparable to that in the devices made with conventional semiconductors and metals. Appearance of the generation – recombination type of bulges in the spectra from some devices suggests that the noise is of the carrier-number fluctuation origin due to the carrier trapping by defects.

LOW-FREQUENCY ELECTRONIC NOISE

213

Acknowledgments The work at UCR was supported, in part, by DARPA – SRC Focus Center Research Program (FCRP) through its Center on Functional Engineered Nano Architectonics (FENA) and Interconnect Focus Center (IFC), and by AFOSR award A9550-08-1-0100 on the Electron and Phonon Engineered Nano and Heterostructures. The work at RPI was supported by the National Science Foundation under I/UCRC “Connection One” and by IFC.

References 1. 2. 3. 4. 5. 6.

7. 8. 9. 10. 11. 12. 13. 14. 15.

K. S. Novoselov, A. K. Geim, S. V. Morozov, D. Jiang, Y. Zhang, S. V. Dubonos, I. V. Grigorieva, and A. A. Firsov, Electrical field effect in atomically thin carbon films, Science, 306, 666–669 (2004). Y. B. Zhang, Y. W. Tan, H. L. Stormer, and P. Kim, Experimental observation of the quantum Hall effect and Berry’s phase in graphene, Nature, 438, 201–204, (2005). S. Stankovich, D.A. Dikin, G. H. B. Dommett, K. M. Kohlhaas, E. J. Zimney, E. A. Stach, R. D. Piner, S. T. Nguyen, and R. S. Ruoff, Graphene-based composite materials, Nature, 442, 282–286 (2006). S. V. Morozov, K. S. Novoselov, M. I. Katsnelson, F. Schedin, D. C. Elias, J. A. Jaszczak, and A. K. Geim, “Giant intrinsic carrier mobilities in graphene and its bilayer,” Phys. Rev. Lett., 100, 016602 (2008). A. A. Balandin, S. Ghosh, W. Bao, I. Calizo, D. Teweldebrhan, F. Miao, and C. N. Lau, Superior thermal conductivity of single-layer graphene, Nano Lett., 8, 902–907 (2008). S. Ghosh, I. Calizo, D. Teweldebrhan, E. P. Pokatilov, D. L. Nika, A. A. Balandin, W. Bao, F. Miao, and C. N. Lau, Extremely high thermal conductivity of graphene: Prospects for thermal management applictions in nanoelectronic circuits, Appl. Phys. Lett., 92, 151911 (2008). D. L. Nika, E. P. Pokatilov, A. S. Askerov and A. A. Balandin, Phonon thermal conduction in graphene: Role of Umklapp and edge roughness scattering, Phys. Rev. B, 79, 155413 (2009). D. L. Nika, S. Ghosh, E. P. Pokatilov and A. A. Balandin, Lattice thermal conductivity of graphene flakes: Comparison with bulk graphite, Appl. Phys. Lett., 94, 203103 (2009). A. Naeemi and J. D. Meindl, Conductance modeling for graphene nanoribbon (GNR) interconnects, IEEE Electron. Dev. Lett., 28, 428 (2007). Q. Shao, G. Liu, D. Teweldebrhan and A.A. Balandin, “High-temperature quenching of electrical resistance in graphene interconnects,” Appl. Phys. Lett., 92, 202108 (2008). I. W. Frank, D.M. Tanenbaum, A.M. van der Zande and P.L. McEuen, Mechanical properties of suspended graphene sheets, J. Vac. Sci. Technol. B, 25, 2558 (2007). J. Zou and A. Balandin, Phonon heat conduction in a semiconductor nanowire, J. Appl. Phys., 89, 2932 (2001). T. J. Booth, P. Blake, R. R. Nair, D. Jiang, E. W. Hill, U. Bangert, A. Bleloch, M. Gass, K. S. Novoselov, M. I. Katsnelson and A. K. Geim, Macroscopic Graphene Membranes and Their Extraordinary Stiffness, Nano Lett, 8, 2442 (2008). F. Schedin, A. K. Geim, S. V. Morozov, E. W. Hill, P. Blake, M. I. Katsnelson & K. S. Novoselov, Detection of individual gas molecules adsorbed on graphene, Nat. Mater., 6, 652 (2007). A. A. Balandin, Noise and Fluctuation Control in Electronic Devices (Los Angeles; American Scientific Publishers, 2002).

214

G. LIU ET AL.

16. Y. M. Lin, and P. Avouris, Strong suppression of electrical noise in bilayer graphene nanodevices, Nano Lett., 8, 2119–2125 (2008). 17. Q. Shao, G. Liu, D. Teweldebrhan, A. A. Balandin, S. Rumyantsev, M. Shur and D. Yan, Flicker noise in bilayer graphene transistors, IEEE Electron. Dev. Lett., 30, 288 (2009). 18. F. Parvizi, D. Teweldebrhan, S. Ghosh, I. Calizo, A.A. Balandin, H. Zhu and R. Abbaschian, Properties of graphene produced by the high pressure – high temperature growth process, Micro Nano Lett., 3, 29 (2008). 19. I. Calizo, F. Miao, W. Bao, C. N. Lau, and A. A. Balandin, Variable temperature Raman microscopy as a nanometrology tool for graphene layers and graphene-based devices, Appl. Phys. Lett., 91, 071913 (2007). 20. I. Calizo, W. Bao, F. Miao, C. N. Lau, and A. A. Balandin, The effect of substrates on the Raman spectrum of graphene: Graphene-on-sapphire and graphene-on-glass, Appl. Phys. Lett., 91, 201904 (2007). 21. I. Calizo, D. Teweldebrhan, W. Bao, F. Miao, C.N. Lau and A.A. Balandin, Spectroscopic Raman nanometrology of graphene and graphene multilayers on arbitrary substrates, J. Phys.: Conf. Ser., 109, 012008 (2008). 22. I. Calizo, S. Ghosh, F. Miao, W. Bao, C.N. Lau and A.A. Balandin, Raman nanometrology of graphene: Temperature and substrate effects, Solid State Commun., 149, 1132 (2009). 23. D. Teweldebrhan and A.A. Balandin, Modification of graphene properties due to electronbeam irradiation, Appl. Phys. Lett., 94, 013101 (2009). 24. A. L. McWhorter, Semiconductor Surface Physics, p. 207 (Philadelphia; University of Pennsylvania Press, 1957).

MODELING OF DRY ETCHING IN PRODUCTION OF MEMS 1, 1 ALEXANDER RUSAKOV *, PETER BYSTROV 1 1,2 ANDREY KNIZHNIK , AND BORIS POTAPKIN 1

Kintech Lab Ltd, Moscow, 123182, Russia RRC “Kurchatov Institute”, Moscow, 123182, Russia E-mails: [email protected], [email protected], [email protected], [email protected]

2

Abstract A numerical model of dry etching of a cavity below a planar mechanical element (e.g. a mirror or a solid gear) through a set of holes is presented. From simulations using the developed model, it is shown that complex geometries of MEMS devices and low pressure dry etching may lead to limitation of the etching rate by gas transport under mechanical elements related to a strongly inhomogeneous distribution of gas concentration under the planar element; some criteria of distinction between the systems with and without the transport limitation effect are provided. The influence of the operating mode and parameters of the etching reactor is also discussed; the models of well-stirred (continuous-flow) reactor and batch (periodic) reactor are considered.

Keywords: MEMS; dry etching, etching reactor, gas transport, sticking coefficient, sacrificial layer, numerical modeling.

1. Introduction At present, microelectromechanical systems (MEMS) are widely used in various applications. As manufacturing technologies develop, the complexity of these devices grows as well as their influence to the cost of a final product. Therefore optimization of MEMS manufacturing processes is an important task. Experiments of microchip fabrication are quite complicated and expensive and take a lot of time, so computer modeling seems like an attractive substitute which enables one to reduce the amount of work with real samples. One of important stages in a MEMS manufacturing process is dry etching with neutral gas. This processing type is required to remove parts (called sacrificial) which were used as a “mould” for the mechanical elements of the microdevice. Since this operation is performed at the last steps of processing then selectivity is one of the key issues in the choice of reactants. XeF2 has a good selectivity in the * Alexander Rusakov, Kintech Lab Ltd, Kurchatov Sq. 1, 123182, Moscow, Russia. Fax: +7(499)196 7837; e-mail: [email protected]

E. Gusev et al. (eds.), Advanced Materials and Technologies for Micro/Nano-Devices, Sensors and Actuators, DOI 10.1007/978-90-481-3807-4_17, © Springer Science + Business Media B.V. 2010

215

216

A. RUSAKOV ET AL.

etching of silicon/oxide systems, but it is relatively expensive for commercial production [1, 2]. Therefore it is important to optimize the efficiency of dry etching process with respect to etchant consumption. Planar elements, like mirrors or gears, are frequently used in MEMS devices. The volume of the sacrificial layer employed to produce such parts is relatively small, but gas transport in a small gap under the elements is hindered (in comparison with top-down etching of “open” regions) [3]. Therefore the etching process is quite slow in this case, so its analysis for possible improvements is of particular interest.

2. Problem statement We consider a rectangular segment of a planar MEMS element on a certain substrate. An initially unetched sacrificial layer is located between the element and the substrate. The planar element has a set of holes through which the etchant gas comes to the sacrificial layer and the reaction products go out. The thicknesses of the sacrificial layer and the planar element are considered to be much less than other pattern sizes and less than the sizes of the holes. The specified location of the holes on the segment is used as a pattern to describe the configuration of the whole device to process. The pattern is repeated a certain number of times according to the relation between the segment size and the overall sample size. The sample is placed in the reactor chamber. Gas concentration in the reactor chamber changes as the etching process goes on according to operation mode of the reactor. The task is to calculate the shape evolution of the sacrificial layer over time, dynamics of gas concentration and the consumed amount of the etchant.

3. Numerical models 3.1. CAVITY PROFILE MODELS The etchant gas coming through the holes creates cavities in the sacrificial layer. For the geometry described above, it is reasonable to use a 2D model of the sacrificial layer where the etching surface is assumed to be perpendicular to the sample plane and the top-down etching period at the beginning of the process is neglected since it takes much less time than the considered cavity etching period. The evolution of cavity shape during etching process can be described with different approaches: the level set method [4, 5], the cellular automata model (cellremoval algorithm) [3, 6], and the string algorithm for 2D cavities [7, 8]. These methods were successfully applied to simulate etching profiles, and their accuracy and efficiency was compared [9] for microelectronic trenches. However the efficiency and accuracy of these methods for MEMS micro-cavities is not well established.

MODELING OF DRY ETCHING IN PRODUCTION OF MEMS

217

We consider here two models: cell-removal and string. The first one represents the sacrificial layer as a grid where each cell has its own “lifetime” which depends on gas concentration in the neighboring cells. The string model describes shapes of the etched cavities as a set of polygons; the vertices and sides of the polygons move at a concentration-dependent velocity. Although the cell-removal model looks simpler, it requires a dense grid to render all substantial details which takes a significant amount of computational resources. The string model needs less data to outline the shapes of cavities, but the computation rate strongly depends on complexity of the problem geometry and detail level. Taking the above into account, the string model is more suitable for systems with a low number of holes (that doesn’t create many small cavity elements during the etching process) while the cell-removal model may be preferable for large samples with a complicated hole pattern. 3.2. GAS TRANSPORT MODELS The transport of neutral species in micro-scale features in etching process was discussed in [10], and it was shown that vacuum conductance limits the flow of reactive species to the trench bottom. The transport processes in micro channels in the molecular regime is usually simulated via solution of an integral equation [11, 12] or using a Monte Carlo flow simulator [7, 13, 14]. For simple geometries in limiting cases, the transport in molecular regime can be efficiently described by the diffusion equation with the Knudsen diffusion coefficient [15]. The Knudsen diffusion model calculates concentration of the gas as a function of location and time C(x,y,t) in the cavities. Gas concentration at boundaries Γ of the holes and slits is obtained from the reactor model (see below). Concentration at the boundary of the sacrificial material is calculated according to the laws of the diffusion and chemical processes. This leads to the following equations: Diffusion equation:

∂C = Dk ΔC ; ∂t Boundary condition at the hole edges:

C (x, y, t ) Γ = Cr (t ) , where Cr(t) is the concentration of the etchant gas in the reactor chamber; Boundary condition at the etching surface:

− Dk

∂C = J = −k s C , ∂n

where J is the flux of the etchant gas to the etching surface, ks is a reaction rate constant.

A. RUSAKOV ET AL.

218

The complex flow simulation is based on a Monte-Carlo ray-tracing concept. According to this approach, the concentration distribution is calculated from a set of particle paths in the cavities. The calculation of a particular path consists of the following: a particle with a random velocity is placed into a hole, through which the etching process is conducted. Then its path is calculated as a random path taking into account its mean free path and the cavity geometry. The path calculation stops if either the particle leaves the cavity through a hole or an etching reaction takes place. 3.3. REACTOR MODELS Two reactor models which describe variations of gas concentration in the reactor chamber are considered here: a continuous-flow reactor and a batch (pulse) reactor. The continuous-flow reactor is represented as a single chamber with an inlet and an outlet, which provide a constant flow of the etchant gas through the reaction chamber. The following parameters are used to describe the reactor: temperature, chamber volume, etchant gas flow rate through the inlet, and pressure in the reactor chamber. The batch reactor operates in cyclic mode and uses two chambers (expansion and process) to avoid contamination of the etchant. The reactor parameters are the following: chamber volumes, filling and evacuation times, and batch scenario (times for each reactor operating state).

4. Simulation results 4.1. MEMS SAMPLE SHAPE The simulations described below use a gear of 0.4 mm in diameter as a test pattern (Figure 1). The gear has a set of holes (4 μm diameter) so that the sacrificial layer

Figure 1. Pattern for the simulations.

MODELING OF DRY ETCHING IN PRODUCTION OF MEMS

219

is etched both through the holes and the perimeter of the gear. The entire sample contains 10,000 patterns. Other elements necessary for gear operation, like a shaft, alignment clips, or a guide plate, were not included for these don’t make a significant influence on the etching time. Silicon is used as the sacrificial material and XeF2 is the etchant gas. 4.2. CONSTANT PRESSURE OF THE ETCHANT GAS As a certain idealization, we consider the case of constant etch gas pressure in the reactor chamber (i.e., reactor model is not used). If the gap between the gear and the substrate is 1 μm or greater, then there is no transport limitation and the etching time is almost independent of the thickness of the sacrificial layer and may be estimated as

τ0 =

cρ Si RT l , l= 2k s μ Si p 2 K etch 0

where l is an estimate of a maximum distance between neighboring holes, p is the etchant gas pressure in the reactor chamber, T is the temperature, ρ Si and μ Si are the density and molar mass of silicon, ks is the etching reaction rate constant, c is the ratio of stoichiometric coefficients for the etchant gas and the sacrificial material, Ketch0 is the etch rate at the beginning of cavity etching.

Figure 2. Evolution of the profile of the etched cavities for the case of constant pressure in the reactor chamber. The curves inside the image of the gear represent profiles of the sacrificial layer after 5, 10, 15 etc. minutes of etching. The thickness of the sacrificial layer is 1 and 0.05 μm for the left and right images, respectively.

The situation is different if the sacrificial layer thickness goes to the nanometer scale. At several tenths of microns, the diffusion-related limitation becomes noticeable, and plays a significant role at several tens of nanometers (Figure 2). The lower bound of the gap sizes for systems without diffusion limitation is about

A. RUSAKOV ET AL.

220

0.1 μm, and, in general, it depends not only on the gap size, but other geometric details as well, although, these parameters have minor influence on the position of the boundary (Figure 3). 60

Etching time, min

50 Hole size 4 mm Hole size 2 mm

40 30 20 10 0 0.01

0.1

1

Sacrificial layer thickness, mm

Figure 3. Dependency of the etching time on the sacrificial layer thickness.

4.3. CONTINUOUS-FLOW REACTOR For a system in a reactor, two sources of etching rate limitation act simultaneously: gas transport inside the etched cavities described above and etchant gas pressure variations due to reactor design. We consider a reactor operating in a continuous-flow mode with the following parameters: a chamber volume 1 dm 3 , a pressure in the reactor chamber is of 10 Torr (except for the initial pump-in phase when the pressure is lower than this level), a gas mixture which is pumped into the chamber at a flow rate 5 sccm comprised of XeF2 (10% by volume) and the buffer gas Ar (90% by volume). One can see from Figure 4 that for small gap sizes the etching times are quite close to the ones described above for the case of constant pressure, while the sacrificial layers of larger thickness are etched significantly slower because of a limited income of the etchant gas. Though the process rate limitation due to reactor design is low for a thin sacrificial layer, a large fraction of the etchant goes through the chamber without reaction (up to 99% for thickness 0.05 μm). Thus it is reasonable to decrease the input flow rate and slow down the process to improve etchant efficiency. We assumed the flow rate to be proportional to the volume of the sacrificial layer and obtained a moderate increase in the processing time while achieving a significant decrease in the amount of the etchant exhausted.

MODELING OF DRY ETCHING IN PRODUCTION OF MEMS 120

0.4 Etching time, 5 sccm flow rate Etching time, flow rate depends on gap size Efficiency, 5 sccm flow rate Efficiency, flow rate depends on gap size

0.3

80 0.2 60 0.1

40

20 0.01

Etchant gas efficiency

Etching time, min

100

221

0.0 0.1

1

Sacrificial layer thickness, mm

Figure 4. Dependency of the etching time on the sacrificial layer thickness for continuous-flow reactor for the case of the same flow rate for all thicknesses of the sacrificial layer and flow rate proportional to the volume of the sacrificial layer.

4.4. PULSE REACTOR We consider a pulse reactor containing an expansion chamber and a process chamber. The reactor operates according to the following scenario: the expansion chamber is filled with the etchant gas, after that it is disconnected from the etchant gas source and connected to the process chamber containing the sample; after a certain time (dwell time) both chambers are evacuated and the cycle repeats until the sacrificial layer is totally etched. The volumes of the expansion and process chambers are 2 dm3 and 1.5 dm3, respectively. The pressure in the process chamber at the beginning of each dwell is 1 Torr (i. e., the expansion chamber is filled to 1.75 Torr). The simulation results for different dwell periods are presented in Figure 5 (times of filling and evacuation are not included into the etching time). One can see that small dwell time ensures almost constant etchant gas pressure so that the results are close to the ones described in the Section 4.1. Similar to the case discussed for the continuous-flow reactor, a small dwell period yields minimal etching time, but consumes a large amount of the etchant. For better efficiency, a mode where the etchant gas pressure is decreased to a half or less in a dwell cycle may be an optimal balance between production rate and etchant efficiency.

A. RUSAKOV ET AL. 0.6

45

Etching time, min

40

Etching time, 10 min dwell Etching time, 15 min dwell Efficiency, 10 min dwell Efficiency, 15 min dwell

0.5 0.4

35 0.3 30

0.2

Etchant gas efficiency

222

0.1

25

0.0 0.01

0.1

1

Sacrificial layer thickness, mm

Figure 5. Dependency of the etching time on the sacrificial layer thickness for pulse reactor for different dwell periods.

5. Conclusions As MEMS technology begins to incorporate submicron scale mechanical components, a new factor becomes important for the etching process in manufacturing the device. That is related to transport limitation in small cavities which are produced while etching the sacrificial layer. At the same time it is necessary to consider this issue together with other problem constituents, particularly, reactor operating mode and parameters.

References 1. 2. 3. 4. 5. 6. 7. 8. 9.

H. F. Winters and J. W. Coburn, Appl. Phys. Lett. 34, 70 (1979). L. R. Arana, N. de Mas, R. Schmidt, A. J. Franz, M. A. Schmidt and K. F. Jensen, J. Micromech. Microeng 17, 384 (2007). B. E. Volland, Ph. D. Thesis, University of Kassel, 2004. V. K. Singh, E. S. G. Shaqfeh, and J. P. McVittie, J. Vac. Sci. Technol. B 10, 1091 (1992). I. V. Katardjiev, J. Vac. Sci.Technol. A 7, 3222 (1989). R. J. Hoekstra, M. J. Grapperhaus, and M. Kushner, J. Vac. Sci. Technol. A 15, 1913 (1997). B. Bahreyni and C. Shafai, J. Vac. Sci. Technol. A 20, 1850 (2002). S. Rauf, W. J. Dauksher, S. B. Clemens, and K. H. Smith: J. Vac. Sci. Technol. A 20, 1177 (2002). E. S. G. Shaqfeh and C. W. Jurgensen, J. Appl. Phys. 66, 4664 (1989).

MODELING OF DRY ETCHING IN PRODUCTION OF MEMS

223

10. H. F. Winters and J. W. Coburn, Appl. Phys. Lett. 55, 2730 (1989). 11. G. Kokkoris, E. Gogolides, A. G. Boudouvis, J. Appl. Phys. 91, 2697 (2002). 12. M. K. Abachev, Yu. P. Baryshev, V. F. Lukichev and A. A. Orlikovsky, Vacuum 43, 565 (1992). 13. B. E. Volland, I. W. Rangelow, Microelectronic Engineering 67–68, 338 (2003). 14. O. Rabinovych, A. Uvarov, D. Filenko, I.W. Rangelow, Appl. Phys. A 81, 1661–1666 (2005). 15. L. S. Hong, Y. Shimogaki, H. Komjyama, Thin Solid Films 365 (2000) 176.

XRD AND RAMAN STUDY OF LOW TEMPERATURE AlGaAs/GaAs (100) HETEROSTRUCTURES PAVEL SEREDIN∗, ANTON GLOTOV, AND EVELINA DOMASHEVSKAYA Voronezh State University, Universitetskaya pl., 1 394006, Voronezh, Russia, [email protected]

IVAN ARSENTYEV, DMITRY VINOKUROV, ALEKSEY STANKEVICH, AND ILYA TARASOV Ioffe Physical and Technical Institute, Polytekhnicheskaya, 26, 194021, St-Petersburg, Russia, [email protected]

Abstract Using methods of the X-ray diffraction and Raman backscattering were studied properties of AlGaAs/GaAs (100) MOCVD heterostructures which have been grown up at low temperature (LT). It is established, that dependence on Al concentration of AlGaAs solid solutions crystal lattice parameter does not submit to classical Vegard’s law, and values of parameters are less than at GaAs. Methods of Raman backscattering shown that at high concentration of a carbon acceptor atoms concentrate on defects of a crystal lattice of AlGaAs solid solution with formation of carbon nanoclusters is confirmed.

Keywords: Low temperature heterostructures, AlGaAs, XRD, Raman backscattering.

1. Introduction Epitaxial AlGaAs solid solutions which have been grown up on GaAs substrates represent the most coordinated on crystal lattice parameter heterostructure which has received a wide spreading and is one of the most used components in electronic and optoelectronic technology. AlAs–GaAs system are studying for a long time already and for today all basic properties of its semiconductor solid solutions are well known, and their various relations became reference information. However, as it was shown, influence of various factors, such as nonequilibrium thermodynamic processes in reactors, presence of deformation fields, arising as a

______

∗

Pavel Seredin, Voronezh State University, Universitetskaya pl., 1 394006, Voronezh, Russia, [email protected] E. Gusev et al. (eds.), Advanced Materials and Technologies for Micro/Nano-Devices, Sensors and Actuators, DOI 10.1007/978-90-481-3807-4_18, © Springer Science + Business Media B.V. 2010

225

226

P. SEREDIN ET AL.

result of the slightest mismatches of lattice parameters of a film and a substrate [1–3] etc. even in such well studied systems allow to receive essentially new properties in this type of heterostructures. Thus in a number of works it has been shown, that in heterostructures AlGaAs/ GaAs (100) at х ~ 0.50 formation of superstructure phase of AlGaAs2 is possible. The lattice of such ordering phase can be described as InGaAs2-type structure (Layered Tetragonal) [4] with [100] ordering direction. In this structure unit cell corresponds to two cells of sphalerite type, put against each other along axis c. The relation c/2a, observed in phase AlGaAs2 was ~0.997 and that does not contradict to literary data [5]. Reduction of lattice parameter in AlGaAs2 superstructure explained by the fact, that in ideal AlGaAs solid solution distribution of Al and Ga atoms in metal sublattice occurs statistically, and the lattice parameter represents average size of the crystal lattice for set of period cells. In a superstructure case chemical compound AlGaAs2 is formed. As a result of layerwise ordering arrangement of Al and Ga atoms in A3 sublattice there is a so-called tetragonal compression and parameter of AlGaAs2 phase c < 2аAl0.50Ga0.50As. Thus the parameter c is directed along normal to a plane (100), i.e. tetragonal compression of an unit cell occurred in a growth direction of epitaxial film. As for Vegards law, for solid solutions in AlAs–GaAs system literary data gives ambiguous information about its character (linear or nonlinear) [6, 7]. Thus it is important to notice, that dependence of crystal lattice parameter on concentration of embedded atoms for disordered homomorphic AlGaAs solid solutions, is submitted to linear Vegards law [2], and with growth of concentration of Al atoms lattice parameter increased concerning parameter of monocrystal GaAs substrate. Thus superstructural phase AlGaAs2 differed from GaAs if talk about parameter, and did not satisfy to existing Vegard’s law [2, 3]. Besides, occurrence of a superstructure phase is shown in complication of IRreflection spectra, and also in formation of ordered nanoshape on a heterostructure surface, with structurization step multiple to parameter of a crystal lattice of superstructure phase AlGaAs2. Thus, obtainment of new chemical compounds in AlAs–GaAs systems represents doubtless interest, and properties of such joints deserve careful studying by various methods as modification of fundamental А3В5 junctions should lead to change of the energy band gap width, possible transition from indirect to direct semiconductor, an inverse sequence of zones, complication of optical spectra as a result of removal of degeneration from statuses, etc.

2. Objects and research methods The tested samples representing AlGaAs/GaAs (100) heterostructures were grown with a research objective of autodoping processes for achievement of the maximum concentration of a carbon acceptor ~1019–1020 cm−3. Experiments were carried out

XRD AND RAMAN STUDY OF LOW TEMPERATURE

227

for this purpose at lowered temperature (LT) and minimum (3–5) a parity of 5 and 3 groups of elements depending on composition set of solid solution. Samples ЕМ1540, ЕМ1555, ЕМ1585 have been received on installation of MOCVD “EMCORE GS 3/100” in a vertical reactor with high speed of rotation of lattice holder. The temperature of lattice holder was kept up the 550ºС, 77Torr pressure in a reactor, 1,000 rpm speed of rotation of lattice holder. As initial reagents were used Ga (CH3)3, Al (CH3)3 and AsH3. The thickness and structure of grown layers have been defined with use of scanning electronic microscopy and the dispersive analysis. For comparison of properties of samples received by a new technique ЕМ1017 sample, grown up under normal conditions, was used. Structures, crystal lattice parameters and thickness of samples are resulted in Table 1. TABLE 1. Composition and thickness of solid solutions AlGaAs. Sample

Composition, x

Thickness d, μm

EM1017

0.50

~1.0

EM1540

0.00

~1.2

EM1555

0.60

~2.0

EM1585

0.40

~1.5

Structural quality of samples and determining of lattices parameters of solid solutions were carried out with use of x-ray diffraction on ARL X’TRA Thermo Techno with the high angular permission on CuKα1,2 radiation. Raman dispersion spectra received using Raman microscope Senterra Bruker with lines of excitation 532 nm and capacity of laser radiation 20 mW.

3. Results of researches and their discussion 3.1. X-RAY DIFFRACTION RESEARCHES Diffraction pattern of AlGaAs/GaAs (100) (sample ЕМ1585) epitaxial heterostructures is presented on Figure 1 in the range of angles 2θ: 20–120º. Apparently from the picture there are three reflexes which can be received from [100] orientation of growth of heterostructure: it is diffraction from planes (200), (400), (600). Any other additional reflections have not been received, that testifies formation of solid solutions with cubic sphalerite structure. Exact parameter value of a crystal lattice of solid solutions plays an important role, especially at further calculations of such quantities as internal pressure. Reduction of tool error to minimum in finding of diffraction angle of (using High Definition Diffraction), the highest accuracy in parameter definition can be reached

228

P. SEREDIN ET AL.

at use of last (distant) diffraction reflections. Therefore studying of composite structure and the structural quality, samples of heterostructures were investigated in this work on profiles of (600) diffraction lines in the range of angles: 109–111º. Accuracy of definition of interplane distances and lattice parameters is ~0.0001 Å.

Figure 1. XRD diffraction LT heterostructures ЕМ1585.

The lattice constant of solid solutions aυ taking into account elastic stresses in heteroepitaxial layer according to the linear theory of elasticity can be calculated as [3]: ⊥ a υAlGaAs = a AlGaAs

where

1 − υ AlGaAs 2υ AlGaAs ν + aGaAs 1 + υ AlGaAs 1 + υ AlGaAs

υ AlGaAs = xυ AlAs + ( 1 − x )υ GaAs

x – is composition of solid solution. On Figure 2a the pattern of X-ray diffraction from AlGaAs/GaAs (100) epitaxial heterostructure (sample ЕМ1017) is shown. The solid solution of this heterostructure is grown by MOCVD method under standard conditions. Apparently from the picture, diffraction from a (600) plane represents superimposing of two Kα1,2 doublets: the first, displaced towards smaller angles – from AlGaAl solid solution, the second – from monocrystal substrate GaAs (100). Decomposition of patterns to its components was performed with use of software package Sigma Plot 10, allowing minimizing errors of decomposition and to automize process of selection of a modeling profile. Modeling of an experimental diffraction profile

XRD AND RAMAN STUDY OF LOW TEMPERATURE

229

began with allocation of GaAs (100) substrate Kα1,2 – a doublet. For this purpose doublet from substrate GaAs (100) was deducted from the general pattern, considering, that epitaxial layer according to the small thickness ~1 μm is only slightly weakens Bragg reflection from the substrate since the half-value layer for our system is ~17 μm. After that from received diffraction pattern the solid solution was sorted out. On the basis of the received data the half-width of diffraction Kα1,2 – doublets has been defined and interplane distances were defined. Calculation of parameter of a crystal lattice of a solid solution taking into account internal stresses was accomplished according to expressions (1), and Poisson ratio used for calculations were are taken from literary data: υAlAs = 0.255 [8, 9], υGaAs = 0.312 [10]. The information received by the above described technique allow to make the conclusion that lattice parameter taking into account internal stresses for AlGaAs solid solution of ЕМ1017 sample satisfies to Vegard's law for AlAs–GaAs system [7]. Diffraction (600) patterns of heterostructures EM1540, ЕМ1555 and ЕМ1585, resulted on Figure 2b, d, were resolved into components Kα1,2 – doublets similarly. At sample ЕМ1540 that represents homoepitaxial GaAs/GaAs (100) heterostructure, Kα1,2 – the doublet from a film precisely coincides with a doublet from a substrate. Thus the half-width of the general diffraction pattern from heterostructure EM1540 remains invariable in comparison with the monocrystal plate GaAs (100) used as a substrate at growth of structures that testifies about dislocation-free mechanism of such type of growth and excellent interface of film lattices and substrate. As it is seen from Figure 2c, d diffraction from ЕМ1555 and ЕМ1585 samples also represents superimposing of doublets from substrate GaAs (100) and solid solution AlGaAs. However, unlike EM1017 heterostructure which have been grown up by a standard technique, arrangement of Kα1,2 – doublets of a film and a substrate at LT heterostructures considerably differs. Kα1,2 – the doublet from AlGaAs epitaxial solid solution is located from the big 2θ angles from GaAs (100) doublet. It is a consequence of such fact that AlGaAs crystal lattice parameter is less than GaAs (100) parameter. Calculation of lattice parameters considering internal stresses for LT epitaxial heterostructures has been accomplished with an assumption of that Poisson ratio for binary GaAs and AlAs compounds received by a new technique coincide with the factors resulted in [8–10]. The defined parameters are resulted in Table 2. The analysis of the received data allows to make a conclusion that lattice constant of AlGaAs solid solutions received at the LT do not coincide with parameters of a lattice of disordered solutions heaving the same structures proceeding from Vegard’s law resulted for system AlAs–GaAs [7]. However, it is necessary to notice, that with growth of concentration of Al atoms crystal lattice parameter of LT solution increases.

230

P. SEREDIN ET AL.

Figure 2. Profile of XRD pattern (600) for LT heterostructures (a) ЕМ1017, (b) ЕМ1540, (с) ЕМ1555, (d) ЕМ1585. Lines on figure: 1 – experimental data, 2 – calculated data, 3 – substrate GaAs (100), 4 – solid solution AlGaAs.

XRD AND RAMAN STUDY OF LOW TEMPERATURE

231

TABLE 2. Results of XRD analysis and X-ray microanalysis for investigated AlGaAs/GaAs (100) heterostructures. Sample

EM1017

EM1540

EM1555

EM1585

Half-width, Δθ°

AlxGa1−xAs

0.08

GaAs (100)

0.08

AlxGa1−xAs

0.06

GaAs (100)

0.06

AlxGa1−xAs

0.11

GaAs (100)

0.07

AlxGa1−xAs

0.18

GaAs (100)

0.06

Composition, x 0.51(0)

aν (Å) 5.6572 5.6532

0

5.6532 5.6532

0.47(8)

5.6492 5.6532

0.43(8)

5.6415 5.6532

3.2. RAMAN BACKSCATTERING However, reduction of lattice parameters for GaAs and AlGaAs at greater concentrations of acceptor impurity (carbon) may happen as a result of carbon embedding in metal sublattice [11, 12]. Therefore in the given investigation for studying of structural features of LT AlGaAs films formation with high concentration of carbon acceptor impurity the Raman spectroscopy has been used. As oscillatory spectra of a lattice of various layers are observed as combination of spectrum of each layer, using this tool we have possibility to study separate layers, not hurting structure with various laser lines of excitation with various depths of penetration. And secondly, bearing in mind that lattice fluctuations are very sensitive to the nearest atoms – we can investigate crystal structure and its quality in extremely small scale: in range of lattice parameter, and consequently use of Raman backscattering gives additional, new and sometimes more detailed information concerning properties and qualities of thin films. Depth of penetration of laser radiation with length of a wave λ = 532 nm and also effective depth of the analysis at Raman dispersion can be defined from a relation λ/2πk, where k – extinction factor. Accordingly in case of AlAs–GaAs system analysis such depth will be approximately 400 nm. It grants a right to say that using the given length of a wave of the laser for Raman dispersion we will receive the information only from LT layer. According to rules of selection, received from the Raman dispersion tensor analysis [13] for crystals with diamond structure at backscatter dispersion from (100) surfaces can be observed only LO phonons and occurrences of TO phonons is forbidden. On pictures 3a–d spectra of Raman dispersion in geometry x( y , z ) x for analyzed samples are presented.

232

P. SEREDIN ET AL.

Apparently from picture 3a the Raman spectrum of ЕМ1017 sample received at standard technology contains GaAs and AlAs longitudinal optical phonon modes − in a point (Г), localized nearby ~267 and ~380 cm 1 respectively. The mode of −1 fluctuations with frequency of ~195 cm can be correlated with occurrence in AlGaAs solid solution of longitudinal acoustic phonon LA localized in a point (L) of Brillouin zone. Experimental data concerned frequencies of longitudinal optical modes of the normal sample precisely correlate with literary experimental and calculated data [14, 15]. Spectrum of Raman dispersion of GaAs/GaAs (100) (sample EM1540) LT homoepitaxial structures contains only longitudinal optical phonons LO(Г) localized − ~293 cm 1 (Figure 3b). The received experimental data including the spectrum form for LT homoepitaxial sample testifies about non-dislocation the mechanism of such type of growth and excellent structural quality of a film. Raman spectra of LT EM1555 and ЕМ1585 heterostructures resulted in Figure 3c, d. They contain the same modes as heterostructure EM1017 which has been grown up by method MOCVD under standard conditions: longitudinal optical phonon modes AlAs LO(Г) and GaAs LO(Г) and longitudinal acoustic phonon LA (L). Frequencies of active phonon modes for sample EM1555 are the − − − following: ωGaAs LO(Г) ~ 250 cm 1, ωAlAs LO(Г) ~ 351 cm 1, ωLA(L) ~ 192 cm 1, and for − − sample ЕМ1585: ωGaAs LO(Г) ~ 253.5 cm 1, ωAlAs LO(Г) ~ 348.5 cm 1, ω LA(L) ~ 192.5 −1 cm . Comparison of experimental results concerning frequencies of active Raman fluctuations for AlGaAs LT solid solutions and similar data for AlGaAs films received on standard technology [14, 15] shows an appreciable difference in sizes of frequencies for homomorphous structures of solid solutions. This consequence of crystal lattice parameter reduction at epitaxial film which has been grown up at the LT [16] follows from the results of our previous work. The received experimental results about longitudinal optical phonon LO(Г) frequencies correlate with results of IR-spectroscopy in our previous investigation [5]. Occurrence of modes in area − ωp ~ 500 cm 1, presenting at spectra of LT ЕМ1555 and ЕМ1585 samples is connected with occurrence of plasma fluctuations acceptor impurity. Besides, as it is seen from Figure 3c, d for LT samples the dissymmetric forms of lines for AlAs LO(Г) and GaAs LO(Г) active optical phonons are representative, that also is comparable to the given data received by x-ray diffraction method at the previous stage of researches and testifies the deficiency of structure. It is important to notice, that presence of LA(X) longitudinal acoustic phonons in AlGaAs films received both by a standard technique and by LT technology cannot be explained from the point of view of the classical theory of Raman dispersion from a plane (100). Their emergence in the Raman spectrum can be explained by occurrence of structural disorder which appears at replacement of gallium atoms in metal sublattice by atoms of aluminum, especially in nearsurface layers as a result of arsenic reverse diffusion [15].

XRD AND RAMAN STUDY OF LOW TEMPERATURE

233

Figure 3. Raman backscattering spectra for epitaxial heterostructures AlGaAs/GaAs (100). (a) ЕМ1017, (b) EM1540, (c) EM1555, (d) EM1585.

For more information about influence of carbon acceptors on structure defects formation Raman dispersion spectra have been received in the range of − 1,000–1,600 cm 1. Results of these researches are resulted on inserts of Figure 3a, d.

234

P. SEREDIN ET AL.

Points designate experimental data, and a continuous line – the simulated average spectrum. As it is seen from graphs, only ЕМ1555 and ЕМ1585 LT samples in the − range of 1,000–1,600 cm 1 contain oscillatory modes. Occurrence of a mode with −1 frequency ~1,350 cm , attending in LT samples spectra, can be explained by occurrence in AlGaAs films of nanocrystalline graphite phase [17–19] arising most likely in places of defects of a crystal lattice. Concerning homoepitaxial LT heterostructures, following from the experiment, additional active modes do not arise. That confirms X-Ray data analysis about structural quality of the sample. However it is necessary to note luminescence occurrence in high-frequency area for homoepitaxial the sample.

4. Conclusion Analyzing the data received by x-ray diffraction, SEM, Raman and photoluminescence spectroscopy, it is possible to make important conclusions about structure of AlGaAs solid solutions which have been grown up by means of new technology. Epitaxial films of LT AlGaAs, as well as disordered solid solutions, have sphalerite structure that is well enough traced in case of growth of homoepitaxial GaAs/GaAs (100) structures. As from results of X-ray diffraction follows, the crystal lattices of a solid solution and a substrate are fine matched. However essential difference is that crystal lattice parameter of epitaxial films which have been formed at LT increases with growth of Al atoms concentration in metal sublattice, but it is still less, than at GaAs. This fact that contradicts to wellknown Vegard’s law [7]. This data received in the beginning from the analysis of x-ray diffraction results is proved also by the Raman backscattering, that shows frequencies of both intensities: TO and LO phonons of the basic modes. It is necessary to notice, that structure of LT solid solutions grown under normal conditions (temperature of growth 600–700°С, the parity of elements of the fifth and third groups ~100–200), does not coincide with a certain method of the X-ray microanalysis. Researches of structural quality of AlGaAs films, that similar to which are presented in our article, have been carried out in [11, 20] where samples on the basis of firm solutions AlGaAs have been received by molecular-beam method at LT (~250ºC). However, as it was shown in these works [11, 20], surplus of arsenic atoms which could form ordered clusters in the films thickness when crystal lattice parameter of LT AlGaAs was more than at normal solid solutions was observed. The subsequent annealing of films redistributed superfluous arsenic and led to parameter reduction to “normal” values for the given concentration. And here to explain that MOCVD growth of AlGaAs solid solutions received by us at the LT and the minimum parity of 5 and 3 groups of elements is accompanied by reduction of crystal lattice parameter, we should admit, that atoms of gallium in metal sublattice are not replaced with atoms of aluminium, and the

XRD AND RAMAN STUDY OF LOW TEMPERATURE

235

released places remain vacant. However for this purpose vacancies should be formed only in the centers of sphalerite lattices facets since only under such condition the parameter of a crystal lattice of a solid solution can be less than at GaAs. In favour of the given assumption several established facts testify. First, as it has been shown by a method of the X-ray microanalysis, in near-surface layers LT films small surplus of atoms of the gallium which probably has left from metal sublattice, but not replaced with aluminium is observed. Hereupon character of IRreflection from such films in comparison with spectra from disordered solid solutions has also changed as it can be seen from calculations of film – substrate model. And secondly, analyzing results of X-ray diffraction, it is possible to notice, that half-width of (600) diffraction lines from LT solid solutions considerably more than for a solid solution grown up by standard technology. As is known, halfwidth extension of diffraction lines can testify deficiency of structure. Thus, on the basis of the received results it is possible to assert, that thermodynamic conditions of epitaxial growth at the LT and minimum parities of elements of 5 and 3 groups, lead to that at concentration of atoms of aluminium 0<x <1 there is a formation of AlGaAs solid solution of subtraction. At epitaxial growth of LT technologies occurrence of structure reorganization with formation of solid solutions of subtraction is called thermodynamic by type of instability concerning spontaneous division into phases, and the elastic energy putting this mechanism in action, arises, most likely, owing to the requirement coherent (dislocation-free) interfaces of divided phases. Formation of chemical AlGaAs2 compound with smaller parameter than at GaAs at occurrence of superstructure phases [1–3] has been caused by kinetic transformations of solid solution, notably its division into phases under the influence of internal stresses of crystal lattice that has led to layerwise ordering of an arrangement of Al and Ga atoms in A3 sublattice and to tetragonal compression in a direction of crystal lattice growth. Proceeding from results of Raman spectroscopy it is shown that at high concentration of a carbon acceptor atoms concentrate on defects of a crystal lattice of AlGaAs solid solution with formation of carbon nanoclusters. Acknowledgements The scientific research is performed with support of the Russian Fund of Basic researches 09-02-97505-r_center_a, 09-02-90719-mob_st.

References 1. 2.

Domashevskaya, E.P., Gordienko, N.N. (et al.) Semiconductors 2008, vol. 42, no. 9, pp. 1069–1075. É. P. Domashevskaya, P. V. Seredin (et al.) Semiconductors, 2005, vol. 39, no. 3.

236 3. 4. 5. 6. 7. 8. 9. 10. 11. 12. 13. 14. 15. 16. 17. 18. 19. 20.

P. SEREDIN ET AL. E.P. Domashevskaya, P.V. Seredin, А.N. Lukin, L.A. Bityutskaya, M.V. Grechkina, I.N. Arsent’ev, D.A. Vinokurov, I.S. Tarasov. Surface and Interface Analysis., 8, 4 , 828 – 832 (2006). Zunger A. MRS-IRS bulletin/July 1997; http://www.sst.nrel.gov/images/mrs97. Pearson WB. Crystal Chemistry and Physics of Metals and Alloys. Wiley: New York (1972). Zemskov VS. Solid Solutions in Semiconductor System. Nauka: Moscow (1978). Yu. A. Goldberg, in Handbook Series on Semiconductor Parameters, Ed. by M. Levinshtein, S. Rumyantsev, and M. Shur,World Sci., London, 1999, vol. 2, p. 1. D. Zhou, B.F. Usher, J. Phys. D: Appl. Phys., 34, 1461 (2001). Wasilewski Z R, Dion M M, Lockwood D J, Poole P, Streater R W and Spring Thorpe A J. J. Appl. Phys., 81, 1683–94 (1997). Adachi S. J. Appl. Phys., 58, R1–29 (1985). S. Fleischer, C. D. Beling, and S. Fung. Journal of Applied Physics, 81, 1, 190–198 (1997). A. Gaber, H. Zillgen, P. Ehrhart, P. Partyka and R.S. Averback. Appl. Phys., 82, 5348 (1997). W. Hayes and R. Loudon. Scattering of Light by Crystals, John Wiley & Sons, New York (1978). M. Bulbul, G.D. Farran and S.R.P. Cmith. Eur. Phys. J. B, 24, 3, 6 (2001). B. Jusserand and J. Sapriel. Phys. Rev. B., 24, 7194 (1981). P.V. Seredin et al. “Structures and optical properties low temperature heterostructures AlGaAs/GaAs (100) on the basic of subtraction solid solutions”. Accept to publication in “Semiconductors”. Raman studies of heavily carbon doped GaAs. Moonsuk Seon Dissertation. Texas Tech University (1999). A.J. Moll. E.E. Haller, J.W. Agedll. and W. Walukiewicz. Appl Phys. Lett. 65:1145 (1994). J. Wagner, R.C Newman, B.R. Davidson, S.P. Westwater, T.J. Bu Uough, T.B. Joyce, C.D. Latham, R. Jones, and S. Oberg. Phys. Rev. Lett.. 78:74 (1997). A.V. Boitsov, N.A. Bert, V.V. Chaldyshev, V.V. Preobrazhenskii, M.A. Putyato and B.R. Semyagin. Semiconductors, 43, 2, pp. 266–268 (2009).

INTERNAL STRESSES IN MARTENSITE FORMATION IN COPPER BASED SHAPE MEMORY ALLOYS OSMAN ADIGUZEL Firat University, Department of Physics 23169 Elazig/Turkey, E-mail: oadiguzel@ firat.edu.tr

Abstract Shape memory alloys constitute a class of materials called smart materials which exhibit an unusual property, shape memory effect. The behaviour of these materials is evaluated by the structural changes caused by internal stresses in microscopic scale. Copper based alloys exhibit this property in β-phase field. Shape memory alloys undergo a solid state phase transition, martensitic transition by means of lattice invariant shears and Bain distortion on cooling from high temperatures. Both distortions are caused by the internal stresses in the material. The lattice invariant distortion involves the introduction of stacking sequences on one of the close packed {110}β planes of matrix called martensite basal plane. The formation and evolution of the layered structure in copper based ternary shape memory alloys consist of lattice invariant shears and shear mechanism. Shape memory elements cycle between the deformed and undeformed shapes against the temperature changes while using in the devices. These alloys can be used as actuator or sensor due to this property.

Keywords: Martensitic transition, shape memory effect, Bain distortion, layered structures, internal stresses, shear stress, thermoelasticity, superelasticity.

1. Introduction Shape memory alloys constitute a class of materials called smart materials which exhibit an unusual property, shape memory effect. The behavior of these materials is evaluated by the structural changes caused by internal stresses in microscopic scale depending on the external conditions. Shape memory alloys are attracting much attention recently as smart materials as well as functional materials. Shape memory alloys are also promising candidates for actuators because of the significant forces and displacements that result on actuation [1].

E. Gusev et al. (eds.), Advanced Materials and Technologies for Micro/Nano-Devices, Sensors and Actuators, DOI 10.1007/978-90-481-3807-4_19, © Springer Science + Business Media B.V. 2010

237

238

O. ADIGUZEL

The shape memory effect is linked to martensitic transformation that takes place from an ordered β-phase structure (the parent phase) to the several types of close packed structures (the martensitic phase) [2]. The shape memory alloys possess two unique abilities: the capacity to recover large strains and to generate internal forces during their activation. The basis of this phenomenon is the stimulus-induced phase transformations, martensitic transitions, which govern the remarkable changes in internal crystalline structure of materials [1–5]. In the shape memory alloys, the austenite lattice has a higher order of symmetry than that of martensite. More than one martensite variant can be induced from one austenite. Martensite variants have identical crystal lattice, but are oriented in different directions [2]. The relationship of microstructures in shape memory alloys is essential for a better understanding of the mechanism using the basic characteristic of shape memory alloys. The basic characteristic of shape memory alloys is the occurrence of different variants in the low temperature martensitic phase. The martensitic transformation is a shear-dominant diffusionless solid-state phase transformation, and when a shape memory alloy undergoes a martensitic phase transformation, it transforms from the parent phase to one or more of the different variants of the martensitic phase [3, 4]. In the absence of applied stresses, the variants of the martensitic phase usually arrange themselves in a self-accommodating manner through twinning, resulting in no observable macroscopic shape change [3, 4]. By applying mechanical loading the martensitic variants are forced to reorient (detwin) into a single variant leading to large macroscopic inelastic strains. The multiple martensite variants begin to convert to single variant, the preferred variant determined by alignment of the habit planes with the axis of loading [3–7]. Shape memory alloys have another property, superelasticity (SE) or pseudoelasticity (PE) [3–5]. If the sample is stressed at a temperature above Af, (austenite finish temperature), a similar result is reached, and this behaviour is called superelasticity or pseudoelasticity, whose mechanism is schematically illustrated in Figure 1 [3, 5]. The superelastic SMA has the unique capability to fully regain the original shape from a deformed state when the mechanical load that causes the deformation is withdrawn. For some superelastic SMA materials, the recoverable strains can be on the order of 10% [5, 8]. Superelasticity (SE) depends on the stress-induced martensitic transformation (SIMT), which in turn depends on the states of temperature and stress of the SMA. Since the martensitic transformation occurs by a shear-like mechanism, it is possible to induce it even above Ms (martensite start temperature) by applying external stress. This behaviour also is called a stress-induced martensitic transformation [2–7]. It is also possible to stress-induce the transformation even above Af (austenite finish temperature), if

INTERNAL STRESSES IN MARTENSITE FORMATION

239

Figure 1. Schematic illustration of the mechanism of the shape-memory effect and superelasticity, solid lines represent the shape-memory path and dotted lines represent the superelasticity path [3, 5].

slip does not occur under the applied stress. However, the martensite is completely unstable at a temperature above Af in the absence of stress. Thus, the reverse transformation must occur during unloading [3]. β phases of copper-based alloys have the A2-type disordered structures at high temperatures and undergo the ordered structure with B2, DO3 or L21 type superlattice with disorder–order transition on cooling, and these ordered structures also transform into martensite with further cooling. The basic β-phase structures are schematically illustrated in Figure 2. Considerably attention has been devoted in the last five decades to the shape memory effect which is manifest as the ability of the materials to recover their original shape upon heating [1–6]. The origin of this phenomenon lies in the fact that the material changes its internal crystalline structure with changing temperature. These alloys are easily deformed into any shape at low temperature, but a short heating is sufficient to bring them back to the original shape. On the other hand, martensitic transformations have diffusionless character, and product martesite inherits the order of the parent phase due to the displacive nature of transformation [5, 6]. The bcc(β) → (9R or 18R) phase transformation is clearly analyzed by the lattice deformation mechanism. This mechanism can be described as follow: Starting from the long range order β−phase, an fct cell is delineated as a first step in matrix,

240

O. ADIGUZEL

Figure 2. Basic β-phase structures: (a) ordinary bcc (A2), (b) CsCl-type unit cell (B2), (c) a half Cu3Al–(DO3)-type unit cell, (d) a half Cu2 AlMn (L21)-type unit cell (Heusler alloy).

and this cell undergoes to the corresponding fcc lattice with Bain distortion which consists of an expansion of 26% parallel to [001] β axis and a compression of 11% normal to this axis as seen from Figure 3. The β-type martensites have the layered structures which consist of an array of close-packed planes. Formation of the layered structures and sequence of β to 8R martensite transformation is shown in Figure 4. The layered structures are characterized by the stacking sequences depending on the order in parent phase. Internally faulted martensites in Cu–Zn–Al alloys are characterized by a long period stacking order such as the 9R or 18R type structures, depending on the number of close-packed layers in the unit cell. Copper based ternary alloys have the DO3 (or L21)-type superlattice prior to the transformation, and stacking sequence is AB′CB′CA′CA′BA′ BC′BC′AC′AB′ (18R) in martensitic case. Monoclinic distortion takes place in some cases and 18R structure is modified as M18R [4, 6]. It has been reported that the basal plane of 18R martensites originates from one of the {110}β planes of the matrix and the inhomogeneous shear occurs on the basal plane in two opposite directions (a <1 1 0> direction and its opposite) [6–10]. Both Bain distortion and inhomogeneous shears are caused by internal stresses or forces in the material.

INTERNAL STRESSES IN MARTENSITE FORMATION

241

Figure 3. (a) bcc (B2-type ordered) unit cell and delineated fct unit cell, (b) Bain distortion on the delineated unit cell and (c) formation of fcc unit cell by Bain distortion.

The fundamental structures of the β-type martensites are orthorhombic closepacked structures which consist of an array of close-packed planes as shown in Figure 4.

2. Experimental details Two copper based ternary shape memory alloys were selected for investigation: a CuZnAl alloy with a nominal compositions by weight of 26.1%zink, 4%aluminium, the balance copper, while the other was a CuAlMn alloy with a nominal composition by weight of 11% aluminium, 6% manganese and the balance copper. Both alloys were supplied in the form of extruded wires by Delta Materials Research Ltd, Ipswich, UK. The martensitic transformation temperature of these alloys is over the room temperature and both alloys are entirely martensitic at room temperature. Specimens obtained from these alloys were solution treated for homogenization in the β-phase field (15 min at 830°C for CuZnAl and 20 min at 700°C for CuAlMn alloy), then quenched in iced-brine to retain the β-phase and aged at room temperature.

242

O. ADIGUZEL

Figure 4. (a) Stacking of (110)β planes viewed from [001]β direction, (b) atomic configuration on first and second layers of (110)β plane in DO3 – type structures, (c) inhomogeneous shear and formation of layered structures, stacking sequences of half 18R or M18R unit cell in direction z, (d) atomic configuration on planes A and B which are the first two layers of 18R structure.

Powder specimens for x-ray examination were prepared by filling the alloys. These specimens were also heated in evacuated quartz tubes and immediately quenched into iced-brine for homogenisation. X-ray diffraction profiles were taken from the quenched specimens using Cu-Kα radiation with wavelength 1.5418 Å. The scanning speed of the Geiger counter was chosen as 2°, 2θ/min for the diffractograms. Specimens for TEM examination were prepared from 3 mm diameter discs and thinned down mechanically to 0.3 mm thickness. These specimens were heattreated for homogenization at 830°C for 15 min and quenched into iced-brine to obtain β-type martensite. The quenched disc-shaped specimens were electropolished in a Struers Tenupol-2 instrument at –20°C in a solution of 20% nitric acid in methanol, and examined in a JEOL 200CX electron microscope operated at 160 kV.

3. Results and discussion When the copper based β-phase alloys are cooled below a critical temperature called martensite start temperature, Ms, the martensitic transformation occurs and martensite forms as plates in groups of variants. It enables the shape memory alloys to deform under low stresses by variant coalescence because the total shape change on transformation becomes nearly zero for the group [4].

INTERNAL STRESSES IN MARTENSITE FORMATION

243

Product martensite phase including 24 single crystal of martensite undergoes the single crystal of parent phase as a reverse transformation on heating over the austenite finish temperature. variants undergoes the single martensite on crystal of stressing in martensitic condition, and deformed This single crystal retransform to the 24 martensite variants on cooling below Ms. The mechanism of this formation is schematically illustrated in Figure 1 [3, 5]. On the other hand, a single variant of martensite cannot have a coherent interface with the austenite. However a region consisting of fine twins of two martensitic variants can form a coherent interface with the austenite [11]. It has been reported that some copper based ternary alloys (cubic → monoclinic transformation) exhibit an undeformed interface between austenite and a single variant of martensite [12]. A typical x-ray powder diffraction profile taken from the CuAlMn specimen in as-quenched case is shown in Figure 5.

Figure 5. An x-ray powder diffractogram taken from CuAlMn alloy after quenching.

This diffractograms which exhibits superlattice reflection has been indexed on the monoclinic M18R basis. Two electron diffraction patterns taken from the quenched samples of CuZnAl and CuAlMn alloys are also shown in Figure 6a, b. X-ray diffractogram and electron diffraction patterns reveal that both alloys exhibit superlattice reflections. Many x-ray diffractograms have been taken from both of the alloy samples in a long time interval, and some changes in peak characteristics on the diffractogram with aging duration have been observed. Although all of the diffractograms exhibit similar properties, it was observed that peak locations of some diffraction planes have changed. In particular, some of the neighbor peak pairs have moved toward each other. It is interesting that miller indices of these plane pairs provide a special relation: h12 − h22 / 3 = k 22 − k12 / n where n = 4 for 18R martensite [13]. These plane pairs can be listed as follow: (122)–(202), (128)–(208), (1 2 10)–(2 0 10),

(

)

(

)

244

O. ADIGUZEL

(040)–(320). This observation can be attributed to a relation between interplane distances of these plane pairs.

Figure 6. Electron diffraction patterns taken from the quenched samples of CuZnAl and CuAlMn Alloys.

When the martensite is transformed from the parent phase with differently ordered states such as B2 or DO3, the close-packed plane may consist of atomic sites with different sizes due to the ordering arrangement. The different sizes of atomic sites lead to a distortion of the close-packed plane from an exact hexagon and thus a more close-packed layered structure may be expected. The martensitic phase in copper-based β-phase alloys is based on one of the {110}β planes of parent phase called basal plane for martensite. On the other hand, (110)-type planes of the parent phase are rectangular in original case, and it transforms to a hexagon with hexagonal distortion. The detailed explanation and illustration related to these distortions has been given elsewhere. Structural ordering is one of the important factors for the formation of martensite, and atom sizes have an important effect on formation of ordered structures [4, 10, 13]. The martensite basal plane (110)β has an ideal hexagonal form in case atom sizes of alloying elements are equal, and it undergoes a hexagonal distortion in case atom sizes are different [13]. In the disordered case, sublattices are occupied randomly by atoms, and the basal plane becomes ideal hexagon taking the atomic sizes approximately equal. In the ordered case, sublattices are occupied regularly by certain atoms which have different atomic sizes, and basal plane undergoes a hexagonal distortion owing to the differences in atom sizes [13]. Metastable phases of copper-based shape memory alloys are very sensitive to the ageing effects, and any heat treatment can change the relative stability of both martensite and parent phases. The martensitic transformation obtained on cooling is also called thermally induced phase transformation with which a single crystal of the β phase turns into martensite. The obtained martensite consists of up to 24

INTERNAL STRESSES IN MARTENSITE FORMATION

245

variants, which are regions of the same structure but with different crystallographic orientations [14, 15]. CuZnAl alloys and other copper-based shape memory alloys exhibit a tendency to martensitic thermal stabilization. During the stabilization process, the pinning of martensitic variants can take place only in thermally induced martensite, while the atom rearrangement can take place in both thermal- and mechanical-induced martensite [14]. For stress-induced martensite, the stabilization manifests as a decrease of the stresses at which the reverse transformation takes place. Martensite stabilization is closely related to the disordering in martensitic state. Although martensitic transformations are diffusionless, the disordering reaction occurring with the ageing treatment has a diffusional character because this transition requires a structural change and this also gives rise to a change in the configurational order. Since stabilization is a diffusional process, the lowering of the reverse transformation stress depends on stabilization temperature, stabilization time and thermal treatment [13–15].

4. Conclusions The behaviour of shape memory alloys is evaluated by the structural changes in microscopic scale. Metastable β phases of copper-based ternary alloys are very sensitive to the heat treatments and transform martensitically from the ordered structures to the long-period layered structures on cooling. Martensitic transformations occur by means of a shear-like mechanism, and structural and fundamental properties of these alloys are altered by aging in the martensitic state. The ageing gives rise to the structural changes in both long and short-range order in material. On the basis of austenite–martensite relation, the basal plane of 9R (or 18R)-type martensite originates from one of the {110}β planes of the parent phase, and a homogenous shear occurs in two opposite directions. The basal plane of martensite is subjected to the hexagonal distortion by means of Bain distortion, and atom sizes have important effect in martensite formation. In case the atoms occupying the lattice sites have the same size, the basal plane of martensite becomes regular hexagon. Otherwise the deviations occur from the hexagon arrangement of the atoms in case atom sizes are different.

References 1. 2. 3. 4. 5. 6.

S. Buttgenbach et al., Microsystem Technologies, 7 (4), 165–170 (2001). J.J. Zhu AND K.M. Liew, Acta Materialia, 51(9), 2443–2456 (2003). K. Otsuka and T. Kakeshita, MRS Bulletin, 27(2), 91–100 (2002). P. Popov and D. C. Lagoudas, International Journal of Plasticity, 23(10–11), 1679–1720 (2007). M. A. Rahman, Recent Patents on Mechanical Eng., 1, 65–67 (2008). K.Otsuka and X.Ren, Prog. Mater. Sci. 50, 511–678 (2005).

246 7. 8. 9. 10. 11. 12. 13. 14. 15.

O. ADIGUZEL E.S.Lee and S. Aln, Acta materialia, 46 (12), 4357–4368 (1998). R. Wang et all, Acta Materialia, 50 (7), 1835–1847 (2002). N. Zarubova and V. Novak, Mat. Sci. and Eng., A378 (1–2), 216–221(2004). R. D. James and K. F. Hane, Acta Materialia, 48 (1), 197–222 (2000). C. Lexcellent an P. Blanc, 2004, Acta Materialia, 52(8), 2317–2324 (2004). K.F. Hane., J. Mech Phys Solids, 47(9), 1917–1939 (1999). O. Adiguzel, Materials Research Bulletin, 30 (6), 755–760 (1995). M. Stipcich and R. Romero, Mat. Sci. and Eng., A437 (2), 328–333 (2006). L. Pelegrina , R. Romero, Mat. Sci. and Eng., A282(1–2), 16–22 (2000).

SENSORS

SMART SENSORS: ADVANTAGES AND PITFALLS

PADDY JAMES FRENCH EI-EWI-DIMES, TUDelft, Mekelweg 4, 2628CD Delft, The Netherlands Tel +31-15-2784729, e-mail: [email protected]

Abstract For almost 50 years, silicon sensors have been on the market. There have been many examples of success stories for simple silicon sensors, such as the Hall plate and photo-diode. These have found mass-market applications. The development of micromachining techniques brought pressure sensors and accelerometers into the market and later the gyroscope. These have also achieved massmarket. The remaining issue is how far to integrate. Many of the devices on the market use a simple sensor with external electronics or read-out electronics in the same package (system-in-a-package). However, there are also many examples of fully integrated sensors (smart sensors) where the whole system is integrated into a single chip. If the application and the device technology permit this, there can be many advantages. A broader look at sensors shows a wealth of integrated devices. The critical issues are reliability and packaging if these devices are to find the applications. A number of silicon sensors and actuators have shown great commercial success, but still many more have to find their way out of the laboratory. This paper will examine the development of the technologies, some of the success stories and the opportunities for integrated Microsystems as well as the pitfalls.

Keywords: Smart sensors, silicon processing, integration.

1. Introduction Early silicon sensors were non-integrated and contained external read-out electronics. The simplest solution, when integrating sensors, is when the sensor can use layers already used in the electronics. Magnetic sensors based on Hall plates are good examples of these, although issues such as exposure of the electronics to the magnetic field need to be considered. However, many examples can be found where special processing has been added to standard processing to make integrated devices. In the cases where additional process steps are required they can be performed as pre-processing, integrated processing or post-processing. All have their advantages and disadvantages and have to be considered in each case.

E. Gusev et al. (eds.), Advanced Materials and Technologies for Micro/Nano-Devices, Sensors and Actuators, DOI 10.1007/978-90-481-3807-4_20, © Springer Science + Business Media B.V. 2010

249

250

P.J. FRENCH

Pre-processing + No access to process line necessary + No thermal limitations for additional processing – Potential contamination problems Integrated processing + Flexibility – Require access to the clean line – Limitations on materials Post-processing + Flexibility in materials used + Fewer contamination problems – Limited thermal budget This paper will consider a number of technologies and the integration issues and show examples of integrated sensors.

2. Micromachining technologies In the field of micromachining, the development of anisotropic wet etching techniques allowed the fabrication of membranes with accurate dimensions [1]. Some early devices used isotropic etchants, but these were difficult to control. The structure of the devices is determined by the crystal structure of silicon, which can limit the shape of structures that can be fabricated. Dry etching techniques do not have these crystallographic limitations, but the processing costs are higher. Surface micromachining uses thin films deposited on the surface of the wafer. Early examples of this technique can be found in the mid 1960s [2] although the great expansion of the process came in the 1980s using polysilicon [3, 4]. 2.1. BULK MICROMACHINING Most wet micromachining processes use anisotropic, such as KOH, TMAH, hydrazine or EDP. Two examples of these structures etched in (100) silicon are given in Figure 1. This process is a low temperature process (about 80–90°C) and can therefore easily be combined with electronics by using post processing. However, KOH presents greater contamination problems and should be used as a post-processing step. If the anisotropic etching is to be done earlier in the processing, TMAH may be a better option. Alternatively, vertical walls with a high aspect ratio can be achieved with macro-porous silicon. This is an anodic etch process in HF [5]. An example of the high aspect ratio that can be achieved is given in Figure 2.

SMART SENSORS: ADVANTAGES AND PITFALLS

251

Figure 1. Two examples of bulk micromachined structures.

Figure 2. (Left) vertical holes-reproduced with kind permission Fred Roozeboom Philips and (right) free standing structure [6].

This process is usually used in n-type material [6], although p-type can be used with an alternative etchant [7]. Furthermore, the width of the holes can be controlled using light intensity. Therefore, increasing the light intensity after a given time can increase the hole width at the tip to create free-standing structures (Figure 2 right), which is a free-standing mass supported by a cantilever. Deep reactive ion etching (DRIE), addressed some of the limitations of wet etching, although the process is more expensive. Two available processes are cryogenic [8] and Bosch processes [9]. The cryogenic process works at –100°C and uses oxygen to continually passivate the sidewall during etching to maintain vertical etching. The Bosch process uses a switching between isotropic etching, passivation and ion bombardment. This results in a rippled sidewall, although recent developments allow faster switching without losing etch-rate, thus significantly reducing the ripples. The etching can be performed from both front and back-side and can be combined with the electronics. An example of one of these structures is given in Figure 3. These processes can be performed on fully processed wafers, although care has to be taken to avoid unwanted charging.

252

P.J. FRENCH

Figure 3. Optical waveguide manufactured using RIE. Emile van der Drift – DIMES.

2.2. SURFACE MICROMACHINING Surface micromachining involves the deposition of thin films on the substrate surface and selectively removing one or more layer to create free standing structures. This basic process is illustrated in Figure 4. The process can be further expanded to produce multiple mechanical layers to yield more complex mechanical structures.

Figure 4. Surface micromachining process, (ia) deposition and patterning of sacrificial layer, (ib) deposition and patterning of mechanical layer and (ic) sacrificial etching, (ii) lateral view of typical structures.

There are a number of choices for both sacrificial and mechanical layers and some examples are listed in Table 1.

SMART SENSORS: ADVANTAGES AND PITFALLS

253

TABLE 1. Examples of sacrificial and mechanical layers with a suitable etchant. Sacrificial layer

Mechanical layer

Sacrificial etchant

Silicon dioxide

Polysilicon, silicon nitride, silicon carbide

HF

Silicon dioxide

Aluminium

Pad etch, 73% HF

Polysilicon

Siliocn nitride, silicon carbide

KOH

Polysilicon

Silicon dioxide

TMAH

Resist, polymers

Aluminium, silicon carbide

Acetone, oxygen plasma

For the mechanical layer it is usually desirable to have low tensile stress with a low stress profile, combined with good mechanical strength.

2.2.1. Using existing layers This approach has the advantage of simplicity since no extra layers are required. An example of this is given in Figure 5. The first approach (Figure 5a) uses the gate poly. The disadvantage of this approach is that the gate-poly process is not usually designed for optimum the mechanical properties, although if it is possible to achieve good mechanical properties, this can be a simple approach. The second approach (Figure 5b) uses the metal and passivation layers. This combination can result is stress profiles, which leads to curling of structures. The approach of the researchers was to accept this problem and design around it.

Figure 5. Using existing layers (a) using the gate poly [10] and (b) using the metal and passivation layers [11].

2.2.2. Pre-processing One example of pre-processing comes from Sandia laboratories in the US. The mechanical structures are formed in an etched pit, after which the hole is filled with oxide and the wafer planarised. The wafer is then ready for standard CMOS processing [12]. This can also be a simple approach as long as the wafers are acceptable for the CMOS cleanroom after surface micromachining. Furthermore, it is important that the mechanical properties of the mechanical layer are still suitable after the high thermal budget of a CMOS process [13] (Figure 6).

254

P.J. FRENCH

Figure 6. An example of pre-processed surface micromachining [12].

2.2.3. Integrated process The integrated process involves taking the wafers out of the line to perform additional steps for the micromachining and then returning to the process line for the electronics. This process requires full integration of the IC and micromachining processes. The thermal budget is also limited to avoid the characteristics of the electronic circuitry from being changed by the micromachining processing. This process has been successfully applied using polysilicon as a mechanical layer [14].

2.2.4. Post processing The post processing approach usually has the most limited thermal budget since most processes use aluminium for metallisation. A way around this problem is to use another metal, as shown in Figure 7.

Figure 7. Post-processing approach using an alternative metal layer [15].

Post-processing using aluminium metallisation can also be used as long as the processing temperature is maintained below 400°C. This can be achieved using a number of layers, such as polymers, metals or PECVD layers. Polymers can often be used as sacrificial layers and have the advantage that they can be removed in oxygen plasma. Metals (sputtered, evaporated and electroplated) have successfully been used as mechanical layers and have the advantage

SMART SENSORS: ADVANTAGES AND PITFALLS

255

of having high conductivity. However, they do not always have good mechanical properties. The use of plasma enhanced chemical vapour deposition (PECVD) enables the process temperature to be greatly reduced. In general their mechanical properties are inferior to their low pressure counterparts (LPCVD), but PECVD silicon carbide has been shown to have excellent mechanical properties and has been successfully used to produce structures such as pressure sensors [16] and accelerometers [17].

3. Integrating sensors and electronics A mentioned above there are a number of issues concerning the integration of the sensor structures with the electronics. These are discussed below. 3.1. COMPATIBILITY WITH THE CLEANROOM Most of the processes listed above use standard IC materials. However, the use of etchants such as KOH, or metals such as gold, will results in cleanroom contamination. This issue can be addressed only if the micromachining is performed as a post processing step. 3.2. COMPATIBILITY OF THE PROCESSING The main issue with process compatibility is the thermal budget. Both ICs and mechanical structures can be very sensitive to any additional thermal process. 3.3. YIELD A major issue in industrial application is the yield. Standard IC processing has been developed to have a high yield. Any additional processing can potentially reduce yield, which will increase your overall cost. 3.4. APPLICATION ISSUES In the above sections the issues of fabrication have been discussed. It also has to be seen whether the application can benefit from integration. High temperatures operations may not benefit from integration. In some applications, the integrated option may be too expensive. However, if the above issues can be addressed there can be great benefits from integration.

256

P.J. FRENCH

4. Integrated sensor examples Above was mentioned that a Hall plate was a good example of an integrated sensor, since the sensor itself can be fabricated in standard electronics. The Hall plate can use the n-well in CMOS or the epi-layer in bipolar. The spinning Hall structure reduces offset and is ideally suited for integration. Such an example is given in Figure 8.

Figure 8. Spinning Hall plate with integrated multiplexing and bus interface [18].

A second example is a temperature sensor, which uses a simple p-n junction as the sensor. The accuracy is achieved in the electronics and also ensures the communication with the bus-system (Figure 9).

Figure 9. Chip photograph of a smart temperature sensor chip with bus interface [19–20].

SMART SENSORS: ADVANTAGES AND PITFALLS

257

A further example of sensor integration is given in Figure 10. On the left is the basic sensor with heaters and thermopiles for measuring temperature differences. On the right is the integrated version, which contains all power management, readout and A-D conversion. Although the chip is more expensive, the total system is much cheaper and more efficient.

Figure 10. Two wind-sensors (left) non integrated and (right) fully integrated [21].

All of the above examples used standard electronics processing and therefore have very few yield issues. A second example is the accelerometer from Analog devices, as shown in Figure 11. The major breakthrough for silicon accelerometers in the automotive market was the ability to self-test. This device can test itself each time the car is started and confirm whether the device is functioning correctly. For applications

Figure 11. The Analog Devices integrated accelerometer, (left) a 2-D accelerometer, (right) a 1-D device with indication of the different circuitry. Copyright Analog Devices, Inc. All rights reserved.

258

P.J. FRENCH

such as airbags, this option is of particular interest. In addition, the device contains all the read-out electronics and gives a digital output. A further example of a successful product with integration is the TI chip for projection displays. This chip contains a large array of micromechanical mirrors and is a fully integrated system.

5. Conclusions The road to developing integrated sensors can be a complicated one, but the benefits can be significant. There is no simple answer to all application and each case needs to be examined in its own right to decide the best path. Acknowledgements The author would like to thank many colleagues in DIMES for their input, the Dutch Science Foundation STW for their sponsoring of many of the work performed in Delft and also the colleagues around the world who have given permission to use figures.

References 1.

K.E. Bean, Anisotropic etching of silicon, IEEE Trans Electron Devices, ED-25, (1978), pp. 1185–1193. 2. H.C. Nathanson and R.A. Wickstrom, A resonant-gate silicon surface transistor with high-Q band pass properties, Appl. Phys. Lett., 7, (1965), p. 84. 3. R.T. Howe and R.S. Muller, Polycrystalline and amorphous silicon micromechanical beams: annealing and mechanical properties, Sensors and Actuators, 4, (1983), pp. 447–454. 4. L-S. Fan, Y-C. Tai and R.S. Muller, Pin joints, gears, springs, cranks and other novel micromechanical structures, Proceedings Transducers 87, Tokyo, (1987), pp. 849–852. 5. V. Lehman, Porous silicon – a new material for MEMS, Proc. IEEE MEMS Workshop ’96, San Diego, USA (1996) pp. 1–6. 6. H. Ohji, P.J. Trimp and P.J. French, Fabrication of free standing structures using a single step electrochemical etching in hydrofluoric acid, Sensors and Actuators, A: Physical 73 (1999) pp. 95-100. 7. H. Ohji, P.J. French and K. Tsutsumi, Fabrication of mechanical structures in p-type silicon using electrochemical etching, Sensors and Actuators A: Physical 82 (1–3) (2000) pp. 254– 258. 8. G. Craciun, M. Blauw, E. van der Drift and P.J. French, “Aspect ratio and crystallographic orientation dependence in deep dry silicon etching at cyrogenic temperatures”, Proceedings Transducers 01, Munich Germany, June 2001. 9. F.Laemer, A.Schilp, K.Funk, M.Offenberg, Bosch deep silicon etching: improving uniformity and etch rate for advanced MEMS applications, Proc. IEEE MEMS 1999 Conf., Orlando, FL, USA (1999). 10. C. Hierold, A. Hilderbrandt, U. Näher, T. Scheiter, B. Mensching, M. Steger and R. Tielert, A pure CMOS surface micromachined integrated accelerometer, Proceedings MEMS 96, San Diego, USA 1996, pp. 174–179.

SMART SENSORS: ADVANTAGES AND PITFALLS

259

11. G.K. Fedder, S. Santhanan, M.L. Read, S.C. Eagle, D.F. Guillou, M.S.-C. Lu and L.R. Carley, Laminated high-aspect ratio microstructures in a conventional CMOS process, Proceedings MEMS 96, San Diego, USA, Feb 1996, pp. 13–18. 12. J.H. Smith, S. Montague, J.J. Sniegowski, J.R. Murray, R.P. Manginell and P.J. McWhorter, “Characterisation of the embedded micromachined device approach to the monolithic integration of MEMS with CMOS”, Proceedings SPIE Micromachining and Microfabrication Process Technology II, Austin, Texas, USA, October 1996, vol 2879, pp. 306–314. 13. Y.B. Gianchandani, M. Shinn and K. Najafi, “Impact of long high temperature anneals on residual stress in polysilicon”, Proceedings Transducers’97, Chicago, USA, June 1997, pp. 623–624. 14. B.P. van Drieënhuizen, J.F.L. Goosen, P.J. French, Y.X. Li, D. Poenar and R.F. Wolffenbuttel, Surface micromachined module compatible with BiFET electronic processing, Proceedings Eurosensors 94, Toulouse, France, September 1994, p. 108. 15. J.M. Bustillo, G.K. Fedder, C.T.-C. Nguyen and R.T. Howe, Process technology for the modular integration of CMOS and polysilicon microstructures, Microsystem Technology, 1, (1994), pp. 30–41. 16. L S Pakula, H Yang, H T M Pham, P J French and P M Sarro, “Fabrication of a CMOS compatible pressure sensor for harsh environments”, J. Micromech. Microeng., 14, (2004), pp. 1478–1483. 17. H. Yang, L. Pakula and P.J. French, “A novel operation mode for accelerometers”, Proceedings Pacific Rim Workshop on Transducers and micro/nano technologies, Xiamen, China 22–24 July 2002, pp. 303–306. 18. A. Bakker, J.H. Huijsing, “A CMOS spinning-current Hall effect sensor with integrated submicrovolt offset instrumentation amplifier”, SAFE99 proceedings (ISBN: 90-7346118-9), Mierlo, Nov. 1999, pp. 17–20. 19. A. Bakker, “High-accuracy CMOS smart temperature sensors” PhD thesis, TU Delft, The Netherlands, 2000, 132 p. ISBN: 90-901-3643-6. 20. A. Bakker, J.H. Huijsing, “CMOS smart temperature sensor with uncalibrated 1oC accuracy”, Proceedings ProRISC, 26–27 November 1998, Mierlo, The Netherlands, pp. 19–22. 21. K.A.A. Makinwa and J.H. Huijsing, “A smart CMOS wind sensor”, Solid-State Circuits Conference, 2002. Proceedings. ISSCC. 2002 Volume 2, Issue, 2002 Page(s):352–544.

VERTICALLY INTEGRATED MEMS SOI COMPOSITE POROUS SILICON-CRYSTALLINE SILICON CANTILEVER-ARRAY SENSORS: CONCEPT FOR CONTINUOUS SENSING OF EXPLOSIVES AND WARFARE AGENTS SARA STOLYAROVA1, ARIEL SHEMESH2, OREN AHARON1, OMER COHEN1, LIOR GAL1, YOAV EICHEN2, AND YAEL NEMIROVSKY1* 1

Department of Electrical Engineering Technion – Israel Institute of Technology, Haifa 32000, Israel E-mails: [email protected], [email protected], [email protected], [email protected], [email protected] 2 Schulich Faculty of Chemistry Technion – Israel Institute of Technology, Haifa 32000, Israel E-mails: [email protected], [email protected]

Abstract This study focuses on arrays of cantilevers made of crystalline silicon (c-Si), using SOI wafers as the starting material and using bulk micromachining. The arrays are subsequently transformed into composite porous silicon-crystalline silicon cantilevers, using a unique vapor phase process tailored for providing a thin surface layer of porous silicon on one side only. This results in asymmetric cantilever arrays, with one side providing nano-structured porous large surface, which can be further coated with polymers, thus providing additional sensing capabilities and enhanced sensing. The c-Si cantilevers are vertically integrated with a bottom silicon die with electrodes allowing electrostatic actuation. Flip Chip bonding is used for the vertical integration. The readout is provided by a sensitive Capacitance to Digital Converter. The fabrication, processing and characterization results are reported. The reported study is aimed towards achieving miniature cantilever chips with integrated readout for sensing explosives and chemical warfare agents in the field.

Keywords: Composite cantilever, vertically integrated cantilevers, crystalline-silicon and porous silicon, MEMS cantilever arrays, sensing explosives, sensing chemical warfare agents.

______ *

Yael Nemirovsky, Electrical Engineering Dept, Technion-Israel Institute of Technology, Haifa 32000, Israel email: [email protected]

E. Gusev et al. (eds.), Advanced Materials and Technologies for Micro/Nano-Devices, Sensors and Actuators, DOI 10.1007/978-90-481-3807-4_21, © Springer Science + Business Media B.V. 2010

261

262

S. STOLYAROVA ET AL.

1. Introduction Cantilever transducers, which are recognized as a promising platform for the next generation of chemical and biological sensors, are currently under extensive research, and have been extensively reviewed [1–2 and references therein]. When considering cantilevers as MEMS devices, three major issues arise: (i) choosing the cantilever material and developing a process for the fabrication of arrays of cantilevers which are nearly flat and parallel and exhibit well-controlled, uniform and reproducible mechanical performance; (ii) selecting the sensing layers and immobilizing them on the cantilever array, without introducing initial stress gradients; (iii) implementing an integrated readout to measure the transduction of chemomechanical phenomena, which affect the static and dynamic properties of the cantilevers. Integrated readout is essential for achieving miniaturized systems. This report addresses these issues, which are still far from being resolved. This study focuses on cantilevers made of crystalline silicon (c-Si), using SOI wafers as the starting material and processed by bulk micromachining. This selection of the micromachined material is based on the exceptional mechanical properties of c-Si [3]. Furthermore, the use of SOI wafers allows the use of bulk micromachining and dry processing, resulting in a well-established and reproducible process, which does not suffer processing issues well-known in surface micromachining. This allows us to meet the processing challenge of arrays of cantilevers, which are nearly flat and parallel and exhibit well-controlled, uniform and reproducible mechanical performance. Arrays of cantilevers allow reference cantilevers, improve resolution and signal-to-noise as well as allow multiple parallel experiments. Furthermore, we report a method to establish an array of cantilevers where one of the sides is relatively passive while the other is much more active. The active side exhibits enhanced affinity for the sensing layers and thus for the targeted analyte. This method is based on composite cantilevers made of porous silicon/ c-silicon [4]. The porous silicon provides a most useful “universal platform” for immobilization of sensing layers. We demonstrate here that this approach for microcantilever coating is compatible with batch fabrication, and can be applied even to commercially available cantilevers. Moreover, this study focuses on a hybrid approach, in which the arrays of c-Si cantilevers are vertically integrated with a bottom die with the electrostatic actuation, using flip chip bonding [5, 6]. The resulting hybrid MEMS cantilever chips are shown schematically in Figure 1. The choice of the hybrid approach, where the c-Si cantilevers are vertically integrated with a bottom silicon die, using flip chip bonding, offers significant design flexibility in terms of actuation modes and miniaturization of readout. The cantilevers can be actuated electrostatically or even by multiple actuation modes (electrostatic, magnetic), offering better signal to noise ratio for sensing applications. In addition, the bottom die may be a CMOS chip with readout, signal processing, and wireless transmission circuitry, in addition to the actuation driving

VERTICALLY INTEGRATED MEMS SOI COMPOSITE

263

circuitry. This approach will enable the implementation of CMOS cantilever chips resulting in miniature, deployable, low-cost systems of network of sensors.

2. Brief review of state of the art of explosive detection devices Several groups are conducting active research with the intention of making a ‘nose-on-a-chip’ device having the smelling power similar to the dog’s nose [7]. Recently, microcantilevers were reported for detection of trinitrotoluene (TNT) vapors, with a detection limit of 50 pg [8]. A sensitive, handheld vapor sensor was further developed based on a piezoresistive microcantilever modified with a selfassembled monolayer [9]. Detection of explosive compounds with the use of microcantilevers with nanoporous coatings is reported in Ref. [10].

Figure 1. Schematic view of the concept of this study: vertically integrated SOI c-Si cantilevers connected to CMOS dies with actuation electrodes and possibly readout circuitry. (a) Schematic view of the cross-section (not to scale) of the as-processed unbent SOI c-Si cantilever. The BOX (buried oxide) is 1 μm, the handle wafer is ~300 μm. The c-Si device layer thickness is ~2 μm and the final thickness is ~1.55 μm due to the growth of 1 μm thermal oxide. This structure ensures fixed edge boundary conditions provided proper processing is applied (see Section 2). (b) Overall view of the hybrid, vertically integrated two dies: the SOI c-Si cantilever above the CMOS die.

264

S. STOLYAROVA ET AL.

3. Fabrication and characterization of c-silicon microcantilever arrays with uniform and reproducible mechanical performance Recently, novel cantilever designs with high control of the mechanical performance were reported [10, 11]. These papers report novel designs achieved using SOI wafers obtained by “smart cut” technology [12] and provided by a commercial vendor [13]. These SOI wafers are characterized by relatively thin (0.334 μm) device layer. The reported cantilevers, known as T-shape cantilevers, are flat but the support fixed-fixed beam (of the T shape cantilevers) curls due to residual stress. As a result, the height of the array may vary. Furthermore, the T-shape cantilevers allow less dense design. In order to achieve the fabrication challenge of dense arrays tailored to the vertical integration of dies and exhibiting higher quality factor, we have focused on regular c-silicon cantilevers made of SOI wafers with thicker device layer (of the order of 1.5 μm), known as BESOI [12], provided by a different commercial vendor [14]. The parameters of the SOI wafers are reported in the caption of Figure 1a. The fabrication process reported in the present study addresses the following issues: (i) how to select BESOI wafers with relatively small residual stress, taking into consideration that as device layer is reduced and the BOX (buried oxide) is increased, the residual stress increases; on the other hand, if the BOX is too thin, it does not provide an efficient etch stop across the 4 in. wafers; (ii) how to reduce damage and stress gradients introduced by the DRIE process; (iii) how to control the boundary conditions at the fixed side of the cantilevers; (iv) how to control the gap between the cantilevers and the bottom die with the actuation electrodes after the flip-chip bonding process. Below we outline the processing steps, which are exhibited in Figure 2: Step 1: Applying a photoresist patterned by MASK 1 and lithography to delineate the cantilevers. Step 2: Repeating step 1 on the handle layer side by applying MASK 2. Step 3: Applying RIE of the thermal oxide of the device layer side, using CF3 H plasma. Subsequently applying either RIE (using SF plasma) or DRIE 6 (using the regular Bosch process) of the silicon device layer. Removal of the photoresist by acetone and Piranha cleaning. This device layer defines the cantilevers shape. Step 4: Repeating step 3 on the handle layer side. Step 5: BOX layer removal from the handle side of the SOI by RIE process. Handle side thermal oxide is also etched. Step 6: Removal of BOX residuals by dipping the die in 49% HF. Step 7: Evaporating aluminum spacer delineated by MASK 3 and a lift-off process. Applying conductive glue to the readout die. The glue is based on epoxy and contains silver strips.

VERTICALLY INTEGRATED MEMS SOI COMPOSITE

265

Step 8: The die is vertically integrated with the bottom die with the actuation electrodes by manual flip chip procedure. Step 9: Curing of conductive epoxy glue at 125°C for 30 min. It should be noted that removal of the BOX by wet etching rather than dry etching using RIE has the advantage of completely removing the oxide films, which may otherwise have introduced deflection. However, anisotropic RIE etching (step 3) is required to reduce the undercut of the BOX and to fix the boundary condition of the edge properly (fixed cantilever). Undercutting the BOX underneath the cantilever results in a pinned rather than fixed cantilever. The final process that was used was a compromise: the bulk of the buried and thermal oxides were removed by RIE and the remaining oxide films were removed by short (to reduce the undercut) isotropic wet etching in 49% HF solution.

Figure 2. Summary of the bulk micromachining fabrication process of the SOI c-silicon cantilevers and the vertical integration with the bottom die with actuation electrodes and possibly readout circuitry.

Figure 2 also exhibits the process for vertical integration of cantilever die with a bottom die, using Flip Chip bonding. This part is discussed in Section 4. The static deflection of the processed cantilevers was measured by a sensitive 3D optical profilometer having a resolution of 10 nm [15]. The measured static deflection of the Technion SOI wafers c-Si cantilevers, with width of 150 μm and length of 500 μm, processed according to the steps described in Section 3, but using DRIE to etch the device layer, is shown in Figure 3. Figure 3a exhibits the profile along the cantilever while Figure 3b exhibits the profile across the as-processed c-Si cantilever. The initial tip deflection is about 1 μm. The cantilevers are bent down according to the directions shown in Figure 1. It should be noted that similar

266

S. STOLYAROVA ET AL.

cantilevers delineated by using RIE to etch the device layer rather than DRIE resulted in very small and reproducible tip deflection of the order of 0.04 μm.

Figure 3. Measured and simulated (dashed) bending of SOI c-silicon cantilevers. (a) measured and simulated along the cantilever; (b) measured and simulated across the cantilever.

A very good match between the simulations and the experimental data is obtained, as shown in Figure 3. Finite Element Method (FEM) [16], using Comsol software [17], models the static and dynamic behavior of the cantilevers, namely deflection and frequency dependencies upon the geometrical design parameters as well as on additional material and physical parameters. The methodology applied for the simulation is described in Ref. [18]. The simulation parameters for Figure 3

VERTICALLY INTEGRATED MEMS SOI COMPOSITE

267

included 400 quadrilateral elements, which extruded into two subdomains of the same c-Si material but different stress properties. The model was solved for approximately 25,000 degrees of freedom. The measured frequency response of the SOI c-Si cantilevers under study indicates a natural frequency of the order of 15 kHz and a quality factor Q ~ 100 at ambient pressures.

4. Fabrication of composite porous silicon/c-silicon cantilevers One of the established approaches to enhance chemo-mechanical transduction is based on the use of microcantilevers with nanostructured surfaces or coatings [10]. The main advantages of sensing coatings with nanoporous structure are very well summarized in Ref. [10]: (i) very high surface density of binding sites (since each cavitated molecule represents at least one binding site) and (ii) accessibility of the sensing coating bulk to analyte molecules. The resulting swelling [19] caused by molecular absorption, rather than adsorption, provides a very efficient transduction of chemical interactions, into mechanical stress. Ref. [10] reports several “topdown” and “bottom-up” strategies which were explored to create appropriate phases with nanoscale 3-D features, such as crevices, gaps and pores [20–24]. It was reported that the use of nanostructured coatings resulted in two-orders-of-magnitude enhancements in analyte-induced microcantilever deflections. Thus, it is clear that it is important to enhance sensing area without increasing the cantilever size as well as to activate interactions of the sensing surface with the analyte only on one side of the cantilevers, while the other side remains passive. For this purpose, we use composite porous silicon-crystalline silicon microcantilevers where the porous silicon surface provides an inclusive, wide-ranging interface with the sensed environment. We start with crystalline silicon cantilevers fabriccated from SOI wafers and we establish a thin surface layer of porous silicon on one side of the cantilevers. The processed porous silicon introduces negligible bending of the cantilevers and provides an excellent biocompatible material for immobilization of a wide variety of chemical and biological materials, resulting in enhanced sensitivity [2, 4]. By forming porous silicon on crystalline silicon cantilevers, we combine the advantages of both entities: the crystalline silicon provides excellent elastic and mechanical properties (high Young modulus, no residual stress, no fatigue, low density etc.) while the porous silicon provides large adsorption surfaces (about 800 m2/g) and exceptional binding properties [25]. Furthermore, porous silicon is a compliant material with low Young’s modulus and hence it does not introduce significant stress gradients. This is indicated by the static bending of the cantilevers, which is more or less the same before and after the formation of the porous silicon surface instead of traditional electrochemical etching, we applied a reaction induced vapor phase stain etching [26] to the porous silicon (PS) formation on c-Si cantilevers. In this process, PS layer is formed by exposing the Si cantilever to the etchant vapors which evolve during reactions of sacrificial silicon with acid mixture, while

268

S. STOLYAROVA ET AL.

the upper surface of the cantilever is mechanically masked (Figure 4). The apparent simplicity of this process, in particular there is no need of electrical contacts and no dip in solution, makes this method extremely attractive for micromachining applications.

Figure 4. Schematic view of the formation of porous silicon on composite porous silicon/silicon cantilever (not in scale). The BOX (buried oxide) is 1 μm. The handle wafer is ~300 μm. The silicon device layer is ~1.5 μm. The porous silicon layer is about ~100 nm.

a

b

Figure 5. SEM images of the detailed morphology of the achieved porous silicon surface layer, imaged at the same spot with increasing magnification (a) magnification 13,000. The macrostructure formed by the drop condensation of the reactive vapor is clearly seen; (b) magnification 100,000. The detailed nanostructure of the porous silicon is shown.

Figure 5 shows the detailed morphology of the porous layer. In contrast to traditional porous silicon obtained by electrochemical etching, the morphology of vapor phase etched silicon exhibits a dual macro (Figure 5a) and nano (Figure 5b) superposed structure of the porous layer. The macrostructure reflects the condensation of drops giving the round shaped features. On the other hand, the nanostructure originates directly from the local reactions of vapor molecules with silicon resulting in nanoscale

VERTICALLY INTEGRATED MEMS SOI COMPOSITE

269

morphology and is similar to the nanostructure of the conventional anodically etched porous silicon. The excellent properties of the generated porous silicon for covalent attachment of bio-recognition molecules were confirmed [4]. It does provide an excellent biocompatible material for immobilization of a wide variety of chemical and biological materials, resulting in enhanced sensitivity as demonstrated on the covalently immobilized antibody binding its complementary antigen [4]. The significance of the composite porous silicon–silicon cantilevers for sensing was also demonstrated by us in Ref. [27]. In this study, Octosensis microcantilever array chips (Micromotive GmbH, Mainz, Germany) were used as mechanical transducers. Each chip consists of eight rectangular microcantilevers having a length of 750 μm, a width of 90 μm and a thickness of 1 μm. Porous silicon layer was fabricated on one side of the microcantilever array. Then, the chip was immersed into a solution of (poly-4-vinyl pyridine) in DMF. As a result, a thin polymeric film coated preferably the porous side of the chip. Thus, a very simple process for asymmetric coating of cantilevers by the sensitive layer was demonstrated. The enhanced sensitivity of this cantilever sensor enabled us to detect isotopes where one or more hydrogen atoms were replaced with Deuterium. These findings are reported elsewhere [27]. To summarize, the present research uses SOI wafers as the starting material to process c-silicon cantilevers and applies a vapor phase stain etching to establish a thin porous silicon layer on the already processed cantilevers. A specific immobilization and sensing interface is subsequently deposited on the porous silicon. This porous silicon fabrication methodology is aimed towards achieving enhanced sensing capability on thin cantilevers, which are required for sensitive sensors. This vapor phase technology for porous silicon formation can also be applied to commercially available cantilevers.

5. Integrated cantilevers chips The SOI die with the cantilevers is vertically integrated to the bottom silicon die using a flip-chip bonder. The vertical integration by the process reported here is fully compatible with a CMOS die, which may include readout circuitry as well as circuitry for wireless transmission. The bumps material reported here is conductive epoxy, cured at low temperature (125°C). In order to accurately control the gap between the bottom actuation electrodes and the cantilevers, aluminum spacer is provided for the Flip Chip bonding. The spacer is placed by an evaporation process and delineated by a liftoff process. The thickness of the evaporated aluminum determined the final gap between the two dies (typically 2 μm). The steps which apply the epoxy bumps and the aluminum spacer are shown schematically in Figure 2, steps 7–9. The fabricated vertically integrated test cantilevers are shown in Figure 6. As discussed in the introduction, the long term goal is to establish CMOS cantilever

270

S. STOLYAROVA ET AL.

chips, which will include the sensing cantilevers, the actuation electrodes as well as the readout circuitry. At this stage, the bottom die of Figure 6 includes only the actuation electrodes, which provide electrostatic actuation. The cantilever devices of Figure 6 were interfaced with CDC (Capacitance-to-Digital) chips provided by Analog Devices [28], which provided the readout and measured the capacitance changes which resulted by the application of DC voltage through the actuation electrodes.

Figure 6. c-Si cantilevers fabricated from SOI wafers, vertically integrated with flip-chip bonding, on bottom silicon dies with actuation electrodes.

Figure 7 exhibits the measured frequency response of the electrostatically actuated devices of Figure 6 at ambient pressures. The simulated response for several values of Q is compared with the experimental data. The measured quality factor Q ~ 35 is significantly below that of the measured value when the cantilevers are measured individually (Q ~ 100). This result is expected since the gap of the measured devices of Figure 6 plays a dominant role, the cantilevers were actuated simultaneously and the effects of squeeze film damping are much more pronounced in the integrated device as compared to the stand-alone cantilevers. Figure 8 exhibits the measured results of vertically integrated cantilever devices, where the bottom die is alumina, interfaced with the CDC chips of Analog Devices. The cantilever device in this case is composed of two SOI c-silicon cantilevers with the following dimensions: L = 500 µm; W = 150 µm; T = 2 µm. The bottom die is an alumina substrate with electroplated Ti/Au actuation electrode and an additional electroplated Ti/Au electrode for capacitance measurement. The cantilever is vertically integrated with the bottom die by flip chip bonding, as described in Section 3. The bottom die also includes spacers to accurately control the gap. The initial gap between the cantilever and electrodes of the device of Figure 8 is 7.5 µm, and is filled with air. The actuation is performed here by applying a DC voltage to the electrode closer to the cantilever’s clamping, while the capacitance

VERTICALLY INTEGRATED MEMS SOI COMPOSITE

271

measurement is taken at the electrode under the cantilever’s free end. In this arrangement the dynamic range (before pull-in) is increased relative to an actuation at the tip of the cantilever. The changes in capacitance are measured with the CDC while the changes in the cantilever position are monitored simultaneously with the Veeco optical profilometer [15]. Also shown in Figure 8a is the simulated capacitance between the electrodes, which was obtained using Ansoft Q3D software. The capacitance is calculated for the capacitors formed between the cantilever and the electrodes on the bottom die as a function of the varying gap, taking into consideration that the plates are not parallel when the cantilever is deflected. A fixed capacitance, which accounts for the parasitic constant capacitances shown in Figure 8b was assumed in order to achieve correspondence between the measured capacitance at zero actuation voltage. There is a very good fit between the simulated results and the measured results obtained with the CDC in a wide range of actuation voltages and varying gaps. These results indicate the capabilities of the miniaturized and integrated readout presented here. Similar measurements were performed for the device of Figure 6. The fit between the measured and simulated capacitance changes (of the order or several tenths of fF) vs. the actuation voltage (of the order of 10 V), which determines the gap, was not very good in this case. This is due to the fact that the bottom silicon die contributes a significant parasitic capacitance which varies as a function of the actuation voltage. Thus, it may be concluded that the integrated readout corresponding to the concept of Figure 1 should be custom and should address the additional parasitic effects associated with silicon dies.

Figure 7. Frequency response of the integrated cantilevers of Figure 6, measured with the MMA300 – vibrometer system of Polytec.

272

S. STOLYAROVA ET AL.

Figure 8. (a) capacitance-voltage data of a cantilever device integrated on a bottom alumina die as discussed in the text and measured with the Analog Device CDC chip. Calculated data modeled with Ansoft Q3D software is also shown. (b) The measurements setup (see text for details).

6. Summary This study reports the fabrication processing and characterization of arrays of cantilevers made of crystalline silicon (c-Si), using BESOI wafers as the starting material and using bulk micromachining. The arrays are subsequently transformed into composite porous silicon-crystalline silicon cantilevers, using a unique vapor phase process tailored for providing a thin surface layer of porous silicon on one side only. This results in asymmetric arrays, with one side providing nanostructured porous large surface, which can be further coated by polymers, thus providing additional sensing capabilities and enhanced sensing. The readout circuitry for cantilever sensors reported in the literature is often bulky and expensive. The c-Si cantilevers reported here are vertically integrated with a bottom die with electrodes allowing electrostatic actuation as well as the addition of integrated CMOS readout circuitry. Flip Chip bonding is used for the vertical integration. The vertical integration process applied in this study is also reported. At the present stage of the research, the readout for the cantilevers is provided by a sensitive off-the-shelf Capacitance to Digital Converter [28]. As a result, we

VERTICALLY INTEGRATED MEMS SOI COMPOSITE

273

find that the bottom die of Figure 1 should be alumina rather than silicon, to reduce the parasitic capacitance. The reported cantilevers may be a platform for a wide range of ultra sensitive sensors. In particular, because of the enhanced sensing capabilities and the miniaturized readout, this may provide a generic platform for sensing explosives in the gas phase in the field. Obviously, more research is needed towards achieving this long term goal. Acknowledgments The contributions of Kamea Program of Israeli Ministry of Absorption and Center for Security Science and Technology, Department of Chemical Engineering, Technion – Israel Institute of Technology, are gratefully acknowledged.

References 1. 2. 3. 4. 5. 6.

7. 8. 9. 10. 11. 12. 13. 14.

N. V. Lavrik, M. J. Sepaniak, P. G. Datskos, “Cantilever transducers as a platform for chemical and biological sensors”, Review of scientific instruments, 75 (7), 2229–2253 (2004). Y. Nemirovsky, A. Shemesh, and S. Stolyarova, NEMS/MEMS cantilever-based biosensors: addressing the open issues, Proc. SPIE, Vol. 6993, 699302 (2008); DOI:10.1117/12.787016. “Properties of Silicon”, INSPEC, London, 1988 (ISBN 0 85296 475 7). S. Stolyarova S. Cherian R. Raiteri, J. Zeravik, P. Skladal and Y. Nemirovsky, “Composite Porous Silicon-Crystalline Silicon Cantilevers for Enhanced Biosensing”, Sen. Actuators B 131, 509 (2008). C. Gemme, A. M. Fiorello, G. Gagliardi, M. Gilchriese, P. Netchaeva, L. Rossi, E. Ruscino, F. Vernocchi, M. Varasi, “Study of indium bumps for the ATLAS pixel detector”, Nuclear Instruments and Methods in Physics Research A 465, 200 (2001). H. V. Panchawagh, F. F. Faheem, C. F. Herrmann, D. B. Serrell, D. S. Finch, R. L. Mahajan, “A flip–chip encapsulation method for packaging of MEMS actuators using surface micromachined polysilicon caps for BioMEMS applications”, Sen. Actuators A 134, 11 (2007). L. A. Pinnaduwage, A. C. Gehl, S. L Allman, A. Johansson, and A. Boisen, “Miniature sensor suitable for electronic nose applications”, REV. SCI. INSTRUM. 78, 055101 (2007). L. A. Pinnaduwage, A. Gehl, D. L Hedden., G. Muralidharan, T. Thundat, R. T Lareau., T. Sulchek, L. Manning, B..Rogers, M. Jones, and J. D. Adams, “Explosives microsensor for trinitrotoluene vapour”, Nature 425, 474 (2003). G. Zuo, X. Lil, Z. Zhang, T. Yang, Y. Wang, Z. Cheng, and F. Feng, “Dual-SAM functionalization on integrated cantilevers for specific trace-explosive sensing and nonspecific adsorption suppression”, Nanotechnology, 18, 255501 (2007). P.G. Datskos, N.V. Lavrik and J. Sepaniak, Detection of Explosive Compounds with the Use of Microcantilevers with Nanoporous Coatings, Sensors Letters, v.1, 25–32 (2003). J. A. Plaza, K. Zinoviev, G. Villanueva, and C. Dominguez, “Novel cantilever design with high control of the mechanical performance”, Microelec. Eng. 84, 1292–1295 (2007). A. Marshall and S. Natarajan, “SOI Design”, Kluwer Acad. Publishers, Boston, 2002. SOITEC, http://www.soitec.com/en/index.php. Ultrasil (http://www.ultrasil.com/).

274

S. STOLYAROVA ET AL.

15. Veeco Optical Profilometer, model Wyko NT1100D, www.veeco.com. 16. S. D. Senturia, “Microsystem Design”, Kluwer Academic Publishers, Boston, 2001 (ISBN: 0-7923-7246-8). 17. COMSOL, MULTIPHYSICS (FEMLAB: 1997-2005); http://www.comsol.com/ 18. J. Dean, M. R. J. Gibbs and T. Scherfl, “Finite-Element Analysis on cantilever beams coated with magnetorestrictive material”, IEEE Transactions on magnetics, vol.42 (2), pp. 283–288, 2006. 19. Z. Y. Hu, T. Thundat and R. J. Wannack, J. Appl. Phys. 90, 427 (2001). 20. N.V. Lavrik, C.A. Tipple, M.J. Sepanyak, and P.G. Datskos, Biomed. Microdevices 3, 25 (2001). 21. N.V. Lavrik, C.A. Tipple, M.J. Sepanyak, and P.G. Datskos, Proc. SPIE 4560, 152 (2001). 22. J.J. Headrick, N.V. Lavrik, C.A. Tipple, M.J. Sepanyak, and P.G. Datskos, Ultramicroscopy 97, 417 (2001). 23. N.V. Lavrik, C.A. Tipple, M.J. Sepanyak, and P.G. Datskos, Chem.Phys.Lett. 336, 371 (2001). 24. C.A. Tipple, N.V. Lavrik, M. Culha, J. Headrick, P.G. Datskos, and M.J. Sepanyak, Anal. Chem. 65, 387 (1993). 25. S. Stolyarova, E. Saridakis, N. Chayen, and Y. Nemirovsky, “A model for enhanced nucleation of protein crystals on a fractal porous substrate”, Biophys. J. 91, 3857–3863 (2006). 26. E. A De Vasconcelos, J. A. K. Freire et al. “Morphology of nanostructured luminescent silicon layers”, phys.stat.sol (c) 1, S287–S290 (2004). 27. A. Shemesh, S. Stolyarova, Y. Eichen, and Y. Nemirovsky, “Detection of hydrogenated/ deuterated isotopes using porous silicon-crystalline silicon cantilevers”, in preparation. 28. Analog Devices. http://www.analog.com/en/prod/0%2C2877%2CAD7746%2C00.html.

INTEGRATION OF DIVERSE BIOLOGICAL MATERIALS IN MICRO/NANO DEVICES REZA GHODSSI1,*, PETER DYKSTRA1, MARIANA MEYER2, STEPHAN KOEV1, KONSTANTINOS GERASOPOULOS3, XIAOLONG LUO2, AND GARY RUBLOFF3 1

Department of Electrical and Computer Engineering,2 Fischell Department of Bioengineering, 3Department of Materials Science and Engineering, Institute for Systems Research, University of Maryland, College Park, MD 20742, USA, E-mail: [email protected]

WILLIAM BENTLEY, GREGORY PAYNE, AND JAMES CULVER University of Maryland Biotechnology Institute, University of Maryland, College Park, MD 20742, USA

Abstract This paper describes key examples of our work on biomaterial integration for functionalization and characterization in microdevices. We use the polysaccharide chitosan for immobilization of DNA and proteins in micro-fabricated sensors to make them responsive to a particular sample. In some cases, the use of chitosan was shown to improve the detection signal by a factor of 100 compared to devices without chitosan. We have developed a method for depositing Tobacco mosaic virus on micro scale electrodes in order to increase the effective surface area in a battery. Consequently, the capacity was increased by a factor of 6 compared to devices with planar electrodes. We have demonstrated the culturing of bacteria in a microfluidic test platform. The growth of bacteria over time is measured optically to provide information about the bacterial response to different stimuli. In a related demonstration, bacterial enzymes are assembled in a fluidic channel and their products under varying conditions are detected with a microcantilever sensor. The use of microfabricated devices for these experiments enables high-density, highthroughput measurements of the biomaterials to be performed.

Keywords: MEMS, chitosan, Tobacco mosaic virus, biosensors, lab on a chip.

1. Introduction One of the main challenges in the development of miniaturized biosensors and systems is the integration of biological components. These types of microdevices E. Gusev et al. (eds.), Advanced Materials and Technologies for Micro/Nano-Devices, Sensors and Actuators, DOI 10.1007/978-90-481-3807-4_22, © Springer Science + Business Media B.V. 2010

275

276

R. GHODSSI ET AL.

typically need to be functionalized with biomolecules such as DNA, enzymes, or antibodies to operate with sufficient specificity and sensitivity [1–4]. However, the harsh fabrication techniques and materials involved in traditional MEMS fabriccation are incompatible with the labile biological components. It is then important to identify certain biological materials which can be integrated with devices after their fabrication which impart enhanced functionality to the sensor or system. Biological materials may be combined with micro/nano devices primarily for two reasons. The first is to confer a specific functionality to the device. The second is to allow for characterization of the materials with high precision and resolution. This paper describes our work which combines micro/nano devices with various biological materials for purposes of both functionalization and characterization. We report on the use of the aminopolysaccharide chitosan to enable specific functionality for microcantilever sensors for DNA hybridization and dopamine detection as well as a microfluidic optical absorbance sensor for the detection of phenols. We also demonstrate the integration of the Tobacco mosaic virus (TMV) with a MEMS-based battery to act as a high aspect ratio nanostructured surface. We have also demonstrated a variety of microdevices for biological characterization. We have successfully reconstructed part of a bacterial enzymatic pathway in a microfluidic channel to study the effects on the enzymatic products to different stimuli. We have studied the growth of bacterial biofilms in a controlled microfluidic environment through the use of optical absorbance measurements and utilized microcantilever sensors to detect the enzymatic products of the biofilmforming bacteria rapidly and with high sensitivity. Herein, we detail the methods for incorporating the biological materials within the fabricated devices and how they improve the performance of each device. The unique properties of both of our mentioned biomaterials for device functionalization, chitosan and the Tobacco mosaic virus, are also explained in more detail.

2. Biological functionalization In order to impart biological functionalization to our microdevices, we have utilized the properties of two unique materials, chitosan and the Tobacco mosaic virus. Both offer the ability to be patterned at the micron scale and are highly robust once properly deposited. Their structures allow for the conjugation of specific biomolecules or metals for both detection of analytes and construction of versatile nanostructures [5, 6]. Chitosan is a polysaccharide similar in monomer structure to cellulose. Chitosan is derived from the partial deacetylation of chitin, an abundant natural resource found in the shells of many crustaceans and certain insects. The structure of chitosan is similar to cellulose with the exception of the primary amine groups at every repeating sugar residue.

INTEGRATION OF DIVERSE BIOLOGICAL MATERIALS

277

At pH lower than 6.5, chitosan is soluble and the amine groups are protonated. As the pH rises above 6.5, the amine groups lose their net positive charge and chitosan becomes insoluble. This unique property allows us to form solid films of chitosan over an electrode acting as a cathode in an electrochemical cell. In this way, chitosan can be selectivity deposited with excellent spatial resolution within micro and nano devices. Furthermore, the nucleophilic amine groups readily form strong covalent bonds with a variety of biomolecules and metals making chitosan ideal for biological detector-based systems [6, 7]. While chitosan is most useful in biosensor systems, we have also explored the use of biological nanomaterials for increasing the active surface area of a device. The Tobacco mosaic virus (TMV) is a high aspect ratio cylindrical plant virus with dimensions of 300 nm in length, an outer diameter of 18 nm and an inner diameter of 4 nm. Each TMV consists of a helical structure with 2130 coat protein subunits wrapped around a positive-sense single-stranded ribonucleic acid ((+)ssRNA). The TMV demonstrates good stability in temperatures up to 60°C and pH values from 2 to 10 [5]. Previous research has shown that genetically modifying the virus to include cysteine residues (amino acid with thiol groups) in its coat proteins greatly enhances metal deposition due to covalent-like bonds between thiol groups and various metal surfaces [8]. 2.1. CHITOSAN-COATED MICROCANTILEVER SENSOR We have demonstrated the use of chitosan as a biologically responsive functionalization layer with conventional MEMS cantilever technology for DNA hybridization studies [9]. The cantilevers are 100 µm × 40 µm with a layer structure of chrome/ gold patterned on silicon nitride. The cantilevers are released from the silicon substrate by etching in KOH. After the release, chitosan is electrodeposited onto the cantilever surface by applying a potential of −0.9 V for 30 s between the patterned electrode on the cantilever and a large piece of aluminum foil acting as the anode. This results in a 100 nm thick chitosan film on the cantilever surface. For the DNA hybridization experiments, probe DNA with 5′ terminated amine group is covalently bond to the chitosan surface via glutaraldehyde coupling. The cantilever is electrostatically actuated and the resonant frequency is obtained using optical interferometry. Following hybridization with the complementary target DNA, the cantilever is actuated once again and the shift in resonant frequency is calculated. Figure 1a displays the resonant frequency shift after incubation with the target DNA while Figure 1b displays little change when incubated with non-complementary DNA. Both graphs also demonstrate the ability to remove the target DNA by denaturation with urea.

278

R. GHODSSI ET AL.

Figure 1. (a) Cantilever frequency data before and after incubation with complementary target DNA and further denaturation. (b) Cantilever frequency data before and after incubation with non-complementary DNA and further denaturation [9].

2.2. CHITOSAN-BASED OPTICAL ABSORBANCE SENSOR We have also utilized a deposited chitosan film in a microfluidic channel with integrated polymer waveguides for the optical detection of the phenol catechol [10]. Catechol is a benzenediol which can be present in foods and drinking water with detrimental health effects [11–13]. The oxidized form of catechol, orthoquinone, has been demonstrated to bind to the amine groups of chitosan and cause an absorbance change in the film. Thus, the integration of a chitosan film within a device capable of absorbance measurements can be used as a detector for concentration levels of catechol.

Figure 2. Schematic of the packaged device [10].

A 3-d schematic of the device is shown in Figure 2. Briefly, the polymer SU-8 is patterned on a silicon dioxide surface to define the microfluidic channel and optical waveguides. A transparent, conductor, indium tin oxide (ITO), is patterned within the channel so that it covers the facet of the waveguide. A 5 µm thick film of chitosan is electrodeposited onto the ITO surface using a similar procedure to what has been previously mentioned. A slab of PDMS is placed on top of the

INTEGRATION OF DIVERSE BIOLOGICAL MATERIALS

279

device to cover the channel while multimode optical fibers are butt-coupled to the waveguides to allow for absorbance measurements through the chitosan film. Various concentrations of catechol are pumped through the device for detection. The catechol is electrochemically oxidized within the channel and its product binds to the amine groups of the chitosan film, thus increasing the absorbance at low visible light wavelengths. A blue laser at 472 nm is used for the optical measurements. Figure 3 displays the absorbance increase over time for catechol concentrations of 1, 10 and 100 mM. It also displays no appreciable absorbance change upon oxidation of ascorbic acid since it does not alter the optical properties of the chitosan film. The chitosan film was also demonstrated to be essential to the detection of the oxidized catechol molecules in the channel. The absorbance measurement is 82% lower when used in a channel without the chitosan film vs one with the chitosan film.

Figure 3. Absorbance data over 10 min for each sample [10].

2.3. TOBACCO MOSIC VIRUS MEMS BATTERY Power generation and energy storage are two major hurdles towards the realization of autonomous integrated microsystems. MEMS batteries have been recently reported to help power these microsystems, but as these devices are scaled down, the capacity of the battery is limited by the decreasing surface area [14, 15]. In this work, we have used the TMV to increase the surface area of MEMS based batteries and significantly increase their capacity [16]. The battery uses a nickel–zinc chemistry with KOH as the aqueous electrolyte. The fabrication procedure begins with SU-8 patterned on gold to create a well for the electrolyte solution. The device is then incubated overnight in a solution

280

R. GHODSSI ET AL.

containing TMV which self-assembles to the gold due to the cysteine residues at its base. Following the TMV assembly on the substrate, the surface-exposed cysteine residues are activated with a palladium catalyst. The palladium is used to seed the electroless deposition of nickel onto the surface of the TMV. The device is immersed in the nickel plating solution for 2–3 min resulting in a continuous nickel coating around the virus surface on the order of 20–40 nm. Figure 4 displays SEM images of the nickel-plated TMV on the electrode surface at two different magnifications. A zinc plate is placed over the SU-8 cavity and holes are drilled to allow for continuous flow of the electrolyte within the cell.

Figure 4. SEM images of the assembled Tobacco mosaic virus with nickel plating [16].

A potentiostat is used to charge and discharge the microbattery and the capacity is calculated based on the rate of discharge from the upper to lower voltage limit. The results from six devices are shown in Figure 5. The capacity of the TMV coated battery increases by a factor of 6 over the bare electrode battery of the same size.

Figure 5. Initial discharges of batteries with and without the TMV [16].

INTEGRATION OF DIVERSE BIOLOGICAL MATERIALS

281

This work demonstrates for the first time the integration of biological viral nanostructures to increase the efficiency of a MEMS battery. This unique biomaterial displays great promise for other surface-area limited applications and can even benefit electrochemical based sensors which rely on the active surface area of an electrode.

3. Biological characterization Microdevices are a convenient platform for the characterization of biological materials, especially as new methods for interfacing such materials to microdevices emerge. We have focused on integration of biological materials into microfluidic environments for characterization. Microfluidic channels are easily packaged with standard microdevices, and provide an aqueous environment necessary for the preservation of activity of many biological molecules. We present three platforms designed for detection and characterization of biological materials: the reconstruction of an enzymatic pathway in a microfluidic device, the microfluidic culture of bacterial biofilms, and the detection of products of a reconstructed enzymatic pathway. 3.1. ENZYMATIC PATHWAY RECONSTRUCTION The ability of chitosan to be functionalized by different proteins has been applied toward reproducing biological phenomena in vitro. Many types of bacteria, including Staphylococcus aureus and Escherichia coli, communicate with each other via intercellular molecular communication, or quorum sensing. Through continuous secretion and detection of communication molecules, or autoinducers, these types of bacteria regulate their behavior according to population density. It has been shown that a molecule called AI-2 (autoinducer-2) is common to many clinically relevant bacterial species. The precursor S-adenosyl homocysteine (SAH) is converted to AI-2 via a two-step reaction: the enzyme Pfs cleaves SAH into S-ribosyl homocysteine (SRH) and adenine. SRH in turn is converted into AI2 and homocysteine by the enzyme LuxS. Steps in this metabolic pathway were reconstructed in a microfluidic environment using chitosan [17]. We have demonstrated assembly of Pfs onto electrodes packaged in a microfluidic channel via co-electrodeposition with chitosan. Pfs was genetically fused with a pentatyrosine “pro-tag” that allows for conjugation to chitosan using tyrosinase. The enzyme-chitosan conjugate was electrodeposited on electrodes in a microfluidic channel. After rinsing the channel, SAH was pumped through the system, yielding SRH and adenine after conversion by Pfs. The products at the channel outlet were analyzed by HPLC, and showed retained conversion of SAH to SRH and adenine (Figure 6). These results confirm the retained viability of the enzyme after electrodeposition.

282

R. GHODSSI ET AL.

Figure 6. Programmable enzyme assembly, reproducibility after removal and robustness over time. (a) Schematic of programmable enzyme assembly, disassembly, and re-assembly. (b) Flow rates. (c) Reproducible catalytic activity after enzyme assembly, disassembly, and re-assembly, and stability of assembled enzyme after 4 days [17].

The programmable assembly of biological components in microfluidics presents enormous potential. This procedure allows for long term use of small quantities of enzymes. The temporal control of enzyme assembly in an aqueous environment allows for the enzyme to be used immediately after deposition, maximizing the lifetime of the protein and providing more opportunity for characterization of enzyme activity. 3.2. BACTERIAL CULTURE IN MICROFLUIDICS Biological interfaces may also be used to encourage bacterial deposition, allowing for more sensitive measurements of bacterial function. Bacterial biofilms, dense matrices of bacterial cells, adhesins, and extracellular polysaccharides, are thought to be one result of bacterial quorum sensing. Biofilm-associated bacteria are often particularly resistant to treatment with antibiotics as well as host immune defenses. The first step in biofilm formation is the adhesion of cells to a surface, where they may communicate and proliferate. There have been numerous demonstrations of the use of biological interfaces to encourage bacterial adhesion [18–20]. We are investigating spatially and temporally programmable assembly of bacteria within a microfluidic device for promoting biofilm formation. Upon bacterial deposition, various sensing methods may be used to monitor biofilm growth. Our group is investigating the measurement of biofilms in a

INTEGRATION OF DIVERSE BIOLOGICAL MATERIALS

283

microfluidic environment via optical methods as a non-invasive and label-free sensing alternative. Bacterial growth stage and biofilm thickness may be correlated to a change in optical signal over time due to formation of biofilm layers. The capability of continuous sensing, provided by the microfluidic environment and on-chip sensors, is vital to the monitoring of bacterial biofilms in order to determine the temporal onset of biofilm characteristics. This is especially important in the development of drugs inhibiting bacterial quorum sensing. The response of the biofilm to a treatment may be monitored over time, and can indicate the efficacy of a drug at preventing quorum-sensing-dependent biofilm formation. 3.3. DETECTION OF ENZYMATIC PRODUCTS A byproduct of the AI-2 synthesis pathway described previously is the small molecule homocysteine, formed through the conversion of SRH into DPD catalyzed by the enzyme LuxS. Homocysteine is an amino acid which features a thiol group available for molecular interactions. Since there exist no selective surface treatments for AI-2, the detection of byproducts of the AI-2 synthesis pathway are an appealing alternative. Homocysteine is a convenient molecule to detect since it covalently binds to gold surfaces via gold–thiol interactions, and thereby induces a surface stress. We have fabricated MEMS devices using the induction of surface stress for the detection of homocysteine as an indicator of AI-2 production. A microcantilever coated with a thin gold layer bends upon exposure to homocysteine. While there are many methods for measuring cantilever deflection, we have fabricated polymer structures for use as optical waveguide cantilevers [21]. The optical waveguide cantilever uses the principle of variable light coupling to monitor cantilever bending. The cantilever is fabricated as the end of an input waveguide coupled to a stationary output waveguide. As the tip of the cantilever moves, the amount of light coupled from the input to the output waveguide will change, and this is measured via a photodetector coupled to the output waveguide. We have fabricated SU-8 cantilevers functionalized with a thin layer of gold available for bonding to homocysteine. The devices were packaged in microfluidic channels and were used to detect homocysteine in two configurations: one using externally prepared samples of homocysteine powder dissolved in DI water, and the other using homocysteine generated by enzymes immobilized on chitosancoated magnetic particles in the microfluidic system [22]. SAH was flowed into the microfluidic package, and converted to AI-2 and homocysteine after exposure to the immobilized enzymes. The results show cantilever selectivity to homocysteine and measurement of a minimum homocysteine concentration of 10 μM. Rinsing the microfluidic channel with buffer solution yielded no change, indicating the strong binding of homocysteine to the cantilever surface (Figure 7).

284

R. GHODSSI ET AL.

Figure 7. Response of an optical cantilever to increasing concentrations of homocysteine [21].

The optical waveguide cantilevers provide several benefits for on-chip detection. The devices are packaged in a microfluidic environment, necessary for transport of a liquid sample. We have demonstrated arrays of cantilevers in microfluidic channels on one chip, where testing and analysis may occur simultaneously. The gold layer not only allows for detection of homocysteine, but can also be used for functionalization with any thiol-labeled molecule. This capability renders the cantilever appealing for a multitude of sensors for characterization of molecular interactions.

4. Conclusion We have discussed the integration of different biological materials within micro/ nano scale devices for both functionalization and characterization techniques. The polysaccharide chitosan was patterned in sensor devices for DNA hybridization, catechol detection, and protein assembly. The Tobacco mosaic virus was utilized to increase the active surface area of MEMS batteries. We have also explored the growth of bacterial biofilms in a microfluidic environment. These accomplishments lay the foundation for future endeavors in developing the next generation of biologically enhanced microscale systems.

Acknowledgements The authors would like to thank the R.W. Deutsch Foundation and the National Science Foundation Emerging Frontiers in Research and Innovation (NSF-EFRI) for funding this work. This work has been supported in part by the Laboratory for Physical Sciences. We also appreciate the support of the Maryland NanoCenter and its FabLab.

INTEGRATION OF DIVERSE BIOLOGICAL MATERIALS

285

References 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. 12. 13. 14. 15. 16. 17. 18. 19. 20. 21. 22.

F. Caruso, E. Rodda, D.N. Furlong, and V. Haring, Sensors and Actuators B. 41, 189–197. (1997). X. He, R. Yuan, Y. Chai, and Y. Shi, J. Biochemical and Biophysical Methods. 70, 823–829. (2008). D. Xu, D. Xu, X. Yu, Z. Liu, W. He, and Z. Ma, J. Anal. Chem. 77(16), 5107–5113. (2005). W. Yao, L. Wang, H. Wang, X. Zhang, and L. Li, Biosensors and Bioelectronics. 24, 3269– 3274. (2009). E. Royston, A. Ghosh, P. Kofinas, M.T. Harris, and J.N. Culver, Langmuir. 24(3), 906–912. (2008). H. Yi, et al., Biomacromolecules. 6, 2881–2894. (2005). H. Yi, L.-Q. Wu, R. Ghodssi, G.W. Rubloff, G.F. Payne, and W.E. Bentley, Langmuir. 21, 2104–2107. (2005). S.Y. Lee, E. Royston, J.N. Culver, and M.T. Harris, Nanotechnology. 16(7), S435–S441. (2005). S.T. Koev, et al., Lab on a Chip. 7(1), 103–111. (2007). P. Dykstra, J.J. Hao, S.T. Koev, G.F. Payne, L.L. Yu, and R. Ghodssi, Sensors and Actuators B-Chemical. 138(1), 64–70. (2009). C.T. Jung, R.R. Wickett, P.B. Desai, and R.L. Bronaugh, Food and Chemical Toxicology. 41(6), 885–895. (2003). A. Starek, International Journal of Occupational Medicine and Environmental Health. 16, 113–124. (2003). D.P. Yang, H.F. Ji, G.Y. Tang, W. Ren, and H.Y. Zhang, Molecules. 12(4), 878–884. (2007). P.H. Humble, J.N. Harb, and R. LaFollette, Journal of the Electrochemical Society. 148(12), A1357–A1361. (2001). K.B. Lee and L.W. Lin, Journal of Microelectromechanical Systems. 12(6), 840–847. (2003). K. Gerasopoulos, M. McCarthy, E. Royston, J.N. Culver, and R. Ghodssi, Journal of Micromechanics and Microengineering. 18(10). (2008). X.L. Luo, et al., Lab on a Chip. 8(3), 420–430. (2008). D.A. Boehm, P.A. Gottlieb, and S.Z. Hua, Sensors And Actuators B. 126(2), 508–514. (2007). S.E. Cowan, D. Liepmann, and J.D. Keasling, Biotechnology Letters. 23(15), 1235–1241. (2001). S.R. Meyers, X.J. Khoo, X. Huang, E.B. Walsh, M.W. Grinstaff, and D.J. Kenan, Biomaterials. 30(3), 277–286. (2009). S.T. Koev, R. Fernandes, W.E. Bentley, and R. Ghodssi, IEEE Transactions on Biomedical Circuits and Systems. submitted. (2009). R. Fernandes and W.E. Bentley, Biotechnology and Bioengineering. 102(2), 390–399. (2009).

FORCE SENSING OPTIMIZATION AND APPLICATIONS

JOSEPH C. DOLL, SUNG-JIN PARK, ALI J. RASTEGAR, NAHID HARJEE, JOSEPH R. MALLON JR., GINEL C. HILL, A. ALVIN BARLIAN, AND BETH L. PRUITT ∗ Department of Mechanical Engineering, Stanford University, Stanford, CA, USA

Abstract Piezoresistance is commonly used in micro-electro-mechanical systems for transducing force, pressure and acceleration. Silicon piezoresistors can be fabricated using ion implantation, diffusion or epitaxy and are widely used for their low cost and electronic readout. However, the design of piezoresistive cantilevers is not a straightforward problem due to coupling between the design parameters, constraints, process conditions and performance. Here we discuss the equations and design principles for piezoresistive cantilevers, and present results from cantilevers and systems that we have developed for probing, mechanics studies and sensing, especially for low stiffness or large bandwidth applications.

Keywords: MEMS, piezoresistance, cantilever, force sensor, noise, design, optimization.

1.

Introduction

Piezoresistivity is a commonly used transduction mechanism in micro-electromechanical systems (MEMS) for transducing force [1 –3], pressure [4–6] and acceleration [7]. The optimal sensor geometry depends upon the signal being transduced, but a simple cantilever beam is ideal for many applications. Microfabricated silicon cantilevers are widely used in force [8, 9], topography [10], and biochemical sensing [11] applications by transducing a signal via cantilever deflection. There are numerous techniques to detect cantilever bending, but the most common approaches are off-chip optical sensing [10] and on-chip electronic sensing using piezoresistive strain gauges [12]. Electronic sensing scales well to large arrays [13], high frequencies [14], and situations where optics are inconvenient [15]. Piezoresistive sensors in particular have several desirable characteristics such as straightforward fabrication, simple signal-conditioning circuitry, small size, and large dynamic range. With proper design, the resolution of piezoresistive cantilevers is comparable to optical detection [2, 12]. ∗

Beth L. Pruitt, Stanford University, 496 Lomita Mall, Durand Building Room 217, Stanford, CA, USA e-mail: [email protected]

E. Gusev et al. (eds.), Advanced Materials and Technologies for Micro/Nano-Devices, Sensors and Actuators, DOI 10.1007/978-90-481-3807-4_23, © Springer Science + Business Media B.V. 2010

287

288

J.C. DOLL ET AL.

Here, we provide a brief review of the transduction principles which underly silicon piezoresistors, discuss some aspects of design modeling and optimization, and describe several example applications from our lab. This is a survey and not a complete review of the extensive work on piezoresistors to date.

2. Modeling and design 2.1. PRINCIPLES OF PIEZORESISTANCE The electrical resistance (R) of a homogenous electrical conductor is a function of its dimensions and resistivity, ρl (1) a where ρ is the resistivity, l is the length and a is the average cross-sectional area. The resistance of the conductor will change in response to the application of an external force based upon a change in (1) geometry and (2) resistivity. The response of doped semiconductor devices to loading is dominated by the stress induced change in resistivity, R=

∆ρ = πl σl + πt σt ρ

(2)

where πl and πt are the longitudinal and transverse piezoresistive coefficients, while σl and σt are the longitudinal and transverse stress components where the piezoresistor is situated. A more thorough discussion of the history and mechanisms underlying piezoresistance in semiconductors can be found in [16]. The piezoresistive coefficients vary with dopant concentration. Experimental data was tabulated by Harley [17] for boron (p-type) piezoresistors. The longitudinal piezoresistive coefficient can be written as πl = Pπ0 where π0 = 72e −11 Pa−1 for a p-type piezoresistor oriented in the h110i direction and P is the concentration dependent piezoresistance factor, which is equal to  a b P = log10 (3) n where a = 0.2014, b = 1.53e22, and n is the dopant concentration. The piezoresistive coefficient varies according to the dopant type and the crystallographic orientation of the current flow relative to the applied stress. For a p-type dopant, the direction of maximum piezoresistive coefficient is the h110i direction, while for n-type dopants the optimum direction of stress and current is the h100i direction. The piezoresistance coefficients also depend on temperature [18], and the effect of temperature fluctuations on the output signal is commonly reduced by including an additional temperature compensation piezoresistor in the measurement circuit that is not subjected to a mechanical load.

FORCE SENSING OPTIMIZATION AND APPLICATIONS

289

Figure 1. Piezoresistive cantilevers are commonly fabricated using silicon-on-insulator wafers in combination with standard silicon micromachining processes. After the wafer is doped (a), the cantilever is defined (b) by reactive ion etching. Aluminum is sputtered to cover the frontside of the wafer and etched back to form bondpads (c). The cantilever is released by deep reactive ion etching from the backside of the wafer (d) followed by reactive ion etching of the buried oxide (e). A forming gas anneal is necessary to form low noise, ohmic contacts. An SEM of a finished device c 2009 IEEE. is shown in (f). Reprinted from Doll et al. [19].

2.2. FORCE AND DISPLACEMENT SENSITIVITY OF A CANTILEVER BEAM This model of piezoresistance is applicable to any piezoresistive device. In this section we specifically investigate the sensitivity of a cantilever beam, which is well suited for force detection. We assume a split-leg cantilever design; two separate legs each of length l pr and width w pr = w/2 form a loop to define the piezoresistor. The cantilever extends beyond the end of the piezoresistor to a total length l. The thickness, t, is uniform along the length. The gap between the legs is assumed to be negligibly wide, and the cantilever can be approximated to have a uniform width w. The dimensions and one of many possible microfabrication processes to form a cantilever are illustrated in Figure 1. The system is modeled as a linear elastic cantilever beam with a point load applied at the tip via Euler–Bernoulli beam theory. We assume negligible transverse stress in the cantilever legs, and the longitudinal stress induced as a function of distance x from the base and z from the neutral axis of the cantilever is: 12F(l − x)z . (4) wt 3 The longitudinal stress induced by a point load is zero at the neutral axis, and varies linearly through the cantilever thickness, thus the stress experienced by the piezoresistor varies by position. σ=

290

J.C. DOLL ET AL.

If the piezoresistor is uniformly doped, infinitely thin, and located at the surface of the cantilever where the stress is maximized, the fractional change in resistance is ∆ R 6πl (l − l pr /2) = F (5) R wt 2 as derived previously [20]. In practice, these assumptions overpredict cantilever sensitivity due to the finite thickness of the piezoresistor. Therefore, we introduce an efficiency factor, β ∗ as in [21], which accounts for the finite thickness of the piezoresistor (Figure 1) and proportionally reduces the fractional change in resistance, R t/2

2 −t/2 qµnPzdz β = t R t/2 qµndz ∗

(6)

−t/2

where the majority carrier mobility, µ, and piezoresistive coefficient, P, are both functions of dopant concentration, n, which varies with depth, z. In the case of a uniformly doped piezoresistor with finite thickness t pr , β ∗ simplifies to t pr ). (7) t A simplified form of β ∗ was first derived in [12] before being extended to a dopant profile with varying concentration in [21]. The effects of post-ion implantation annealing on β ∗ is discussed in more detail in [22]. Briefly, β ∗ does not vary monotonically with anneal time because of the competing effects of dopant activation and diffusion. A Wheatstone bridge is commonly used to transduce the change in resistance to a voltage. Although a bridge reduces the sensitivity of the system (Vout /Vbridge ≈ ∆ R/4R), it is straightforward to implement. For the sensitivity and noise calculations, here we assume a quarter-active Wheatstone bridge with an additional temperature compensation piezoresistor. The overall voltage sensitivity is given as β ∗ = P(1 −

3π0 (l − l pr /2) ∆V Vbridge β ∗ γ (8) = F 2wt 2 where γ is the ratio of the piezoresistor resistance to the total resistance measured. Resistance that does not contribute to the change in resistance with applied force, such as contact resistance and conducting traces, acts to reduce system sensitivity and increase noise. SF =

FORCE SENSING OPTIMIZATION AND APPLICATIONS

291

Figure 2. Noise power spectral density (PSD) for a cantilever and associated conditionining circuitry, which illustrates the contributions of Johnson and low frequency noise from various sources. Inset: c 2009 IEEE. integrated noise from 0.1 Hz. Reprinted from Park et al. [23].

2.3. NOISE IN PIEZORESISTORS Piezoresistive cantilever performance is limited by two primary sources of noise: Johnson and 1/f (Hooge) noise [1, 2]. The noise inherent to signal conditioning circuitry must considered as well and sets a noise floor for the piezoresistor. Johnson noise is the result of the thermal motion of carriers within resistive elements and is independent of frequency [24]. The Johnson noise of a balanced Wheatstone bridge is equal to the Johnson noise of a single resistor, so that the integrated Johnson noise power of the Wheatstone bridge in the frequency band fmin to fmax is VJ2 = 4kb T R( fmax − fmin ).

(9)

The piezoresistor resistance (R) can be calculated from the dopant concentration profile and corresponding sheet resistance. Variation in carrier mobility with concentration should be considered [25]. For a sheet resistance of Rs , R ≈ 2Rs l pr /w pr . The primary 1/f noise source in silicon piezoresistors is Hooge noise [2]. The voltage power spectral density of a single piezoresistor has been empirically modeled as 2 = SH

2 αVbias Nf

(10)

where Vbias = Vbridge /2 is the piezoresistor bias voltage, N is the total number of carriers in the resistor, and f is the frequency. The parameter α is an experimentally

292

J.C. DOLL ET AL.

measured value that is believed to be dependent upon crystal lattice quality. Ion implantation causes damage to the crystal that must be annealed out, and it has been √ observed that α decreases with the mean diffusion length ( Dt) of the dopant atoms during the anneal. For epitaxial piezoresistors, α = 10−5 is typical [17] although values of α as low as 10−7 have been reported for implanted piezoresistors [26]. The Wheatstone bridge is composed of two piezoresistors which have uncorrelated 1/f noise sources so the 1/f noise power is increased by a factor of two, and the integrated voltage noise power is VH2 =

2 αVbridge

2N

 ln

fmax fmin

 .

(11)

The number of carriers can be calculated from the dopant concentration profile and piezoresistor volume assuming a constant current density [17]. For a piezoresistor with Nz carriers per unit area, N ≈ 2l pr w pr Nz .

2.4. FORCE RESOLUTION AND DESIGN TRADEOFFS The minimum resolvable force can be calculated from the root mean square voltage noise and the force sensitivity of the device according to r Vnoise Fmin = = SF

2 αVbridge 4l pr w pr Nz

l

ln( ffmax ) + 8kB T Rs wprpr ( fmax − fmin ) min

3(l−0.5l pr )π0 γVbridge β ∗ 2wt 2

.

(12)

Force resolution is affected by several factors: cantilever dimensions (l, w, t), piezoresistor dimensions (l pr , w pr , γ), fabrication process parameters (Nz , Rs , α, β ∗ , γ), and operating parameters (Vbridge , T , fmin , fmax ). The integrated noise and force resolution of an example piezoresistive cantilever are shown in Figure 2. Force resolution improves with power dissipation, which can be shown by dividing the numerator and denominator of (12) by Vbridge to obtain q fmax α 1 4l pr w pr Nz ln( fmin ) + kB T W ( f max − f min ) , (13) Fmin = 3(l−0.5l pr )π0 γβ ∗ 2wt 2 2 where W is power dissipated in the piezoresistor (Vbridge /4R). It is clear that force resolution can be improved by increasing W to the point where Johnson noise is negligible. However, there is a limit to the maximum power dissipation sustainable by the cantilever because Joule heating can destroy the piezoresistor and large bias voltages lead to large leakage currents. The piezoresistor length ratio and performance can be calculated for a variety of process conditions in order to find the optimal design, as in [27]. A notable result from our optimization work is that the integrated Johnson and 1/f noise should be

FORCE SENSING OPTIMIZATION AND APPLICATIONS

293

Figure 3. Piezoresistive microcantilever (2 mm long, 30 µm wide, 7 µ m thick) glued on printed circuit board (a) with a 10 µ m diameter glass bead on the tip to provide a controlled contact geometry (b). A 1 µ N force applied to C. elegans induces a change in velocity (c), measured using a behavior tracking and force application system (d). A schematic of the force and displacement clamp system using proportional-integral-derivative (PID) field programmable gate array (FPGA) c 2009 IEEE. controller is also shown (e). Reprinted from Park et al. [23].

comparable (VJ ≈ VH ) for typical design conditions and constraints. Alternatively, the optimized design can be found numerically as in [28], which provides a convenient interface for the designer and can handle arbitrary nonlinear constraints.

3.

Applications

3.1. FORCE SENSORS Piezoresistive cantilevers are well-suited for the study of biomechanics at the microscale; they cover the relevant range of forces (nN to 100 µN), displacements (nm to 10 µ m), and offer sufficient bandwidth (tens to hundreds of kilohertz). We used piezoresistive cantilevers to investigate two fundamental issues related to touch sensation in the nematode C. elegans: body mechanics [9] and the behavioral touch threshold [23]. C. elegans is a model organism for genetics studies, including the study of mechanotransduction, the conversion of mechanical energy into biomechanical signals. In the first study, we used a piezoresistive cantilever to apply microscale forces to the nematode and develop a model for the mechanical structure of the body wall (Figure 3). In the behavioral study, piezoresistive cantilevers were used to measure

294

J.C. DOLL ET AL.

Figure 4. (a) Dual-axis piezoresistive AFM cantilever with orthogonal axes of compliance. Oblique ion implants are used to form electrical elements on vertical sidewalls and horizontal surfaces simultaneously. (b) SEM image of a fabricated device. Reprinted with permission from Chui et al. c 1998 American Institute of Physics. [29].

the minimum force detectable by wild-type C. elegans (Figure 3). By integrating the cantilever with a fast real-time controller, we developed a MEMS force-clamp system for applying user-defined force profiles (e.g. step, sinusoidal) to C. elegans. Using the system, we measured a touch sensation threshold ten times smaller than accesible with previous tools. Details of cantilever design parameters are presented in [22, 27]. Piezoresistive cantilevers are particularly well suited for high frequency force sensing. The cantilever dimensions are limited only by fabrication constraints and force resolution continuously improves as dimensions are reduced. We fabricated 340 nm thick piezoresistive cantilevers doped by POCl3 diffusion, yielding sub-nN force resolution with a measurement bandwidth up to 100 kHz [19]. Piezoresistors have been used to sense lateral or in-plane’ forces in a microaccelerometer [30] and underwater shear stress sensor [31]. Lateral piezoresistive sensors can be fabricated with ion implantation or epitaxy [32] and are typically located on vertical sidewalls in devices. Simultaneous sensing of two components of force has been demonstrated in cantilevers that combine sidewall piezoresistors with those oriented on a more usual top surface (Figure 4) [29]. Such dual-axis force sensors have been employed in data-writing applications and biomechanics studies of complex adhesion mechanisms [33]. ’

3.2. SCANNING PROBE MICROSCOPY Atomic force microscopy (AFM) with piezoresistive cantilevers was first demonstrated by Tortonese et al. [12]. Measurement of tip deflection via piezoresistive transduction has two advantages over the conventional laser beam bounce technique. First, the system setup is compact and inexpensive, enabling applications in space-constrained environments (for example, on upright or inverted microscopes or in cryostats). Second, because piezoresistive cantilevers do not require a laser,

FORCE SENSING OPTIMIZATION AND APPLICATIONS

295

samples are not susceptible to optical excitation, an important consideration in techniques such as scanning gate microscopy (SGM) [34]. In AFM, we are interested in optimizing the minimum resolvable tip displacement, dmin . Dividing (12) by k, the spring constant of the cantilever, we obtain an expression for dmin . By increasing k, we can improve the displacement resolution. Many scanning probe techniques are performed at liquid He temperatures (4.2 K and below). Noise is greatly reduced for piezoresistive cantilevers operated in these conditions. Instead, power dissipation becomes a key design parameter as the cooling power of most dilution refrigerators is in the order of tens of microwatts. With the considerations above, we have fabricated piezoresistive cantilevers with integrated coaxial tips. The probes can image nanometer topography in a 10 kHz bandwidth and the tips can generate tightly-confined electric field perturbations for high-resolution SGM.

3.3. CHEMICAL SENSORS A functional chemical layer deposited on the surface of a cantilever can be used for chemical sensing by surface stress change induced cantilever deflection [35]. Cantilevers have been used for detecting DNA [36], pH [37] and explosives [35]. Piezoresistive sensors are especially well suited to this task, because they are small, low power, have a relatively stable DC response, especially if temperature compensated [15]. Additionally, several cantilevers may be formed into an array. If each layer has varying response to chemical species, both the type and concentrations of the constituent chemical species present may be determined by factor analysis. Silicon cantilevers should be as short and as wide as possible take advantage of the transverse piezoresistive coefficient [38]. Slowly varying signals are difficult to measure with piezoresistors due to 1/f noise at low frequency. By fabricating relatively large cantilevers in [26] with a high dopant concentration and large number of carriers, we reduced the 1/f corner frequency to below 1 Hz. Four active piezoresistors were included at the base of the cantilever in a full-bridge Wheatstone bridge configuration, and an integrated force resolution of 100 pN was realized between 0.1 and 100 Hz (Figure 5).

4. Conclusions In summary, piezoresistive silicon transducers are widely used in MEMS for their simple fabrication, ease of integration and low-cost. Piezoresistive cantilevers can be readily fabricated at the micro and nanoscales for high performance force sensing. We have presented an overview of piezoresistive cantilever design and optimization and summarized several example applications. Cantilever design must balance

296

J.C. DOLL ET AL.

Figure 5. (a) Silicon microcantilever, 3.5 mm long, 0.65 mm wide, and 15 µ m thick with transverse and longitudinal piezoresistors. (b) Self-sensed thermomechanical noise spectral density for one c 2008 American of the fabricated cantilevers. Reprinted with permission from Mallon et al. [26]. Institute of Physics.

the competing requirements of low noise and high sensitivity in order to achieve optimized performance.

Acknowledgements

Fabrication work was performed in part at the Stanford Nanofabrication Facility (a member of the National Nanotechnology Infrastructure Network) supported by the NSF under Grant ECS-9731293, its lab members, and the industrial members of the Stanford Center for Integrated Systems. This work was supported by the National Institutes of Health under grant EB006745, and the National Science Foundation (NSF) under CAREER Award ECS-0449400, COINS NSF-NSEC ECS-0425914, CPN PHY-0425897, Sensors CTS-0428889 and NER ECCS0708031. JCD was supported in part by a National Defense Science and Engineering Graduate (NDSEG) Fellowship and an NSF Graduate Research Fellowship. S-JP was supported by a Samsung fellowship.

References 1. O. Hansen, A. Boisen, Noise in piezoresistive atomic force microscopy, Nanotechnology 10, 51 (1999) 2. J. Harley, T. Kenny, 1/f noise considerations for the design and process optimization ofpiezoresistive cantilevers, Microelectromechanical Systems (2000) 3. X. Yu, J. Thaysen, O. Hansen, A. Boisen, Optimization of sensitivity and noise in piezoresistive cantilevers, Journal of Applied Physics (2002) 4. A. Merlos, J. Santander, M. Alvarez, F. Campabadal, Optimized technology for the fabrication of piezoresistive pressure sensors, Journal Of Micromechanics And Microengineering 10, 204 (2000)

FORCE SENSING OPTIMIZATION AND APPLICATIONS

297

5. B. Bae, B. Flachsbart, K. Park, M. Shannon, Design optimization of a piezoresistive pressure sensor considering the output signal-to-noise ratio, Journal Of Micromechanics And Microengineering 14, 1597 (2004) 6. C. Pramanik, H. Saha, U. Gangopadhyay, Design optimization of a high performance silicon mems piezoresistive pressure sensor for biomedical applications, Journal Of Micromechanics And Microengineering 16, 2060 (2006) 7. Z. Wang, Y. Xu, Design and optimization of an ultra-sensitive piezoresistive accelerometer for continuous respiratory sound monitoring, Sensor Letters 5, 450 (2007) 8. G. Villanueva, J. Plaza, J. Montserrat, F. Perezmurano, J. Bausells, Crystalline silicon cantilevers for piezoresistive detection of biomolecular forces, Microelectronic Engineering p. 4 (2008) 9. S.J. Park, M.B. Goodman, B.L. Pruitt, Analysis of nematode mechanics by piezoresistive displacement clamp, Proceedings of the National Academy of Sciences 104(44), 17376 (2007) 10. G. Binnig, C. Quate, C. Gerber, Atomic force microscope, Physical Review Letters (1986) 11. F. Goericke, W. King, Modeling piezoresistive microcantilever sensor response to surface stress for biochemical sensors, Sensors Journal (2008) 12. M. Tortonese, R. Barrett, C. Quate, Atomic resolution with an atomic force microscope using piezoresistive detection, Applied Physics Letters (1993) 13. S.C. Minne, J.D. Adams, G. Yaralioglu, S.R. Manalis, A. Atalar, C.F. Quate, Centimeter scale atomic force microscope imaging and lithography, Applied Physics Letters (1998) 14. R. Ried, H. Mamin, B. Terris, L. Fan, D. Rugar, 5 mhz, 2 n/m piezoresistive cantilevers with incisive tips, Solid State Sensors and Actuators (1997) 15. C. Hagleitner, A. Hierlemann, D. Lange, A. Kummer, N. Kerness, O. Brand, H. Baltes, Smart single-chip gas sensor microsystem, Nature 414(6861), 293 (2001) 16. A.A. Barlian, W.T. Park, J.R. Mallon, A.J. Rastegar, B.L. Pruitt, Semiconductor piezoresistance for microsystems, Proceedings of the IEEE (2009) 17. J. Harley, T. Kenny, High-sensitivity piezoresistive cantilevers under 1000 a˚ thick, Appl. Phys. Lett (1999) 18. J. Richter, J. Pedersen, M. Brandbyge, E.V. Thomsen, O. Hansen, Piezoresistance in p-type silicon revisited, Journal of Applied Physics 104(2), 023715 (2008) 19. J.C. Doll, B.C. Petzold, P. Ghale, M.B. Goodman, B.L. Pruitt, High frequency force sensing with piezoresistive cantilevers, Proceedings of Transducers 2009 (in press) (2009) 20. M. Tortonese, Force sensors for scanning probe microcopy, Ph.D. dissertation, Dept. Appl. Phys., Stanford University (1993) 21. S.J. Park, A. Rastegar, T. Fung, A. Barlian, J. Mallon, B. Pruitt, Optimization of piezoresistive cantilever performance, Hilton Head 2008: A Solid-State Sensors, Actuators and Microsystems Workshop p. 3 (2008) 22. S.J. Park, J.C. Doll, B.L. Pruitt, Piezoresistive cantilever performance, part i: Analytical model for sensitivity (2009), (submitted)

298

J.C. DOLL ET AL.

23. S.J. Park, B. Petzold, M. Goodman, B. Pruitt, Piezoresistive cantilever-based force-clamp system for the study of mechanotransduction in c. elegans, Proceedings of MEMS 2009 pp. 188–191 (2009) 24. S.D. Senturia, Microsystem design (2000) 25. G. Masetti, M. Severi, S. Solmi, Modeling of carrier mobility against carrier concentration in arsenic-, phosphorus-, and boron-doped . . . , Electron Devices (1983) 26. J.R. Mallon, A.J. Rastegar, A.A. Barlian, M.T. Meyer, T.H. Fung, B.L. Pruitt, Low 1/f noise, full bridge, microcantilever with longitudinal and transverse piezoresistors, Applied Physics Letters 92, 3508 (2008) 27. S.J. Park, J.C. Doll, A.L. Rastegar, B.L. Pruitt, Piezoresistive cantilever performance, part ii: Optimization (2009), (submitted) 28. J.C. Doll, S.J. Park, B.L. Pruitt, Design optimization of piezoresistive cantilevers for force sensing in air and water (2009), (submitted) 29. B.W. Chui, T.W. Kenny, H.J. Mamin, B.D. Terris, D. Rugar, Independent detection of vertical and lateral forces with a sidewall-implanted dual-axis piezoresistive cantilever, Applied Physics Letters 72(11), 1388 (1998) 30. A. Partridge, J. Reynolds, B. Chui, E. Chow, A. Fitzgerald, L. Zhang, N. Maluf, T. Kenny, A high-performance planar piezoresistive accelerometer, Microelectromechanical Systems, Journal of 9(1), 58 (2000) 31. A.A. Barlian, S.J. Park, V. Mukundan, B.L. Pruitt, Design and characterization of microfabricated piezoresistive floating element-based shear stress sensors, Sensors and Actuators A: Physical 134(1), 77 (2007) 32. A. Barlian, N. Harjee, V. Mukundan, T. Fung, S.J. Park, B. Pruitt, Sidewall epitaxial piezoresistor process for in-plane sensing applications, Micro Electro Mechanical Systems (2008) 33. G. Hill, D. Soto, S. Lue, A. Peattie, R. Full, T. Kenny, Investigating the role of orientation angle on gecko setae adhesion using a dual-axis mems force sensor, Proceedings of Transducers 2007 pp. 2263–2266 (2007) 34. M. Topinka, B. LeRoy, S. Shaw, E. Heller, R. Westervelt, K. Maranowski, A. Gossard, Imaging coherent electron flow from a quantum point contact, Science 289(5488), 2323 (2000) 35. G. Wu, H. Ji, K. Hansen, T. Thundat, R. Datar, R. Cote, M.F. Hagan, A.K. Chakraborty, A. Majumdar, Origin of nanomechanical cantilever motion generated from biomolecular interactions, Proceedings of the National Academy of Sciences 98(4), 1560 (2001) 36. R. Mukhopadhyay, M. Lorentzen, J. Kjems, F. Besenbacher, Nanomechanical sensing of dna sequences using piezoresistive cantilevers, Langmuir 21(18), 8400 (2005) 37. Q.T. Trinh, G. Gerlach, J. Sorber, K.F. Arndt, Hydrogel-based piezoresistive ph sensors: Design, simulation and output characteristics, Sensors and Actuators B: Chemical 117(1), 17 (2006) 38. F. Goericke, W. King, Modeling piezoresistive microcantilever sensor response to surface stress for biochemical sensors, Sensors Journal, IEEE 8(8), 1404 (2008)

USING PARAMETRIC RESONANCE TO IMPROVE MICRO GYRSOCOPE ROBUSTNESS

LAURA OROPEZA-RAMOS1 , CHRISTOPHER B. BURGNER2 , AND KIMBERLY L. TURNER 3 1

Instituto de Investigaciones en Matemáticas Aplicadas y en Sistemas, Universidad Nacional Autónoma de México, Apartado Postal 20-726, Admón. No. 20 Del. Alvaro Obregón, CP 01000, D.F. México, E-mail: [email protected] 2

Department of Mechanical Engineering, University of California, Santa Barbara, Eng. II Bldg., Room 2355, Santa Barbara, CA 93106-5070, E-mail: [email protected] 3 Department of Mechanical Engineering, University of California, Santa Barbara, Eng. II Bldg., Room 2355, Santa Barbara, CA 93106-5070, E-mail: [email protected]

Abstract Knowing that mismatching between orthogonal modes is a common problem in micro gyroscopes based on harmonic oscillators, we have explored a different actuation mechanism based on parametric resonance, therefore reducing the sensitivity loss due to mismatching in the drive and the sense natural frequencies. We demonstrate experimentally that using a parametric resonance-based actuator, the drive-mode signal has rich dynamic behavior with a large response in a large bandwidth. In this way the system is able to induce oscillations in the sense-mode by Coriolis force coupling, despite a clear disparity on their fundamental frequencies. Thus we propose a micro gyroscope that is less sensitive to parameter variations due to its inherent dynamical properties.

Keywords: Gyroscope, MEMS.

1. Introduction There is a wide variety of designs and operating principles for micro-machined gyroscopes [1, 2]. However, almost all micromachined devices reported use of vibrating mechanical elements to sense rotation. As they are not based on rotational parts, this type of Coriolis force sensors’ are suitable for batch micro-fabrication. Foucault’s pendulum [3] is an analogous mechanism to the traditional vibratory rate ’

E. Gusev et al. (eds.), Advanced Materials and Technologies for Micro/Nano-Devices, Sensors and Actuators, DOI 10.1007/978-90-481-3807-4_24, © Springer Science + Business Media B.V. 2010

299

300

L. OROPEZA-RAMOS, C.B. BURGNER AND K.L. TURNER

gyroscopes (VRG). To explain it, let us represent a pendulum by a 2-Degree of Freedom (DOF) spring-mass system as is illustrated in the left of Figure 1. Assume that the pendulum oscillates along x-axis and the angular rotation Ω = 0. The total energy of the system is then accumulated in this x-mode. If the pendulum rotates with respect the z-axis at Ω != 0, the Coriolis acceleration will transfer the energy from x-mode to the y-mode causing the pendulum to precess until the energy is completely stored in the y-dir. A MEMGyroscope can be modeled in the same fashion as the pendulum by a 2-DOF spring-mass-damper system (Figure 1-right). The proof-mass is suspended by a set of springs that allow oscillations in two orthogonal directions or modes. Thus, the x-dir (drive-mode) is driven into oscillation and when the system is subjected to angular rotation Ωz , the oscillation in y-dir (sensemode) is induced by the Coriolis coupling between the angular rotation and the drive velocity. The governing equations in these orthogonal directions can be expressed as: mx¨ + cx x˙ + kx x − mΩ˙ z y = Fe + 2mΩzy˙ my¨ + cy y˙ + ky y − mΩ˙ zx = −2mΩz x˙

(1)

Figure 1. Pictorial representation of a pendulum and a MEMGyroscope both modeled as 2-DOF systems, where the Coriolis coupling between the drive-mode velocity and the angular rotation Ωz , induce motion in the orthogonal direction (sense-mode).

USING PARAMETRIC RESONANCE TO IMPROVE MICRO GYRSOCOPE

301

2. Research motivation To achieve high sensitivity in micro gyros based on harmonic oscillators, the drive and the sense resonant frequencies are typically designed and tuned to match, and the device is controlled to operate at or near the peak of the response curve (where amplitude is defined by the Q-factor). However, due to the current fabrication processes structural asymmetries are inevitable which translates in a dramatic lost of sensitivity. Thus, a system that requires such mode matching is very sensitive to parameter variations due to fabrication imperfections and operational conditions. Figure 2 shows that when the natural frequencies of drive and sense oscillators are identical, their resonance coincide in one peak which represents the highest possible amplitude. Nevertheless, imperfections in the fabrication process are completely unavoidable with the technology available at this point, therefore small asymmetries in the spring structures will result in mismatching of the fundamental frequencies. Observe in the Figure that as the stiffness mismatching increases, the one peak sense-output divides in the two frequency components decreasing the amplitude, which drastically affects the desired sensitivity.

Figure 2. This figure illustrates the effect of the mismatched frequencies due to fabrication imperfections. When the sense and drive oscillators stiffnesses are identical, the sense-mode response is peak amplified by Q. As differences of the drive and sense stiffnesses occur the sensitivity decays drastically [4].

Extensive efforts to overcome frequency mismatching have been pursued by postprocessing mode-matching through biasing an extra set of combs to electrostatically tune the frequencies [5] or by including additional controller schemes [6–9]. These alternatives require additional electronics in the rate sensor system. Complexity of the control electronics was shifted towards complexity in the dynamical system when Acar [10] proposed a gyro comprising of a 1-DOF drivemode oscillator and a 2-DOF sense-mode oscillator, formed by two interconnected proof masses. This provides a sense-mode frequency response with two resonant peaks and a flat region between them, where the device can be nominally operated.

302

L. OROPEZA-RAMOS, C.B. BURGNER AND K.L. TURNER

The drive-mode resonant frequency was located inside the sense-mode flat region of 200 Hz bandwidth. This clever work motivates our interest of analyzing other types of schemes to improve the robustness of a micro gyroscope response to parameter variations in the mechanical domain. A parametrically excited system is described by differential equations with time dependent coeffcients and has been previously studied in micro oscillators [11–15]. An interesting characteristic of these systems is that large responses over a large bandwidth can be generated even if the excitation frequency is far away from the natural frequency. This paper reports an overview of using parametric resonance as an actuation mechanism for a micro gyroscope, aimed towards alleviating the mismatching problem in certain range of frequencies, without adding complex controller schemes, electrostatic tuning or adding degrees of freedom.

Figure 3. Typical parametric frequency response of an oscillator actuated by non-interdigitated comb fingers [14].

2.1. PARAMETRIC EXCITATION IMPROVES THE PERFORMANCE To show how parametric resonance can balance the trade off between sensitivity and the spectrum of operation, Figure 3 is shown. Observe the particular behavior of the frequency response of a parametric resonance based system, where exists a quasi “flat” region that results in a large amplitude response over a wide range of frequencies. If the drive-mode is driven into parametric resonance, the sense natural frequency is allowed to lie anywhere inside this large gain region, increasing the possibility of the sense-oscillation gain amplifcation to be induced (through the Coriolis coupling) for a wide band of frequencies. Additionally the parametric resonance amplitude is independent of the system damping. Thus, a robust micro system that is less sensitive to parameter variations is presented.

USING PARAMETRIC RESONANCE TO IMPROVE MICRO GYRSOCOPE

303

Figure 4. Micrograph of the micro gyroscope fabricated using a single mask SOI process on a 20 m Si layer over 5 m insulator, obtaining high aspect ratio structures that yield good off-axis isolation.

3. The system TABLE 1. Nondimensional parameters, where m is the mass, cx and cy are the damping coefficients, k∗1 and k∗3 are the linear and the cubic stiffness coefficients, r1 and r3 are electrostatic coefficients that depend on the physical dimensions and spacing of the electrostatic comb-drives, VA is the voltage amplitude applied across the drives, ω is the driving frequency, and Ωz is the external angular velocity to be detected.

αx = δx3 =

2cx mω 4(kx3 +r3VA2 ) mω 2

αy =

2cy mω

βx =

2r1 VA2 mω 2

δy =

4ky mω 2

δy3 =

4ky3 mω 2

βx3 = γ=

2r3 VA2 mω 2

4Ωz ω

δx =

4(kx1 +r1VA2 ) mω 2

(·)$ =

d(·) dτ

The resonant Coriolis force sensor proposed is a two degree of freedom (DOF) structure (Figure 4) whose model and design have been detailed in [16]. The drivemode (x-dir) actuator based on non-interdigitated comb-fingers generates a force related to time and displacement dependent stiffness coefficients [17]. The sensemode (y-dir) is detected by a set of parallel plates. Constructing the device in this way, the micro gyroscope consists of 1-DOF driving oscillator governed by a nonlinear Mathieu equation [11, 18] and 1-DOF sensing oscillator governed by a Duffing model. Both of them are coupled by the Coriolis force as is modeled in the following normalized equations:

304

L. OROPEZA-RAMOS, C.B. BURGNER AND K.L. TURNER

x$$ + αx x$ + (δx + 2βx cos 2τ )x + (δx3 + 2βx3 cos 2τ )x3 − γ y$ = 0 y$$ + αy y$ + δy y + δy3 y3 + γ x$ = 0

(2)

The derivative operator and parameters are summarized in Table 1. Note that the expression for the primary mode (x-direction) in 2 is in the form of a nonlinear Mathieu/Hill equation, which is a second order nonlinear differential equation with periodic coefficients. In contrast to a harmonic response where the excitation appears as an inhomogeneity in the governing differential equations, here the excitation appears as timevarying stiffness coefficients in the governing differential equations. In a harmonic oscillator a small excitation can produce a large response only when the driving frequency is close to the linear natural frequency and the amplitude depends on the damping coefficient (Q-factor). However, a small parametric excitation can produce a large response when the driving frequency is away from the natural frequency of the system [19–21] and the amplitude does not depend on the viscous damping term to the first order.

4. Experimental characterization Experimental results of the dynamic behavior of drive and sense mode have been obtained using a laser vibrometer [22]. In Figure 5 drive and sense harmonic responses are plotted, clearly showing the strong mismatching of natural frequencies. However, the drive-mode parametrically actuated signal leads to a response that is 3 Harmonic Drive−Mode Va=1.0 V

Amplitude (mm/s)

2.5

Harmonic Sense−Mode Va=0.5 V Parametric Resonance Drive−Mode÷25 Va=16.0 V

2

1.5

1

0.5

0 7500

8000

8500

9000

Frequency (Hz)

Figure 5. Experimental frequency response of the drive-mode (% harmonic, ◦ parametric) and sensemode (♦ harmonic) tracked using laser vibrometer. Note the clear mismatching between drive and sense natural frequencies. Using a drive actuation which excites parametric resonance, the sensemode can be induced by Coriolis coupling in the presence of parameter variations.

USING PARAMETRIC RESONANCE TO IMPROVE MICRO GYRSOCOPE

305

larger in amplitude than the harmonic. In this case, the mechanical and electrical nonlinearities dominate the parametric amplitude in a wider bandwidth. Therefore the mismatch of the drive and sense fundamental frequencies still allows the sensemode oscillations to be induced by Coriolis coupling over a range of 1 kHz. Note that in the figure, the amplitude of the driving parametric response is divided by 25 for plotting purposes which indicates that the drive-mode signal is substantially amplified using the proposed nonlinearity in the actuation mechanism. As is discussed in [16] the amplitude of the parametric resonance response is not dependent on the Q factor; however, the damping of the system determines the voltage threshold required to enter into the parametric regime. All the measurements were taken under pressure of 50 mTorr (Q ∼7,000) to effectively lower the critical actuation voltage amplitude. For this particular design, the parametric resonance is achieved over voltages around 9 Vp−p.

Figure 6. Photograph of the MS3110 IC mounted and wire bonded in a 24-package together with the MEMGyro (top). Schematic of the experimental setup for angular rate response measurements (bottom).

4.1. RATE TABLE PERFORMANCE To detect the sense-mode motion through the set of electrostatic parallel plates, a commercial capacitive readout (MS3110 Irvine Sensors © [23]) was mounted and wire bonded close to the micro gyroscope to minimize losses (Figure 6). Due to the bulk micromachining process, the micro gyroscope is built with an input port designated for actuation and an output port for detection. Both of them share a common port connected to the mass, i.e. a single capacitive detection scheme that may not achieve the ultimate resolution of the commercial readout. Since both actuation and sensing are based on capacitance, the system suffers from a feed-through charge from the actuation voltage, which is clearly dominant over the sensing capacitance. Therefore, to detect small Coriolis-induced output signals at the same frequency of

306

L. OROPEZA-RAMOS, C.B. BURGNER AND K.L. TURNER

the driving input signal, usually of the order of tens of volts, may be difficult to achieve. In our case this issue is circumvented by the parametric resonance condition of driving the micro gyroscope at 2 fy , where fy is the fundamental frequency of the sense-mode. Driving far from the oscillation of interest, allows the feed-through charge to be filtered out and the Coriolis signal to be distinguishable at fy . For angular rate characterization we used the experimental setup shown at the bottom of the figure. Inside the chamber a 24 DIP pin socket is placed to hold the ceramic package where both the device and the readout are integrated and the chamber is pumped down to a pressure of 50 mTorr. The parametric regime of the drive-mode begins at a driving frequency of fa = 2 fx = 15, 770 Hz; nevertheless, this actuation generates a response that is below the natural frequency of the sensemode fs = 7, 975 Hz. Consequently, to achieve the highest sensitivity of the sensemode, the actuation frequency simply needs to be changed to fa = 2 fy = 15, 950 Hz. This is possible due to the inherent flexibility of parametric excitation already discussed. Once the actuation oscillation frequency is in correspondence to the natural frequency of the sense-mode, the micro gyroscope can be used to detect the rotations produced by the rate table. In the following sections, a complete rate table characterization is presented.

Figure 7. The measured gyroscope output in response to angular rate inputs between ± 150 deg/s range.

The linearity of the scale factor is an important performance parameter for angular rate sensors. The resulting characteristics used to determine the scale factor and linearity of the output response of the gyroscope are shown in Figure 7. The gyroscope demonstrates a scale factor of 11 µ V/deg/s and the data presents a strong linear correlation since the R2 -nonlinearity is better than 0.8% in a measurement range of ±150 deg/s.

USING PARAMETRIC RESONANCE TO IMPROVE MICRO GYRSOCOPE

307

Figure 8. Sense-mode output detected with the spectrum analyzer in response to a 2π deg/s rate input.

4.2. RESOLUTION AND NOISE The noise limits the resolution of the sensor and is expressed in terms of the standard deviation of equivalent rotation rate per square root of bandwidth of detection [1]. For noise characterization purposes, Figure 8 shows a screen shot of the Spectrum Analyzer which was used to monitor the output of the micro gyroscope. The peak amplitude is tracked and detected to be 2.2105 mV rms for a rate input of 2π deg/s, which gives a mechanical rate sensitivity of 352 µV rms/(deg/s). The noise floor is measured to be 46 µV rms/ √Hz. The noise-equivalent rate of the gyroscope then corresponds to 0.1 deg/s/√Hz. Considering the scale factor of the system defined above, the measured rms noise floor is equivalent to fluctuations of 6 deg/s.

5. Conclusions In this paper we present the proof of concept of a novel Micro Electro Mechanical Gyroscope actuated by a set of non-interdigitated comb-fingers which generate a force that is related to time and displacement dependent stiffness coefficients. Thus, parametric resonance excitation amplifies the drive-mode response over a wide set of frequencies. In this way, differences in drive and sense fundamental frequencies do not compromise the sensitivity in 1 kHz range. The 2-DOF micro-gyroscope is fabricated using the standard SOI process flow and rate table characterization is presented under 50 mTorr pressure. Our device has demonstrated a scale-factor of 5 µ V/deg/s and a nonlinearity of 0.8% both within ± 150 deg/s measurement range. The noise-equivalent rate of the gyroscope corresponds to 0.1 d deg/s/ √ Hz. This resonant Coriolis force sensor overall performance meets the rate grade specifications stated in [1]. For tactical grade applications, resolution and quadra-

308

L. OROPEZA-RAMOS, C.B. BURGNER AND K.L. TURNER

ture coupling must be improved. For this particular design, the range of robustness achieved is 1 kHz compared to 200 Hz in [10] and it can be tuned for other applications. The noise can be drastically improved by fine tuning the electronics and the structure design can also be modified to diminish the quadrature coupling. The benefits of using parametric resonance as an actuation mechanism of a micro gyroscope are analyzed theoretical and experimentally. In conclusion, the unique properties of parametric resonance make this micro gyroscope robust to parameter variations over a wide spectrum and its performance has been characterized.

Acknowledgements Authors would like to thank Prof. Steven W. Shaw (Michigan State University) and Prof. Jeffrey Rhoads (Purdue University) for their contribution to the parametric metric resonance analysis.

References 1. N. Yazdi, F. Ayazi, K. Najafi, Micromachined inertial sensors, Proceedings of the IEEE 86 No. 8. 2. W. Clark, Micromachined vibratory rate gyroscopes, Phd thesis, University of California, Berkeley (1997). 3. W. Wrigley, W.M. Hollister, W.G. Denhard, Gyroscopic Theory, Design and Instrumentation, Cambridge Mass, M.I.T. Press, 1969. 4. C. Acar, A. Shkel, Nonresonant micromachined gyroscopes with structural mode-decoupling, IEEE Sensors Journal 3, No. 4. 5. S. Alper, T. Akin, A single-crystal silicon symmetrical and decoupled mems gyroscope on an insulating substrate, JMEMS 14 No. 4. 6. S. Park, R. Horowitz, Adaptive control for the conventional mode of operation of mems gyroscopes, Journal of Microelectromechanical Systems 12 (2003) 101–108. 7. R. Leland, Adaptive mode tuning for vibrational gyroscopes, IEEE Transactions on Control Systems Technology 11 (2003) 242–247. 8. C. Painter, A. Shkel, Active structural error suppression in mems vibratory rate integrating gyroscopes, Sensors Journal, IEEE 3 (2003) 595–606. 9. A. Shkel, R. Horowitz, A. Seshia, S. Park, R. Howe, Dynamics and control of micromachined gyroscopes, Proc. American Control Conference 3 (1999) 2119–2124. 10. C. Acar, A. Shkel, Inherently Robust Micromachined Gyroscopes With 2-DOF Sense-Mode Oscillator, Journal of Microelectromechanical Systems, Vol. 15, Issue 2, (April 2006) 380– 387. 11. K. L. Turner, S. A. Miller, P. Hartwell, N. MacDonald, S. Strogatz, S. Adams, Five parametric resonances in a microelectromechanical system, Nature (1998) 149–152. 12. R. Baskaran, Parametric resonance and amplification in single and coupled micro electro mechanical systems, Phd thesis, University of California, Santa Barbara (September 2003). 13. W. Zhang, Nonlinear dynamics of micro-electro-mechanical oscillators and their application in mass sensing, Phd thesis, University of California, Santa Barbara (August 2004). 14. B. DeMartini, J. F. Rhoads, K. L. Turner, S. W. Shaw, J. Moehlis, Linear and nonlinear tuning of parametrically excited mems oscillators, Journal of Microelectromechanical Systems 16(2). 15. J. F. Rhoads, S. W. Shaw, K. L. Turner, R. Baskaran, Tunable micromechanical filters that expolit parametric resonance, Journal of Vibration and Acoustics 127-Issue 5. 16. L. Oropeza-Ramos, C. B. Burgner, K. L. Turner, Robust micro-rate sensor actuated by parametric resonance, Sensors & Actuators: A. Physical,Volume 152, Issue 1, 21 May 2009, Pages 80-87.

USING PARAMETRIC RESONANCE TO IMPROVE MICRO GYRSOCOPE

309

17. S. Adams, F. Bertsch, K. Shaw, N. MacDonald, Independent tuning of linear and nonlinear stiffness coefficients, J. Microelectromechanical Systems 7 (1998) 172–180. 18. W. Zhang, R. Baskaran, K. Turner, Effect of cubic nonlinearity on auto-parametrically amplified resonant mems mass sensor, Sensors and Actuators A (Physical) 102, Issues 1-2 (2002) 139–150. 19. A. Nayfeh, D. Mook, Nonlinear Oscillations, Wiley and Sons, 1979. 20. R. Rand, Lecture notes on nonlinear vibrations, ver. 34a (2000). 21. M. Cartmell, Introduction to linear, parametric, and nonlinear vibrations, Chapman and Hall, 1990. 22. K. L. Turner, P. Hartwell, N. MacDonald, Multi-dimensional mems motion characterization using laser vibrometry, Transducers (1999) 1144–1147. 23. http://www.irvine-sensors.com.

SUBJECT INDEX 1/f noise, 206 3D integration, 179, 191 accelerometer, 3, 17, 67 AlGaAs, 225 amorphous metals, 167 antenna, 75 Bain distortion, 237 biosensors, 275 carrier number fluctuation, 206 charge reading, 41 chitosan, 275 CMOS MEMS integration, 17, 41 composite cantilever, 261 crystalline-silicon and porous silicon, 261 design, 191 DRIE (deep reactive ion etching), 157 dry etching, 215 electron mobility, 206 emitting properties, 101 etching reactor, 215 ferroelectric memory, 41 filter, 75 flicker-noise, 206 fusion bonding, 167 gas transport, 215 gold stud bump bonding, 191 grapheme, 206 graphene transistors, 206 gyroscope, 31, 67 HAR (high aspect ratio), 157 HF-vapour etching, 167 high-impedance surface, 89 Hooge parameter of grapheme, 206 Inertial Measurement Unit (IMU), 17, 67 Inertial Navigation Unit (INU), 67 integrated sensor, 31 integration, 249 internal stresses, 237

lab on a chip, 275 layered structures, 237 LiNbO3, 31 low temperature heterostructures, 225 low-frequency noise, 206 LTCC, 31 martensitic transition, 237 membrane, 75 MEMS, 31, 41, 67, 157, 167, 179, 191, 215, 275 MEMS cantilever arrays, 261 metal, 101 Micromachining, 67, 75 micro-mover, 41 microphone, 31 microsensor, 3 micro-structure, 3, 17 microswitch, 89 micro-systems, 17 monocrystalline silicon, 89 multi-sensor, 17 non-volatile memory, 41 numerical modeling, 215 optical scanner, 31 optical switching, 101 packaging, 31 parameter ramping, 157 phase shifter, 89 photonic band gap, 101 photonic crystal, 101 piezoresistor, 3, 17 piezo-transistor, 3, 17 pressure sensor, 3, 17, 31 principle of multi-axis measurements, 17 probe card, 31 probe storage, 41 Raman backscattering, 225 receiver, 75 RF MEMS, 89 sacrificial layer, 215 SAW, 31

311

312 scanning probe, 41 semiconductor, 101 sensing chemical warfare agents, 261 sensing explosives, 261 sensitive integrated circuits, 3, 17 shape memory effect, 237 shear stress, 237 SiC, 31 silicon, 157 silicon processing, 249 simulation, 191 SLID bonding, 179 smart sensors, 249 sticking coefficient, 215 superelasticity, 237 Surface Acoustic Wave, 31

SUBJECT INDEX switch, 31 synthetic opal, 101 thermoelasticity, 237 thin film technology, 167 Tobacco mosaic virus, 275 top-gate graphene devices, 206 transponder, 31 TSV, 191 vertically integrated cantilevers, 261 wafer bonding, 179, 191 wafer level packaging, 179, 191 XRD, 225

AUTHOR INDEX Aasmundtveit K., 179 Adams D., 41 Adiguzel O., 237 Aharon O., 261 Arsentyev I., 225 Ascanio P., 41 Ashraf H., 157

Kim B., 41 Klein M., 191 Knight G., 41 Knizhnik A., 215 Koev S., 275 Konstantinidis G., 75 Krylov S., 117

Balandin A.A., 205 Barlian A. A., 287 Belov N., 41 Bentley W., 275 Biganzoli F., 67 Blomberg M., 167 Burgner C. B., 299 Bystrov P., 215

Laamanen M., 167 Lea L. M., 157 Lietaer N., 191 Liu G., 205 Liu H., 179 Luo X., 275

Capovilla M., 67 Chou T-K., 41 Cohen O., 261 Culver J., 275 De Nuccio R., 67 Dick N., 117 Doll J. C., 287 Domashevskaya E., 225 Dykstra P., 275 Eichen Y., 261 Elfving A., 191 Esashi M., 31 French P.J., 249 Gal L., 261 Gerasopoulos K., 275 Ghodssi R., 275 Glotov A., 225 Golubev V.G., 101

Ma Q., 41 Mallon J. R. Jr., 287 Meyer M., 275 Müller A., 75 Neculoiu D., 75 Nemirovsky Y., 261 Oberhammer J., 89 Oropeza-Ramos L., 299 Papaioannou G., 141 Park S. J., 287 Pasolini F., 67 Payne G., 275 Pekko P., 167 Potapkin B.V., 215 Prainsack J., 191 Prandi L., 67 Pruitt B. L., 287 Puurunen R., 167

Harjee N., 287 Heck J., 41 Hill G.C., 287 Hoivik N., 179 Hopkins J., 157

Rao V., 41 Rastegar A. J., 287 Reitz S., 191 Rissanen A., 167 Ritala H., 167 Rubloff G., 275 Rumyantsev S., 205 Rusakov A., 215

Kattelus H., 167 Kiihamäki J., 167

Saarilahti J., 167 Salomonsen G., 179

313

314 Schjølberg-Henriksen K., 191 Schneider P., 191 Seredin P.V., 225 Shao Q., 205 Shemesh A., 261 Shur M., 205 Somjit N., 89 Stankevich A., 225 Stark R., 41 Steeneken P.G., 129 Sterner M., 89 Stillman W., 205 Stolyarova S., 261 Stulemeijer J., 129

AUTHOR INDEX Taklo M.M.V., 191 Tarasov I., 225 Tchelepi G., 41 Turner K. L., 299 Vaganov V., 3, 17 Vähä-Heikilä T., 75 Vigna B., 67 Vinokurov D., 225 Wang K., 179 Weber J., 191